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8 7 6 5 4 3 2 1

CK
APPD

Thu Apr 17 17:11:44 2014


1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. REV ECN DESCRIPTION OF REVISION
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. DATE
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
7 0002727241 ENGINEERING RELEASED 2014-04-18

N61 BOM CALLOUTS


N61 CARRIER BUILD PART#

051-9903

820-3486
QTY

1
DESCRIPTION

SCH, MLB, N61

PCBF, MLB, N61


REFERENCE DESIGNATOR(S)

SCH

PCB
CRITICAL

CRITICAL

CRITICAL
BOM OPTION

?
TABLE_5_HEAD

TABLE_5_ITEM

TABLE_5_ITEM

PDF PAGE CONTENTS


NAND BOM OPTIONS D
TABLE_5_ITEM

D 2
TABLE_TABLEOFCONTENTS_HEAD

3
TABLE_TABLEOFCONTENTS_ITEM
2
3
SOC:MAIN N56_MLB 08/29/2013
PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION
TABLE_5_HEAD
825-6838

825-6838
1

1
EEEE FOR 639-4237 16GB

EEEE FOR 639-5838 32GB


EEEE_G16T

EEEE_G16R
CRITICAL

CRITICAL
EEEE_16G

EEEE_32G
TABLE_5_ITEM

SOC:I/OS N56_MLB 08/29/2013 TABLE_5_ITEM

4 4
TABLE_5_ITEM

TABLE_TABLEOFCONTENTS_ITEM

SOC:VDDCA,VDD1/2,VDD,VDD_CPU,VDD_GPU N56_MLB 08/29/2013 335S0998 1 NAND,19NM,16GX8,MLC,PPN1.5 U0604 CRITICAL NAND_16G 825-6838 1 EEEE FOR 639-5839 64GB EEEE_G16Q CRITICAL EEEE_64G

5 5
TABLE_5_ITEM

SOC:GND,VDDIO18,VDDIOD,VDD_VAR_SOC
TABLE_TABLEOFCONTENTS_ITEM TABLE_5_ITEM

N56_MLB 08/29/2013 335S0993 1 NAND,19NM,32GX8,MLC,PPN1.5 U0604 CRITICAL NAND_32G 825-6838 1 EEEE FOR 639-00025 128GB EEEE_G16N CRITICAL EEEE_128G
6
TABLE_TABLEOFCONTENTS_ITEM

6 SOC:NAND N56_MLB 08/29/2013 TABLE_5_ITEM


TABLE_5_ITEM

335S0994 1 NAND,19NM,64GX8,MLC,PPN1.5 U0604 CRITICAL NAND_64G 825-6838 1 EEEE FOR 639-00208 16GB EEEE_F98F CRITICAL EEEE_16G_TDDLTE
7
TABLE_TABLEOFCONTENTS_ITEM

7 SOC:CAM,LCD,LPDP,PCIE N56_MLB 08/29/2013 TABLE_5_ITEM


TABLE_5_ITEM

335S00010 1 NAND,19NM,128GX8,TLC,PPN1.5 U0604 CRITICAL NAND_128G 825-6838 1 EEEE FOR 639-00209 32GB EEEE_FQK0 CRITICAL EEEE_32G_TDDLTE
8
TABLE_TABLEOFCONTENTS_ITEM

8 IO:BUTTON FLEX CONN N61_MLB 08/26/2013 TABLE_5_ITEM

TABLE_5_ITEM

9 9 138S0867 1 CAP,X5R,10UF,20%,6.3V,0.65MM,HRTZ,0402 C0610,C0611,C0614,C0634 CRITICAL NAND_16G 825-6838 1 EEEE FOR 639-00210 64GB EEEE_FQJY CRITICAL EEEE_64G_TDDLTE
AUDIO:L67 CODEC (1/2)
TABLE_TABLEOFCONTENTS_ITEM

N61_MLB 08/26/2013 TABLE_5_ITEM

10 10
TABLE_5_ITEM

TABLE_TABLEOFCONTENTS_ITEM

AUDIO:L67 CODEC (2/2) N61_MLB 08/26/2013 138S0867 1 CAP,X5R,10UF,20%,6.3V,0.65MM,HRTZ,0402 C0613,C0633,C0610,C0611,C0614,C0634 CRITICAL NAND_32G & NAND_64G 825-6838 1 EEEE FOR 639-00212 128GB EEEE_FY9W CRITICAL EEEE_128G_TLC_TDDLTE

11
TABLE_TABLEOFCONTENTS_ITEM

11 CAMERA:FRONT FLEX CONN N61_MLB 08/26/2013


TABLE_5_ITEM

138S00003 1 CAP,X5R,15UF,20%,6.3V,0.65MM,HRTZ,0402 C0613,C0633,C0610,C0611,C0614,C0634 CRITICAL NAND_128G


12
TABLE_TABLEOFCONTENTS_ITEM

12 POWER:ADI(1/2) N56_MLB 08/29/2013


13
TABLE_TABLEOFCONTENTS_ITEM

13 POWER:ADI(2/2) N56_MLB 08/29/2013


14
TABLE_TABLEOFCONTENTS_ITEM

14 POWER:TIGRISR,VIBE DRIVER
15
TABLE_TABLEOFCONTENTS_ITEM

15 DISPLAY:CHESTNUT,BACKLIGHT DRIVER
N61_MLB

N61_MLB
08/21/2013

08/26/2013
ALTERNATE NAND BOM OPTIONS
16
TABLE_TABLEOFCONTENTS_ITEM

16 AUDIO:SPKR AMP,STROBE N61_MLB 08/26/2013


TABLE_ALT_HEAD

PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:


17
TABLE_TABLEOFCONTENTS_ITEM

17 PART NUMBER
IO:TRISTAR2 N61_MLB 08/26/2013 TABLE_ALT_ITEM

18
TABLE_TABLEOFCONTENTS_ITEM

18 IO:DOCK FLEX CONN N61_MLB 08/26/2013 335S0992 335S0998 ALTERNATE U0604 TOSHIBA,NAND,16GB

19 19
TABLE_ALT_ITEM

SENSORS:COMPASS
TABLE_TABLEOFCONTENTS_ITEM

N61_MLB 08/26/2013 335S1038 335S0998 ALTERNATE U0604 HYNIX,NAND,16GB

20
TABLE_TABLEOFCONTENTS_ITEM

20 DISPLAY:FLEX CONN N61_MLB 08/26/2013


TABLE_ALT_ITEM

335S1040 335S0994 ALTERNATE U0604 HYNIX,NAND,64GB


21
TABLE_TABLEOFCONTENTS_ITEM

21 SENSORS:MESA FLEX CONN N61_MLB 08/26/2013 TABLE_ALT_ITEM

335S00014 335S0994 ALTERNATE U0604 TOSHIBA,NAND,64GB


22
TABLE_TABLEOFCONTENTS_ITEM

22 SENSORS:OSCAR,CARBON,PHOS,MAGNESIUM N61_MLB 08/26/2013

C
TABLE_ALT_ITEM

C 23
TABLE_TABLEOFCONTENTS_ITEM

24
23
24
CAMERA:REAR FLEX CONN N61_MLB 08/26/2013
335S00015

335S00009
335S00010

335S0994
ALTERNATE

ALTERNATE
U0604

U0604
TOSHIBA,NAND128GB

SANDISK,NAND,64GB,TLC
TABLE_ALT_ITEM

TOUCH:CUMULUS,MESON
TABLE_TABLEOFCONTENTS_ITEM

N/A N/A
25
TABLE_TABLEOFCONTENTS_ITEM

25 POWER:BATT CONN,TPS,PD FEATURES


26
TABLE_TABLEOFCONTENTS_ITEM

26 SYSTEM:VOLTAGE PROPERTIES
N61_MLB

N56_MLB
08/26/2013

09/10/2013
ALTERNATE BOM OPTIONS
27
TABLE_TABLEOFCONTENTS_ITEM

27 SYSTEM:N61 SPECIFIC N56_MLB 09/10/2013


TABLE_ALT_HEAD

PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:


28 28 PART NUMBER
SHIELD BOM OPTIONS
TABLE_TABLEOFCONTENTS_ITEM

BLANK N56_MLB 09/10/2013 TABLE_ALT_ITEM

29
TABLE_TABLEOFCONTENTS_ITEM

30 CELL:ALIASES TABLE_5_HEAD
152S1844 152S1836 ALTERNATE L1604 TY ALT INDUCTOR

30 31 PART# QTY DESCRIPTION REFERENCE DESIGNATOR(S) CRITICAL BOM OPTION TABLE_ALT_ITEM

AP INTERFACE & DEBUG CONNECTORS


TABLE_TABLEOFCONTENTS_ITEM

N61_RADIO_MLB 03/24/2014 TABLE_5_ITEM


152S1842 152S1849 ALTERNATE L1519 TY ALT INDUCTOR
31
TABLE_TABLEOFCONTENTS_ITEM

32 BASEBAND PMU (1 0F 2) N61_RADIO_MLB 03/24/2014 604-00241 1 SUBASSY, SHIELD, UPPER FRONT, N61 SH2501 CRITICAL COMMON TABLE_ALT_ITEM

197S0392 197S0369 ALTERNATE Y1200 ESPON ALT XTAL


32 33
TABLE_5_ITEM

TABLE_TABLEOFCONTENTS_ITEM

BASEBAND PMU (2 OF 2) N61_RADIO_MLB 03/24/2014 604-00242 1 SUBASSY, SHIELD, LOWER FRONT, N61 SH2502 CRITICAL COMMON TABLE_ALT_ITEM

197S0399 197S0369 ALTERNATE Y1200 NDK ALT XTAL


33
TABLE_TABLEOFCONTENTS_ITEM

34 BASEBAND (1 OF 2) N61_RADIO_MLB 03/24/2014


TABLE_5_ITEM

604-00243 1 SUBASSY, SHIELD, LOWER BACK, N61 SH2504 CRITICAL COMMON TABLE_ALT_ITEM

34 35 338S1285 338S1202 ALTERNATE U1601 L21 SPKAMP


BASEBAND (1 OF 2)
TABLE_TABLEOFCONTENTS_ITEM

N61_RADIO_MLB 03/24/2014 TABLE_5_ITEM

604-00244 1 SUBASSY, SA SHIELD, N61 SH2506 CRITICAL COMMON L1209,L1211, L1213


TABLE_ALT_ITEM

35
TABLE_TABLEOFCONTENTS_ITEM

36 MOBILE DATA MODEM (2 OF 2) N61_RADIO_MLB 03/24/2014 152S2034 152S2033 ALTERNATE 1.2MM 1.0UH, CYNTEC

36 37
TABLE_ALT_ITEM

L1210,L1212, L1214
RF TRANSCEIVER (1 0F 3)
TABLE_TABLEOFCONTENTS_ITEM

N61_RADIO_MLB 03/24/2014 152S00004 152S2049 ALTERNATE 1.2MM 0.47UH, CYNTEC


37
TABLE_TABLEOFCONTENTS_ITEM

38 RF TRANSCEIVER (2 OF 3) N61_RADIO_MLB 03/24/2014 U0201


TABLE_ALT_ITEM

339S00005 339S0246 ALTERNATE FIJI, B0, SAMSUNG


38
TABLE_TABLEOFCONTENTS_ITEM

39 RF TRANSCEIVER (3 OF 3) N61_RADIO_MLB 03/24/2014 TABLE_ALT_ITEM

339S0247 339S0246 ALTERNATE U0201 FIJI, B0, HYNIX


39
TABLE_TABLEOFCONTENTS_ITEM

40 QFE DCDC N61_RADIO_MLB 03/24/2014 TABLE_ALT_ITEM

339S00006 339S0246 ALTERNATE U0201 FIJI, B1, E


40
TABLE_TABLEOFCONTENTS_ITEM

41 2G PA N61_RADIO_MLB 03/24/2014 TABLE_ALT_ITEM

41 42 339S00007 339S0246 ALTERNATE U0201 FIJI, B1, H


VERY LOW BAND PAD
TABLE_TABLEOFCONTENTS_ITEM

N61_RADIO_MLB 03/24/2014
42 43
TABLE_ALT_ITEM

TABLE_TABLEOFCONTENTS_ITEM

LOW BAND PAD N61_RADIO_MLB 03/24/2014 339S00008 339S0246 ALTERNATE U0201 FIJI, B1, S
43
TABLE_TABLEOFCONTENTS_ITEM

44 MID BAND PAD N61_RADIO_MLB 03/24/2014


TABLE_ALT_ITEM

155S0773 155S0453 ALTERNATE TY 120OHM FERRITE

B 44
TABLE_TABLEOFCONTENTS_ITEM

45
45
46
HIGH BAND PAD N61_RADIO_MLB 03/24/2014
118S0764 118S0717 ALTERNATE R1309 3.92KOHM, 01005
TABLE_ALT_ITEM

B
ANTENNA SWITCH
TABLE_TABLEOFCONTENTS_ITEM

N61_RADIO_MLB 03/24/2014 TABLE_ALT_ITEM

343S0688 343S0638 ALTERNATE U2401 CUMULUS C1, FAB4


46
TABLE_TABLEOFCONTENTS_ITEM

47 HIGH BAND SWITCH N61_RADIO_MLB 03/24/2014 TABLE_ALT_ITEM

47
TABLE_TABLEOFCONTENTS_ITEM

48 138S00005 138S00003 ALTERNATE C1290 15UF,0402,HRTZL CAP


RX DIVERSITY N61_RADIO_MLB 03/24/2014
48 49
TABLE_ALT_ITEM

TABLE_TABLEOFCONTENTS_ITEM

GPS N61_RADIO_MLB 03/24/2014 155S00011 155S00008 ALTERNATE L1135 CMC,90OHM,MURATA


49
TABLE_TABLEOFCONTENTS_ITEM

50 GPS N61_RADIO_MLB 03/24/2014 DZ1113


TABLE_ALT_ITEM

377S0168 377S0140 ALTERNATE SUPPR,TRANS,VARISTOR,AMOTECH

50
TABLE_TABLEOFCONTENTS_ITEM

51 ANTENNA FEEDS N61_RADIO_MLB 03/24/2014 TABLE_ALT_ITEM

155S0885 155S0610 ALTERNATE FL1802,FL1803 FERR BD,150OHM,200MA,01005


51
TABLE_TABLEOFCONTENTS_ITEM

52 WIFI/BT: MODULE AND FRONT END N61_RADIO_MLB 03/24/2014 TABLE_ALT_ITEM

52
TABLE_TABLEOFCONTENTS_ITEM

53 138S0648 138S0652 ALTERNATE C1018 CAP,4.7UF,20%,6.3V,0402,H=0.65MM


N61_RADIO_MLB 03/24/2014 TABLE_ALT_ITEM

53
TABLE_TABLEOFCONTENTS_ITEM

54 JUMPER N61_RADIO_MLB 03/24/2014 138S0657 138S0702 ALTERNATE C1106 CAP,4.3UF,20%,4V,0610

54 55
TABLE_ALT_ITEM

JUMPER
TABLE_TABLEOFCONTENTS_ITEM

N61_RADIO_MLB 03/24/2014 338S00028 338S00017 ALTERNATE U2203 CARBON, BOSCH, BMI162BC


TABLE_TABLEOFCONTENTS_ITEM TABLE_ALT_ITEM

338S00029 338S00017 ALTERNATE U2203 CARBON, ST, AP6DS2AA

SCH 051-9903
TABLE_ALT_ITEM

335S00013 335S0894 ALTERNATE U0301 ST 8K EEPROM

BRD 820-3486
MCO 056-6825
A A
BOM 639-4237 (16GB,BETTER) BOM 639-00208 (16GB,BETTER,DTD) DRAWING TITLE
SCHEM,MLB,N61
BOM 639-5838 (32GB,BEST) BOM 639-00209 (32GB,BEST,DTD) DRAWING NUMBER
051-9903
SIZE
D
BOM 639-5839 (64GB,ULTRA) BOM 639-00210 (64GB,ULTRA,DTD) R
Apple Inc. REVISION
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE

BOM 639-00025(128GB,SUPREME,TLC) BOM 639-00212(128GB,SUPREME,TLC,DTD) PROPRIETARY PROPERTY OF APPLE INC.


THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
PAGE
1 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 1 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

FIJI: JTAG,USB,HSIC,XTAL
ROOM=SOC

D FL0201
1KOHM-25%-0.2A
D
26 PP1V8_XTAL 1 2 PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
ROOM=SOC 24 25 26 27
ROOM=SOC 0201
R02012 C0203 1 1 C0204
26 12 11 5 4 PP1V2 1 26 PP1V2_PLL
0.00 01005 0.1UF 2.2UF
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC 20% 20%
4V 6.3V
1 C0206 1 C0213 1 C0207 1 C0208 X5R 2
01005
2 X5R
0201-1
0.1UF 0.1UF 0.01UF 0.01UF ROOM=SOC
20% 20% 10% 10%
2 4V
X5R
4V
2 X5R 6.3V
2 X5R 2 6.3V
X5R
01005 01005 01005 01005

ROOM=SOC

VOLTAGE=0V
1 C0212
PP3V3_USB 0.1UF

PWRTERM2GND
12 26
20%
ROOM=SOC
ROOM=SOC 2 4V
X5R
C0202 1 1 C0205 01005
0.22UF 0.1UF
20% 20%
6.3V
X5R 2 PP1V2_SDRAM 4 12 23 26 2 6.3V
X5R-CERM
0201 01005

AD14
AN24

VDDA18_CPU_TSADC AE15
ROOM=SOC
C0211

VDD12_UH2_HSIC1 AN4
M16
V19

VDDA18_SOC0_TSADC V17

VDD18_XTAL E14

VDD12_CKE_DDR0 D16
1

VDD12_UH0_HSIC0 D7

VDDA18_SOC1_TSADC G7

VDD18_EFUSE1 J7

VDDH_USB E2

VDD33_USB E1

VDD12_CKE_DDR1 N5
0.1UF
20%

VDDA12_PLL_SOC
VDDA12_PLL_MG
VDDA12_PLL_CPU
VDDA12_PLL_LPDP
4V
2 X5R
01005

3.3V
C P2MM-NSM C
0.95V
PP SM PP0203
P2MM-NSM PLACE NEAR SOC.
1.2V
U0201
PP SM PP0204
C1 POP-FIJI-1GB-DDR-B0
PP0201
P4MM
NC
C2
UH1_HSIC0_DATA
BGA
SM NC UH1_HSIC0_STB
1 SYM 1 OF 13
PP

REMOVE PP IF 50_AP_BI_BB_HSIC1_DATA AR4 UH2_HSIC1_DATA


SPACE IS NEEDED PP0202
P4MM BASEBAND
29

29 50_AP_BI_BB_HSIC1_STB AP4 UH2_HSIC1_STB


ROOM=SOC
ANALOGMUXOUT D15 NC
SM
PP
1 USB_DP F5 90_AP_BI_TRISTAR_USB0_P 17
K4 JTAG_SEL USB_DM E5 90_AP_BI_TRISTAR_USB0_N 17
L4 JTAG_TRTCK USBHS ON/OFF TOLERANCE 5V/1.98V
NC
J5 JTAG_TRST*
NC
20 15 13 12 11 10 7 6 5 3 2 PP1V8 NO_XNET_CONNECTION=TRUE L3 JTAG_TDO
27 26 25 24 23 NC
K5 JTAG_TDI USB_VBUS D3 USB_VBUS_DETECT
R0206
1
TRISTAR_BI_AP_JTAG_SWDIO
NC
K3 JTAG_TMS
14

100K SERIAL MODE NAMES


17
5% TRISTAR_TO_AP_JTAG_SWCLK K2 JTAG_TCK USB_ID D2
1/32W 17
NC
MF
2 01005 AH32
ROOM=SOC RESET*
25 17 15 13 4 RESET_1V8_L USB_REXT D1 USB_REXT
AJ33 CFSB
ROOM=SOC W4 CFSB1
WDOG AK30 AP_TO_PMU_RESET_IN
1
R0203 NOTE: NEW USB_REXT
VALUE FOR FIJI = 200 OHM
13
200
1 C0201 AH33 HOLD_RESET 1%
1000PF XI0 A16 1/32W
MF
10% AH31
6.3V
2 X5R-CERM 13 AP_TO_PMU_TEST_CLKOUT TST_CLKOUT XO0 A15 2 01005

B 01005 AG29 FAST_SCAN_CLK B


AH29 TESTMODE
C0209
12PF
1 2

5%
I2C ADDRESS MAP R02021 Y0201 16V

3
45_XTAL_24M_I CERM

2 4
45_XTAL_24M_O
1.00M 1.60X1.20MM-SM 01005 PCB: PLACE THIS XW
1% 24.000MHZ-30PPM-9.5PF-60OHM AT U0201, NEAR XI/XO
I2C0 1/32W
MF
R0207 C0210 XW0204

1
01005 2 12PF
DEVICE BINARY 7-BIT HEX 8-BIT HEX 1.33K2 SHORT-10L-0.1MM-SM
1 45_XTAL_24M_O_R 1 2 45_XTAL_24M_O_GND 1 2
ADI PMU: 1110100X 0X74 0XE8 1% MF ROOM=SOC
LM3534 BL DRIVER: 1100011X 0X63 0XC6 1/32W 01005 5%
TRISTAR: 0011010X 0X1A 0X34 16V
CERM
CHESTNUT: 0100111X 0X27 0X4E 01005
I2C1
TIGRIS CHARGER: 1110101X 0X75 0XEA
LINEAR VIBE: 1011010X 0X5A 0XB4
CS35L19B AMP: 1000000X 0X40 0X80
MESA EEPROM (MEMORY): 1010110X 0X56 0XAC
MESA EEPROM (ID): 1011110X 0X5E 0XBC

I2C2
CT814 ALS: 0101001X 0X29 0X52
DISPLAY EEPROM: 1010001X 0X51 0XA2

RCAM I2C
A OPEL STROBE DRIVER: 1100011X 0X63 0XC6 SYNC_MASTER=N56_MLB SYNC_DATE=08/29/2013 A
REAR FACING CAM: 0010000X 0X10 0X20 PAGE TITLE
VCM AF DRIVER: 0001100X 0X0C 0X18
SOC:MAIN
DRAWING NUMBER SIZE
FCAM I2C
Apple Inc. 051-9903 D
FRONT FACING CAM: 0010000X 0X10 0X20 REVISION
R
7.0.0
NOTE: ACCEL, GYRO, COMPASS ALL USING SPI (VIA OSCAR) FOR AP COMMUNICATION. NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
2 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 2 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

FIJI: DIGITAL I/O,BOOTSTRAPPING


PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
24 25 26 27
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
1 1 1 1 1 1
R0302 R0303 R0304 R0305 R0306 R0308
D 2.2K
5%
2.2K
5%
2.2K
5%
2.2K
5%
1.33K
1%
1.33K
1/32W
P2MM-NSM
1
PP SM PP0301 D
1/32W 1/32W 1/32W 1/32W 1/32W 1% P2MM-NSM
MF MF MF MF MF MF
01005 2 01005 2 01005 2 01005 2 01005 2 01005 2
1
PP SM PP0302
ROOM=SOC
R0301
33.2 2 D26 AM32
10 45_AP_TO_CODEC_I2S0_MCLK 1 45_AP_TO_CODEC_I2S0_MCLK_R I2S0_MCK I2C0_SCL AP_TO_I2C0_SCL 13 15 17

14 13 12 10 4 3 PP1V8_SDRAM 18 AP_TO_HEADSET_HS3_CTRL AC1 GPIO0


1%
1/32W
10 45_AP_TO_CODEC_ASP_I2S0_BCLK U30 I2S0_BCLK U0201 I2C0_SDA AM31 AP_BI_I2C0_SDA 13 15 17
29 26 17 15
AP_TO_CODEC_ASP_I2S0_LRCLK U31 POP-FIJI-1GB-DDR-B0
18 AP_TO_HEADSET_HS4_CTRL AC2 GPIO1 U0201 MF
01005
10 I2S0_LRCK
BGA

GRP3
AC3 POP-FIJI-1GB-DDR-B0 CODEC_TO_AP_ASP_I2S0_DIN U32 I2S0_DIN I2C1_SCL Y31 AP_TO_I2C1_SCL
13 8 BUTTON_TO_AP_VOL_UP_L
10 14 16 21
GPIO2 SYM 3 OF 13
AC4 BGA CODEC ASP AP_TO_CODEC_ASP_I2S0_DOUT U33 I2S0_DOUT I2C1_SDA Y30 AP_BI_I2C1_SDA
13 8 BUTTON_TO_AP_VOL_DOWN_L
10 14 16 21
GPIO3
AD1 SYM 2 OF 13
26 14 12 5 PP1V8_ALWAYS 16 SPKAMP_TO_AP_INT_L GPIO4
AD2 R30 I2S1_MCK I2C2_SCL AH1 AP_TO_I2C2_SCL
16 AP_TO_SPKAMP_BEE_GEES GPIO5 TMR32_PWM0 AM3 OSCAR_BI_AP_TIME_SYNC_HOST_INT 22 NC 11 20

ROOM=SOC AD3 45_AP_TO_BT_I2S1_BCLK P30 I2S1_BCLK I2C2_SDA AH2 AP_BI_I2C2_SDA


TMR32_PWM1 AM4

GRP2
16 AP_TO_SPKAMP_RESET_L AP_TO_VIBE_TRIG 29 11 20
ROOM=SOC 1 GPIO6 14

R0314 R0313

GRP4
1
AD4 BLUETOOTH AP_TO_BT_I2S1_LRCLK T30 I2S1_LRCK
29 AP_TO_BT_WAKE GPIO7 TMR32_PWM2 AN3 NC 29
I2C3_SCL AN1 NC

GRP2
392K BT_TO_AP_I2S1_DIN R31 I2S1_DIN
220K 1% 29 AP_TO_BB_RST_L AG30 GPIO8 29
I2C3_SDA AN2 NC
5% 1/32W AG31 ROOM=SOC AP_TO_BT_I2S1_DOUT T31 I2S1_DOUT
1/32W MF 29 AP_TO_WLAN_JTAG_SWCLK GPIO9 UART0_RXD AL2 TRISTAR_TO_AP_DEBUG_UART0_RXD 29
MF 2 01005 2
29 AP_TO_WLAN_JTAG_SWDIO AG32 GPIO10 UART0_TXD AL1 AP_TO_TRISTAR_DEBUG_UART0_TXD
17
R0311 DWI_CLK AL29 45_AP_TO_PMU_AND_BL_DWI_CLK 13 15
P2MM-NSM
01005 17 33.2 2 D25 PP SM PP0305
21 13 BUTTON_TO_AP_MENU_KEY_L Y3 GPIO11 16 45_AP_TO_SPKAMP_I2S2_MCLK 1 45_AP_TO_SPKAMP_I2S2_MCLK_R I2S2_MCK
1% 45_AP_TO_CODEC_XSP_I2S2_BCLK N30 I2S2_BCLK DWI_DO AL30 45_AP_TO_PMU_AND_BL_DWI_DO P2MM-NSM
13 8 BUTTON_TO_AP_HOLD_KEY_L Y4 GPIO12 UART1_CTSN H30 BT_TO_AP_UART1_CTS_L 16 10 13 15

13 PMU_TO_AP_IRQ_L AK31 GPIO13 UART1_RTSN H31 AP_TO_BT_UART1_RTS_L


29

29
1/32W
MF 16 10 AP_TO_CODEC_XSP_I2S2_LRCLK N31 I2S2_LRCK
PP SM PP0304
01005

GRP4
AE1 H32 CODEC_TO_AP_XSP_I2S2_DIN P32 I2S2_DIN
29 BB_TO_AP_IPC_GPIO1 BT_TO_AP_UART1_RXD 16 10
GPIO14 UART1_RXD 29 BLUETOOTH
AF30 H33 CODEC XSP & SPKR AMP AP_TO_CODEC_XSP_I2S2_DOUT P33 I2S2_DOUT
29 AP_TO_BB_WAKE_MODEM AP_TO_BT_UART1_TXD 16 10
GPIO15 UART1_TXD 29

BOARD_ID3 NC
AE2
AE3
GPIO16
AL31
PP0303
P2MM-NSM ALS_TO_AP_INT_L AA2 I2S3_MCK
29 AP_TO_STOCKHOLM_SIM_SEL GPIO17 UART2_CTSN BB_TO_AP_UART2_CTS_L 29 SM
11

AE4 AM33 AP_TO_BB_UART2_RTS_L


1 29 45_AP_TO_BB_I2S3_BCLK AA4 I2S3_BCLK
BOOT_CONFIG0 GPIO18 UART2_RTSN PP

GRP3
NC 29

C AA3
C

GRP2
13 AP_TO_PMU_KEEPACT AK32 GPIO19 UART2_RXD AL32 BB_TO_AP_UART2_RXD 17 29
BASEBAND ROOM=SOC 29 AP_TO_BB_I2S3_LRCLK I2S3_LRCK
AF3 AL33 AP_TO_BB_UART2_TXD 29 BB_TO_AP_I2S3_DIN Y1 I2S3_DIN
NC GPIO20 UART2_TXD 17 29
AF4 BASEBAND AP_TO_BB_I2S3_DOUT Y2 I2S3_DOUT
29 BB_TO_AP_DEVICE_RDY
29
GPIO21
GRP2

29 BB_TO_AP_GPS_SYNC AH4 GPIO22 UART3_CTSN F30 STOCKHOLM_TO_AP_UART3_CTS_L 29


AJ1 G30 TRISTAR_TO_AP_INT AB32 I2S4_MCK
29 AP_TO_BB_HOST_RDY AP_TO_STOCKHOLM_UART3_RTS_L 17 13
GPIO23 UART3_RTSN

GRP4
29
AD29 G31 STOCKHOLM 45_AP_TO_CODEC_VSP_I2S4_BCLK AB33 I2S4_BCLK
29 BB_TO_AP_RESET_DET_L STOCKHOLM_TO_AP_UART3_RXD 10
GPIO24 UART3_RXD 29

GRP3
AJ2 G32 CODEC VSP AP_TO_CODEC_VSP_I2S4_LRCLK AA30 I2S4_LRCK
27 BOOT_CONFIG1 AP_TO_STOCKHOLM_UART3_TXD 10
BOOT_CONFIG1 GPIO25 UART3_TXD 29
AK33 CODEC_TO_AP_VSP_I2S4_DIN AA32 I2S4_DIN SEP_I2C_SCL AR31 AP_TO_EEPROM_I2C_SCL
25 FORCE_DFU
10 3
GPIO26
AJ30 AE31 WLAN_TO_AP_UART4_CTS_L 29 10 AP_TO_CODEC_VSP_I2S4_DOUT AA33 I2S4_DOUT SEP_I2C_SDA AP31 AP_BI_EEPROM_I2C_SDA 3
DFU STATUS NC GPIO27 UART4_CTSN
AJ3 AF31 AP_TO_WLAN_UART4_RTS_L 29 SEP_SPI_SCLK AN30
GPIO28 UART4_RTSN NC
GRP3

NC

GRP3
BOOT_CONFIG2 AJ4 AE32 WIFI UART SEP_SPI_SSIN AN31
BOARD_ID4 NC GPIO29 UART4_RXD WLAN_TO_AP_UART4_RXD 29 NC
AD30 AE33 SEP_SPI_MISO AN33
10 CODEC_TO_AP_INT_L GPIO30 UART4_TXD AP_TO_WLAN_UART4_TXD 29 NC
AC30 BOARD_ID2 BOARD_ID2 AG1 SPI0_MISO SEP_SPI_MOSI AN32
29 AP_TO_RADIO_ON_L GPIO31 27 26
NC
AC31 BOARD_ID1 BOARD_ID1 AG2 SPI0_MOSI SEP_GPIO0 AM30
UART5_RTXD AG4

GRP2
NC GPIO32 AP_TO_TIGRIS_SWI 14 GAS GAUGE 27
NC PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
BOARD_ID0 AG3 SPI0_SCLK
NCAB29
24 25 26 27
GPIO33 NC ISP_UART0_RXD C32 OSCAR_TO_AP_ISP_UART_RXD

GRP4
22
BOARD_REV3 AK1 AH3 SPI0_SSIN
BOARD_REV3 GPIO34 NC ISP_UART0_TXD C33
GRP2

27 AP_ISP_TO_OSCAR_UART_TXD
BOARD_REV2 27 BOARD_REV2 AK2 GPIO35
22
R0310 1

AK3 10 CODEC_TO_AP_SPI_MISO J3 SPI1_MISO 10K


BOARD_REV1 NC GPIO36 5%
AK4 AP_TO_CODEC_SPI_MOSI J2 SPI1_MOSI 1/32W
UART6_RXD AM2

GRP1
BOARD_REV0 BOARD_REV0 GPIO37 TRISTAR_TO_AP_ACC_UART6_RXD 10
MF
27

AP_TO_BB_COREDUMP AM29 GPIO38 UART6_TXD AM1 AP_TO_TRISTAR_ACC_UART6_TXD


17
CODEC
10 AP_TO_CODEC_SPI_CLK J1 SPI1_SCLK 01005 2 R0315
29 17
J4 ROOM=SOC 0.00 2
AP_TO_CODEC_SPI_CS_L SPI1_SSIN SOCHOT0 AJ31 PMU_TO_AP_PRE_UVLO_L_R 1 PMU_TO_AP_PRE_UVLO_L

GRP3
10 13

BUTTON_TO_AP_RINGER_A AB30 GPIO40 UART7_RXD B30 SOCHOT1 AJ32 AP_TO_PMU_SOCHOT1_L_R 0% MF


GRP2 GRP4

13 8
NC TOUCH_TO_AP_SPI_MISO F33
1/32W 01005
BB_TO_AP_IPC_GPIO AB31 GPIO41 UART7_TXD A30 AP_TO_WLAN_DEVICE_WAKE 29 24 SPI2_MISO ROOM=SOC
29
F32 DISP_VSYNC AL5 NC
AL3 GPIO42 AF2 AP_TO_TOUCH_SPI_MOSI SPI2_MOSI

GRP4
14 AP_TO_VIBE_EN UART8_RXD OSCAR_TO_AP_UART_RXD 22 GRAPE 24

AF1 AP_TO_TOUCH_SPI_CLK E32 SPI2_SCLK


UART8_TXD AP_TO_OSCAR_UART_TXD 22 24
PP1V8_SDRAM

GRP2
CLK32K_OUT AB1 45_AP_TO_TOUCH_CLK32K_RESET_L
3 4 10 12 13 14 15
24 AP_TO_TOUCH_SPI_CS_L E31 SPI2_SSIN 24 17 26 29

NOSTUFF
B ROOM=SOC
21
MESA_TO_AP_SPI_MISO AD33
AD32
SPI3_MISO
CPU_SLEEP_STATUS AH30
NC NO CONNECTED ON MLB 1
R0307
10K
B
AP_TO_MESA_SPI_MOSI SPI3_MOSI

GRP3
R03402 21
AD31
5%
1/32W
AP_TO_MESA_SPI_CLK 1 AP_TO_MESA_SPI_CLK_R SPI3_SCLK
NAND_SYS_CLK AB4 NC USED FOR PCIE NAND
21
MF
01005 21 MESA_TO_AP_INT AE30 SPI3_SSIN 2 01005
0.00 ROOM=SOC
R0312
0.00 2
1 AP_TO_PMU_SOCHOT1_L 13

0% MF
1/32W 01005
ROOM=SOC

ANTI-ROLLBACK EEPROM
ONSEMI EEPROM
APN:335S0894

PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
REMOVED HOLD + MENU KEY
24 25 26 27

1 C0301 BUFFERS SINCE NOT NEEDED FOR FIJI


1
R0317
A1

1
R0316 1.0UF
20% 2.2K
2.2K VCC 6.3V
2 X5R 5%
5% 1/32W
1/32W
MF U0301 0201-1
ROOM=E_SE MF
01005
2 01005
ROOM=E_SE
CAT24C08C4A 2 ROOM=E_SE
WLCSP
3 AP_TO_EEPROM_I2C_SCL B1 SCL SDA B2 AP_BI_EEPROM_I2C_SDA 3

A SYNC_MASTER=N56_MLB SYNC_DATE=08/29/2013 A
PAGE TITLE
VSS
ROOM=E_SE
SOC:I/OS
A2

DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
3 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 3 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

FIJI: VDDCA,VDD1/2,VDDQ,VDD,VDD_FIXED,VDD_CPU,VDD_GPU
VDDCA, VDD1/2, VDDQ VDD VDD_CPU, VDD_GPU
25 17 15 13 2 RESET_1V8_L D17 DDR0_CKEIN R11 26 PP_GPU
NOTE: CKEIN CONFIRMED 1.8V TOLERANT 7 PP0V95_FIXED_SOC 26 12
N4 DDR1_CKEIN R13 12
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
R15
R17
ROOM=SOC ROOM=SOC 1 C0442 C0445 C0448 C0418 C0419 C0420 C0475
1 C0435 C0438 C0439 AA16 L12 10UF 4.3UF 4.3UF 1UF 1UF 0.47UF 4.3UF
D 45_DDR0_ZQ_CA A17 DDR0_ZQ_CA
R19
R2
10UF
20%
4.3UF
20%
4.3UF
20% AA18
U0201
L14
20%
6.3V
2 CERM-X5R
20%
4V
CERM
20%
4V
CERM
20%
4V
CERM
20%
4V
CERM
20%
6.3V
CERM
20%
4V
CERM
D
2 6.3V
CERM-X5R
4V
CERM
4V
CERM AA22 L16 0402-9
ROOM=SOC 0402 0402 0402 0402 0402 0402
45_DDR1_ZQ_CA M1 DDR1_ZQ_CA R21 0402-9 0402 0402 POP-FIJI-1GB-DDR-B0 1 3 1 3 1 3 1 3 1 3 1 3
ROOM=SOC AA6 BGA L26
45_DDR0_ZQ_DQ AR13 DDR0_ZQ_DQ R23 1 3 1 3
AB10 L8
45_DDR1_ZQ_DQ L33 DDR1_ZQ_DQ R25
AB23
SYM 10 OF 13
M11
1 C0466 2 4 2 4 2 4 2 4 2 4 2 4
A18 R27 2 4 2 4 10UF
4 45_DDR0_VREF_CA DDR0_VREF_CA 20%
AB25 M13
4 45_DDR1_VREF_CA P1 DDR1_VREF_CA R29 2 6.3V
CERM-X5R
AC14 M15 0402-9
R0401
1
R0402
1
R0411
1 1
R0412 4 45_DDR0_VREF_DQ AR15 DDR0_VREF_DQ R3
AC16 M17 ROOM=SOC
240 240 240 240 4 45_DDR1_VREF_DQ N33 DDR1_VREF_DQ R32
1% 1% 1% 1% AC18 M9
1/32W 1/32W 1/32W 1/32W R4
MF MF MF MF AC27 N10 AA10 AA17
2 01005 2 01005 2 01005 2 01005 A20 R5 26 12 PP_CPU
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC AC7 N12 ROOM=SOC ROOM=SOC ROOM=SOC AA14 AA19
B17 U0201 R6
ROOM=SOC AD13 N14 C0443 C0446 C0444 AA8 U0201 AA21
C14 POP-FIJI-1GB-DDR-B0 R7
BGA
ROOM=SOC
C0404 C0405 AD19 N16 0.47UF
20%
0.47UF
20%
1UF
20% AB11
POP-FIJI-1GB-DDR-B0
BGA AA23
H1 R9 1UF AD21 N26 6.3V 6.3V 4V
(DDR IMPEDANCE CONTROL)
N1 SYM 7 OF 13 T10
1UF 20% CERM CERM CERM AB13 SYM 13 OF 13 AA25
VDDCA 20% 4V
AD25 N8 0402 0402 0402
4V CERM AB15 AB16
U1 T12 CERM 0402 1 3 1 3 1 3
0402 AD6 P11 AB9 AB18
V1 T14 1 3
1 3 AE10 P13 AC10 AB20
T16 2 4 2 4 2 4
2 4 AE11 P15 AC12 AB22
T18 2 4
26 23 12 4 2 PP1V2_SDRAM AE16 P17 AC8 AB24
AA1 T2
AE22 P9 AD11 AB26
AF33 T20 ROOM=SOC ROOM=SOC ROOM=SOC
AP25 T22
AF13
AF17
R10
R12
C0409 C0411 C0414 AD15 AC17
ROOM=SOC ROOM=SOC 4.3UF 4.3UF 4.3UF AD9 AC19
AP6
AR17
T24
T26
C0476 C0406 AF23 R14 20%
4V
20%
4V
20%
4V AE12 AC21
4.3UF 0.47UF AF25 R16
CERM CERM CERM
20% 20% 0402 0402 0402 AE14 AC23
B15 T28 4V 6.3V
VDD2 CERM CERM AF27 R18 1 3 1 3 1 3 AE8 VDD_CPU AC25
B19 1.2V T29 0402 0402
AF7 R26 AF11 0.775V - 1.0V AD16
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC B7 T3 1 3 1 3
C C0402
1UF
C0422
1UF
C0401
1UF
C0429
4.3UF
E33
VSS
T4
2 4 2 4
AG14
AG16
R8
T11
2 4 2 4 2 4
AF15
AF9
TBD: 7.6A? @ 105C
AD18
AD20
C
20% 20% 20% 20% G1 T7
4V 4V 4V 4V AG18 T13 AG10 AD22
CERM CERM CERM CERM K33 T8 ROOM=SOC ROOM=SOC ROOM=SOC
0402 0402 0402 0402 AG6 T15
1 3 1 3 1 3 1 3
R1 U11
AH10 T17
C0408 C0410 C0413 AG12
AG8
AD24
AD26
T32 U13 VDD_FIXED VDD_FIXED 4.3UF 4.3UF 1UF
AH20 T19 20% 20% 20%
Y32 U15 0.95V 4V 4V 4V AH11 AE17
2 4 2 4 2 4 2 4 AH7 T9 CERM CERM CERM
U17 TBD: 3.3A? @ 105C 0402 0402 0402 AH13 AE19
AJ14 U10 1 3 1 3 1 3 AH15 AE21
U19
AJ16 U12 AH9 AE23
U2
AJ24 U14 2 4 2 4 2 4 AJ10 AE25
U21
AJ27 U16 AJ12 AF18
U23
AJ6 U18
U25 1 C0478 AJ9 U26
AJ7
VDD_GPU
AF20
U27 10UF AJ8 AF22
20%
AK12 U8 0.8V - 0.95V
6.3V AF24
U29 2 CERM-X5R
0402-9 AK18 V11
1 C0447 TBD: 3.45A? @ 105C
AF26
29 26 17 15 14 13 12 10 3 PP1V8_SDRAM A19 U3 ROOM=SOC 10UF
AK20 V13 20% 45_BUCK0_FB AA12 VDD_CPU_SENSE AG17
ROOM=SOC ROOM=SOC ROOM=SOC AG33 U4 2 6.3V
CERM-X5R
12
AK22 V15
1 C0450 1 C0451 1 C0452 AR16 U5
AK25 V9
0402-9 AG19
2.2UF 2.2UF 2.2UF ROOM=SOC
20%
6.3V
20%
6.3V
20%
6.3V
AR25 U6
F26 W10 PP0401
P2MM-NSM
AG21
AG23
2 X5R 2 X5R 2 X5R AR7 U7 SM
0201-1 0201-1 0201-1 VDD1 F7 W12 ROOM=SOC ROOM=SOC
PP
1 AG25
B16 U9
1.8V G10 W14 C0415 C0465 ROOM=SOC AH16
B8
G12 W16 4.3UF 1UF
20% 20% AH18
D33 4V 4V
G14 W18 CERM CERM AH22
K1 0402 0402
G16 W21 AH24
T1 1 3 1 3
G18 W8 1 C0449 AH26
T33 10UF
G20 Y11 2 4 2 4 20% AJ17
W1 6.3V
G22 Y13
B G8 Y15
2 CERM-X5R
0402-9
ROOM=SOC
AJ19
AJ21 B
H11 Y19 AJ23
4 2 PP1V2 AC33
26 12 11 5 H13 Y23 AJ25
ROOM=SOC ROOM=SOC AR11
C0431 ROOM=SOC C0427 C0432 AR14
H15 Y25 ROOM=SOC ROOM=SOC W17
4.3UF
1 C0467 1
1UF AR19
H9 Y27 1 C0472 C0471 1 1 C0468 Y16
20% 1.0UF 1.0UF 20%
J10 Y7 2.2UF 2.2UF
4V 20% 20% 4V
AR22 20% 20% 10UF Y18
CERM 2 6.3V 6.3V CERM 2 6.3V
0402 X5R
0201-1
2 X5R
0201-1
0402
AR24
J12 Y9 PP0403
P2MM-NSM
X5R
0201-1
6.3V
X5R 2
20%
6.3V
2 CERM-X5R Y20
1 3 1 3 J14 SM 0201-1 0402-9 Y22
ROOM=SOC AR6 VDD_FIXED_SENSE V7 12 45_BUCK5_FB 1
PP ROOM=SOC
J26 Y24
2 4 2 4 AR8 VDDQ ROOM=SOC
J8 Y26
G33
K11
J33 AG27 45_BUCK1_FB
K13 VDD_GPU_SENSE
12
M33
K15
R33
ROOM=SOC ROOM=SOC K9
V33
1 C0426 C0425 C0430 Y33
L10 PP0402
15PF 0.47UF 0.47UF P2MM-NSM
SM
5% 20% 20%
16V 1
2 NP0-C0G-CERM 6.3V 6.3V PP
CERM CERM
01005 0402 0402 ROOM=SOC
ROOM=SOC 1 3 1 3

2 4 2 4

26 12 11 5 4 2 PP1V2
PP1V2_SDRAM
A
26 23 12 4 2

1 C0423 1
R0403 1 C0433
1
R0405 1 C0436 R0407
1 1 C0440
0.01UF
R0409
1

4.7K
SYNC_MASTER=N56_MLB SYNC_DATE=08/29/2013 A
0.01UF 10K 0.01UF 10K 0.01UF 4.7K 10% 1% PAGE TITLE
10% 1% 1% 1% 1/32W
6.3V
2 X5R 1/32W
MF
10%
6.3V
2 X5R
1/32W
MF
10%
6.3V
2 X5R
1/32W
MF
6.3V
2 X5R MF SOC:VDDCA,VDD1/2,VDD,VDD_CPU,VDD_GPU
01005 01005 2 01005
2 01005 01005 2 01005 01005 2 01005 ROOM=SOC ROOM=SOC DRAWING NUMBER SIZE
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC
45_DDR1_VREF_CA
ROOM=SOC ROOM=SOC
45_DDR1_VREF_DQ Apple Inc. 051-9903 D
45_DDR0_VREF_CA 4 4
45_DDR0_VREF_DQ 4
4
REVISION
1 C0424 1
R0404 C0434 1
R0406 C0441 R0410
1 R
7.0.0
0.01UF 10K
1
0.01UF 10K NOTE: SOME VENDORS HAVE
1 C0437 R0408
1 1
0.01UF 4.7K NOTICE OF PROPRIETARY PROPERTY: BRANCH
10% 1% 10% 1% 0.01UF 4.7K 10% 1%
6.3V
2 X5R 1/32W 6.3V 1/32W INTERNAL DIVIDER CIRCUITS 10% 1% 6.3V 1/32W THE INFORMATION CONTAINED HEREIN IS THE
MF 2 X5R MF 6.3V 1/32W 2 X5R MF PROPRIETARY PROPERTY OF APPLE INC.
01005 2 X5R MF
2 01005
01005
2 01005
01005 2 01005 THE POSESSOR AGREES TO THE FOLLOWING: PAGE
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC 01005 2 01005 ROOM=SOC ROOM=SOC I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE 4 OF 55
ROOM=SOC ROOM=SOC
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 4 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

FIJI: VDDIOD,VDDIO18,VDD_VAR_SOC
JUST A FEW GNDS VDD_SRAM, VDD_SOC
A1 AJ15 C22 J29 V10
A2 AJ18 C23 J30 V12
U0201 C24 U0201 J31 U0201 V14
A32 AJ20 POP-FIJI-1GB-DDR-B0 POP-FIJI-1GB-DDR-B0
POP-FIJI-1GB-DDR-B0 C25 J32 V16
D
A33
AA11
BGA
SYM 11 OF 13
AJ22
AJ26 C26
BGA
SYM 12 OF 13 J9
BGA
SYM 8 OF 13 V18 D
AA15 AJ28 C27 K10 V2
AA20 AJ5 C28 K12 V20
26 12
PP_VAR_SOC G24
AA24 AK10 C3 K14 V22
G26
AA26 AK14 C4 K17 ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC V24
AA27 AK16 C5 K18 1 C0508 C0503 C0507 C0509 C0510 H16
V26
C6 K20 10UF 4.3UF 1UF 1UF 0.47UF H19
V28
AA28 AK24 20% 20% 20% 20% 20%
6.3V 4V 4V 4V 6.3V H21
AA31 AK27 C9 K22 2 CERM-X5R CERM CERM CERM CERM V29
0402-9 0402 0402 0402 0402 H23
AA5 AK28 D10 K24 ROOM=SOC V3
1 3 1 3 1 3 1 3 H25
AA7 AK29 D12 K26 V30
J15
AA9 AK6 D13 K28 2 4 2 4 2 4 2 4 V31
J17
AB12 AK8 D18 K29 V32
J18
AB14 AL11 D19 K30 V4
J20
AB17 AL13 D20 K31 V5
J22
AB19 AL15 D21 K32 V6
J24
AB21 AL17 D22 K6 V8
K16
AB27 AL19 D23 K8 W11
K19
AB28 AL21 D24 L1 W13
K21
AB6 AL23 D27 L11 W15
K23
AB7 AL25 D4 L13 W19
K25
AB8
AC11
AL27
AL6
D5
D6
L15
L17
VDDIOD, VDDIO18 L18
W2
W23
L20
AC13 AL7 D8 L19 W25
L22 VDD_VAR_SOC
AC15 AL9 D9 L2 VSS W27
L24 0.90V - 0.95V
AC20 AM10 E11 L21 CAPS FOR VDDIOD ARE SHARED WITH VDDQ W29
M19 1.8A @ 105C
AC22 AM11 E15 L23 W3
PP1V2 E16 VDDIO18_GRP1 J6 PP1V8 M21
C AC24
AC26
AM12
AM13
E17
E19
L25
L27
26 12 11 4 2
E18
VDDIOD_DDRCA
VDDIOD_DDRCA ROOM=SOC
C0502
2 3 6 7 10 11 12 13 15 20 23 24
25 26 27
M23
W30
W31
C
F15 VDDIOD_DDRCA M25
AC28 AM14 E21 L29 ROOM=SOC 1UF W32
AC32 AM15 E23 L30
F17 VDDIOD_DDRCA 1 C0501 20%
4V
N18
W33
K7 VDDIOD_DDRCA 2.2UF CERM N20
AC5 E24 L31 VDDIO18_GRP2 AB5 20% 0402 W6
AM16 L6 6.3V N22
E25 L32 VDDIOD_DDRCA AE5 2 X5R 1 3 W7
AC6 AM17 M7 VDDIO18_GRP2 0201-1 N24
VSS E26 L5 VDDIOD_DDRCA AH5 W9
AC9 AM18 N6 VDDIO18_GRP2 P19
VSS E27 L7 VDDIOD_DDRCA T6 2 4 Y10
AD10 AM19 P7 VDDIOD_DDRCA U0201 VDDIO18_GRP2
W5
P21
AD12 AM20 E28 L9 POP-FIJI-1GB-DDR-B0 VDDIO18_GRP2 Y12
P23
AD17 AM21 E6 M10 BGA Y14
VDDIO18_GRP3 AA29 P25
AD23 AM22 E7 M12 SYM 9 OF 13 Y17
AK11 VDDIOD_DDR0DQ VDDIO18_GRP3 AC29 R20
AD27 AM23 E9 M14 ROOM=SOC Y21
AF29
AD28 AM24 F10 VSS VSS
M18
AK19 VDDIOD_DDR0DQ 1.8V VDDIO18_GRP3
AJ29
ROOM=SOC
C0511 1 C0506 R22
Y28
F12 M2
AK21 VDDIOD_DDR0DQ VDDIO18_GRP3 0.47UF R24
Y29
AD5 AM26 AK23 1.0UF 20%
T21
VDDIOD_DDR0DQ 20% 6.3V
AD7 AM28 F14 M20
AK7 VDDIO18_GRP4 F25 6.3V 2 CERM
T23
Y5
VDDIOD_DDR0DQ X5R 0402
AD8 AM5 F16 M22
AK9 VDDIO18_GRP4 F28 0201-1
1 3 T25
Y6
VDDIOD_DDR0DQ
AE13 AM6 F18 M24
AL10 1.2V VDDIO18_GRP4 H28 U20
Y8
F20 M26 VDDIOD_DDR0DQ
AE18 AM7 AL12 2 4 U22 AA13
F22 M28 VDDIOD_DDR0DQ VSS_SENSE
AE20 AM8 AL18 U24
F24 M29 VDDIOD_DDR0DQ
AE24 AM9 AL20 V21
F27 M3 VDDIOD_DDR0DQ
AE26 AN25 AL22 V23
F29 M30 VDDIOD_DDR0DQ
AE27 AN26 AL8 V25
F31 M31 VDDIOD_DDR0DQ GRP7 POWERS GPIO11,12 (BUTTONS)
AE28 AN27 W20
AE29 AN28 F6 M32 K27 VDDIOD_DDR1DQ VDDIO18_GRP7 T5 PP1V8_ALWAYS 3 12 14 26
W22
AE6 AN29 F8 M4 L28 VDDIOD_DDR1DQ AK13 W24
AE7 AN5 G11 M5 M27 VDDIOD_DDR1DQ
VDDIO18_PPN
AK15
1 C0520
G13 M6 N28 VDDIO18_PPN 0.1UF W26 VDD_VAR_SOC_SENSE
B AE9
AF10
AN6
AP1 G15 M8 P27
VDDIOD_DDR1DQ
VDDIOD_DDR1DQ
VDDIO18_PPN
VDDIO18_PPN
AK17
AL14
20%
4V
2 X5R
01005
12 45_BUCK2_FB
B
AF12 AP10 G17 N11 R28 VDDIOD_DDR1DQ ROOM=SOC
VDDIO18_PPN AL16
AF14 AP12 G19 N13 T27 VDDIOD_DDR1DQ
AF16 AP14 G21 N15 U28 VDDIOD_DDR1DQ
AF19 AP17 G23 N17 V27 VDDIOD_DDR1DQ
AF21 AP19 G25 N19 W28 VDDIOD_DDR1DQ PP0501
G27 N2 P2MM-NSM
AF28 AP2 SM
G28 N21 PP CPU_VSS_SENSE
AF32 AP21
AF5 AP24 G6 N23 ROOM=SOC

AF6 AP3 G9 N25


AF8 AP32 H10 N27
AG11 AP33 H12 N29
AG13 AP5 H14 N3
AG15 AP7 H17 N32
AG20 AR1 H18 N7
AG22 AR2 H2 N9
AG24 AR3 H20 P10
AG26 AR32 H22 P12
AG28 AR33 H24 P14
AG5 AR5 H26 P16
AG7 B1 H27 P18
AG9 B18 H29 P2
AH12 B2 H5 P20
AH14 B20 H6 P22
AH17 B32 H7 P24

A AH19
AH21
B33
C10
H8
J11
P26
P28 SYNC_MASTER=N56_MLB SYNC_DATE=08/29/2013 A
PAGE TITLE
AH23 C11 J13 P29
AH25 C15 J16 P3 SOC:GND,VDDIO18,VDDIOD,VDD_VAR_SOC
AH27 C16 J19 P31 DRAWING NUMBER SIZE

AH28 C17 J21 P4


Apple Inc. 051-9903 D
AH6 C18 J23 P5 REVISION

AH8 C19 J25 P6


R
7.0.0
AJ11 C20 J27 P8 NOTICE OF PROPRIETARY PROPERTY: BRANCH

AJ13 J28 C21 THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
5 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 5 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

FIJI: NAND + 12X17 NAND PKG


SUPPORT FOR PPN1.5 (1.8V IO) ONLY

D D
PP3V0_NAND 12 26
OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE OMIT_TABLE
1 C0623 1 C0622 1 C0609 1 C0602 1 C0604 1 C0610 1 C0611 1 C0613 1 C0614 1 C0633 1 C0634
100PF 220PF 0.47UF 1UF 1UF 15UF 15UF 15UF 15UF 15UF 15UF
5% 10% 20% 20% 20% 20% 20% 20% 20% 20% 20%
4V 4V 4V 6.3V
2 16V
NP0-C0G
10V
2 X7R-CERM 2 X7S 2 X6S 2 X6S 2 X5R 6.3V
2 X5R 2 6.3V
X5R
6.3V
2 X5R 2 6.3V
X5R 2 6.3V
X5R
01005 01005 0204 0204 0204 0402-1 0402-1 0402-1 0402-1 0402-1 0402-1
ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND

500MA
PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
24 25 26 27
26 PP1V2_NAND_VDDI 1 C0603 1 C0605 1 C0606 1 C0612 1 C0616 1 C0617 1 C0620 1 C0621
2.2UF 15UF 15UF 10UF 10UF 10UF 100PF 220PF
1 C0625 1 C0624 1 C0601 1 C0615 20%
6.3V
20% 20% 20% 20% 20% 5% 10%
100PF 220PF 1.0UF 1.0UF 1000MA 2 X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 16V
NP0-C0G
10V
2 X7R-CERM
5% 10% 20% 20% 0201-1 0402-1 0402-1 0402-9 0402-9 0402-9 01005 01005
16V
2 NP0-C0G 2 10V 6.3V
2 X5R 2 6.3V ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND
X7R-CERM X5R
01005 01005 0201-1 0201-1
ROOM=NAND ROOM=NAND ROOM=NAND ROOM=NAND

OB8

OC8
OD8
OE0
OF8

OA8
THE TOTAL INDUCTANCE SEEN BY THE NAND SHOULD BE <2NH

B6
F2
M6

N1
N7

G0
PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
24 25 26 27
VDDI
1 C0640 1 C0641
VCC VCCQ
1.0UF 1.0UF
20% 20%
23 20 15 13 12 11 10 7 6 5 3 2PP1V8 OMIT_TABLE 2 6.3V
X5R 2 6.3V
X5R
G3 ROOM=NAND 0201-1 0201-1
27 26 25 24
R0608
1 6 AP_BI_NAND_ANC0_IO<0> IO0-0
CE0* A5 AP_TO_NAND_ANC0_CEN0_L
1
R0607 U0201 5%
100K 6 AP_BI_NAND_ANC0_IO<1> H2 IO1-0 U0604 CLE0 A3 AP_TO_NAND_ANC0_CLE
6

POP-FIJI-1GB-DDR-B0 AP_BI_NAND_ANC0_IO<2> J3 IO2-0 LGA 6


100K BGA
1/32W
MF
6
ALE0 C1 AP_TO_NAND_ANC0_ALE 6
NOTE:C0640,C0641 ADDED FOR UF NEEDS
5% AP_BI_NAND_ANC0_IO<3> K2

NAND-1YNM-128GX8-TLC-PPN1.5-128G
2 01005 6 IO3-0
C
1/32W
MF
2 01005
ROOM=SOC
SYM 4 OF 13 ROOM=SOC
6

6
AP_BI_NAND_ANC0_IO<4>
AP_BI_NAND_ANC0_IO<5>
L5
K6
IO4-0
IO5-0
WE0* E3 AP_TO_NAND_ANC0_WE_L 6
C
J5 RE0 B4 NC
6 AP_BI_NAND_ANC0_IO<6> IO6-0
6 AP_TO_NAND_ANC0_CEN0_L AN16 PPN0_CEN0 PPN1_CEN0 AN8 AP_TO_NAND_ANC1_CEN0_L 6 RE0* C7 45_AP_TO_NAND_ANC0_RE_L 6
6 AP_BI_NAND_ANC0_IO<7> H6 IO7-0
AP16 PPN0_CEN1 PPN1_CEN1 AN7 NC
NC
AN22 AN9 G1 DQS0 H4 45_AP_BI_NAND_ANC0_DQS 6
6 AP_BI_NAND_ANC0_IO<0> PPN0_IO0 PPN1_IO0 AP_BI_NAND_ANC1_IO<0> IO0-1
AP22 AN10 J1 DQS0* F4 NC
6 AP_BI_NAND_ANC0_IO<1> PPN0_IO1 PPN1_IO1 AP_BI_NAND_ANC1_IO<1> IO1-1
6 AP_BI_NAND_ANC0_IO<2> AN21 PPN0_IO2 PPN1_IO2 AN11 AP_BI_NAND_ANC1_IO<2> L1 IO2-1 SM PP0600
AN20 AP11 N3 R/B0* E5 NAND_TO_PP_RB PP P2MM-NSM
6 AP_BI_NAND_ANC0_IO<3> PPN0_IO3 PPN1_IO3 AP_BI_NAND_ANC1_IO<3> IO3-1 ROOM=NAND
6 AP_BI_NAND_ANC0_IO<4> AN19 PPN0_IO4 PPN1_IO4 AN12 AP_BI_NAND_ANC1_IO<4> N5 IO4-1
CE1* C5 AP_TO_NAND_ANC1_CEN0_L 6
6 AP_BI_NAND_ANC0_IO<5> AN18 PPN0_IO5 PPN1_IO5 AN14 AP_BI_NAND_ANC1_IO<5> L7 IO5-1
CLE1 C3 AP_TO_NAND_ANC1_CLE 6
6 AP_BI_NAND_ANC0_IO<6> AP18 PPN0_IO6 PPN1_IO6 AN15 AP_BI_NAND_ANC1_IO<6> J7 IO6-1
ALE1 D2 AP_TO_NAND_ANC1_ALE 6
6 AP_BI_NAND_ANC0_IO<7> AN17 PPN0_IO7 PPN1_IO7 AP15 AP_BI_NAND_ANC1_IO<7> G7 IO7-1
WE1* E1 AP_TO_NAND_ANC1_WE_L 6

RE1 D4 NC
6 AP_TO_NAND_ANC0_ALE AP23 PPN0_ALE PPN1_ALE AP9 AP_TO_NAND_ANC1_ALE 6 RE1* D6 45_AP_TO_NAND_ANC1_RE_L 6 PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
24 25 26 27
6 AP_TO_NAND_ANC0_CLE AN23 PPN0_CLE PPN1_CLE AP8 AP_TO_NAND_ANC1_CLE 6

6 AP_TO_NAND_ANC0_WE_L AR23 PPN0_WEN PPN1_WEN AR9 AP_TO_NAND_ANC1_WE_L 6 DQS1 M4 45_AP_BI_NAND_ANC1_DQS 6


1
R0603
45_AP_TO_NAND_ANC0_RE_L AP20 PPN0_REN PPN1_REN AN13 45_AP_TO_NAND_ANC1_RE_L DQS1* K4 1 C0607 50K
6 6
NC 1%
R0601 6 45_AP_BI_NAND_ANC0_DQS AR18 PPN0_DQS PPN1_DQS AP13 45_AP_BI_NAND_ANC1_DQS 6
R0602 0.01UF 1/32W
240 240 R/B1* E7 NC
10% MF
1 2 45_AP_PPN0_ZQ AR20 PPN0_ZQ PPN1_ZQ AR12 45_AP_PPN1_ZQ 1 2 2 6.3V
X5R 2 01005
ROOM=SOC
1%
1/32W
1%
1/32W
PP0604SM VREF G5 6 AP_TO_NAND_ANC_DQVREF
01005
ROOM=SOC
MF MF P2MM-NSM PP
01005 01005 ROOM=NAND
ROOM=SOC ROOM=SOC NAND_TO_PP_TCKC OA0 TCKC ZQ A1 45_NAND_PPN_ZQ

AP_TO_NAND_ANC_DQVREF AR21 PPN0_VREF PPN1_VREF AR10 AP_TO_NAND_ANC_DQVREF PP0605SM NAND_TO_PP_TMSC OB0 TMSC
VSS VSSQ
1 C0608 1
R0604
6 6
P2MM-NSM
ROOM=NAND 0.01UF 50K
PP 1
R0609 10%
B ROOM=NAND 6.3V 1%
B

B2
F6
L3

A7
M2
OC0
OD0
OE8
OF0
G8
2 X5R 1/32W
243 01005 MF
1% ROOM=SOC 2 01005
ROOM=SOC
1/32W
MF
2 01005

NOTE: NAND PADS SHOULD BE SHIELDED FROM TRACES WITH A GROUND PLANE
NOTE: IO<6> PREFERRED BY MATT BYOM (N51)
PP0601
P4MM
(IS A STATUS READY BIT)
SM
ROOM=SOC 1 AP_BI_NAND_ANC0_IO<6> 6
PP

PP0602
P4MM
SM
ROOM=SOC 1 45_AP_TO_NAND_ANC0_RE_L 6
PP

PP0603
P4MM
SM
ROOM=SOC 1 45_AP_BI_NAND_ANC0_DQS 6
PP

A SYNC_MASTER=N56_MLB SYNC_DATE=08/29/2013 A
PAGE TITLE

SOC:NAND
DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
6 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 6 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

FIJI: HIGH SPEED DIG (CAM,LCD,LPDP,PCIE)


D NOTE: IS A FERRITE NEEDED? THERE ARE DCR CONCERNS.
D
PP0V95_FIXED_SOC
R0712
1 2 26 PP0V95_FIXED_SOC_PCIE
26 12 4
0.00 01005
ROOM=SOC
1 C0712 1 C0711
2.2UF 0.1UF
20% 20%
6.3V 4V
2 X5R 2 X5R
0201-1 01005
NOTE: NEED TO EVALUATE PI FOR PP1V0. ROOM=SOC ROOM=SOC
CONCERN OVER SHARING IT WITH MIPI AND
PCIE REFCLK WITHOUT A FILTER.
NOTE: PLACE NEAR THE PCIE PINS, NOT LPDP.

AL26 PWRTERM2GND
AM25 PWRTERM2GND
AM27 PWRTERM2GND
20 15 13 12 11 10 7 6 5 3 2PP1V8 PP1V0 7 12 26 26 12 7 PP1V0 PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
27 26 25 24 23 24 25 26 27

PWRTERM2GND
1 C0713 1 C0708
C0714 1 C0701 C0702 C0715
VDD18_MIPID E10
VDD18_MIPID F11

VDD18_MIPIC0 E22
VDD18_MIPIC1 F23

VDD10_MIPIC E20
VDD10_MIPIC F19
VDD10_MIPIC F21
1 1 1 1.0UF 0.1UF

VDD10_MIPID E8
VDD10_MIPID F9
0.1UF 0.1UF 0.1UF 0.1UF 20% 20%
6.3V 4V
20% 20% 20% 20% 2 X5R 2 X5R
4V 4V 4V 4V

AL24
X5R 2 2 X5R X5R 2 2 X5R 0201-1 01005

VDD095_VPTX0_PCIE E13
VDD095_VPTX1_PCIE D11

VDD095_VP_PCIE E12

VDDA10_REFCLK_PCIE D14

VDD18_VPH_PCIE F13
01005 01005 01005 01005 ROOM=SOC ROOM=SOC
ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC

VDDA10_LPDP0
VDDA10_LPDP1
VDDA10_LPDP2
VDDA10_LPDP3
PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
24 25 26 27

ROOM=SOC ROOM=SOC ROOM=SOC ROOM=SOC


R0704 R0705 R0706 R0708
1 1 1 1
AR30 LPDP_AUX_P
ULPI_DATA0 H4 AP_TO_OSCAR_SWDCLK_1V8 22
1.8V 1.0V 1.00K 1.00K 1.00K 1.00K NC ULPI_DATA1 H3 AP_BI_OSCAR_SWDIO_1V8
5% 5% 5% 5% AP30 LPDP_AUX_N
22

U0201 1/32W 1/32W 1/32W 1/32W NC ULPI_DATA2 G3


MF MF MF MF NC
POP-FIJI-1GB-DDR-B0 2 01005 2 01005 2 01005 2 01005
AR26 LPDP_TX0P ULPI_DATA3 G4 AP_TO_LEDDRV_EN 16
BGA NC
AP26 F2
C 23

23
90_RCAM_TO_AP_MIPI_DATA0_P
90_RCAM_TO_AP_MIPI_DATA0_N
A21
B21
MIPI0C_DPDATA0
MIPI0C_DNDATA0
SYM 5 OF 13
ISP0_SCL E29
ISP0_SDA E30
AP_TO_RCAM_I2C_SCL
AP_BI_RCAM_I2C_SDA
16 23

16 23
NC
AR27
LPDP_TX0N

LPDP_TX1P
ULPI_DATA4
ULPI_DATA5 G2
NC
NC
C
NC ULPI_DATA6 F3
AP27 LPDP_TX1N 1.0V 0.95V 1.0V 1.8V NC
90_RCAM_TO_AP_MIPI_DATA1_P A22 NC 24MA ULPI_DATA7 F4 TOUCH_TO_AP_INT_L 24
23 MIPI0C_DPDATA1
B22 AR28 LPDP_TX2P POP-FIJI-1GB-DDR-B0
23 90_RCAM_TO_AP_MIPI_DATA1_N MIPI0C_DNDATA1 NC ULPI_CLK G5 OSCAR_TO_PMU_HOST_WAKE 13 22
VDDIO18_GRP4

AP28 LPDP_TX2N BGA


ISP1_SCL D32 AP_TO_FCAM_I2C_SCL 11 NC ULPI_DIR E3 LCM_TO_AP_HIFA_BSYNC 20 24
A24 SYM 6 OF 13
23 90_RCAM_TO_AP_MIPI_DATA2_P MIPI0C_DPDATA2 ISP1_SDA D31 AP_BI_FCAM_I2C_SDA 11 AR29 LPDP_TX3P ULPI_NXT F1 AP_TO_TOUCH_RESET_L 24
90_RCAM_TO_AP_MIPI_DATA2_N B24 NC
AP29 U0201 E4
MIPI0C_DNDATA2
23

SENSOR0_CLK D29
R07071 61.9 2 ROOM=SOC NC LPDP_TX3N ULPI_STP AP_TO_LCM_RESET_L 20

A25
45_AP_TO_RCAM_CLK_R
01005
45_AP_TO_RCAM_CLK 23
C0705 AL28 LPDP_CAL_DRV_OUT
23 90_RCAM_TO_AP_MIPI_DATA3_P MIPI0C_DPDATA3 SENSOR0_RST C30 AP_TO_RCAM_SHUTDOWN 23 1/32W 1% 0.1UF NC
B25 SHUTDOWN IS ALSO RESET FCAM
MF ROOM=SOC
1 2
AK26 LPDP_CAL_VSS_EXT
23 90_RCAM_TO_AP_MIPI_DATA3_N MIPI0C_DNDATA3 NOSTUFF 29 90_WLAN_TO_AP_PCIE1_RXDP_P NC
X5R 20%
SENSOR1_CLK B31 45_AP_TO_FCAM_CLK_R 1 C0709 01005 4V
NC
B11 PCIE_RX0_P
90_RCAM_TO_AP_MIPI_CLK_P A23 MIPI0C_DPCLK SENSOR1_RST D30 AP_TO_FCAM_SHUTDOWN 56PF A11 EDP_HPD G29 AP_TO_STOCKHOLM_EN 29
23

90_RCAM_TO_AP_MIPI_CLK_N B23 MIPI0C_DNCLK


11
5%
16V
2 NP0-C0G
C0706 NC PCIE_RX0_M
23
0.1UF B12
01005 1 2 NC PCIE_TX0_P
45_CAM0_REXT A29 MIPI0C_REXT ROOM=SOC 29 90_WLAN_TO_AP_PCIE1_RXDP_N A12
SENSOR0_ISTRB C29 NC PCIE_TX0_M
VDDIO18_GRP4

X5R 20% NC
01005 4V
20 90_AP_TO_LCM_MIPI_DATA0_P A3 MIPI0D_DPDATA0 SENSOR0_XSHUTDOWN D28 AP_TO_STOCKHOLM_DWLD_REQ 29
R0709 ROOM=SOC
A13 PCIE_REF_CLK0_P
B3 NC
20 90_AP_TO_LCM_MIPI_DATA0_N MIPI0D_DNDATA0 61.9 2 B13 PCIE_REF_CLK0_M
SENSOR1_ISTRB C31 NC 1 45_AP_TO_FCAM_CLK 11 NC
SENSOR1_XSHUTDOWN A31 CAM_EXT_LDO_EN 23 01005 ROOM=SOC
A4
1/32W 1% AB2 PCIE_CLKREQ0_N
20 90_AP_TO_LCM_MIPI_DATA1_P
B4
MIPI0D_DPDATA1
NOSTUFF
MF ROOM=SOC
C0703 NC
90_AP_TO_LCM_MIPI_DATA1_N MIPI0D_DNDATA1 0.1UF A10
20
1 C0710 90_AP_TO_WLAN_PCIE1_TXDP_P 1 2
90_WLAN_TO_AP_PCIE1_RXDP_C_P
B10
PCIE_RX1_P
MIPI1C_REXT B29 45_CAM1_REXT 56PF 29
X5R 20%
90_WLAN_TO_AP_PCIE1_RXDP_C_N PCIE_RX1_M
20 90_AP_TO_LCM_MIPI_DATA2_P A6 MIPI0D_DPDATA2 5% 01005 4V
16V A9
B6 2 NP0-C0G 90_AP_TO_WLAN_PCIE1_TXDP_C_P PCIE_TX1_P
20 90_AP_TO_LCM_MIPI_DATA2_N MIPI0D_DNDATA2 MIPI1C_DPDATA0 A26 90_FCAM_TO_AP_MIPI_DATA0_P 11
01005
MIPI1C_DNDATA0 B26 90_FCAM_TO_AP_MIPI_DATA0_N 11
ROOM=SOC C0704 90_AP_TO_WLAN_PCIE1_TXDP_C_N B9 PCIE_TX1_M
0.1UF
NC C8 MIPI0D_DPDATA3 29 90_AP_TO_WLAN_PCIE1_TXDP_N 1 2 90_AP_TO_WLAN_PCIE1_REFCLK1_C_P A14 PCIE_REF_CLK1_P C13
C7 MIPI0D_DNDATA3 MIPI1C_DPDATA1 A28 PCIE_REF_PAD_CLK_P
B NC
MIPI1C_DNDATA1 B28
90_FCAM_TO_AP_MIPI_DATA1_P
90_FCAM_TO_AP_MIPI_DATA1_N
11

11
X5R
01005
20%
4V
ROOM=SOC
90_AP_TO_WLAN_PCIE1_REFCLK1_C_N B14

AB3
PCIE_REF_CLK1_M
PCIE_REF_PAD_CLK_M C12
AK5
NC
NC B
20 90_AP_TO_LCM_MIPI_CLK_P A5 MIPI0D_DPCLK PCIE_CLKREQ1_N GPIO39/PCIE_PERST0_N NC
GPIO43/PCIE_PERST1_N AL4 AP_TO_WLAN_PCIE1_RST_L
90_AP_TO_LCM_MIPI_CLK_N B5 MIPI1C_DPCLK A27 90_FCAM_TO_AP_MIPI_CLK_P 45_PCIE_RESREF A8
29
20 MIPI0D_DNCLK 11
PCIE_RESREF RF TEAM: CONFIRMED PD NEEDED
ROOM=SOC
MIPI1C_DNCLK B27 90_FCAM_TO_AP_MIPI_CLK_N R0719
A7 MIPI0D_REXT
11
C0720
0.1UF 1
R0710
1
R0719
29 90_AP_TO_WLAN_PCIE1_REFCLK1_P 1 2 100K
45_LCM_REXT R0703
1 X5R 20% 200 5%
01005 4V 1% 1/32W
4.02K 1/32W MF
1% MF 2 01005
1/32W
MF C0721 2 01005
ROOM=SOC
2 01005 0.1UF
ROOM=SOC 1 2
29 90_AP_TO_WLAN_PCIE1_REFCLK1_N
X5R 20%
01005 4V
ROOM=SOC

R07011 1
R0702 23 20 15 13 12 11 10 7 6 5 3 2 PP1V8
4.02K 4.02K
27 26 25 24

1% 1%
1/32W
MF
01005 2
1/32W
MF
1
R0711
ROOM=SOC 2 01005
ROOM=SOC
1.00K
5%
1/32W
MF
01005
2 ROOM=SOC

29 WLAN_TO_AP_PCIE1_CLKREQ_L

A SYNC_MASTER=N56_MLB SYNC_DATE=08/29/2013 A
PAGE TITLE

SOC:CAM,LCD,LPDP,PCIE
DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
7 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 7 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

BUTTON FLEX (BUTTONS, ANC REF MIC, STROBE, STROBE_NTC, WIFI FLEX PAC)

RIGHT BUTTON B2B


MLB: 516S1312
ROOM=BUTTON
J0801
D BB35S-RB12-3A
F-ST-SM
D
14 13

FL0813 BUTTON_TO_AP_HOLD_KEY_CONN_L 2 1 PP_STRB_DRIVER_TO_LED_WARM


120-OHM-210MA 8 8 16 26

8 REARMIC2_TO_CODEC_P_CONN 4 3
26 10 PP_CODEC_TO_REARMIC2_BIAS 2 1 CODEC_TO_REARMIC2_BIAS_CONN 8
8 REARMIC2_TO_CODEC_N_CONN 6 5
01005
8 7
ROOM=BUTTON 1 C0827 8 CODEC_TO_REARMIC2_BIAS_CONN
10 9
PP_STRB_DRIVER_TO_LED_COOL 8 16 26

100PF RCAM_TO_STROBE_NTC_CONN
MIC2 (ANC REF MIC): 5%
16V
8
12 11
MIC2/4 BIAS, 2 NP0-C0G
01005
NC XW0801
SM
MIC2_P,_N ROOM=BUTTON
16 15 STROBE_GND_RET 1 2
ROOM=STROBE
FL0801
120-OHM-210MA
9 REARMIC2_TO_CODEC_P 2 1 REARMIC2_TO_CODEC_P_CONN 8
01005
ROOM=BUTTON
1 C0801 LEFT BUTTON B2B
56PF
5%
16V
2 NP0-C0G MLB: 516S1315
01005
ROOM=BUTTON
ROOM=BUTTON
J0802
FL0802 BB35S-RB6-3A
120-OHM-210MA F-ST-SM
8 BUTTON_TO_AP_VOL_UP_CONN_L 8 7
9 REARMIC2_TO_CODEC_N 2 1 REARMIC2_TO_CODEC_N_CONN 8
01005
ROOM=BUTTON
C0802 2 1
C
C
1
56PF 4 3
5%
16V 8 BUTTON_TO_AP_VOL_DOWN_CONN_L 6 5 BUTTON_TO_AP_RINGER_A_CONN 8
2 NP0-C0G
01005
ROOM=BUTTON
10 9

FL0809
120-OHM-210MA
13 3 BUTTON_TO_AP_HOLD_KEY_L 1 2 BUTTON_TO_AP_HOLD_KEY_CONN_L
01005
ROOM=BUTTON 1

0201
C0810 1 5.5V-6.2PF
27PF
5% DZ0810
ROOM=BUTTON
6.3V 2
NP0-C0G 2 16 8 PP_STRB_DRIVER_TO_LED_WARM
0201 26
ROOM=BUTTON STROBE: 1 C0824
LED WARM
C0822 1
27PF
100PF 5%
5% 16V
16V 2 NP0-C0G
NP0-C0G 2 01005
01005
FL0810 ROOM=BUTTON ROOM=BUTTON

120-OHM-210MA
13 3 BUTTON_TO_AP_RINGER_A 1 2 BUTTON_TO_AP_RINGER_A_CONN 8
01005
ROOM=BUTTON 1 26 16 8 PP_STRB_DRIVER_TO_LED_COOL

0201 STROBE:
C0826 1 1 C0825
5.5V-6.2PF 100PF 27PF
DZ0811 LED COOL 5%
B C0819
27PF
1
2 ROOM=BUTTON
16V
NP0-C0G 2
01005
ROOM=BUTTON
5%
16V
2 NP0-C0G
01005
B
5% ROOM=BUTTON
6.3V
NP0-C0G 2
0201 NORTH_AC_GND_SCREW 8 25 29
ROOM=BUTTON

FL0811
120-OHM-210MA FL0817
BUTTONS: 13 3 BUTTON_TO_AP_VOL_DOWN_L 1 2 BUTTON_TO_AP_VOL_DOWN_CONN_L 8
120-OHM-210MA
RINGER, HOLD, 01005 16 RCAM_TO_STROBE_NTC 1 2 RCAM_TO_STROBE_NTC_CONN 8
C0820 1
ROOM=BUTTON
1 DZ0812 STROBE: 01005
VOL_UP/DOWN, 100PF 12V-33PF R0803 1 ROOM=BUTTON
5%
10V
01005-1 NTC 1 C0828
NP0-C0G 2 2 ROOM=BUTTON 51.1K 56PF
01005 NORTH_AC_GND_SCREW 8 25 29
1% 5%
ROOM=BUTTON 1/32W 16V
MF 2 NP0-C0G
01005 2 01005
ROOM=BUTTON
FL0812 ROOM=BUTTON

120-OHM-210MA
13 3 BUTTON_TO_AP_VOL_UP_L 1 2 BUTTON_TO_AP_VOL_UP_CONN_L 8
01005
C0821 1 ROOM=BUTTON 1 DZ0813
100PF 12V-33PF
5% 01005-1
10V ROOM=BUTTON
2
NP0-C0G 2
01005 NORTH_AC_GND_SCREW 8 25 29
ROOM=BUTTON

A SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 A
PAGE TITLE

IO:BUTTON FLEX CONN


DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
8 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 8 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

L67 AUDIO CODEC


D
AUDIO I/O D
(ANALOG MIC IN, DIG MIC IN, HPOUT, LINEOUT, RECEIVER OUT, MIKEYBUS)

C0922
0.1UF
1 2
20% X5R
4V 01005
ROOM=CODEC
18 9 LOWERMIC1_TO_CODEC_P
VOICE MIC C0923
18 9 LOWERMIC1_TO_CODEC_N
0.1UF
NOSTUFF NOSTUFF 1 2
1 C0927 1 C0930 20% X5R
56PF 56PF 4V 01005
5% 5% ROOM=CODEC
16V 16V
2 NP0-C0G 2 NP0-C0G
01005 01005
ROOM=CODEC ROOM=CODEC

ROOM=CODEC
R0915 ROOM=CODEC
1.33K2
18 9 CODEC_TO_HPHONE_HS4 1
1%
1/32W
C0920 U0900
MF 0.1UF WLCSP
C
01005 SYM 1 OF 3
C
1 2
NO_XNET_CONNECTION=TRUE LOWERMIC1_TO_AIN1_P G2 AIN1+ PRIMARY AOUT1+ K7 CODEC_TO_RCVR_P 11

CS42L67-CWZR-A1
20% X5R
ROOM=CODEC 4V 01005 LOWERMIC1_TO_AIN1_N G1 AIN1- (VOICE) MIC AOUT1- L7 CODEC_TO_RCVR_N 11
C0904 1 EXTMIC_TO_CODEC_P ROOM=CODEC
HEADPHONE MIC 220PF
10%
EXTMIC_TO_AIN2_P F4 AIN2+ HEADPHONE AOUT2+ L5 CODEC_TO_HAC_P 11
10V
X7R-CERM 2
EXTMIC_TO_CODEC_N
C0921 EXTMIC_TO_AIN2_N F3 AIN2- MIC AOUT2- K5 CODEC_TO_HAC_N 11
NO_XNET_CONNECTION=TRUE 0.1UF
1 2 F2 AIN3+ ANALOG LINEOUT_REF K8
NC MIC IN
ROOM=CODEC 20% X5R F1 AIN3-
4V 01005 NC J8
R0950 01005
ROOM=CODEC
E4 AIN4+ ANC
LINEOUTA NC
1.33K2 NC REF MIC2 LINEOUTB H8
NC
18 9 CODEC_TO_HPHONE_HS3 1
E3 AIN4-
1% NC HPOUTA J9 CODEC_TO_HPHONE_L 18
1/32W
MF REARMIC2_TO_AIN5_P E1 AIN5+ ANC HPOUTB K9 CODEC_TO_HPHONE_R 18
01005
NO_XNET_CONNECTION=TRUE REARMIC2_TO_AIN5_N E2 AIN5- REF MIC1 NOSTUFF
HS3 K1 NOSTUFF
C0940 D1 AIN6+ ANC
CODEC_TO_HPHONE_HS3 9 18
C0950 1 C0951 1
FRONTMIC3_TO_AIN6_P
0.1UF HS4 L2 CODEC_TO_HPHONE_HS4 56PF 56PF
1 2 FRONTMIC3_TO_AIN6_N D2 AIN6- ERROR MIC 9 18
5% 5%
16V 16V
NP0-C0G 2 NP0-C0G 2
20% X5R D3 AIN7+ ANALOG HS3_REF L9 CODEC_TO_HPHONE_HS3_REF 18 01005 01005
4V 01005 NC
ROOM=CODEC D4 LINEIN HS4_REF L8 CODEC_TO_HPHONE_HS4_REF 18 ROOM=CODEC ROOM=CODEC
9 8 REARMIC2_TO_CODEC_P NC AIN7-
ANC REF MIC HPDETECT G8 HPHONE_TO_CODEC_DET
9 8 REARMIC2_TO_CODEC_N C0941 NC
C1 AIN8+ ANALOG
LINEIN
18

0.1UF C2 AIN8- DN G10


NOSTUFF NOSTUFF 1 2 NC
1 C0942 1 C0943 LOWERMIC1_TO_DIN1_SD A6 DMIC1_SD DP F10 ROOM=CODEC
20% X5R
56PF 56PF 4V 01005 LOWERMIC1_TO_DIN1_SCLK B6 DMIC1_SCLK C0952
5% 5% ROOM=CODEC MBUS_REF F11
16V
2 NP0-C0G 2 16V 100PF
NP0-C0G
01005 01005 MIC2MIC3_TO_DIN2_SD A3 DMIC2_SD 1 2
ROOM=CODEC ROOM=CODEC
MIC2MIC3_TO_DIN2_SCLK A2 DMIC2_SCLK
5%
C0944 R0902 10V
0.1UF 1
20.0 2 NP0-C0G
01005
B 1
20%
2
X5R 90_CODEC_BI_TRISTAR_MIKEYBUS_L67_N
5%
1/32W
MF
01005 1
ROOM=CODEC
C0953 90_CODEC_BI_TRISTAR_MIKEYBUS_N 17
B
4V 01005 ROOM=CODEC 100PF
90_CODEC_BI_TRISTAR_MIKEYBUS_L67_P 5% NOSTUFF
11 9 FRONTMIC3_TO_CODEC_P
ROOM=CODEC
R0903 10V
2 NP0-C0G
90_CODEC_BI_TRISTAR_MIKEYBUS_P 17

ANC ERROR MIC 20.0 2


11 9 FRONTMIC3_TO_CODEC_N C0945 CODEC_MBUS_REF 18 1 01005
0.1UF NO_XNET_CONNECTION=TRUE
NOSTUFF NOSTUFF 1 2
5%
1/32W
MF
01005 C0954
1 C0946 100PF
56PF
1 C0947 20%
4V
X5R
01005
ROOM=CODEC
1 2
5% 56PF
5% ROOM=CODEC
2 16V
NP0-C0G 2 16V 5%
01005 NP0-C0G 10V
ROOM=CODEC ROOM=CODEC NP0-C0G
01005 01005
ROOM=CODEC

ROOM=SOC
NO_XNET_CONNECTION=TRUE
R09412 NOSTUFF
18 9 LOWERMIC1_TO_CODEC_P 1
0.00 01005
R0942
ROOM=SOC
18 9 LOWERMIC1_TO_CODEC_N NO_XNET_CONNECTION=TRUE 1 2 NOSTUFF
0.00 01005

ROOM=SOC

REARMIC2_TO_CODEC_P NO_XNET_CONNECTION=TRUE
R09432
1 NOSTUFF
9 8

A 0.00
R0944
01005
SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 A
ROOM=SOC PAGE TITLE
FRONTMIC3_TO_CODEC_P NO_XNET_CONNECTION=TRUE 1 2 NOSTUFF
11 9
0.00
ROOM=SOC
01005 AUDIO:L67 CODEC (1/2)
DRAWING NUMBER SIZE
R09452
9 8 REARMIC2_TO_CODEC_N NO_XNET_CONNECTION=TRUE 1
0.00
NOSTUFF
01005 Apple Inc. 051-9903 D
REVISION
R0946
ROOM=SOC
R
7.0.0
FRONTMIC3_TO_CODEC_N NO_XNET_CONNECTION=TRUE 1 2 NOSTUFF
11 9
0.00 01005 NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
9 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 9 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

L67 AUDIO CODEC


D D
POWER, MICBIAS DIGITAL SYSTEM I/O
NOTE: C1022 WAS REDUCED TO 2.2UF BECAUSE OF
ADDITIONAL NEARBY VCC MAIN CAPS

ROOM=CODEC

48 39 31 26 23 17 16 15 14 12
52 51
PP_VCC_MAIN
ROOM=CODEC 3 45_AP_TO_CODEC_I2S0_MCLK A9 MCLK U0900 A1
C5
WLCSP
1 C1074 1 C1022 1 C1031 1 C1075 WEAK INT PD
SYM 3 OF 3 B1
2.2UF 0.1UF 2.2UF

CS42L67-CWZR-A1
2.2UF 3 45_AP_TO_CODEC_ASP_I2S0_BCLK C10 ASP_SCLK
20% 20% 20% 20% F9
2 6.3V
X5R 6.3V 6.3V
2 X5R-CERM 2 6.3V
X5R 3 AP_TO_CODEC_ASP_I2S0_LRCLK B11 ASP_LRCK
2 X5R D5
0201-1 0201-1 01005 0201-1 3 AP_TO_CODEC_ASP_I2S0_DOUT C9 ASP_SDIN
ROOM=CODEC ROOM=CODEC ROOM=CODEC D7
CODEC_TO_AP_ASP_I2S0_DIN A8 ASP_SDOUT
23 20 15 13 12 11 7 6 5 3 2 PP1V8 PCB: C1021 AT U0921.L6 3
ALL ASP PINS:WEAK INT PD E5
27 26 25 24
1 C1013 3 45_AP_TO_CODEC_VSP_I2S4_BCLK E9 VSP_SCLK E6
0.1UF 3 AP_TO_CODEC_VSP_I2S4_LRCLK E8 VSP_LRCK/FSYNC E7
20% GND
4V AP_TO_CODEC_VSP_I2S4_DOUT D10 F5
2 X5R 3 VSP_SDIN
01005 CODEC_TO_AP_VSP_I2S4_DIN D11 F6
ROOM=CODEC 3 VSP_SDOUT
ALL VSP PINS:WEAK INT PD
F7
29 26 17 15 14 13 12 10 4 3 PP1V8_SDRAM 16 3 45_AP_TO_CODEC_XSP_I2S2_BCLK B8 XSP_SCLK F8
1 C1014 1 C1016 16 3 AP_TO_CODEC_XSP_I2S2_LRCLK B7 XSP_LRCK/FSYNC G7
10UF 0.1UF 16 3 AP_TO_CODEC_XSP_I2S2_DOUT C7 XSP_SDIN/DAC2B_MUTE
20% 20% H3
2 6.3V
CERM-X5R 2 4V
X5R 16 3 CODEC_TO_AP_XSP_I2S2_DIN A7 XSP_SDOUT
ALL XSP PINS:WEAK INT PD H4
0402-9 01005
ROOM=CODEC ROOM=CODEC J3
AP_TO_CODEC_SPI_CS_L B5 CS*
26 16 12 PP1V8_VA_L19_L67 3
J4
C AP_TO_CODEC_SPI_CLK B4
C

VCP G11
A11
B10

VPROG_CP H11
CCLK
1 C1012 3

VA J1

VL B9

VP L6
AP_TO_CODEC_SPI_MOSI B3 CDIN
2.2UF ROOM=CODEC
PP1V8_SDRAM
3
20% 29 26 17 15 14 13 12 10 4 3
3 CODEC_TO_AP_SPI_MISO A4 CDOUT

VD
6.3V
2 X5R WEAK INT PD
0201-1 KEEP THESE CAPS AT CODEC PINS ROOM=CODEC L67 WEAK INT PD = 550K - 2450K
10 CODEC_AGND ROOM=CODEC
ROOM=CODEC
R1045
1
3 CODEC_TO_AP_INT_L G4 INT*
1 C1032 1.00K
5%
U0900 FLYP J11 26 PP_CODEC_VHP_FLYP
2.2UF
20%
1/32W
MF 13 CODEC_TO_PMU_MIKEY_INT_L G5 WAKE*
WLCSP 6.3V
2 X5R 2 01005
D8
SYM 2 OF 3 G9 26 PP_CODEC_VHP_FLYC 0201-1 G3 D9
CODEC_RESET_L RESET*

CS42L67-CWZR-A1
FLYC H10 ROOM=CODEC
1 C1033 KEEP THESE CAPS AT CODEC PINS E10
B2
J10 PP_CODEC_VHP_FLYN 2.2UF ROOM=CODEC NC E11 TSTI C3
KEEP THESE CAPS AT CODEC PINS
26 20%
26 18 PP_CODEC_TO_MIC1_BIAS J5 MIC1_BIAS FLYN H9 2 6.3V
X5R
1 C1025 NC
A5
C4
ROOM=CODEC 0201-1 4.7UF NC C11
C1020 1 C1021 +VCP_FILT K11 26 PP_CODEC_VCPFILT+ XW1048 20%
6.3V
2 X5R-CERM1 NC
C6 TSTO
ROOM=CODEC 1.0UF 4.7UF SM C8
402 NC
1
R1000 20%
6.3V
X5R 2
18 MIC1_BIASFILT_RET
ROOM=CODEC
2 1 MIC1_BIAS_FILT J6 MIC1_BIAS_FILT GNDCP0 K10 PGND_CODEC_GNDCP 1 2
NC
D6
2.21K 0201-1 20% GNDCP1 L11 ROOM=CODEC
1%
1/32W CODEC_AGND 10
6.3V 1 C1029
MF X5R-CERM1
402 -VCP_FILT L10 26 PP_CODEC_VCPFILT- 4.7UF TSTO MUST BE NC
2 01005 20%
6.3V
26 PP_EXTMIC_BIAS_IN L4 MIC2_BIAS_IN SPEAKER_VQ J7 26 PP_CODEC_SPKR_VQ ROOM=CODEC
2 X5R-CERM1
ROOM=CODEC 402
1 C1037 26 PP_EXTMIC_BIAS L3 MIC2_BIAS
1 C1034 ROOM=CODEC

1.0UF GNDP K6 4.7UF


20% K4 MIC2_BIAS_FILT_IN 20%
26 PP_EXTMIC_BIAS_FILT_IN 6.3V
2 6.3V FILT+
26 H1 PP_CODEC_FILT+ 2 X5R-CERM1
X5R 402
0201-1 K3 MIC2_BIAS_FILT
PP_EXTMIC_BIAS_FILT FILT- H2
26
C1024
1 KEEP THIS CAP AT CODEC PINS
1 C1038 PP_CODEC_TO_FRONTMIC3_BIAS H7 MIC3_BIAS
26 11 GNDA J2 10UF
20%
4.7UF ROOM=CODEC
FRONTMIC3_TO_CODEC_RET_FILT G6 MIC3_BIAS_FILT 6.3V
CERM-X5R 2
20% C1015 1 KEEP THIS CAP AT CODEC PINS
B 6.3V
2 X5R-CERM1 1.0UF PP_CODEC_TO_REARMIC2_BIAS
26 8 H6 MIC4_BIAS
0402-9
ROOM=CODEC B
L1 GNDHS0
K2 GNDHS1

402 20% CODEC_AGND


6.3V 10
ROOM=CODEC REARMIC2_TO_CODEC_RET_FILT H5 MIC4_BIAS_FILT
A10 GNDD

X5R 2 ROOM=CODEC
0201-1
1 C1000 2 ROOM=CODEC
1.0UF
ROOM=CODEC
20%
2 6.3V
X5R 1 ROOM=CODEC
XW1003
SHORT-10L-0.1MM-SM
C1018 1 0201-1
C1019 1
4.7UF 4.7UF
20% 2 20%
6.3V
X5R-CERM1 2 6.3V ROOM=BUTTON_B2B
ROOM=BUTTON_B2B
XW1002 402 X5R-CERM1
402
XW1004
SHORT-10L-0.1MM-SM
SHORT-10L-0.1MM-SM
REARMIC2_BIAS_FILT_GND1 2
1 2 FRONTMIC3_BIAS_FILT_GND
PCB NOTE:
PLACE NEAR J1111 GND PIN

A SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 A
PAGE TITLE

AUDIO:L67 CODEC (2/2)


DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
10 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 10 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
THIS ON ONE MLB ---> 516S1081 RECEPTACLE

FRONT CAM FLEX B2B


SENSOR HOTBAR ---> 998-6868
J1111
AA22L
F-ST-SM
41 ROOM=CG_B2B
37 38
(FCAM, PROX, ALS, RECEIVER, ANC ERROR MIC)
11 CODEC_TO_RCVR_CONN_N 1 2 CODEC_TO_HAC_CONN_P 11

11 CODEC_TO_RCVR_CONN_P 3 4 CODEC_TO_HAC_CONN_N 11

26 11 PP1V8_FCAM_CONN 5 6 PP1V2_FCAM_VDDIO_CONN 11 26

D FL1123 SPECIAL Z = 0.60 MM MAX


26 11 PP2V85_FCAM_AVDD_CONN 7
9
8
10 90_FCAM_TO_AP_MIPI_DATA0_CONN_N 11
D
FERR-22-OHM-1A-0.055OHM IRLED = 104-128MA 11 12 90_FCAM_TO_AP_MIPI_DATA0_CONN_P 11

1 2 26 12 11 PP3V0_PROX_IRLED 45_AP_TO_FCAM_CLK_CONN 13 14 90_FCAM_TO_AP_MIPI_CLK_CONN_P


15 13 12 10 7 6 5 3 2 PP1V8 PP1V8_FCAM_CONN 11 26
11 11
27 26 25 24 23 20
0201 1 C1103 1 C1144 1 C1101 1 C1114 1 C1106 11 AP_TO_FCAM_SCL_CONN 15 16 90_FCAM_TO_AP_MIPI_CLK_CONN_N 11
ROOM=CG_B2B 1 C1107 1 C1104 100PF
5% 0.1UF 2.2UF 2.2UF 4.3UF 11 AP_TO_FCAM_SHUTDOWN_CONN 17 18 90_FCAM_TO_AP_MIPI_DATA1_CONN_P 11
0.1UF 100PF 16V 20%
4V
20% 20% 20%
AP_BI_FCAM_SDA_CONN 19 20 90_FCAM_TO_AP_MIPI_DATA1_CONN_N
20% 5% 2 NP0-C0G 2 X5R 2 6.3V 2 6.3V 2 4V 11 11
2 4V
X5R 2
16V
NP0-C0G 01005 01005
X5R
0201-1
X5R
0201-1
X5R-CERM
0610-1 21 22
01005 01005 ROOM=CG_B2B ROOM=CG_B2B ROOM=CG_B2B ROOM=CG_B2B ROOM=CG_B2B
ROOM=CG_B2B ROOM=CG_B2B 26 11 PP3V0_PROX_CONN 23 24
11 CUMULUS_TO_PROX_RX_EN_1V8_CONN 25 26 45_PROX_TO_CUMULUS_RX_CONN 11 24
27 28 PP3V0_ALS_CONN 11 26
FL1166 AP_BI_I2C2_SDA_ALS_CONN 29 30 AP_TO_I2C2_SCL_ALS_CONN 11
FERR-22-OHM-1A-0.055OHM 11

26 12 5 4 2 PP1V2 1 2 PP1V2_FCAM_VDDIO_CONN 11 26
FL1104 11 ALS_TO_AP_INT_CONN_L 31 32 PP3V0_PROX_IRLED 11 12 26
120-OHM-25%-250MA-0.5DCR 11 PGND_IRLED_K 33 34 PP_CODEC_TO_FRONTMIC3_BIAS_CONN 11 26
0201 5 MA
ROOM=CG_B2B 1 C1166 1 C1167 26 12 PP3V0_PROX_ALS 2 1 PP3V0_PROX_CONN 11 26
11 FRONTMIC3_TO_CODEC_N_CONN 35 36 FRONTMIC3_TO_CODEC_P_CONN 11
0.1UF 100PF 01005
5%
20%
4V
2 X5R 2
16V
NP0-C0G
ROOM=CG_B2B 1 C1199
01005 01005 100PF 39 40
ROOM=CG_B2B 5%
ROOM=CG_B2B 16V 42
2 NP0-C0G
01005
FL1144 ROOM=CG_B2B
FERR-22-OHM-1A-0.055OHM
1 2
FL1145 FL1148
26 23 PP2V85_CAM_VDD PP2V85_FCAM_AVDD_CONN 11 26 120-OHM-25%-250MA-0.5DCR 0.25 MA 120-OHM-210MA
0201 1 2
C1193 1 ROOM=CG_B2B 1 C1143 1 C1105 PP3V0_ALS_CONN 11 26
26 10 PP_CODEC_TO_FRONTMIC3_BIAS 1 2 PP_CODEC_TO_FRONTMIC3_BIAS_CONN 11 26

2.2UF 0.1UF 100PF 01005


C1163
20% 20% 5%
16V C1108 1 C1109 1 C1113 1 ROOM=CG_B2B 1 C1100 1
100PF
01005
ROOM=CG_B2B 1 DZ1115
6.3V 2 2 6.3V 2 NP0-C0G 4.3UF 2.2UF 2.2UF 0.1UF 5% 6.8V-100PF
X5R X5R-CERM 01005 20% 20% 20% 20% 16V 01005
0201-1 01005 4V 6.3V 6.3V 6.3V NP0-C0G
ROOM=CG_B2B 2 X5R-CERM 2 2 ROOM=CG_B2B
ROOM=CG_B2B ROOM=CG_B2B X5R-CERM 2
C 0610-1
ROOM=CG_B2B
X5R
0201-1
ROOM=CG_B2B
2 X5R
0201-1
ROOM=CG_B2B
2 01005 01005
ROOM=CG_B2B
ROOM=CG_B2B C
FL1164
70-OHM-25%-0.28A
FL1113 2 1
120-OHM-25%-250MA-0.5DCR 9 CODEC_TO_HAC_N CODEC_TO_HAC_CONN_N 11

1 2 01005 NO_XNET_CONNECTION=TRUE
7 45_AP_TO_FCAM_CLK 45_AP_TO_FCAM_CLK_CONN 11
01005 1 DZ1118
ROOM=CG_B2B 1 C1198 FL1158 12V-33PF
01005-1
56PF
5% 24 CUMULUS_TO_PROX_RX_EN_1V8 1 2 CUMULUS_TO_PROX_RX_EN_1V8_CONN 11
2 ROOM=CG_B2B
16V
2 NP0-C0G
ALS, 120-OHM-210MA C1158
ROOM=CG_B2B
CAMERA 01005
ROOM=CG_B2B 01005
ROOM=CG_B2B
1
56PF
FL1165
70-OHM-25%-0.28A
FL1112 PROX
5%
16V
120-OHM-25%-250MA-0.5DCR 2 NP0-C0G
01005 AUDIO 9 CODEC_TO_HAC_P 2
01005
1 CODEC_TO_HAC_CONN_P 11

7 AP_TO_FCAM_SHUTDOWN 1 2 AP_TO_FCAM_SHUTDOWN_CONN 11
PROX_RX SIGNAL MUST BE TREATED WITH CARE ROOM=CG_B2B NO_XNET_CONNECTION=TRUE
01005 1 DZ1119
ROOM=CG_B2B 1 C1102 45_PROX_TO_CUMULUS_RX_CONN
12V-33PF
01005-1
56PF 24 11
5% 2 ROOM=CG_B2B
16V
2 NP0-C0G 1 C1162
01005 56PF ROOM=CG_B2B

FL1115
ROOM=CG_B2B 5%
16V
2 NP0-C0G
FL1151
01005
70-OHM-25%-0.28A
120-OHM-25%-250MA-0.5DCR ROOM=CG_B2B
CODEC_TO_RCVR_N 1 2 CODEC_TO_RCVR_CONN_N
7 AP_TO_FCAM_I2C_SCL 1 2 AP_TO_FCAM_SCL_CONN 11 FL1102 9
01005 NO_XNET_CONNECTION=TRUE
11

01005
ROOM=CG_B2B 1 C1192 20 3 AP_BI_I2C2_SDA 1 2 AP_BI_I2C2_SDA_ALS_CONN 11
1 DZ1116
12V-33PF
56PF 120-OHM-210MA 01005-1
5%
16V 01005
1 C1111 2 ROOM=CG_B2B
2 NP0-C0G ROOM=CG_B2B 56PF
01005 5%
16V
ROOM=CG_B2B 2 NP0-C0G ROOM=CG_B2B
B FL1114
120-OHM-25%-250MA-0.5DCR FL1120
01005
ROOM=CG_B2B FL1152
70-OHM-25%-0.28A
B
1 2 CODEC_TO_RCVR_P 1 2 CODEC_TO_RCVR_CONN_P
7 AP_BI_FCAM_I2C_SDA AP_BI_FCAM_SDA_CONN 11
20 3 AP_TO_I2C2_SCL 1 2 AP_TO_I2C2_SCL_ALS_CONN
9 11
11
01005 01005 NO_XNET_CONNECTION=TRUE
1 C1196 120-OHM-210MA 1 DZ1117
ROOM=CG_B2B
56PF
01005 1 C1110 12V-33PF
5%
ROOM=CG_B2B 56PF 01005-1
16V 5%
2 NP0-C0G 16V
2 NP0-C0G 2 ROOM=CG_B2B
01005 01005
ROOM=CG_B2B ROOM=CG_B2B ROOM=CG_B2B
L1139
90-OHM-0.1A-0.7-3GHZ FL1157 FL1103
TAM0605 120-OHM-210MA
SYM_VER-1
3 ALS_TO_AP_INT_L 2 1 ALS_TO_AP_INT_CONN_L 11
90_FCAM_TO_AP_MIPI_DATA0_N 4 1 FRONTMIC3_TO_CODEC_N 1 2 FRONTMIC3_TO_CODEC_N_CONN
7 90_FCAM_TO_AP_MIPI_DATA0_CONN_N 11
9 11
120-OHM-210MA
01005 1 C1112 01005 NO_XNET_CONNECTION=TRUE

90_FCAM_TO_AP_MIPI_DATA0_P 3 2
ROOM=CG_B2B
5%
56PF 1 DZ1114
7 90_FCAM_TO_AP_MIPI_DATA0_CONN_P 11 16V 6.8V-100PF
ROOM=CG_B2B 2 NP0-C0G 01005
01005 2 ROOM=CG_B2B
L1140
90-OHM-0.1A-0.7-3GHZ
11 PGND_IRLED_K ROOM=CG_B2B
ROOM=CG_B2B
TAM0605
SYM_VER-1 FL1101
7 90_FCAM_TO_AP_MIPI_DATA1_P 4 1 90_FCAM_TO_AP_MIPI_DATA1_CONN_P 11 3 120-OHM-210MA
Q1101 ROOM=CG_B2B 9 FRONTMIC3_TO_CODEC_P 2 1 FRONTMIC3_TO_CODEC_P_CONN 11
D NO_XNET_CONNECTION=TRUE
01005
90_FCAM_TO_AP_MIPI_DATA1_N 3 2 DMN3730UFB4
7 90_FCAM_TO_AP_MIPI_DATA1_CONN_N 11
G
DFN1006H4-3
1 DZ1113
ROOM=CG_B2B 1 CUMULUS_TO_PROX_TX_EN_BUFF 24 6.8V-100PF
S 01005
L1135
90-OHM-0.1A-0.7-3GHZ SYM_VER_1 1
R1185 2 ROOM=CG_B2B
TAM0605 1.00M
SYM_VER-1

2 5%
90_FCAM_TO_AP_MIPI_CLK_P 4 1 90_FCAM_TO_AP_MIPI_CLK_CONN_P 11 1/32W
A
7
MF
01005
2 ROOM=CG_B2B SYNC_MASTER=N61_MLB
PAGE TITLE
SYNC_DATE=08/26/2013 A
90_FCAM_TO_AP_MIPI_CLK_N 3 2 90_FCAM_TO_AP_MIPI_CLK_CONN_N 11
7
ROOM=CG_B2B CAMERA:FRONT FLEX CONN
DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
11 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 11 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
SAME POLARITY

H7 VDD1(BUCK3)=0.045A
L1209 ROOM=PMU

ADI PMU 1UH-3.0A-0.059OHM


L1216 +
1.0UH-20%-2.4A-0.075HM

BUCK3_SW1=0.500A
1 2 0V775/0V95/1V0 PP_CPU PCB:PLACE C1297 NEAR C1263

BUCK3_SW3=0.?A
BUCK3_SW2=0.?A
4 26 1 2 PP1V8_SDRAM 3 4 10 13 14 15 17
26 29
PIFA20161B

TOTAL=0.545A
PIFE20161T-SM
L1210 ROOM=PMU 1 C1290 1 C1292 1 C1294 1 C1235 ROOM=PMU 1 C1297 1 C1296 1 C1293 1 C1243
(BUCK, LDO, VIBE DRIVER, 32K, CHARGER) 0.47UH-20%-3.3A-0.065OHM 15UF 15UF 15UF 15UF XW1218
SHORT-10L-0.1MM-SM
100PF
5%
100PF
5% 15UF 15UF

H7 VDD_CPU
1 2 20% 20% 20% 20% 16V 16V 20% 20%
6.3V
2 X5R 6.3V
2 X5R 2 6.3V 2 6.3V 1 2 2 NP0-C0G 2 NP0-C0G 2 6.3V 2 6.3V
X5R X5R X5R X5R

7.6A MAX
MCMK2012TR47M-SM 01005 01005
NOTE: L1210, L1212 BOMOPTIONS 0402-1 0402-1 0402-1 0402-1 ROOM=PMU 0402-1 0402-1
CONTROLLED ON PAGE1 L1211 ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
1UH-3.0A-0.059OHM

MAX
MAX
MAX

MAX
MAX
1 2 PCB:PLACE C1296 NEAR L1216
APN: 338S1251 (ADI AZ)

D U1202
PIFA20161B
L1212 ROOM=PMU 1 C1222 1 C1245 1 C1262 1 C1228 D
0.47UH-20%-3.3A-0.065OHM 15UF 15UF 15UF 15UF
D2186AZE0FJAVAC 20% 20% 20% 20%
FCCSP-N56-N61 1 2 6.3V
2 X5R 6.3V
2 X5R 2 6.3V 2 6.3V
ROOM=PMU X5R X5R
MCMK2012TR47M-SM 0402-1 0402-1 0402-1 0402-1
SYM 1 OF 3 ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
N16 VBUS_OVP_OFF A7 26 PP_BUCK0_LX0
NC DIDT=TRUE
B7
M20 BUCK0_LX0
NOSTUFF NC C7
M21 VCENTER
R1201 NC A9 26 PP_BUCK0_LX1
470 N20 B9 DIDT=TRUE
26 25 18 17 14 PP5V0_USB 1 2 26 PP5V0_USB_TO_PMU BUCK0_LX1
5% N21 C9
1/32W
MF-LF P20 VBUS A12 26 PP_BUCK0_LX2
01005 DIDT=TRUE SAME POLARITY
P21 BUCK0_LX2 B12

BAT/USB
ROOM=PMU
C12 L1213 ROOM=PMU L1217 +
1UH-3.0A-0.059OHM

BUCK4_SW2=0.100A
BUCK4_SW1=1.000A
1.0UH-20%-2.4A-0.075HM
NC H20 A14 26 PP_BUCK0_LX3 0V9/0V95 ROOM=PMU

(BUCK4)=0.500A
DIDT=TRUE 1 2 PP_GPU

H7 VDD_GPU

H7 VDDCA,VDD2
H21 IBAT B14 4 26 1 2 PP1V2_SDRAM 2 4 12 23 26
NC BUCK0_LX3

TOTAL=1.600A
PIFA20161B PIFE20161T-SM

3.45A MAX
C14
K10 VBAT
L1214 ROOM=PMU 1 C1203 1 C1227 1 C1210 1 C1226 XW1220 1 C1214 1 C1216 1 C1288
25 14 CHARGER_VBATT_SNS 0.47UH-20%-3.3A-0.065OHM 15UF 15UF 15UF 15UF SHORT-10L-0.1MM-SM 15UF 15UF 100PF
20% 20% 20% 20% 1 2 20% 20% 5%
1 2 6.3V
2 X5R 6.3V
2 X5R 2 6.3V 2 6.3V 2 6.3V 2 6.3V 16V
L16 ACT_DIO BUCK0_FB E7 45_BUCK0_FB X5R X5R ROOM=PMU X5R X5R 2 NP0-C0G
NC 4
MCMK2012TR47M-SM 0402-1 0402-1 0402-1 0402-1 0402-1 0402-1 01005
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
L20 A3 26 PP_BUCK1_LX0
NC DIDT=TRUE

MAX
MAX
MAX
L21 CHG_LX B3

MAX
NC BUCK1_LX0
C3 PCB:PLACE C1270 NEAR L1217
48 39 31 26 23 17 16 15 14 10 PP_VCC_MAIN J20
52 51 A5 26 PP_BUCK1_LX1
J21 VCC_MAIN DIDT=TRUE
1 C1220 1 C1200 1 C1217 1 C1218 C1250 K7 VCC_MAIN_S BUCK1_LX1 B5
10UF 10UF 10UF 10UF 2.2UF C5
20% 20% 20% 20% 20%

C 2 6.3V
CERM-X5R
0402-9
ROOM=PMU
2 6.3V
CERM-X5R
0402-9
ROOM=PMU
2 6.3V
CERM-X5R
0402-9
ROOM=PMU
2 6.3V
CERM-X5R
0402-9
ROOM=PMU
6.3V
X5R
0201-1
ROOM=PMU
A4
B4
L1215ROOM=PMU
1.0UH-20%-2.4A-0.075HM L1218 ROOM=PMU C

BUCK
VDD_BUCK1 BUCK1_FB E4 45_BUCK1_FB 4
1.0UH-20%-2.4A-0.075HM
C4 1 2 0V9/0V95 PP_VAR_SOC 5 26

1.8A MAX
H7 VAR

VDD_SRAM_SOC
1 2 PP0V95_FIXED_SOC

H7 VDD_SRAM,
4 7 26
F1 PIFE20161T-SM
G1 PP_BUCK2_LX PIFE20161T-SM

BUCK INPUT
26
F2 VDD_BUCK2 C1223 C1275 C1289
BUCK2_LX G2 DIDT=TRUE 1 1 1
L1219 ROOM=PMU 1 C1240 1 C1202 1 C1209 1 C1241

3.3A MAX
K1 15UF 15UF 15UF 0.47UH-30%-2.7A-0.065OHM 15UF 15UF 15UF 15UF
20% 20% 20%
1 C1251 1 C1225 1 C1260 1 C1263 1 C1267 K2 VDD_BUCK3 6.3V
2 X5R 2 6.3V
X5R 2 6.3V
X5R 1 2
20%
6.3V
20%
6.3V
20%
6.3V
20%
6.3V
10UF 10UF 10UF 10UF 10UF E20 BUCK2_FB F4 45_BUCK2_FB 5 0402-1 0402-1 0402-1
2 X5R 2 X5R 2 X5R 2 X5R
20% 20% 20% 20% 20% ROOM=PMU ROOM=PMU ROOM=PMU MCKK2012-SM 0402-1 0402-1 0402-1 0402-1
2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R 2 6.3V
CERM-X5R E21 VDD_BUCK4 ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU
0402-9 0402-9 0402-9 0402-9 0402-9 J1
A17 26 PP_BUCK3_LX
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU BUCK3_LX DIDT=TRUE
J2
B17
VDD_BUCK5 BUCK3_FB K6 45_BUCK3_FB
C17
P5 PP1V8 2 3 5 6 7 10 11 13 15 20 23 24
N9 VDD_BUCK6 25 26 27
BUCK3_SW1 N5
N8 VDD_BYP_BUCK6 P6
1 C1285 1 C1298 1 C1264 1 C1266 A8 BUCK3_SW2 R6
PP1V8_GRAPE 24 26

10UF 10UF 10UF 1.0UF B8


20% 20% 20% 20% VDD_BUCK001
6.3V 6.3V 6.3V 6.3V P7 PP1V8_OSCAR 19 22 26
2 CERM-X5R 2 CERM-X5R 2 CERM-X5R 2 X5R C8 BUCK3_SW3
0402-9 0402-9 0402-9 0201-1 R7
ROOM=PMU ROOM=PMU ROOM=PMU ROOM=PMU A13
B13 N6
VDD_BUCK023
C13 VBUCK3_SW N7
DESENSE CAPS FOR VCCMAIN: F20 26 PP_BUCK4_LX
C1271: WIFI MODULE N13 VDD_LDO6 DIDT=TRUE
C1272: AP PMU MODULE 1 C1271 1 C1272 P14 VDD_LDO2
BUCK4_LX F21
BB PMU MODULE:RF SIDE 100PF 100PF LDO INPUT 45_BUCK4_FB
5% 5% H17 VDD_LDO1_3 BUCK4_FB E18
QPOET MODULE:RF SIDE 16V 16V
2 NP0-C0G J17
2 NP0-C0G 01005 VDD_LDO4_13 N3
01005
ROOM=WIFI ROOM=PMU N15 VDD_LDO5 VBUCK4_SW N4
B 26 23 12 4 2 PP1V2_SDRAM
L17
L2
VDD_LDO7_8
VDD_LDO10 M2 PP1V2 2 4 5 11 26
B
N11 VDD_LDO9_11 BUCK4_SW1 N2
1 C1278 BUCK4_SW2 L5 PP1V2_OSCAR 22 26
2.2UF
20% A16 PP_BUCK5_LX0
2 6.3V
26
X5R NC P12 VDD_VIB B16 DIDT=TRUE
VIBE

0201-1
ROOM=PMU R12 VIB BUCK5_LX0
NC C16
N12 VIB_PWM_EN
A18 26 PP_BUCK5_LX1
C1 XTAL1 B18 DIDT=TRUE
XTAL

BUCK5_LX1
D1 XTAL2 C18
G9 VSS_RTC BUCK5_FB C21 45_BUCK5_FB 4
TO DO: REVIEW ALL LDO ASSIGNMENTS
(CHECK VDD_LDO INPUT SOURCE,
CHECK CURRENT RATING FOR LDO OUT
BUCK6_LX R9 NC SOC USB PHY (25 MA) VS. LOAD REQUIREMENT AT DESTINATION, ETC)
BUCK6_FB L11NC SPEAKER AMP, CODEC VA (2.5 MA L1419, 3MA L67)
BUCK6_BYP R8 NC TRISTAR VDH, WIFI_FLEX PAC (? MA)
45_PMU_TO_XTAL_OSC32
GYRO, ACCEL, COMPASS (? MA) NOTE: 3V +/- 5% PER EUGENE
ROOM=PMU (50MA) VLDO1 F18 2.5-3.3V +/-77.5MV PP3V3_USB 2 26
LDO

NAND (? MA)
Y1200 45_XTAL_TO_PMU_OSC32 (50MA) VLDO2 R14 1.2-1.9V +/-42.5MV PP1V8_VA_L19_L67 10 16 26
ACCESSORY POWER (? MA)
32.768K-20PPM-12.5PF (50MA) VLDO3 G18 2.5-3.3V +/-75MV PP3V0_TRISTAR 15 17 26 29
1 2 PROX/ALS VDD (PROX: 0.75/1.2 MA ALS: 0.175/0.25 MA [TYP/MAX])
(50MA) VLDO4 H18 2.5-3.6V +/-75MV PP3V0_IMU 19 26
ROOM=PMU
ROOM=PMU 2.0X1.2X0.60-SM1 (1000MA) VLDO5 R15 2.5-3.6V +/-75MV PP3V0_NAND 6 26
C1276 1 1 C1283 (150MA) VLDO6 R13 1.2-3.6V +/-82.5MV PP3V3_ACC 17 26
REAR CAM AUTO FOCUS (120MA PEAK, PROBABLY CAP AT 80MA)
18PF 18PF REAR/FRONT CAM AVDD (? MA)
5% 5% (250MA) VLDO7 K18 2.5-3.6V +/-75MV PP3V0_PROX_ALS 11 26
16V 16V
2 CERM SOC 1V0 MIPI, USB_DVDD, DP (71 MA TOTAL)
CERM 2 (250MA) VLDO8 L18 2.5-3.6V +/-70MV
01005 01005 NC PROX LED (102 MA TYP)
(250MA) VLDO9 R10 2.5-3.6V +/-71.25MV
ALWAYS ON 1V8 (? MA)
P10 PP2V9_LDO9
A VLDO9_FB
(100MA) VLDO10 L1 0.6-1.4V +/-25MV PP1V0 7 26 SYNC_MASTER=N56_MLB SYNC_DATE=08/29/2013 A
(250MA) VLDO11 R11 2.5-3.6V +/-82.5MV PP3V0_PROX_IRLED 11 26 PAGE TITLE

(5MA) VLDO12 L6 FIXED 1.8V, +/-5%


J18 2.5-3.6V +/-71.25MV
PP1V8_ALWAYS 3 5
14 26
POWER:ADI(1/2)
(250MA) VLDO13 PP3V0_MESA 21 26 DRAWING NUMBER SIZE

VPUMP R5 45_PMU_VPUMP Apple Inc. 051-9903 D


REVISION
R
7.0.0
SPEC REQUIRES 10NF, 1 C1208 1 C1270 1 C1229 1 C1212 1 C1284 1 C1299 1 C1207 1 C1242 1 C1232 1 C1291 1 C1219 NOTICE OF PROPRIETARY PROPERTY: BRANCH
VPUMP RUNS AT 4.6V 0.1UF 2.2UF 2.2UF 1.0UF 1.0UF 2.2UF 2.2UF 1.0UF 2.2UF 0.1UF 2.2UF THE INFORMATION CONTAINED HEREIN IS THE
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% PROPRIETARY PROPERTY OF APPLE INC.
6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 6.3V 4V 6.3V THE POSESSOR AGREES TO THE FOLLOWING: PAGE
VPUMP CAP: 2 X5R-CERM 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R 2 X5R
30% DERATED. 01005
ROOM=PMU
0201-1
ROOM=PMU
0201-1
ROOM=PMU
0201-1
ROOM=PMU
0201-1
ROOM=PMU
0201-1
ROOM=PMU
0201-1
ROOM=PMU
0201-1
ROOM=PMU
0201-1
ROOM=PMU
01005
ROOM=PMU
0201-1
ROOM=PMU
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
12 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 12 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

ADI PMU
(AMUX, GPIO, BUTTONS, ADC, THERMISTORS, SYSTEM I/F, GND)

D D

ROOM=PMU
R1316
1
200K 2
1% MF
1/20W 201 ROOM=PMU
ROOM=PMU R1331
C1317 6.34K2
1 TRISTAR_TO_PMU_USB_BRICKID 17
0.1UF MF 1%
1 2 01005 1/32W
0201 6.3V
10%
CERM-X5R
1 C1326
ROOM=PMU
0.01UF
10%
C1318 6.3V
2 X5R
APN: 338S1251 (ADI AZ) 1.0UF 01005
1 2 ROOM=PMU

20% X5R
6.3V 0201-1
AMUX VOLTAGE LIMIT IS APPROX. = VDD_REF = PP_VCC_MAIN ROOM=PMU U1202 ROOM=PMU
ROOM=PMU U1202
D2186AZE0FJAVAC D2186AZE0FJAVAC
FCCSP-N56-N61 C1319 CHESTNUT_TO_PMU_ADCIN7 13 15 FCCSP-N56-N61
1.8V ---> A1 AMUX_A0 SYM 2 OF 3 IREF F6 45_PMU_IREF 0.1UF SYM 3 OF 3
NC 1 2
1.8V ---> B1 AMUX_A1 VREF G5 26 PP_PMU_VREF A15 G13
NC
1.8V ---> D2 E5 B15 G14
13 8 3 BUTTON_TO_AP_RINGER_A AMUX_A2 VDD_REF 26 PP_PMU_VDD_REF 10% 1 C1323 VSS_BUCK0_5

ADC/REFS
6.3V

C
1.8V
1.8V
--->
--->
8 3 BUTTON_TO_AP_VOL_UP_L

8 3 BUTTON_TO_AP_VOL_DOWN_L
E2
E1
AMUX_A3
AMUX_A4
VDD_RTC
FIXED 2.5V, +/-2%

BRICK_ID N17
F7 26 PP_PMU_VDD_RTC

13
CERM-X5R
0201
TRISTAR_TO_PMU_USB_BRICKID_R
1000PF
10%
6.3V
2 X5R-CERM
C15
A2
H8
H9 C
20 15 LCM_TO_CHESTNUT_PWR_EN H6 AMUX_A5 01005 B2 H10
3.33V ---> ADC_IN7 N18 ROOM=PMU VSS_BUCK1
13 TRISTAR_TO_PMU_USB_BRICKID_R H5 AMUX_A6 C2 H11
15 13 CHESTNUT_TO_PMU_ADCIN7 H4 AMUX_A7 ADC_REF E6 NC PP1V8_SDRAM A6 H12
FOREHEAD NTC 25 PMU_TO_TP_AMUX_AY G4 ACC_ID N19 NC
3 4 10 12 14 15 17 26 29
B6 H13

AMUX
AMUX_AY VSS_BUCK01
BASEBAND ---> 29 RADIO_TO_PMU_ADC_SMPS1 J5 AMUX_B0 ROOM=PMU C6 H14
NO_XNET_CONNECTION=TRUE
NO_XNET_CONNECTION=TRUE

ROOM=PMU_
1
ROOM=PMU_ 29 RADIO_TO_PMU_ADC_PP_LDO11_VDDIO J6 AMUX_B1
TMPR_DET F5
1
R1330 G20 J8
K5 AMUX_B2 NC 100K G21 VSS_BUCK4 J9
C1359 1 R1308 FOREHEAD_NTC_P 1.8V --->
NC
K8 AMUX_B3
ACC_DET R18 5%
1/32W A19 J10
100PF 10KOHM-1% NC BUTTON1 D21 BUTTON_TO_AP_MENU_KEY_L 3 21
MF
1.8V --->

BUTTONS/DETECT
5% FOREHEAD_NTC_N 29 13 45_PMU_TO_WLAN_CLK32K L8 AMUX_B4 100-300K INT PU 2 01005 B19 J11
6.3V
BUTTON2 D20 BUTTON_TO_AP_HOLD_KEY_L VSS_BUCK5
CERM 2 01005 BASEBAND ---> 29 RADIO_TO_PMU_ADC_PP_LDO5_SIM K9 AMUX_B5 100-300K INT PU
3 8
C19 J12
01005 B20 BUTTON_TO_AP_RINGER_A
2 L9 BUTTON3 3 8 13
P9 VSS_BUCK6 J13
2 AP_TO_PMU_TEST_CLKOUT AMUX_B6 100-300K INT PU
BUTTON4 C20
29 RADIO_TO_PMU_ADC_SMPS4 L10 AMUX_B7 100-300K INT PU NC A10 J14
PCB: MAKE XW1328, XW1329 ACCESSIBLE!
100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU 25 PMU_TO_TP_AMUX_BY L4 AMUX_BY KEEPACT L7 AP_TO_PMU_KEEPACT 3 A11 J15
NO INT PULL
SHDN N10 NC ROOM=PMU B10 K11
J4
17 15 13 3 AP_TO_I2C0_SCL SCL 1
R1387 B11 VSS_BUCK012 K12
CAMERA NTC SM
17 15 3 AP_BI_I2C0_SDA K4 SDA OUT_32K E8 45_PMU_TO_WLAN_CLK32K 13 29 1.00M C10 K13
5%
ROOM=PMU PP1300 PP 1 P2MM-NSM 15 3 45_AP_TO_PMU_AND_BL_DWI_CLK K15
J16
DWI_CK
100-300K INT PD GPIO1 F17 CHG_TO_PMU_INT_L 14
ROOM=PMU 1/32W
MF C11 K14
PP1301 PP 1 P2MM-NSM 15 3 45_AP_TO_PMU_AND_BL_DWI_DO DWI_DI R1312

AP<->PMU
1 NO_XNET_CONNECTION=TRUE ROOM=PMU
100-300K INT PD GPIO2 F16 BB_TO_PMU_HOST_WAKE_L 29
2 01005 H1 VSS K17
NO_XNET_CONNECTION=TRUE
ROOM=PMU_ SM K16 DWI_DO 1.00K2
ROOM=PMU_ NC GPIO3 E15 PMU_TO_BB_RST_R_L 1 PMU_TO_BB_RST_L 29 H2 VSS_BUCK23 L12
F8
C1367 1 R1310 CAM_NTC_P
24 23 20 15 12 11 10 7 6 5 3 2
27 26 25
PP1V8 PMU_TO_AP_PRE_UVLO_L
3
P3
PRE_UVLO
GPIO4 F15 TRISTAR_TO_AP_INT 3 17 5% L13
100PF 10KOHM-1%
ROOM=PMU 2 AP_TO_PMU_RESET_IN RESET_IN1 G17 STOCKHOLM_TO_PMU_HOST_WAKE
1/32W
G8 L14
5%
6.3V
CAM_NTC_N R1301 1
17 TRISTAR_TO_PMU_HOST_RESET R3
100-300K INT PD
RESET_IN2
GPIO5 29 MF
01005
VSSA_BUCK0
CERM 2 01005 NO_XNET_CONNECTION=TRUE
ROOM=PMU
100K P4
100-300K INT PD GPIO6 E17 PMU_TO_OSCAR_RESET_CLK32K_L 22 G6 VSSA_BUCK1 M1
01005 5% 3 AP_TO_PMU_SOCHOT1_L RESET_IN3
XW1304

GPIO
2 1 2 SHORT-10L-0.1MM-SM 1/32W 100-300K INT PU TO LDO12 GPIO7 E16 WLAN_TO_PMU_HOST_WAKE 29 H7 VSSA_BUCK2 N14
MF 25 17 15 4 2 RESET_1V8_L R4 RESET*
NO_XNET_CONNECTION=TRUE 01005 2 NO INT PULL GPIO8 E14 CODEC_TO_PMU_MIKEY_INT_L 10 J7 VSSA_BUCK3 P1
ROOM=PMU 3 PMU_TO_AP_IRQ_L P2 IRQ*
XW1309 1 2 SHORT-10L-0.1MM-SM GPIO9 H16 PMU_TO_BT_REG_ON H15 VSSA_BUCK4 P11
B B
NO INT PULL 29
100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU 20 PMU_TO_PHOTON_ALIVE N1 SYS_ALIVE
NO_XNET_CONNECTION=TRUE
ROOM=PMU GPIO10 G16 BT_TO_PMU_HOST_WAKE 29 G15 VSSA_BUCK5 P13
XW1306 1 2 SHORT-10L-0.1MM-SM
FOREHEAD_TO_PMU_NTC L15 F14 PMU_TO_WLAN_REG_ON P8 P15
TDEV1 GPIO11 29 VSSA_BUCK6

NTC
NO_XNET_CONNECTION=TRUE
ROOM=PMU CAM_TO_PMU_NTC R17 TDEV2 GPIO12 F13 AP_TO_I2C0_SCL P16
XW1311 1 2 SHORT-10L-0.1MM-SM 3 13 15 17

PA_TO_PMU_NTC P17 TDEV3 GPIO13 E13 OSCAR_TO_PMU_HOST_WAKE 7 22 K20 R1


NO_XNET_CONNECTION=TRUE
ROOM=PMU VSS_SW_CHG
XW1308 1 2 SHORT-10L-0.1MM-SM SOC_TO_PMU_NTC R19 TDEV4 GPIO14 E12 K21 R2
NC
45_PMU_TCAL P18 TCAL GPIO15 E11 PMU_TO_BB_VBUS_DET 29 R16
NO_XNET_CONNECTION=TRUE
ROOM=PMU
XW1333 1 2 SHORT-10L-0.1MM-SM
R1309
1 NC
P19 TBAT GPIO16 F12
NC
A20 R20
RADIO PA NTC C1365 1
GPIO17 E10 WLAN_TO_PMU_PCIE_WAKE_L 29 A21 R21
NO_XNET_CONNECTION=TRUE
ROOM=PMU 100PF 3.92K
NO_XNET_CONNECTION=TRUE
XW1314 1 2 SHORT-10L-0.1MM-SM 5% 0.1% GPIO18 E9 PMU_TO_ACC_SW_ON 17 B21
1 6.3V 1/20W
NO_XNET_CONNECTION=TRUE
ROOM=PMU_ NO_XNET_CONNECTION=TRUE
ROOM=PMU CERM 2 MF GPIO19 F11 G7 VSS
ROOM=PMU_ XW1315 1 2 SHORT-10L-0.1MM-SM 01005 2 0201 NC
F9 G10
C1322 1 R1390 PA_NTC_P
PLACE THESE XWS AT PMU
ROOM=PMU ROOM=PMU GPIO20
F10
NC
G11
100PF 10KOHM-1% PA_NTC_N GPIO21 NC
5% G12
6.3V 2 01005
CERM
01005
2

ADI OTP:
100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU
SEE RADAR 14032884
H7P NTC
NO_XNET_CONNECTION=TRUE
NO_XNET_CONNECTION=TRUE
1
ROOM=PMU_
ROOM=PMU_
C1368 1 R1357 SOC_NTC_P
100PF 10KOHM-1% SOC_NTC_N
5%
6.3V
CERM 2 01005

A 01005 2
SYNC_MASTER=N56_MLB SYNC_DATE=08/29/2013 A
PAGE TITLE

100PF IS NEEDED FOR SAMPLING CAP IN ADC IN PMU POWER:ADI(2/2)


DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
13 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 13 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

TIGRIS CHARGER & VIBE DRIVER


D D
PP_VCC_MAIN 10 12 15 16 17 23 26 31 39 48
51 52

CHARGER CAPS ROOM=CHARGER


CHARGER_LDO 26
1 C1450 1 C1451 1 C1411 1
ROOM=CHARGER 1
C1415 C1417 1 C1418
ROOM=CHARGER ROOM=CHARGER
220PF 100PF 10UF 2.2UF 10UF 2.2UF
1 C1403 1 C1410 10% 5%
16V 20% 20% 20% 20%
100PF 2.2UF 10V
2 X7R-CERM 2 NP0-C0G 2 6.3V 6.3V
2 X5R 2 6.3V
CERM-X5R
6.3V
2 X5R
5% 01005 CERM-X5R 0402-9 0201-1
16V 20% 01005 0402-9 0201-1
2 NP0-C0G 6.3V
2 X5R ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER
01005 ROOM=CHARGER
0201-1

A2
B2
D2
C2

A2
A3
B1
B2
B3
CHARGER DESENSE CAPS

VDD_MAIN
VDD_MAIN
VDD_MAIN
VDD_MAIN
PLACE BY L1401
PMID_CAP S
26
NOSTUFF Q1403
CSD68815W15
1 C1407 1 C1409 1 C1453 1 C1452 A1 BGA
4.2UF 4.2UF 100PF 100PF ROOM=CHARGER G
10%
16V
10%
16V
5%
25V
2 NP0-C0G
5%
25V
2 NP0-C0G
F5 PMID U1401 LDO G4 C1402 NOSTUFF
2 X5R-CERM 2 X5R-CERM 0.033UF ROOM=CHARGER
01005 01005 SN2400B0YFF
0402-1
ROOM=CHARGER
0402-1
ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER
A5 VBUS WCSP BOOT G5 26 CHG_BOOT 1 2 10% R1401
1
D
B5 VBUS
16V X5R 100K
L1401

C1
C2
C3
26 25 18 17 12 PP5V0_USB D5 BUCK_SW A4 402 5%
1/32W
ROOM=CHARGER
NOSTUFF VBUS
BUCK_SW B4 1 2 MF
26 12 5 3 PP1V8_ALWAYS
1 C1408 C1470 C1471 C5 VBUS
BUCK_SW D4
26 CHG_LX 2 01005
4.2UF 100PF 100PF E5 VBUS
PIFE25201T-SM

ROOM=CHARGER
10%
16V
5%
25V
5%
25V BUCK_SW C4 1.0UH-20%-3.2A-0.065OHM
2 X5R-CERM NP0-C0G NP0-C0G G3
R1403 1
1 C1440 0402-1 01005 01005 21 16 14 3 AP_BI_I2C1_SDA
E4
SDA
BAT A1
ROOM=CHARGER

100K 220PF
ROOM=CHARGER ROOM=CHARGER ROOM=CHARGER 21 16 14 3 AP_TO_I2C1_SCL SCL B1
5%
1/32W 10%
10V
XW1401 SM E3
BAT
D1
PP_BATT_VCC 14 16 25 26 40 45 46
MF 2 X7R-CERM 29 26 17 15 13 12 10 4 3 PP1V8_SDRAM 1 2 SYS_ALIVE_TIGRIS SYS_ALIVE BAT
C 01005 2 01005
ROOM=CHARGER
ROOM=CHARGER
17 TRISTAR_TO_PMU_OVP_SW_EN_L F4 VBUS_OVP_OFF
BAT C1
1
ROOM=CHARGER
C1412 1
ROOM=CHARGER
C1416 1 C1480 C
BAT_SNS E1 CHARGER_VBATT_SNS 100PF
13 CHG_TO_PMU_INT_L G2 INT
12 25
2.2UF 2.2UF 5%
16V
20% 20%
F1 ACT_DIODE E2 CHG_ACT_DIO 2 6.3V
X5R 2 6.3V
X5R
2 NP0-C0G
01005
26 PP_TIGRIS_VBUS_DET VBUS_DET 0201-1 0201-1 ROOM=CHARGER
F3 TEST HDQ_HOST G1 AP_TO_TIGRIS_SWI 3 DESENSE CAP

PGND
PGND
PGND
PGND
HDQ_GAUGE F2 BATTERY_SWI 25 PCB: PLACE CLOSE BY TIGRIS

R1454

A3
B3
D3
C3
USB_VBUS_DETECT
68.1K2
1
2

1%
1/32W
MF
01005

PP_BATT_VCC 14 16 25 26 40 45 46

B 1 C1433 B

C2
ROOM=VIBE_DRIVER
10UF
20%
6.3V
2 CERM-X5R

VDD
0402-9
ROOM=VIBE_DRIVER
U1400
DRV2604YZF
21 16 14 3 AP_BI_I2C1_SDA B2 SDA BGA OUT+ A3 VIBE_DRIVE_P 18 26

21 16 14 3 AP_TO_I2C1_SCL C1 SCL OUT- C3 VIBE_DRIVE_N 18 26

3 AP_TO_VIBE_EN A1 EN VREG A2 VIBE_C_VREG


B1
3 AP_TO_VIBE_TRIG IN/TRIG 1
ROOM=VIBE_DRIVER
C1401 1 C1405 1 C1406
2.2UF 100PF 100PF
GND

20% 5% 5%
16V
NOSTUFF 6.3V
2 X5R
16V
2 NP0-C0G
2 NP0-C0G 01005
0201-1 01005
1
R1411 R1412
1
B3

ROOM=VIBE_DRIVER
ROOM=VIBE_DRIVER
100K 100K
5% 5%
1/32W 1/32W
MF MF
2 01005 2 01005
ROOM=VIBE_DRIVER ROOM=VIBE_DRIVER

A A
PAGE TITLE

POWER:TIGRISR,VIBE DRIVER
DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
14 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 14 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

CHESTNUT, BACKLIGHT DRIVER, MESA BOOST

D500 DISPLAY PMU (TI CHESTNUT, 338S1149)


D D

39 31 26 23 17 16 15 14 12 10 PP_VCC_MAIN
52 51 48

1 C1547 1
10UF
20%
L1519 6.3V
CERM-X5R 2
U1501
26 PP_CHESTNUT_CP
1.5UH-20%-1.8A-0.118OHM 0402-9
LQE2MRT1R5MG0-SM ROOM=CHESTNUT TPS65730A0PYFF
BGA CF1 C4
1 C1554
ROOM=CHESTNUT 10UF
D1 VIN ROOM=CHESTNUT CF2 E4 20%
10V
2 2 X5R-CERM
26 PP_CHESTNUT_LXP B2 SW 26 PP_CHESTNUT_CN 0402-8
ROOM=CHESTNUT
A2 SYNC LCMBST B3
NO INT PULL 26 PP6V0_LCM_BOOST
D3 SCL CPUMP B4
17 15 13 3 AP_TO_I2C0_SCL
D2 SDA 1 C1502
1 C1529
17 15 13 3 AP_BI_I2C0_SDA VNEG E3 10UF
PN5V7_SAGE_AVDDN 20 24 26
10UF 20%
10V
C3 LCM_EN 20%
20 13 LCM_TO_CHESTNUT_PWR_EN VNEG(SUB) E2 10V
2 X5R-CERM
2 X5R-CERM
0402-8
RESET_1V8_L
200K INT PD
C2 RESET* HVLDO1 A4 PP5V7_SAGE_AVDDH
1 C1504 0402-8 ROOM=CHESTNUT
25 17 13 4 2
NO INT PULL
24 26
10UF ROOM=CHESTNUT
20%
CHESTNUT_TO_PMU_ADCIN7 E1 ADCMUX HVLDO2 A3 PP5V7_LCM_AVDDH 20 10V
2 X5R-CERM

B1 PGND1
D4 PGND2
13 26

C1 AGND
0402-8
HVLDO3 A1 PP5V1_GRAPE_VDDH 24 26
ROOM=CHESTNUT

1 C1541 1 C1569 1 C1577


1UF 10UF 10UF
20% 20% 20%

C 2 6.3V
X5R
0201
ROOM=CHESTNUT
10V
2 X5R-CERM
0402-8
ROOM=CHESTNUT
10V
2 X5R-CERM
0402-8
ROOM=CHESTNUT
C

D500 BACKLIGHT DRIVER

L1503
MESA BOOST A0
15UH-20%-0.72A-0.9OHM
1 2
PITA32251T-SM NOTE: D1501 IS 30V DIODE FOR N61 AND 20V FOR N56.
ROOM=BACKLIGHT ROOM=BACKLIGHT
D1501
NSR0530P2T5G
B 26 PP_WLED_LX A K 1 C1505
2.2UF
1 C1530
2.2UF
1 C1531
2.2UF
APN: 353S3978 B
SOD-923-1 20% 20% 20%
39 31 26 23 17 16 15 14 12 10 PP_VCC_MAIN 25V 25V 25V
52 51 48 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM ROOM=MESA
0402-1 0402-1 0402-1
C1552 1 1 C1597 ROOM=BACKLIGHT ROOM=BACKLIGHT ROOM=BACKLIGHT
ROOM=MESA U1503
10UF
20%
10UF
20% L1500 LM3638
6.3V 6.3V ROOM=BACKLIGHT 1.0UH-20%-0.4A-0.53OHM BGA
CERM-X5R 2 2 CERM-X5R PP_LCM_BL_ANODE 20 26
0402-9
ROOM=BACKLIGHT
0402-9
ROOM=BACKLIGHT
U1502 ROOM=BACKLIGHT
52
17 16 15 14 12 10
51 48 39 31 26 23
PP_VCC_MAIN 1 2 26 PP18V0_MESA_SW B1 SW
LM3534TMX-A1 0403
A3 SW BGA OVP D1
1 C1513 C1508 1 A2 VIN VOUT C3 PP16V5_MESA 21 25 26
100PF
C3 IN 5% 10UF ROOM=MESA
ILED1 D3
PP_LCM_BL_CAT1
20 26
25V
2 NP0-C0G 20%
6.3V
29 26 17 12 PP3V0_TRISTAR B2 EN_M 1 C1503 1 C1500
A1 CERM-X5R 2 A3 EN_S 100PF 2.2UF
ILED2 D2
AP_BI_I2C0_SDA PP_LCM_BL_CAT2 01005 25 21 MESA_TO_BOOST_EN
17 15 13 3 SDA 20 26
0402-9 5% 20%
A2 VOLTAGE=17.0V 25V 25V
AP_TO_I2C0_SCL SCL ROOM=MESA C2 LDOIN 2 NP0-C0G
17 15 13 3
SCK B2 45_AP_TO_PMU_AND_BL_DWI_CLK PMID C1 26 P17V0_MOJAVE_LDOIN 2 X5R

A1 PGND

B3 AGND
3 13 01005 0402-3
24 23 20 13 12 11 10 7 6 5 3 2 PP1V8 C1 VIO_SPI SDI C2 45_AP_TO_PMU_AND_BL_DWI_DO 3 13
ROOM=MESA
27 26 25
PP1V8_SDRAM B1 HWEN
1 C1501
29 26 17 14 13 12 10 4 3
2.2UF
20%
GND 25V
2 X5R
0402-3
B3

ROOM=MESA

A SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 A
PAGE TITLE

DISPLAY:CHESTNUT,BACKLIGHT DRIVER
DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
15 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 15 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

SPEAKER AMP, LED DRIVER


SPEAKER AMP D
D I2C ADDRESS: 1000000X
PP1V8_VA_L19_L67 10 12 26 TBD: PROTO_MLB2 WILL NOSTUFF THIS, BUT RESERVE FOOTPRINT SPACE IN CASE
ROOM=SPKR_AMP ROOM=SPKR_AMP SPKAMP LOCATION RIGHT NEXT TO DOCKFLEX,EXPLORE NEED
1 C1635 1 C1637 1 C1609 1 C1630
10UF 2.2UF 0.1UF 2.2UF
20% 20% 20% 20% NOSTUFF
6.3V 6.3V
2 CERM-X5R 2 X5R 6.3V
2 X5R-CERM
6.3V
2 X5R FL1606 ROOM=SPKR_AMP
0402-9
ROOM=SPKR_AMP
0201-1
ROOM=SPKR_AMP
01005 0201-1 120OHM-25%-1.8A-0.06DCR XW1610
SHORT-10L-0.1MM-SM
1 ROOM=SPKR_AMP
2 1 2
PCB: PLACE C1635, C1637 AT VP INPUT 0402 FERRITE_GND1
26 PP_L19_VBOOST
1 C1603 1 C1648 1 C1642 FL1609 ROOM=SPKR_AMP
46 45 40 26 25 14 PP_BATT_VCC 1 C1695 10UF 22UF 0.1UF V= VA PIN
120OHM-25%-1.8A-0.06DCR XW1611
20% 20% 10% C= 2.2UF MIN
10UF 2 10V 2 10V 2 16V ROOM=SPKR_AMP SHORT-10L-0.1MM-SM

A1
B1

F5
C1
D1

A4
A5
20% X5R-CERM X5R-CERM X5R-CERM ROOM=SPKR_AMP 1 2 1 2
6.3V
2 CERM-X5R
0402-8 0603-1 0201 V = 1.0V C= 1UF MIN
ROOM=SPKR_AMP ROOM=SPKR_AMP ROOM=SPKR_AMP 0402 FERRITE_GND2
0402-9 VA
VBST VP NOSTUFF
ROOM=SPKR_AMP 1 C1629 1 C1640
2.2UF 4.7UF
L1604 U1601 20% 20%
1.2UH-2.88A-0.082OHM 6.3V
2 X5R 6.3V
2 X5R-CERM1
CS35L19B-XWZR-C0 0201-1 402
1 2 26 PP_SPKAMP_SW A2 WLCSP FILT+
26 F2 PP_SPKAMP_FILT ROOM=SPKR_AMP
ROOM=SPKR_AMP
PIFE25201T-SM B2 SW VER1 LDO_FILT C5 PP_SPKAMP_LDO_FILT R16042 SPEAKER_TO_SPKAMP_VSENSE_N
C1632 1 ROOM=SPKR_AMP
26 1
0.00 01005
18

10UF 21 14 3 AP_BI_I2C1_SDA D5
SDA NOSTUFF NOSTUFF
20% VSENSE- E3 SPKAMP_VSENSE_N
6.3V
CERM-X5R 2 AP_TO_I2C1_SCL D6 SCL
VSENSE+ E2 SPKAMP_VSENSE_P
1 C1604 1 C1606
0402-9 21 14 3
220PF 220PF
ROOM=SPKR_AMP 10% 10%
3 SPKAMP_TO_AP_INT_L A7 INT* ISENSE- F1 SPKAMP_ISENSE_N 2 10V 2 10V
X7R-CERM X7R-CERM
NO INT PULLS
ISENSE+ E1 SPKAMP_ISENSE_P 01005 01005

C 3 AP_TO_SPKAMP_RESET_L A6 RESET*
NO INT PULLS
OUT+ D2 SPKAMP_TO_SPEAKER_OUT_P
ROOM=SPKR_AMP
R1601 NO_XNET_CONNECTION=TRUE ROOM=SPKR_AMP
C
R1629
1 3 AP_TO_SPKAMP_BEE_GEES D7 ALIVE 1/32W
1 2MF R16052
NO INT PULLS OUT- C2 1 SPEAKER_TO_SPKAMP_VSENSE_P 18
100K C7 ADO 39.2 1% 01005 NOSTUFF 0.00 01005
5%
1/32W 1M INT PD IREF+ B7 SPKAMP_IREF
1 C1601NO_XNET_CONNECTION=TRUE 1 C1605
MF (LEFT CONFIG) 0.1UF
45_AP_TO_SPKAMP_I2S2_MCLK E7 MCLK 220PF
2 01005 3 20% ROOM=SPKR_AMP 10%
ROOM=CHARGER
E6 SCLK
1M INT PD 1
R1635 6.3V
2 X5R-CERM R1602 NO_XNET_CONNECTION=TRUE
10V
2 X7R-CERM
10 3 45_AP_TO_CODEC_XSP_I2S2_BCLK 44.2K 010051/32W
1 2MF 01005

AP_TO_CODEC_XSP_I2S2_LRCLK
1M INT PD
F6 LRCK/FSYNC
1%
1/32W
39.2 1% 01005 R1603
10 3
MF CKPLUS_WAIVE=MISS_N_DIFFPAIR 0.1002
1M INT PD
01005
2 ROOM=SPKR_AMP
1 SPKAMP_TO_SPEAKER_OUT_CONN_P 18
10 3 AP_TO_CODEC_XSP_I2S2_DOUT F7 SDIN
1%
1M INT PD 1/4W ~700MA RMS @ 2.4W INTO 8OHM
10 3 CODEC_TO_AP_XSP_I2S2_DIN E5 SDOUT MF
0402
1M INT PD
GNDP GNDA SPKAMP_TO_SPEAKER_OUT_CONN_N 18

C1600 C1602

A3
B3
B4

B5
B6
C3
C4
D3
D4

C6
E4
F3
F4
1 1
C1660 1 C1663 1 1000PF 1000PF
1000PF 1000PF 10%
10V 2
10%
10%
10V
10%
10V X5R 2 10V
X5R
X5R 2 X5R 2 01005 01005
01005 01005 ROOM=SPKR_AMP ROOM=SPKR_AMP
ROOM=SPKR_AMP ROOM=SPKR_AMP

B
STROBE DRIVER B
TI: APN 353S3899

ROOM=STROBE

48 39 31 26 23 17 15 14 12 10 PP_VCC_MAIN U1602 26 PP_LED_BOOST_OUT


52 51
LM3564A1TMX 1 C1694 1 C1696
C1686 1 C1687 1 WLCSP
10UF 10UF
10UF
20%
10UF
20%
L1605 D1 IN A3 20% 20%
6.3V
6.3V 6.3V 1UH-3.0A-0.059OHM B3
6.3V
2 CERM-X5R 2 CERM-X5R
CERM-X5R 2 CERM-X5R 2 OUT 0402-9 0402-9
0402-9 0402-9 1 2 26 PP_LED_DRV_LX A2 C3 ROOM=STROBE
ROOM=STROBE ROOM=STROBE ROOM=STROBE
PIFA20161B B2 SW
ROOM=STROBE
A4
7 AP_TO_LEDDRV_EN D3 ENABLE LED1 B4 PP_STRB_DRIVER_TO_LED_COOL 8 26
INT 200K PD AGND
23 RCAM_TO_LEDDRV_STROBE_EN E3 STROBE
INT 200K PD AGND
NOTE: TORCH N/C C2 TORCH C4 PP_STRB_DRIVER_TO_LED_WARM
NC INT 200K PD AGND
8 26
E4 LED2 D4
29 BB_TO_LEDDRV_GSM_BLANK
E2
TX
INT 200K PD AGND
C1608 1 C1673 1
23 7 AP_BI_RCAM_I2C_SDA SDA 100PF 100PF
5%
23 7 AP_TO_RCAM_I2C_SCL
D2 SCL TEMP E1 16V 5%
NP0-C0G 2 16V
GND AGND 01005 NP0-C0G 2
01005
ROOM=STROBE ROOM=STROBE
A1
B1

C1

A RCAM_TO_STROBE_NTC 8
SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 A
PAGE TITLE

AUDIO:SPKR AMP,STROBE
DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
16 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 16 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

TRISTAR2
D D

PP_VCC_MAIN 10 12 14 15 16 23 26 31 39 48
51 52

P2MM-NSM

A1
12C ADDRESS: 0011010X PP1705 SM PP
VCC
U1703
LM34904
29 26 15 12 PP3V0_TRISTAR USMD
13 PMU_TO_ACC_SW_ON B2 ENABLE ACC_PWR A2 PP3V3_ACC 12 17 26
PP1V8_SDRAM
1 C1700 1 C1754 29 26 15 14 13 12 10 4 3

1.0UF 0.1UF 1 C1739 C2 ACC_DET* POK* C1

C
20%
6.3V
2 X5R
20%
4V
2 X5R 0.01UF
10%
GND
C

B1
0201-1 01005 2 6.3V
ROOM=TRISTAR ROOM=TRISTAR X5R
01005 PP3V3_ACC 12 17 26
ROOM=TRISTAR
ACC_PWR

VDD_1V8 F3

VDD_3V0 F4

ACC_PWR D5
ROOM=TRISTAR

U1700
CBTL1610A2UK
C3 WLCSP
9 90_CODEC_BI_TRISTAR_MIKEYBUS_P DIG_DP P_IN F6 PP_TRISTAR_PIN 17 26
C4
9 90_CODEC_BI_TRISTAR_MIKEYBUS_N DIG_DN ACC1 C5 PP_E75_TO_TRISTAR_ACC1 18 26 1 C1704 PIN FOR HANDSHAKE

A1 ACC2 E5 PP_E75_TO_TRISTAR_ACC2 18 26 1.0UF


29 90_TRISTAR_BI_BB_USB_P USB1_DP 20%
B1 6.3V
BB DEBUG USB 29 90_TRISTAR_BI_BB_USB_N USB1_DN DP1 A2 90_TRISTAR_BI_E75_PAIR1_CONN_P 18 25
2 X5R
0201-1
C2 DN1 B2 90_TRISTAR_BI_E75_PAIR1_CONN_N 18 25 ROOM=TRISTAR
BRICK_ID 13 TRISTAR_TO_PMU_USB_BRICKID BRICK_ID
A3 DP2 A4 90_TRISTAR_BI_E75_PAIR2_CONN_P 18 25
2 90_AP_BI_TRISTAR_USB0_P USB0_DP
SOC USB B3 DN2 B4 90_TRISTAR_BI_E75_PAIR2_CONN_N 18 25 ROOM=TRISTAR
2 90_AP_BI_TRISTAR_USB0_N USB0_DN
SMPP1722
E2 CON_DET_L E3 E75_TO_TRISTAR_CON_DETECT 18 PP P2MM-NSM
3 AP_TO_TRISTAR_ACC_UART6_TXD UART0_TX
ACCESSORY UART E1
3 TRISTAR_TO_AP_ACC_UART6_RXD UART0_RX POW_GATE_EN* D6 TRISTAR_TO_PMU_OVP_SW_EN_L 14

3 AP_TO_TRISTAR_DEBUG_UART0_TXD F2 UART1_TX SWITCH_EN E4 RESET_1V8_L 2 4 13 15 25


DEBUG UART F1
3 TRISTAR_TO_AP_DEBUG_UART0_RXD UART1_RX HOST_RESET B6 TRISTAR_TO_PMU_HOST_RESET 13
HOST_RESET
RX IS WRT SOC (BB TX) --> BB_TO_AP_UART2_RXD D2 UART2_TX SDA D3 AP_BI_I2C0_SDA 3 13 ACTIVE HIGH
B TX IS WRT SOC (BB RX) <--
29 3

29 3 AP_TO_BB_UART2_TXD D1 UART2_RX SCL D4


C6
AP_TO_I2C0_SCL 3 13
15

15
AMBER HAS 100K-300K INT PD
B
A5 INT TRISTAR_TO_AP_INT 3 13
2 TRISTAR_TO_AP_JTAG_SWCLK JTAG_CLK
BYPASS E6 TRISTAR_BYPASS
TRISTAR_BI_AP_JTAG_SWDIO B5
2 JTAG_DIO
1 C1738

DVSS
DVSS
DVSS
1.0UF
20%
6.3V
2 X5R

F5
C1
A6
0201-1
ROOM=TRISTAR

PP_TRISTAR_PIN 17 26

2
R1710 S
1
10K 2 REVERSE_GATE 0402
1 CSD68822F4
5% G
1/32W
MF
Q1701
01005

3
PP5V0_USB 12 14 18 25 26

A SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 A
PAGE TITLE

IO:TRISTAR2
DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
17 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 17 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

DOCKFLEX B2B (USB VBUS, SPEAKER,ANTENNA LAT SW CTRL,


MIC1 (PRIMARY MIC), ACC DET/ID/PWR, E75 DIFFPAIRS) MLB: 516S1281 (RCPT)

ROOM=DOCK_B2B J1817
FL1881 24-5859-036-201-829
120-OHM-210MA FL1819 F-ST-SM
120-OHM-210MA 41
LOWERMIC1_TO_CODEC_N 2 1 LOWERMIC1_TO_CODEC_N_CONN 2 1
9 18
26 14 VIBE_DRIVE_P VIBE_DRIVE_P_CONN 18
17 14 12 PP5V0_USB
37 38
01005 26 25 18
ROOM=DOCK_B2B 1 C1889 01005
ROOM=DOCK_B2B 1 C1875
5%
56PF ACCESSORY: 100PF
5% 18 16 SPKAMP_TO_SPEAKER_OUT_CONN_P 1 2 SPKAMP_TO_SPEAKER_OUT_CONN_N 16 18

D
16V
2 NP0-C0G
01005
VIBE
DRIVE
2
16V
NP0-C0G
01005
USB
1 C1834
220PF
1 C1833
56PF
1 C1812
100PF
1 C1817
0.1UF
18
SPEAKER_TO_SPKAMP_VSENSE_P_CONN 3 4 SPEAKER_TO_SPKAMP_VSENSE_N_CONN 18 D
FL1882 ROOM=DOCK_B2B ROOM=DOCK_B2B 10%
25V
5%
25V
5%
25V
10%
25V
18 VIBE_DRIVE_N_CONN 5 6 VIBE_DRIVE_P_CONN 18

LOWER MIC1 120-OHM-210MA FL1820 VBUS 2 X7R-CERM


0201
2 NP0-C0G-CERM 2 NP0-C0G
01005 01005
2 X5R
0201
18 AP_TO_HEADSET_HS4_CTRL_CONN 7 8 CODEC_TO_HPHONE_L_CONN 18
LOWERMIC1_TO_CODEC_P 2 1 LOWERMIC1_TO_CODEC_P_CONN 120-OHM-210MA ROOM=DOCK_B2B ROOM=DOCK_B2B 18 AP_TO_HEADSET_HS3_CTRL_CONN 9 10
(PRIMARY 9
01005
18
2 1
ROOM=DOCK_B2B ROOM=DOCK_B2B
HPHONE_TO_CODEC_DET_CONN 11 12 CODEC_TO_HPHONE_R_CONN 18
VIBE_DRIVE_N VIBE_DRIVE_N_CONN 18
VOICE MIC) ROOM=DOCK_B2B 1 C1890 26 14 18
CODEC_TO_HPHONE_HS4_REF_CONN 13 14 CODEC_TO_HPHONE_HS3_REF_CONN
5%
56PF 01005
ROOM=DOCK_B2B C1876 18

18 CODEC_TO_HPHONE_HS4_CONN 15 16 CODEC_TO_HPHONE_HS3_CONN
18

16V 100PF 18
2 NP0-C0G 5% 18 LOWERMIC1_TO_CODEC_N_CONN 17 18 LOWERMIC1_TO_CODEC_P_CONN 18
01005 16V
FL1855 ROOM=DOCK_B2B
NP0-C0G
01005 10 MIC1_BIASFILT_RET 19 20 PP_E75_TO_TRISTAR_ACC1_CONN 18 25 26
120-OHM-210MA ROOM=DOCK_B2B 26 18 PP_CODEC_TO_MIC1_BIAS_CONN 21 22
26 10 PP_CODEC_TO_MIC1_BIAS 2 1 PP_CODEC_TO_MIC1_BIAS_CONN 18 26 18 BB_GPIO3_CONN 23 24 90_TRISTAR_BI_E75_PAIR1_CONN_P 17 25
01005
ROOM=DOCK_B2B 1 C1855 FL1895 18 BB_GPIO2_CONN
25 26 90_TRISTAR_BI_E75_PAIR1_CONN_N 17 25

56PF 120-OHM-210MA 26 18 PP_BB_VDD_2V7_CONN 27 28


5%
16V SPEAKER_TO_SPKAMP_VSENSE_P 2 1 SPEAKER_TO_SPKAMP_VSENSE_P_CONN 18 BB_GPIO4_CONN 29 30 90_TRISTAR_BI_E75_PAIR2_CONN_N 17 25
2 NP0-C0G 16 18
01005 25 18 E75_TO_TRISTAR_CON_DETECT_CONN 31 32 90_TRISTAR_BI_E75_PAIR2_CONN_P
ROOM=DOCK_B2B
01005
ROOM=DOCK_B2B 1 C1849 18 BB_GPIO0_CONN
33 34 PP_E75_TO_TRISTAR_ACC2_CONN
17 25

56PF 18 25 26
5%
R1801 16V
2 NP0-C0G
35 36

1
3.3K 2 01005
9 HPHONE_TO_CODEC_DET HPHONE_TO_CODEC_DET_CONN 18
5% MF 1/32W ROOM=DOCK_B2B
01005 PP5V0_USB 39 40 PP5V0_USB
ROOM=DOCK_B2B 1 C1816 FL1866 26 25 18 17 14 12
42
12 14 17 18 25 26

56PF 120-OHM-210MA
5%
16V
2 NP0-C0G 16
SPEAKER_TO_SPKAMP_VSENSE_N 2 1 SPEAKER_TO_SPKAMP_VSENSE_N_CONN 18
01005
ROOM=DOCK_B2B SPEAKER:
01005
ROOM=DOCK_B2B 1 C1850
FL1805 LEADS, 5%
56PF
600-OHM-25%-0.28A-0.75OHM 16V
2 NP0-C0G
9 CODEC_TO_HPHONE_HS3 1 2 CODEC_TO_HPHONE_HS3_CONN 18
VSENSE 01005
ROOM=DOCK_B2B

C 0201
ROOM=DOCK_B2B 1 DZ1803
6.8V-100PF
FL1880
120-OHM-210MA C
01005 18 16 SPKAMP_TO_SPEAKER_OUT_CONN_P
29 PP_BB_VDD_2V7 2 1 PP_BB_VDD_2V7_CONN 18 26
2 ROOM=DOCK_B2B
NO_XNET_CONNECTION=TRUE
1 C1899 1 DZ1814 01005
ROOM=DOCK_B2B C1886
100PF 12V-33PF
FL1804 5% 01005-1 100PF
HEADPHONE 600-OHM-25%-0.28A-0.75OHM 2
16V
NP0-C0G NO_XNET_CONNECTION=TRUE
2 ROOM=DOCK_B2B
5%
16V
01005 NP0-C0G
1 2 ROOM=DOCK_B2B
01005
9 CODEC_TO_HPHONE_HS4 CODEC_TO_HPHONE_HS4_CONN 18 ROOM=BUTTON
0201
ROOM=DOCK_B2B
1 DZ1804 SPKAMP_TO_SPEAKER_OUT_CONN_N FL1879
6.8V-100PF
01005
18 16
120-OHM-210MA
2 ROOM=DOCK_B2B 1 C1802 1 DZ1813 2 1
NO_XNET_CONNECTION=TRUE
100PF 12V-33PF 29 BB_GPIO0 BB_GPIO0_CONN 18
FL1807 5%
16V 01005-1 01005
600-OHM-25%-0.28A-0.75OHM 2 NP0-C0G
01005
2 NO_XNET_CONNECTION=TRUE
ROOM=DOCK_B2B 1 C1885
CODEC_TO_HPHONE_HS4_REF 1 2 CODEC_TO_HPHONE_HS4_REF_CONN
ROOM=DOCK_B2B 56PF
9 18 ROOM=DOCK_B2B 5%
16V
2 NP0-C0G
0201
ROOM=DOCK_B2B 1 DZ1809 01005
ROOM=DOCK_B2B
6.8V-100PF
01005
ROOM=DOCK_B2B R1830 FL1875
2 NO_XNET_CONNECTION=TRUE
17 E75_TO_TRISTAR_CON_DETECT 1/32W 2 1 E75_TO_TRISTAR_CON_DETECT_CONN 18 25
120-OHM-210MA
FL1806 5%
MF 1.00K 29 BB_GPIO2 1 2 BB_GPIO2_CONN 18
600-OHM-25%-0.28A-0.75OHM 01005 1 C1870 01005
9 CODEC_TO_HPHONE_HS3_REF 1 2 CODEC_TO_HPHONE_HS3_REF_CONN 18
ROOM=DOCK_B2B
5%
27PF ROOM=DOCK_B2B 1 C1888
0201 16V 56PF
ROOM=DOCK_B2B 1 DZ1807 2 NP0-C0G
01005
ANTENNA 5%
16V
2 NP0-C0G
6.8V-100PF
01005 FL1854 ROOM=DOCK_B2B 01005
2 ROOM=DOCK_B2B
10-OHM-1.1A ROOM=DOCK_B2B
NO_XNET_CONNECTION=TRUE
26 17 PP_E75_TO_TRISTAR_ACC1 1 2 PP_E75_TO_TRISTAR_ACC1_CONN 18 25 26
FL1876
120-OHM-210MA
FL1803 01005
150OHM-25%-200MA-0.7DCR
TRISTAR 01005
ROOM=DOCK_B2B C1871
B 3 AP_TO_HEADSET_HS3_CTRL 1 2 AP_TO_HEADSET_HS3_CTRL_CONN 18
100PF
5%
16V
29 BB_GPIO3 1
01005
ROOM=DOCK_B2B
2

1 C1806
BB_GPIO3_CONN 18
B
ROOM=DOCK_B2B NP0-C0G
1 C1808 01005 56PF
ROOM=DOCK_B2B 5%
100PF 16V
5% FL1853 2 NP0-C0G
10V
2 NP0-C0G 10-OHM-1.1A 01005
ROOM=DOCK_B2B
01005 1 2
PP_E75_TO_TRISTAR_ACC2 PP_E75_TO_TRISTAR_ACC2_CONN
FL1802 01005 ROOM=DOCK_B2B 26 17 18 25 26
FL1877
150OHM-25%-200MA-0.7DCR 01005
ROOM=DOCK_B2B C1872 120-OHM-210MA
3 AP_TO_HEADSET_HS4_CTRL 1 2 AP_TO_HEADSET_HS4_CTRL_CONN 18
100PF
5% 29 BB_GPIO4 1 2 BB_GPIO4_CONN 18
ROOM=DOCK_B2B 16V
1 C1805 NP0-C0G
01005
01005

5%
100PF ROOM=DOCK_B2B
ROOM=DOCK_B2B 1 C1814
10V 56PF
2 NP0-C0G 5%
01005 16V
2 NP0-C0G
ROOM=DOCK_B2B 01005
ROOM=DOCK_B2B

L1801
FERR-33-OHM-0.8A-0.09-OHM
9 CODEC_TO_HPHONE_L 1 2 CODEC_TO_HPHONE_L_CONN 18
0201
ROOM=DOCK_B2B 1 DZ1811
6.8V-100PF
01005
CODEC TO ROOM=DOCK_B2B
2 NO_XNET_CONNECTION=TRUE
HEADPHONE
L1802
FERR-33-OHM-0.8A-0.09-OHM

A CODEC_TO_HPHONE_R 1 2 CODEC_TO_HPHONE_R_CONN 18
9
0201
ROOM=DOCK_B2B 1 DZ1810 SYNC_MASTER=N61_MLB
PAGE TITLE
SYNC_DATE=08/26/2013 A
6.8V-100PF
01005
2 ROOM=DOCK_B2B
NO_XNET_CONNECTION=TRUE
IO:DOCK FLEX CONN
DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
XW1813
SM
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
9 CODEC_MBUS_REF 1 2 PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
ROOM=DOCK_B2B I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
18 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 18 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

COMPASS - AKM COMPASS IN POR LOCATION


D D

COMPASS CSP: 338S1014


C C
26 12 PP3V0_IMU PP1V8_OSCAR 12 19 22 26
NOSTUFF
NOSTUFF ROOM=COMPASS 1 C1901 C1904
C1903 1 C1902 0.1UF 100PF

B1

C4
20% 5%
100PF 2.2UF 4V
2 X5R
16V
NP0-C0G
5% 20%
16V 6.3V VDD VID 01005 01005
NP0-C0G 2 X5R ROOM=COMPASS
01005
ROOM=COMPASS
0201-1 U1901 ROOM=COMPASS

AK8963C
CSP
D1 CAD0 SCL/SK A3 OSCAR_TO_IMU_SPI_SCLK 22
D2 CAD1 SDA/SI A4 OSCAR_TO_IMU_SPI_MOSI 22

C2 TST1 CSB* A2 OSCAR_TO_COMPASS_SPI_CS_L


NC 22

B3 RSV SO B4 IMU_TO_OSCAR_SPI_MISO
NC 22

C3 TRG DRDY A1 COMPASS_TO_OSCAR_INT


NC 22

26 22 19 12
PP1V8_OSCAR D4 RST*
VSS
NOSTUFF NOSTUFF NOSTUFF NOSTUFF
C1905 C1906 C1907

C1
1 1 1
56PF 56PF 56PF
1 C1908
5% 5% 5% 56PF
16V 16V 16V 5%
2 NP0-C0G 2 NP0-C0G 2 NP0-C0G 16V

B 01005
ROOM=COMPASS
01005
ROOM=COMPASS
01005
ROOM=COMPASS
2 NP0-C0G
01005
ROOM=COMPASS
B

A SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 A
PAGE TITLE

SENSORS:COMPASS
DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
19 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 19 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

LCD B2B THIS ONE ON MLB ---> 516S1164

J2019
MIPI Common Mode Chokes
(N56 HAS A 4TH MIPI LANE ON P. 19).
24-5857-030-001-829 L2044
35 F-ST-SM 90-OHM-0.1A-0.7-3GHZ
TAM0605
SYM_VER-1
31 32
90_AP_TO_LCM_MIPI_CLK_P 1 4 90_AP_TO_LCM_MIPI_CLK_CONN_P
Backlight 7 20

D (N56 HAS A 2ND SET OF BL SIGNALS ON P. 19). 26 25 20 PP_LCM_BL_CAT2_CONN 1 2 PP_LCM_BL_ANODE_CONN 20 25 26


2 3
D
3 4 PP_LCM_BL_CAT1_CONN 20 25 26
7 90_AP_TO_LCM_MIPI_CLK_N 90_AP_TO_LCM_MIPI_CLK_CONN_N 20
ROOM=LCM_B2B
90_AP_TO_LCM_MIPI_DATA2_CONN_N 5 6 LCD_TO_AP_PIFA_CONN
FL2024
20

90_AP_TO_LCM_MIPI_DATA2_CONN_P 7 8
20 25
L2043
20
NC 90-OHM-0.1A-0.7-3GHZ
240-OHM-0.2A-0.8-OHM 9 10 PMU_TO_PHOTON_ALIVE_CONN 20
TAM0605
SYM_VER-1

1 2 90_AP_TO_LCM_MIPI_CLK_CONN_N 11 12 LCM_TO_AP_HIFA_BSYNC_CONN 1 4
26 15 PP_LCM_BL_ANODE PP_LCM_BL_ANODE_CONN 20 25 26
20 20
7 90_AP_TO_LCM_MIPI_DATA0_P 90_AP_TO_LCM_MIPI_DATA0_CONN_P 20
0201-2 20 90_AP_TO_LCM_MIPI_CLK_CONN_P 13 14 AP_TO_LCM_RESET_CONN_L 20
ROOM=LCM_B2B 1 C2017 15 16 LCM_TO_CHESTNUT_PWR_EN_CONN 20
100PF 90_AP_TO_LCM_MIPI_DATA1_CONN_N 17 18 AP_TO_I2C2_SCL_CONN 7 90_AP_TO_LCM_MIPI_DATA0_N 2 3 90_AP_TO_LCM_MIPI_DATA0_CONN_N 20
5% 20 20
ROOM=LCM_B2B
25V
2 NP0-C0G 90_AP_TO_LCM_MIPI_DATA1_CONN_P 19 20 AP_BI_I2C2_SDA_CONN
01005
20
21 22 SAGE_TO_TOUCH_VCPL_REF_CONN
20

20
L2042
90-OHM-0.1A-0.7-3GHZ
ROOM=LCM_B2B
90_AP_TO_LCM_MIPI_DATA0_CONN_N 23 24 SAGE_TO_TOUCH_VCPH_REF_CONN TAM0605
20 20 SYM_VER-1

90_AP_TO_LCM_MIPI_DATA0_CONN_P 25 26 PP5V7_LCM_AVDDH_CONN 1 4
20 20 26
7 90_AP_TO_LCM_MIPI_DATA1_P 90_AP_TO_LCM_MIPI_DATA1_CONN_P 20
27 28 PN5V7_LCM_AVDDN_CONN 20 26

26 20 PP1V8_LCM_CONN 29 30 TOUCH_TO_SAGE_VCM_IN_CONN 20
7 90_AP_TO_LCM_MIPI_DATA1_N 2 3 90_AP_TO_LCM_MIPI_DATA1_CONN_N 20
ROOM=LCM_B2B
33 34 L2041
90-OHM-0.1A-0.7-3GHZ
36
TAM0605
FL2025 SYM_VER-1

240-OHM-0.2A-0.8-OHM 7 90_AP_TO_LCM_MIPI_DATA2_P 1 4 90_AP_TO_LCM_MIPI_DATA2_CONN_P 20

26 15 PP_LCM_BL_CAT1 1 2 PP_LCM_BL_CAT1_CONN 20 25 26
0201-2
ROOM=LCM_B2B 1 C2018 7 90_AP_TO_LCM_MIPI_DATA2_N 2 3 90_AP_TO_LCM_MIPI_DATA2_CONN_N 20
100PF ROOM=LCM_B2B
5%
25V
2 NP0-C0G
01005
ROOM=LCM_B2B

C FL2026 Digital Interfaces C


240-OHM-0.2A-0.8-OHM
Sync/Reset/Debug
26 15 PP_LCM_BL_CAT2 1 2 PP_LCM_BL_CAT2_CONN 20 25 26 FL2039 FL2034
0201-2 120-OHM-210MA 120-OHM-210MA
ROOM=LCM_B2B 1 C2019 AP_BI_I2C2_SDA 2 1 AP_BI_I2C2_SDA_CONN LCM_TO_AP_HIFA_BSYNC 2 1 LCM_TO_AP_HIFA_BSYNC_CONN
100PF 11 3 20 24 7 20
5% 01005 01005
25V
2 NP0-C0G ROOM=LCM_B2B 1 C2089 ROOM=LCM_B2B 1 C2001
01005 56PF 56PF
ROOM=LCM_B2B 5% 5%
16V 16V
2 NP0-C0G 2 NP0-C0G
01005 01005
ROOM=LCM_B2B ROOM=LCM_B2B

FL2066
120-OHM-210MA
11 3 AP_TO_I2C2_SCL 2 1 AP_TO_I2C2_SCL_CONN 20
01005
ROOM=LCM_B2B 1 C2090
56PF
5%
16V
2 NP0-C0G
01005
LCM Supplies ROOM=LCM_B2B

FL2035
FL2027 120-OHM-210MA
80-OHM-0.2A-0.4-OHM 15 13 LCM_TO_CHESTNUT_PWR_EN 2 1 LCM_TO_CHESTNUT_PWR_EN_CONN 20

PP1V8 1 2 PP1V8_LCM_CONN 01005


24 23 15 13 12 11 10 7 6 5 3 2
27 26 25
20 26
ROOM=LCM_B2B 1 C2093
0201-2
ROOM=LCM_B2B 1 C2039 1 C2040 56PF Touch
0.1UF 100PF 5%
16V FL2001
10% 5%
16V
2 NP0-C0G 120-OHM-210MA
B 6.3V
2 CERM-X5R
0201
ROOM=LCM_B2B
2 NP0-C0G
01005
ROOM=LCM_B2B
01005
ROOM=LCM_B2B 24 TOUCH_TO_SAGE_VCM_IN 2
01005
1 TOUCH_TO_SAGE_VCM_IN_CONN 20 B
FL2036 C2087 1 C2088 1 ROOM=LCM_B2B 1 C2002
FL2061 120-OHM-210MA 2.2UF 2.2UF 56PF
20% 20% 5%
70-OHM-300MA AP_TO_LCM_RESET_L 2 1 AP_TO_LCM_RESET_CONN_L 6.3V 6.3V 16V
7 20 X5R 2 X5R 2 2 NP0-C0G
PN5V7_SAGE_AVDDN 2 1 PN5V7_LCM_AVDDN_CONN 01005 0201-1 0201-1 01005
26 24 15 20 26
R20521 ROOM=LCM_B2B 1 C2000 ROOM=LCM_B2B ROOM=LCM_B2B ROOM=LCM_B2B
01005-1
ROOM=LCM_B2B 1 C2044 100K 5%
56PF
100PF 1% 16V
5% 1/32W 2 NP0-C0G
2
16V
NP0-C0G
MF
01005 2 01005 R2008
01005 ROOM=LCM_B2B 0.00 1
ROOM=LCM_B2B ROOM=LCM_B2B 24 SAGE_TO_TOUCH_VCPH_REF 2 SAGE_TO_TOUCH_VCPH_REF_CONN 20

ROOM=LCM_B2B 0%
1/32W
FL2037 MF
01005
80-OHM-0.2A-0.4-OHM ROOM=LCM_B2B
26 15 PP5V7_LCM_AVDDH 1 2 PP5V7_LCM_AVDDH_CONN 20 26
0201-2 R2009
C2070 1 C2051 1 C2050 1 C2071 1 1 C2094 0.00 1
2.2UF 2.2UF 2.2UF 2.2UF 100PF FL2050 24 SAGE_TO_TOUCH_VCPL_REF 2 SAGE_TO_TOUCH_VCPL_REF_CONN 20
20%
6.3V
20%
6.3V
20%
6.3V
20%
6.3V
5%
16V 120-OHM-210MA 0%
1/32W
X5R 2 X5R 2 X5R 2 X5R 2 2 NP0-C0G PMU_TO_PHOTON_ALIVE 2 1 PMU_TO_PHOTON_ALIVE_CONN MF
0201-1 0201-1 0201-1 0201-1 01005 13 20 01005
ROOM=LCM_B2B ROOM=LCM_B2B ROOM=LCM_B2B ROOM=LCM_B2B ROOM=LCM_B2B ROOM=LCM_B2B
01005
ROOM=LCM_B2B 1 C2095
56PF
5%
16V
2 NP0-C0G
01005
ROOM=LCM_B2B

A LCD_TO_AP_PIFA_CONN 20 25
SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 A
PAGE TITLE
1 C2058
5%
56PF DISPLAY:FLEX CONN
16V DRAWING NUMBER SIZE
2 NP0-C0G
01005
Apple Inc. 051-9903 D
ROOM=LCM_B2B REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
20 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 20 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

MESA CONNECTOR
MLB: 516S1278

J2118
24-5857-016-201-829
F-ST-SM
21 MESA_TO_BOOST_EN_CONN 21
17 18

D 21 AP_BI_I2C1_SDA_MESA_CONN 1 2 AP_TO_I2C1_SCL_MESA_CONN 21
D
21 BUTTON_TO_AP_MENU_KEY_L_CONN 3 4 PP3V0_MESA_CONN 21 26

21 MESA_TO_AP_INT_CONN 5 6 PP16V5_MESA_CONN 21 26
7 8 PP1V8_MESA_CONN 21 26
9 10 AP_TO_MESA_SPI_CLK_CONN 21
11 12 AP_TO_MESA_SPI_MOSI_CONN 21
13 14 MESA_TO_AP_SPI_MISO_CONN 21
15 16

19 20
22

ROOM=MAMBA_MESA_B2B

R21602
13 3 BUTTON_TO_AP_MENU_KEY_L 1 BUTTON_TO_AP_MENU_KEY_L_CONN 21

C
0.00 01005
ROOM=MAMBA_MESA_B2B
1
01005 FL2132
120-OHM-210MA
C
ROOM=MAMBA_MESA_B2B
NOSTUFF 2 1
1 C2167 0201 3 AP_TO_MESA_SPI_MOSI AP_TO_MESA_SPI_MOSI_CONN 21

27PF 5.5V-6.2PF
5%
16V
2 NP0-C0G
DZ2110
ROOM=MAMBA_MESA_B2B
R21632ROOM=MAMBA_MESA_B2B
2 3 AP_TO_MESA_SPI_CLK 1 AP_TO_MESA_SPI_CLK_CONN
01005 0.00 01005
ROOM=MAMBA_MESA_B2B 21

01005 FL2150
120-OHM-210MA
ROOM=MAMBA_MESA_B2B
MESA_TO_AP_SPI_MISO 2 1 MESA_TO_AP_SPI_MISO_CONN
U2100 MESA 1.8V LDO FL2133 ROOM=MAMBA_MESA_B2B 3 21

LP5907UVX-1.8 RDAR://15792924 70-OHM-300MA 01005 FL2159


DSBGA 120-OHM-210MA
26 21 12 PP3V0_MESA A1 VIN VOUT A2 26 PP1V8_MESA 1 2 PP1V8_MESA_CONN 21 26 MESA SENSOR: 2
ROOM=MAMBA_MESA_B2B
1
AP_BI_I2C1_SDA AP_BI_I2C1_SDA_MESA_CONN
1 C2180 1 C2181 01005-1
1 C2184
16 14 3 21

1.0UF B1 VEN 2.2UF


20% GND 20%
6.3V
100PF
6.3V 2 X5R 5%
2 X5R 16V
ROOM=MESA
B2

0201-1 0201-1 2 NP0-C0G


ROOM=MESA 01005
ROOM=MESA ROOM=MAMBA_MESA_B2B
1 C2103 1 C2100 1 C2126 1 C2198
FL2156 56PF 56PF 56PF 56PF
70-OHM-300MA 5% 5% 5% 5%
ROOM=MAMBA_MESA_B2B 2 16V
01005 2 16V
01005
16V
2 01005 16V
2 01005
26 25 15 PP16V5_MESA 1 2 PP16V5_MESA_CONN 21 26 ROOM=MAMBA_MESA_B2B
01005-1
1 C2110 ROOM=MAMBA_MESA_B2B
ROOM=MAMBA_MESA_B2B
ROOM=MAMBA_MESA_B2B
100PF
5%
2 25V
NP0-C0G
01005

B R2166 B
681
25 15 MESA_TO_BOOST_EN 1 2 MESA_TO_BOOST_EN_CONN 21

1%
1/32W
MF
01005
C2116 1 ROOM=MAMBA_MESA_B2B
ROOM=MAMBA_MESA_B2B 56PF
5%
16V
01005 2

NOTE: 0.45OHM DCR


FL2119
70-OHM-300MA
ROOM=MAMBA_MESA_B2B
26 21 12
PP3V0_MESA 2 1 PP3V0_MESA_CONN 21 26
01005-1
1 C2132 1 C2133 1 C2134 1 C2105 C2119
2.2UF 2.2UF 2.2UF 0.1UF 100PF
20% 20% 20% 20% 5%
2 6.3V 2 6.3V 6.3V
2 X5R 2 4V
X5R
16V
NP0-C0G
X5R X5R 01005 01005
0201-1 0201-1 0201-1 ROOM=MAMBA_MESA_B2B ROOM=MAMBA_MESA_B2B

ROOM=MAMBA_MESA_B2B ROOM=MAMBA_MESA_B2B ROOM=MAMBA_MESA_B2B

R2167
681
3 MESA_TO_AP_INT MESA_TO_AP_INT_CONN 21

1%
1/32W C2149 1
MF
01005
56PF
5%
ROOM=MAMBA_MESA_B2B 16V
NP0-C0G 2

A 01005
ROOM=MAMBA_MESA_B2B
A
PAGE TITLE
FL2179
120-OHM-210MA
SENSORS:MESA FLEX CONN
DRAWING NUMBER SIZE
16 14 3 AP_TO_I2C1_SCL
01005
AP_TO_I2C1_SCL_MESA_CONN 21
Apple Inc. 051-9903 D
ROOM=MAMBA_MESA_B2B C2179 1 REVISION
56PF
5%
R
7.0.0
16V NOTICE OF PROPRIETARY PROPERTY: BRANCH
NP0-C0G 2
01005 THE INFORMATION CONTAINED HEREIN IS THE
ROOM=MAMBA_MESA_B2B PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
21 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 21 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

OSCAR + SENSORS
OSCAR VDDIO = 1.8V ALWAYS ON (NEED TO WAKE HOST & RUN PLL)
OSCAR CORE = 1.2V ALWAYS ON (NEED TO RUN IN S2RAM)

26 22 19 12 PP1V8_OSCAR PP1V2_OSCAR 12 26

ROOM=OSCAR
1 C2261 C2274 1
1.0UF ROOM=OSCAR
0.1UF C2292 1 20% 1 C2260
20% 6.3V PP2201SM

E12

D13
4V 1.0UF X5R 2 0.1UF

B2

C1
CARBON (ACCEL GYRO COMBO)
2 X5R 20% 0201-1 20% P2MM-NSM 1 OSCAR_TO_AP_UART_RXD 3 22
PP
01005 6.3V ROOM=OSCAR 4V ROOM=OSCAR
X5R 2 2 X5R

D 0201-1
ROOM=OSCAR
VDDIO VDDC 01005 PP2202SM
P2MM-NSM 1 AP_TO_OSCAR_UART_TXD 3 22
D
ROOM=OSCAR PP
U2201
LPC18B1UK/CPA0-00 INVENSENSE, APN 338S00017, C2211=0.1UF
WLCSP
ROOM=OSCAR
PP2203SM 1 BOSCH, APN 338S00028, C2211=0.1UF
P2MM-NSM OSCAR_BI_AP_TIME_SYNC_HOST_INT 3 22
ROOM=OSCAR
PP
ST, APN 338S00029, C2211=0.01UF,25V
22 3 OSCAR_TO_AP_UART_RXD C11 U0_TXD/GPIO0[15] CLKOUT/GPIO0[0] F5 OSCAR_BI_AP_TIME_SYNC_HOST_INT
22 3 AP_TO_OSCAR_UART_TXD A9 U0_RXD/GPIO0[16] GPIO0[7] E4 GYRO_TO_OSCAR_INT1 PP2204SM PP1V8_OSCAR 12 19 22 26
P2MM-NSM IMU_TO_OSCAR_SPI_MISO 19 22
GPIO0[8] D3 COMPASS_TO_OSCAR_INT 19 ROOM=OSCAR PP
29 OSCAR_TO_RADIO_CONTEXT_A E10 U1_RXD/GPIO0[22]
NMI/GPIO0[24] A13 GYRO_TO_OSCAR_INT2 22
C2248 1 1 C2245 1 C2247
29 OSCAR_TO_RADIO_CONTEXT_B F11 U1_TXD/GPIO0[23] 0.1UF 0.1UF 2.2UF
GPIO0[26] A3 20% 20% 20%
AP_ISP_TO_OSCAR_UART_TXD F1 U2_RXD/GPIO0[5] SWO/GPIO0[27] A11
NC PP2205SM 1
6.3V
X5R-CERM 2
6.3V
2 X5R-CERM 2 6.3V
X5R
3
NC P2MM-NSM PP GYRO_TO_OSCAR_INT2 22 01005 01005 0201-1
OSCAR_TO_AP_ISP_UART_RXD F3 U2_TXD/GPIO0[6] WDFLAG/GPIO1[2] D11 ROOM=OSCAR ROOM=GYRO ROOM=GYRO ROOM=GYRO
3
NC
ALARM1/GPIO1[3] D5
NC

16
OSCAR_TO_BB_UART_TXD F9 U3_TXD/GPIO0[1]
PP2206SM

1
29
ALARM0/GPIO1[4] C3 OSCAR_TO_PMU_HOST_WAKE 7 13 ROOM=GYRO
29 BB_TO_OSCAR_UART_RXD F13 U3_RXDGPIO0[2] GYRO_TO_OSCAR_INT1
SWDIO/GPIO0[19] B10 AP_BI_OSCAR_SWDIO_1V8 7 P2MM-NSM 22 VDD VDDIO
ROOM=OSCAR PP
OSCAR_TO_IMU_SPI_SCLK A7 B8 AP_TO_OSCAR_SWDCLK_1V8 7
22 19 SPI0_SCK/GPIO0[12] SWCLK/GPIO0[20] U2203
IMU_TO_OSCAR_SPI_MISO A5 SPI0_MISO/GPIO0[13] CLK32K/GPIO0[21] E2
22 19
NC MPU-6700-12-COMBO
22 19 OSCAR_TO_IMU_SPI_MOSI B6 SPI0_MOSI/GPIO0[14] LGA
D9 I2C0_SDAP/GPIO0[10] B12 NC
OSCAR_TO_GYRO_SPI_CS_L SPI0_SSEL0/GPIO0[3] 5 CS
22
I2C0_SCL/GPIO0[11] A1 NC 22 OSCAR_TO_GYRO_SPI_CS_L SCL/SPC 2 OSCAR_TO_IMU_SPI_SCLK 19 22
OSCAR_TO_PHOSPHORUS_SPI_CS_L B4 SPI0_SSEL1/GPIO0[18] 8 FSYNC/GND
22
SDA/SDI 3 OSCAR_TO_IMU_SPI_MOSI 19 22
OSCAR_TO_COMPASS_SPI_CS_L D7 SPI0_SSEL2/GPIO0[4] I2C1_SDA/GPIO0[9] E6 GYRO_PUMP 14 REGOUT/GND_CAP
19
NC SA0/SDO 4 IMU_TO_OSCAR_SPI_MISO 19 22
C5 SPI0_SSEL3/GPIO0[25] I2C1_SCL/GPIO0[17] E8
NC NC
F7 RESET* GYRO_TO_OSCAR_INT2 7 INT/INT2 DRDY/INT1 6 GYRO_TO_OSCAR_INT1
26 22 19 12 PP1V8_OSCAR I2C2_SDA/GPIO1[0] C9 NC
22 22

ROOM=OSCAR I2C2_SCL/GPIO1[1] C7 NC
1
R2254
C 1%
392K VSS
C

9 GND1

10 GND2

11 GND3

12 GND4

13 GND5

15 GND6
1/32W
MF
D1
C13

2 01005
NOSTUFF

1 C2211
13 PMU_TO_OSCAR_RESET_CLK32K_L 0.1UF
10%
NOSTUFF 6.3V
2 CERM-X5R
1 C2204 0201
ROOM=GYRO
56PF
5%
16V
2 01005
ROOM=OSCAR

THIS IS OUTSIDE OF SHIELD IN


TO THE RIGHT OF THE NAND
PHOSPHORUS
PP1V8_OSCAR 12 19 22 26

C2250 1 1 C2251
1.0UF 0.1UF
20% 20%
6.3V 2 2 4V
X5R X5R
0201-1 01005
ROOM=PHOSPHORUS ROOM=PHOSPHORUS

B B

6
VDD VDDIO
U2204
BMP282AC
22 19 OSCAR_TO_IMU_SPI_MOSI 3 SDI LGA SDO 5 IMU_TO_OSCAR_SPI_MISO 19 22
4 SCK
2 CS*
GND 1 C2255
OSCAR_TO_IMU_SPI_SCLK
56PF

1
7
22 19 5%
16V
2 01005
ROOM=PHOSPHORUS
NOSTUFF

22 OSCAR_TO_PHOSPHORUS_SPI_CS_L
NOSTUFF NOSTUFF NOSTUFF
1 C2256 1 C2241 1 C2201
56PF 56PF 56PF
5% 5% 5%
2 16V
01005 2 16V
01005 2 16V
01005
ROOM=PHOSPHORUS ROOM=PHOSPHORUS ROOM=PHOSPHORUS

A SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 A
PAGE TITLE

SENSORS:OSCAR,CARBON,PHOS,MAGNESIUM
DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
22 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 22 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

RCAM B2B (REAR CAMERA CONNECTOR)


ROOM=RCAM_B2B
FL2329
70-OHM-300MA
16 7
AP_BI_RCAM_I2C_SDA 1 2 AP_BI_RCAM_I2C_SDA_CONN 23
01005-1

90-OHM-0.1A-0.7-3GHZ
1 C2386 THIS ONE ON MLB ---> 516S1174 PLUG
56PF
D
ROOM=RCAM_B2B TAM0605

4
SYM_VER-1

1
L2334 5%
16V
2 NP0-C0G RCAM_B2B D
7 90_RCAM_TO_AP_MIPI_DATA3_P 90_RCAM_TO_AP_MIPI_DATA3_CONN_P 23
01005 J2321
ROOM=RCAM_B2B
ROOM=RCAM_B2B AA21-S034VA1
F-ST-SM
7 90_RCAM_TO_AP_MIPI_DATA3_N 3 2 90_RCAM_TO_AP_MIPI_DATA3_CONN_N 23
FL2331 36 35
70-OHM-300MA
90-OHM-0.1A-0.7-3GHZ
ROOM=RCAM_B2B TAM0605 AP_TO_RCAM_I2C_SCL 1 2 AP_TO_RCAM_I2C_SCL_CONN 2 1
SYM_VER-1
L2333 16 7
01005-1
23

7 90_RCAM_TO_AP_MIPI_DATA2_P 4 1 90_RCAM_TO_AP_MIPI_DATA2_CONN_P 23 RCAM: 1 C2387 PP_RCAM_AF_CONN


4
6
3
5
90_RCAM_TO_AP_MIPI_DATA3_CONN_P
90_RCAM_TO_AP_MIPI_DATA3_CONN_N
23

56PF 26 23 23
DIGITAL I/F 5%
16V
8 7
90_RCAM_TO_AP_MIPI_DATA2_N 3 2 90_RCAM_TO_AP_MIPI_DATA2_CONN_N 2 NP0-C0G
7

90-OHM-0.1A-0.7-3GHZ
23
(I2C,CTRL,CLK) 01005
10 9 90_RCAM_TO_AP_MIPI_DATA2_CONN_P 23

RCAM: ROOM=RCAM_B2B TAM0605


SYM_VER-1
L2337
ROOM=RCAM_B2B
FL2330
ROOM=RCAM_B2B 23 AP_BI_RCAM_I2C_SDA_CONN
AP_TO_RCAM_I2C_SCL_CONN
12
14
11
13
90_RCAM_TO_AP_MIPI_DATA2_CONN_N 23

23
70-OHM-300MA
4-LANE MIPI 7 90_RCAM_TO_AP_MIPI_CLK_P 4 1 90_RCAM_TO_AP_MIPI_CLK_CONN_P 23

AP_TO_RCAM_SHUTDOWN 1 2 AP_TO_RCAM_SHUTDOWN_CONN
16 15 90_RCAM_TO_AP_MIPI_CLK_CONN_P 23
7 23
26 23 PP1V2_RCAM_CONN 18 17 90_RCAM_TO_AP_MIPI_CLK_CONN_N 23
01005-1 20 19
7 90_RCAM_TO_AP_MIPI_CLK_N 3 2 90_RCAM_TO_AP_MIPI_CLK_CONN_N 23 R23411 1 C2394 22 21 90_RCAM_TO_AP_MIPI_DATA1_CONN_P
90-OHM-0.1A-0.7-3GHZ
100K 56PF 23
5% 5% 26 23 PP1V8_RCAM_CONN 24 23 90_RCAM_TO_AP_MIPI_DATA1_CONN_N 23
ROOM=RCAM_B2B TAM0605 1/32W 16V
SYM_VER-1
L2338 MF
01005 2
2 NP0-C0G
01005 23 AP_TO_RCAM_SHUTDOWN_CONN 26 25
90_RCAM_TO_AP_MIPI_DATA1_P 4 1 90_RCAM_TO_AP_MIPI_DATA1_CONN_P ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B
7 23
23 45_AP_TO_RCAM_CLK_CONN 28 27 90_RCAM_TO_AP_MIPI_DATA0_CONN_P 23

FL2328 23 RCAM_TO_LEDDRV_STROBE_EN_CONN 30 29 90_RCAM_TO_AP_MIPI_DATA0_CONN_N 23

3 2
120-OHM-210MA 32 31
7 90_RCAM_TO_AP_MIPI_DATA1_N 90_RCAM_TO_AP_MIPI_DATA1_CONN_N 23
7 45_AP_TO_RCAM_CLK 1 2 45_AP_TO_RCAM_CLK_CONN 23 26 23 PP2V85_RCAM_AVDD_CONN 34 33
90-OHM-0.1A-0.7-3GHZ
ROOM=RCAM_B2B TAM0605 01005
SYM_VER-1
L2336 1 C2384 38 37
7 90_RCAM_TO_AP_MIPI_DATA0_P 4 1 90_RCAM_TO_AP_MIPI_DATA0_CONN_P 23
56PF
5%
2 16V
NP0-C0G
01005

C 7 90_RCAM_TO_AP_MIPI_DATA0_N 3 2 90_RCAM_TO_AP_MIPI_DATA0_CONN_N 23
ROOM=RCAM_B2B
FL2322
120-OHM-210MA
ROOM=RCAM_B2B
C
16 RCAM_TO_LEDDRV_STROBE_EN 1 2 RCAM_TO_LEDDRV_STROBE_EN_CONN 23
01005
1 C2300
56PF
5%
16V
2 NP0-C0G
01005
ROOM=RCAM_B2B

ROOM=RCAM_B2B
FL2343
10-OHM-750MA
26 23 11 PP2V85_CAM_VDD 1 2 PP2V85_RCAM_AVDD_CONN 23 26
01005-1
C2363 1 0.07 OHMS 1 C2303 1 C2304
2.2UF 0.1UF 100PF
20% 20% 5%
6.3V 16V
X5R 2 2 6.3V
X5R-CERM 2 NP0-C0G
0201-1 01005
ROOM=RCAM_B2B
01005
ROOM=RCAM_B2B ROOM=RCAM_B2B RCAM/FCAM AVDD RAIL EXT. LDO:

L2329
FERR-22-OHM-1A-0.055OHM
20 15 13 12 11 10 7 6 5 3 2 PP1V8 1 2 PP_RCAM_AF_CONN 23 26
27 26 25 24 23
0201
1 C2323 1 C2393
B RCAM: ROOM=RCAM_B2B
2.2UF
20%
100PF
5% B
POWER: NOTE: USING PP1V8 FOR N61 AND BUCK6 FOR N56.
2
6.3V
X5R 2
16V
NP0-C0G
(1.8V DVDD) 0201-1
ROOM=RCAM_B2B
01005
ROOM=RCAM_B2B
EXTERNAL LDO:
(2.8V AVDD) U2301
(1.2V VCC) LP5907UVX2.925-S
(1.8V/2V AF) FERR-33OHM-25%-0.5A-0.07OHM-DCR
L2330 48 39 31 26 17 16 15 14 12 10
52 51
PP_VCC_MAIN A1 VIN DSBGA
VOUT A2 PP2V85_CAM_VDD 11 23 26

26 12 4 2 PP1V2_SDRAM 1 2 PP1V2_RCAM_CONN 23 26
1 C2301 B1 VEN
ROOM=RCAM_B2B 1 C2345
0201 2.2UF GND 2.2UF
20% 20%
C2302 1 ROOM=RCAM_B2B
C2392 2 6.3V 2 6.3V
C2389 C2305

B2
1 X5R X5R
1.0UF 1 1 0201-1 0201-1
20%
6.3V 2.2UF 2.2UF 100PF ROOM=RCAM_B2B ROOM=RCAM_B2B
5%
X5R 2 20%
6.3V
20%
6.3V 16V
0201-1 X5R 2 X5R 2 NP0-C0G
ROOM=RCAM_B2B 0201-1 2 0201-1 01005
ROOM=RCAM_B2B ROOM=RCAM_B2B ROOM=RCAM_B2B
7 CAM_EXT_LDO_EN
ROOM=RCAM_B2B

L2318
FERR-22-OHM-1A-0.055OHM
20 15 13 12 11 10 7 6 5 3 2 PP1V8 1 2 PP1V8_RCAM_CONN 23 26
27 26 25 24 23
0201
C2390 1 1 C2395
1.0UF 100PF
20% 5%
6.3V 16V
X5R 2 2 NP0-C0G
0201-1 01005
ROOM=RCAM_B2B ROOM=RCAM_B2B

A SYNC_MASTER=N61_MLB SYNC_DATE=08/26/2013 A
PAGE TITLE

CAMERA:REAR FLEX CONN


DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
23 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 23 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
26 20 15 PN5V7_SAGE_AVDDN
26 24 15 PP5V7_SAGE_AVDDH PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
25 26 27

C2414 1 C2409 1 1 C2415


Touch (B2B, Driver ICs) 10UF
20%
10V
10UF
20%
10V
20%
6.3V
0.1UF
MESON A1
X5R-CERM 2 X5R-CERM 2 2 X5R-CERM

Cumulus 0402-8 0402-8 01005


APN: 343S0694
Touch probe points

VDDIO K1
D2
D4
F3
G6
G3

AVDDL G2

VDDIO_OSC J1
VDDIO N3
APN: 343S0638
Turn on is later than PP1V8_GRAPE
P2MM

AVDDH1
AVDDH2
AVDDH3
AVDDH4
AVDDH5
Turn off is same time as PP1V8_GRAPE SM
1 E5 G7
CUMULUS_TO_SAGE_BOOST_CLK_EN TOUCH_TO_SAGE_SENSE_IN<7> SNS_IN0 DRV_OUT0 SAGE_TO_TOUCH_VSTM_OUT<22>
26 15 PP5V1_GRAPE_VDDH
PP2402 PP 24 24

24 TOUCH_TO_SAGE_SENSE_IN<9> D5 SNS_IN1 DRV_OUT1 H7 SAGE_TO_TOUCH_VSTM_OUT<16>


24

24
P2MM

D 26 PP_CUMULUS_VDDCORE
PP2403
SM
PP
1 AP_TO_TOUCH_SPI_CS_L 3 24
24

24
TOUCH_TO_SAGE_SENSE_IN<10>
TOUCH_TO_SAGE_SENSE_IN<8>
C5
B5
SNS_IN2
SNS_IN3
DRV_OUT2
DRV_OUT3
J6
J7
SAGE_TO_TOUCH_VSTM_OUT<15>
SAGE_TO_TOUCH_VSTM_OUT<17>
24

24
D
PP_CUMULUS_VDDANA PP1V8_GRAPE P2MM TOUCH_TO_SAGE_SENSE_IN<11> A5 K7 SAGE_TO_TOUCH_VSTM_OUT<12>
26 12 24 26
SM
1 AP_TO_TOUCH_SPI_CLK
24

TOUCH_TO_SAGE_SENSE_IN<2> A7
SNS_IN4
SNS_IN5
U2402 DRV_OUT4
DRV_OUT5 L7 SAGE_TO_TOUCH_VSTM_OUT<14>
24

C2402 1 C2432 1 C2433 1 1 C2403 PP2404 PP 3 24 24

TOUCH_TO_SAGE_SENSE_IN<4> A9 SNS_IN6
MESON-A1 DRV_OUT6 M7 SAGE_TO_TOUCH_VSTM_OUT<8>
24

10UF 4.7UF 4.7UF 1.0UF 24 24


20%
10V
20%
6.3V
20%
6.3V
20%
6.3V
PP2405SM 24 TOUCH_TO_SAGE_SENSE_IN<3> B7 SNS_IN7
CSP
DRV_OUT7 N7 SAGE_TO_TOUCH_VSTM_OUT<2> 24
X5R-CERM 2 X5R-CERM1 2 X5R-CERM1 2 2 X5R P2MM-NSM PP LCM_TO_AP_HIFA_BSYNC 7 20 24
TOUCH_TO_SAGE_SENSE_IN<1> C7 SNS_IN8 DRV_OUT8 G8 SAGE_TO_TOUCH_VSTM_OUT<21>

VDDANA B1

VDDCORE C1

VDDH C8

C5
F4

VDDLDO A1
24 24
0402-8 402 402 0201-1
P2MM 24 TOUCH_TO_SAGE_SENSE_IN<0> D7 SNS_IN9 DRV_OUT9 H8 SAGE_TO_TOUCH_VSTM_OUT<0> 24
SM
1 TP_CUMULUS_GPIO TOUCH_TO_SAGE_SENSE_IN<6> E7 SNS_IN10 DRV_OUT10 J8 SAGE_TO_TOUCH_VSTM_OUT<13>
Follow Touch routing guidelines VDDIO PP2408 PP 24 24

24 TOUCH_TO_SAGE_SENSE_IN<5> B9 SNS_IN11 DRV_OUT11 K8 SAGE_TO_TOUCH_VSTM_OUT<1>


24

24
Cumulus sense nets are sensitive PP2410SM NC
C9 SNS_IN12 DRV_OUT12 L8 SAGE_TO_TOUCH_VSTM_OUT<5> 24
220PF CUMULUS_TO_MESON_VSTM_OUT_N
24 SAGE_TO_CUMULUS_IN<11> C2417 1 2
220PF
C_IN0 B9 IN0_0 U2401 VSTM_0 E9
NC
P2MM-NSM PP 24
NC
D9 SNS_IN13 DRV_OUT13 M8 SAGE_TO_TOUCH_VSTM_OUT<4> 24

24 SAGE_TO_CUMULUS_IN<4> 10V X7R-CERM 10% 01005 C2425 1 2 C_IN1 B8 IN1_0 CUMULUS-C1 VSTM_1 E5
NC PP2411SM NC
E9 SNS_IN14 DRV_OUT14 N8 SAGE_TO_TOUCH_VSTM_OUT<6> 24
C2418 1 2 220PF 10V X7R-CERM 10% 01005 A9 WLBGA F7 K9
24 SAGE_TO_CUMULUS_IN<5> C_IN2 IN2_0 VSTM_2 NC P2MM-NSM PP CUMULUS_TO_MESON_VSTM_OUT_P 24 DRV_OUT15 SAGE_TO_TOUCH_VSTM_OUT<10> 24
220PF SAGE_TO_CUMULUS_IN<7> E6 SNS_OUT0
SAGE_TO_CUMULUS_IN<3> 10V X7R-CERM 10% 01005 C2426 1 2 C_IN3 B7 IN3_0 VSTM_3 E6 24
DRV_OUT16 G9 SAGE_TO_TOUCH_VSTM_OUT<23>
24

SAGE_TO_CUMULUS_IN<1> C2419 1 2 220PF 10V X7R-CERM 10% 01005 C_IN4 B6 IN4_0 VSTM_4 E7
NC PP2412SM 24 SAGE_TO_CUMULUS_IN<9> D6 SNS_OUT1
DRV_OUT17 H9 SAGE_TO_TOUCH_VSTM_OUT<18>
24

24
220PF NC P2MM-NSM PP 45_AP_TO_TOUCH_CLK32K_RESET_L 3 24 SAGE_TO_CUMULUS_IN<10> C6 SNS_OUT2
24

24 SAGE_TO_CUMULUS_IN<2> 10V X7R-CERM 10% 01005 C2427 1 2 C_IN5 A8 IN5_0 VSTM_5 F8 CUMULUS_TO_MESON_VSTM_OUT_P 24
24
DRV_OUT18 J9 SAGE_TO_TOUCH_VSTM_OUT<20> 24
220PF 10V X7R-CERM SAGE_TO_CUMULUS_IN<8> B6 SNS_OUT3
24 SAGE_TO_CUMULUS_IN<0> C2420 1 2 10% 01005 C_IN6 B5 IN6_0 VSTM_6 G9 CUMULUS_TO_MESON_VSTM_OUT_N 24
24
DRV_OUT19 G10 SAGE_TO_TOUCH_VSTM_OUT<19> 24
220PF SAGE_TO_CUMULUS_IN<11> A4 SNS_OUT4
24 SAGE_TO_CUMULUS_IN<9> 10V X7R-CERM 10% 01005 C2428 1 2 C_IN7 B4 IN7_0 VSTM_7 D6
NC
24
DRV_OUT20 L9 SAGE_TO_TOUCH_VSTM_OUT<9> 24
220PF 10V X7R-CERM SAGE_TO_CUMULUS_IN<2> A6 SNS_OUT5
SAGE_TO_CUMULUS_IN<8> C2421 1 2 10% 01005 C_IN8 A7 IN8_0 VSTM_8 D7 24
DRV_OUT21 M9 SAGE_TO_TOUCH_VSTM_OUT<7>
24
220PF NC SAGE_TO_CUMULUS_IN<4> A8 SNS_OUT6
24

24 SAGE_TO_CUMULUS_IN<6> 10V X7R-CERM 10% 01005 C2429 1 2 C_IN9 B3 IN9_0 VSTM_9 D8


NC
24
DRV_OUT22 N9 SAGE_TO_TOUCH_VSTM_OUT<3> 24
220PF 10V X7R-CERM SAGE_TO_CUMULUS_IN<3> B8 SNS_OUT7
24 SAGE_TO_CUMULUS_IN<10> C2422 1 2 10% 01005 C_IN10 A6 IN10_0 VSTM_10 F9
NC
24
DRV_OUT23 K10 SAGE_TO_TOUCH_VSTM_OUT<11> 24
220PF SAGE_TO_CUMULUS_IN<1> C8 SNS_OUT8
SAGE_TO_CUMULUS_IN<7> 10V X7R-CERM 10% 01005 C2430 1 2 C_IN11 A3 IN11_0 VSTM_11 D5 24
DRV_OUT24 H10
24
NC 24 SAGE_TO_CUMULUS_IN<0> D8 SNS_OUT9 NC
10V X7R-CERM 10% 01005 A5 IN12_0 VSTM_12 F6 DRV_OUT25 J10
NC NC 24 SAGE_TO_CUMULUS_IN<6> E8 SNS_OUT10 NC
A4 IN13_0 VSTM_13 F5 DRV_OUT26 L10
NC NC 24 SAGE_TO_CUMULUS_IN<5> B10 SNS_OUT11 NC
B2 IN14_0 VSTM_14 G4
NC NC C10 SNS_OUT12 DRV_OUT27 M10 NC
45_PROX_TO_CUMULUS_RX_IN A2 IN14_1 VSTM_15 E8 NC
24
NC
C AP_TO_TOUCH_SPI_CS_L E4 H_CS*
VSTM_16
VSTM_17
G8
G7
NC
NC
NC
D10
E10
SNS_OUT13
SNS_OUT14
DRV_IN P L6
DRV_IN N K6
CUMULUS_TO_MESON_VSTM_OUT_P
CUMULUS_TO_MESON_VSTM_OUT_N
24 C
24 3
NC 24

TOUCH_TO_AP_INT_L F1 H_INT* VSTM_18 G6 SAGE_VBIAS D3 VBIAS


7
NC PBKG A1
AP_TO_TOUCH_SPI_CLK D3 H_SCLK VSTM_19 G5
R2403
24 3

AP_TO_TOUCH_SPI_MOSI D2 H_SDI
NC C2439 1 24 TOUCH_I2C_SDA J2 I2C_SDA PBKG B4
10.2 2
3
PP1V8_GRAPE 12 24 26
0.1UF 24 TOUCH_I2C_SCL J3 I2C_SCL PBKG A10
3 TOUCH_TO_AP_SPI_MISO 1 TOUCH_TO_AP_SPI_MISO_R E1 H_SDO GPIO_1/CK G1 LCM_TO_AP_HIFA_BSYNC_BUFF 24
20%
4V G5 B3
X5R 2 NC TEST_MUX0 PBKG
1%
1/32W
C4
GPIO_2/SD D4
F2
CUMULUS_TO_SAGE_BOOST_CLK_EN 24
R2405 01005
NC
H5 TEST_MUX1 PBKG C3
MF
01005
JTAG_TCK GPIO_3 NC 100K L3 F6
C3 F3 5% NC TEST_MUX2 PBKG
JTAG_TDI GPIO_4 TP_CUMULUS_GPIO 24 1/32W
MF M3 TESTMODE PBKG F10
24 TOUCH_I2C_SDA E2 JTAG_TDO 01005 NC
24 20 7 LCM_TO_AP_HIFA_BSYNC M1 BSYNC/SCAN_RESET PBKG H1
26 24 12 PP1V8_GRAPE C6 JTAG_TMS TM_ACS* C2 CUMULUS_TO_PROX_RX_EN_1V8 11
M2 SCAN CLK PBKG H2
TM_OVR G3 TOUCH_I2C_SCL 24
NC
L2 SCANOUT PBKG H3
24 CUMULUS_TO_PROX_TX_EN_1V8_L E3 BCFG_RTCK NC
24 CUMULUS_TO_SAGE_BOOST_CLK_EN L1 STEP_CLK/SCAN_IN PBKG H4
24 3 45_AP_TO_TOUCH_CLK32K_RESET_L D1 CLKIN/RESET*
K4 GCM PBKG N10 TOUCH_TO_SAGE_VCM_IN 20
7 AP_TO_TOUCH_RESET_L D9 RSTOVR*
R24101 L4 BOOST_EN/SCAN_EN PBKG F4
GND 220K
Radars for XW
5%
1/32W
PBKG N1
F5
R2434 1
R2435
1

MF
A2 PLDO_SUP_IN PBKG 0.00 0.00
C7
C9
G2

rdar://12773579 01005 2
K5 0% 0%

Touch B2B rdar://12611242 26 24

26 24
PP_SAGE_VBST_OUTH
PN_SAGE_VBST_OUTL
B1 VBST_OUTH
E1 VBST_OUTL
PBKG
PBKG N6
1/32W
MF
01005 2
1/32W
MF
2 01005
No decoupling on previous designs
MLB APN : 516S1086 (Receptacle) PP_SAGE_LX C1 LX
26 24 12 PP1V8_GRAPE 26 24
Flex APN: 516S1087 (Plug) 26 24 PP_SAGE_LY D1 LY VCM_IN_0 E4 TOUCH_TO_MESON_VCM_IN0
R24071 F1 NLDO_SUP_IN VCM_IN_1 J5 TOUCH_TO_MESON_VCM_IN1
100K 24 20 SAGE_TO_TOUCH_VCPH_REF B2 VCPH_REF_EN

5
5%
1/32W F2 VCPL_REF_EN GO F8 MESON_TO_TOUCH_GUARD 24
MF 24 20 SAGE_TO_TOUCH_VCPL_REF
VCC
01005 2 PN_SAGE_TO_TOUCH_VCPL_FILT G1 VCPL AUX_BUF_IN M4
J2401 U2403 26 24

B AA21-S046VA1
74AUP2G3404GN
SOT1115
26 24

26 24
PP_SAGE_TO_TOUCH_VCPH
PN_SAGE_VCPL_F
A3 VCPH
E2 VCPL_F
AUX_BUF_OUT M5 NC B
F-ST-SM 24 20 7 LCM_TO_AP_HIFA_BSYNC 1 1A 1Y 6 LCM_TO_AP_HIFA_BSYNC_BUFF 24
AUX_PLDO_OUT N5 NC
48 47 K3 I2C_SLV_ADDR0 AUX_NLDO_OUT N4 NC
K2 I2C_SLV_ADDR1

AGND2
AGND2

AGND3
AGND3

AGND4
AGND4
AGND4

AGND5
CUMULUS_TO_PROX_TX_EN_1V8_L 3 2A 2Y 4 CUMULUS_TO_PROX_TX_EN_BUFF

DGND
DGND
24 11

TOUCH_TO_SAGE_SENSE_IN<7> 2 1 TOUCH_TO_SAGE_SENSE_IN<6> GND


24

TOUCH_TO_SAGE_SENSE_IN<10> 4 3 TOUCH_TO_SAGE_SENSE_IN<9>
24 1
R2406 AGND1
100K
2

24 24
R2488 Meson decoupling

C2

C4
F7

E3
L5

F9
H6
M6

G4

J4
N2
24 TOUCH_TO_SAGE_SENSE_IN<11> 6 5 TOUCH_TO_SAGE_SENSE_IN<8> 24
5%
8 7
255K 2MF 1/32W
MF
OIC_RIGHT_NET 1 26 24 PP_SAGE_VBST_OUTH
2 01005
SAGE_TO_TOUCH_VSTM_OUT<6> 10 9 01005 1% 1/32W
24

SAGE_TO_TOUCH_VSTM_OUT<7> 12 11 SAGE_TO_TOUCH_VSTM_OUT<3>
Tantalums solved singing caps C2438 1 C2410 1 Meson VCPL rail:
24 24
issue. Validate issue is resolved 0.33UF 1000PF
24 SAGE_TO_TOUCH_VSTM_OUT<8> 14 13 SAGE_TO_TOUCH_VSTM_OUT<2> 24
with Meson and replace with
20%
20V 2
10%
25V FL2486 Effective impedance of 3 Ohms,
24 SAGE_TO_TOUCH_VSTM_OUT<9> 16 15 SAGE_TO_TOUCH_VSTM_OUT<4> 24 TANT X7R-CERM 2 10-OHM-750MA at 115 kHz with 12 V bias.
0402 0201
0402 ceramics.
24 SAGE_TO_TOUCH_VSTM_OUT<10>18 17 SAGE_TO_TOUCH_VSTM_OUT<5> 24 26 24 PN_SAGE_TO_TOUCH_VCPL_FILT 1 2 PN_SAGE_TO_TOUCH_VCPL 24 26

SAGE_TO_TOUCH_VSTM_OUT<11>20 19 SAGE_TO_TOUCH_VSTM_OUT<0> R2412 PP5V7_SAGE_AVDDH 01005-1


24

SAGE_TO_TOUCH_VSTM_OUT<13>22 21 SAGE_TO_TOUCH_VSTM_OUT<1>
24

0.00 2
26 24 15
1 C2490
1 C2405 1 C2408 1 C2441
24 24
PP_SAGE_TO_TOUCH_VCPH_CONN 1 PP_SAGE_TO_TOUCH_VCPH PN_SAGE_VBST_OUTL 2.2UF 1UF 0.1UF
SAGE_TO_TOUCH_VSTM_OUT<15>24 23 SAGE_TO_TOUCH_VSTM_OUT<12>
26 24 24 26 26 24
100PF 20% 10% 10%
24 24
0% C2407 5% 25V
2 X5R
16V
2 X6S-CERM
16V
2 X5R-CERM
24 SAGE_TO_TOUCH_VSTM_OUT<17>26 25 SAGE_TO_TOUCH_VSTM_OUT<14> 24 1/32W
MF I2C pull-ups
1UF-10OHM
20%
2 C2411 1 25V
2 NP0-C0G 0402-3 0402 0201
24 SAGE_TO_TOUCH_VSTM_OUT<19>28 27 SAGE_TO_TOUCH_VSTM_OUT<16> 24 01005 25V 1000PF 01005
TANT 10%
24 SAGE_TO_TOUCH_VSTM_OUT<20>30 29 SAGE_TO_TOUCH_VSTM_OUT<18> 24
R2411 26 24 12 PP1V8_GRAPE 0603-LLP2 1 25V
X7R-CERM 2
SAGE_TO_TOUCH_VSTM_OUT<21>32 31 SAGE_TO_TOUCH_VSTM_OUT<22> 0.00 2 0201
24 24

SAGE_TO_TOUCH_VSTM_OUT<0> 34 33 SAGE_TO_TOUCH_VSTM_OUT<23>
26 24 PN_SAGE_TO_TOUCH_VCPL_CONN 1 PN_SAGE_TO_TOUCH_VCPL 24 26 R2420
1 1
R2421
24

PP_SAGE_TO_TOUCH_VCPH_CONN36 35 PN_SAGE_TO_TOUCH_VCPL_CONN
24
R2495 0%
1/32W
1.8K 1.8K L2401
26 24 24 26
255K 2MF MF
5%
1/32W
5%
1/32W
10UH-20%-0.23A-1.56OHM
38 37 OIC_LEFT_NET 1 01005 MF MF
SAGE_TO_TOUCH_VCPH_REF PP_SAGE_LX 2 1 PP_SAGE_LY
24 TOUCH_TO_SAGE_SENSE_IN<0> 40 39 01005 1% 1/32W 2 01005 2 01005 24 20 26 24 24 26

24 20 SAGE_TO_TOUCH_VCPL_REF PSB1614FE
24 TOUCH_TO_SAGE_SENSE_IN<3> 42 41 TOUCH_TO_SAGE_SENSE_IN<1> 24
R2433
A 24

24
TOUCH_TO_SAGE_SENSE_IN<5> 44
MESON_TO_TOUCH_GUARD_CONN 46
43
45
TOUCH_TO_SAGE_SENSE_IN<2>
TOUCH_TO_SAGE_SENSE_IN<4>
24

24
24 MESON_TO_TOUCH_GUARD_CONN 1
0.00 2
MESON_TO_TOUCH_GUARD 24
24

24
TOUCH_I2C_SDA
TOUCH_I2C_SCL
C2436
0.01UF
1 C2437
0.01UF
1
SYNC_MASTER=N/A SYNC_DATE=N/A A
1% 10% 10% PAGE TITLE

50 49
1/20W
MF
0201
6.3V
X5R 2
01005
6.3V
X5R 2
01005 TOUCH:CUMULUS,MESON
DRAWING NUMBER SIZE

C2401 Apple Inc. 051-9903 D


Optical prox filter
1000PF R2402 26 24 PP_SAGE_TO_TOUCH_VCPH REVISION
22.1K2
11 45_PROX_TO_CUMULUS_RX_CONN 1 2 45_PROX_TO_CUMULUS_RX_C 1 45_PROX_TO_CUMULUS_RX_IN 24 26 24 PN_SAGE_VCPL_F
R
7.0.0
1% NOTICE OF PROPRIETARY PROPERTY: BRANCH
10%
6.3V
1/32W
MF
1 C2416 C2404 1 C2440 1 THE INFORMATION CONTAINED HEREIN IS THE
X5R-CERM 01005 27PF 0.01UF 1.0UF PROPRIETARY PROPERTY OF APPLE INC.
01005 5% 10% 20% THE POSESSOR AGREES TO THE FOLLOWING: PAGE
16V 25V 16V
2 NP0-C0G X5R-CERM 2 X5R-CERM 2
01005 0201 0201
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
24 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 24 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

BATT CONN, TPS, STANDOFFS/SHIELDS/FIDUCIALS


POWER TP TESTPOINTS
26 18 17 14 12 PP5V0_USB
TP2501
1
TP-P6
A VBUS MOJAVE TP
D MESA_TO_BOOST_EN TP2569
1
A
D
BATTERY CONN
21 15
46 45 40 26 25 16 14 PP_BATT_VCC
TP2512 TP-P55

THIS ONE ON MLB ---> 516S1239 RCPT PCB: PLACE XW2512 AT BATT CONN, PIN 7
A POWER GROUND
TP-P6
1 C2560 1 C2550 XW2512 TP2570
100PF
1 C2549 33PF
SHORT-10L-0.25MM-SM 26 21 15 PP16V5_MESA 1
A
5% 15PF 5%
2 1 CHARGER_VBATT_SNS 12 14 TP-P55
16V 5% 16V ROOM=BATTERY_B2B
2 NP0-C0G 16V 2 NP0-C0G-CERM
2 NP0-C0G-CERM ROOM=BATTERY_B2B
01005 01005 PP_BATT_VCC
ROOM=BATTERY_B2B
01005
ROOM=BATTERY_B2B ROOM=BATTERY_B2B J2523 14 16 25 26 40 45 46

RCPT-BATT-2BLADES-0.90
F-SM-SM 1 C2509 PP_BATT_VCC
TP2539 VBAT
14 100PF 46 45 40 26 25 16 14
A

FL2511
11 12
2
5%
16V
NP0-C0G
01005
ROOM=BATTERY_B2B
1 C2575
220PF
10%
10V
1

5%
C2522
56PF
TP-P55
TP2513
A
E75 - USB/UART/ID/POWER
120-OHM-210MA 1 7 2 X7R-CERM 16V
2 NP0-C0G TP-P6
01005 01005
14 BATTERY_SWI 1 2 25 BATTERY_SWI_CONN 3 2 ROOM=BATTERY_B2B ROOM=BATTERY_B2B TP2545 90_TRISTAR_BI_E75_PAIR1_CONN_P
TP2521
01005 5 4 BATTERY_SWI_CONN 25 A 18 17 A
ROOM=BATTERY_B2B 1 C2579 6 8
TP-P55 TP-P55
56PF
5%
16V
2 NP0-C0G
01005
9 10
90_TRISTAR_BI_E75_PAIR1_CONN_N
TP2522
1
13 18 17 A
ROOM=BATTERY_B2B 1 C2561
SUPER TP
TP-P55
220PF
10%
10V
2 X7R-CERM
01005 90_TRISTAR_BI_E75_PAIR2_CONN_P
TP2523
1
ROOM=BATTERY_B2B
18 17 A
TP-P55
PMU_TO_TP_AMUX_AY
TP2506
1
13
A ANALOG MUX A OUTPUT
TP-P55
90_TRISTAR_BI_E75_PAIR2_CONN_N
TP2524
1
18 17 A
C TP2507
TP-P55
C
PMU_TO_TP_AMUX_BY 1
13 A ANALOG MUX B OUTPUT TP2526
TP-P55 PP_E75_TO_TRISTAR_ACC1_CONN A
COWLING
26 18

FIDUCIALS SHIELDS TP-P55

FD2501
FID
0P5SM1P0SQ-NSP RETENTION-COAX-N61
RESET 26 18 PP_E75_TO_TRISTAR_ACC2_CONN
TP2527
1
TP-P55
A

1 SH2501 OMIT_TABLE
SM 806-8537 CL2501 806-8699 TP2508
1 TP2535
SM RESET_1V8_L
FD2502 17 15 13 4 2
A H6P & BB RESET A TP IS TO HELP WITH USB SI
FID TP-P55 TP-P55
0P5SM1P0SQ-NSP SHLD-EMI-UPPER-FRONT-N61 IN THE FACTORY FIXTURE.
1

FD2503
FID
0P5SM1P0SQ-NSP
1
SH2502
SM
OMIT_TABLE
806-8538 SH2505
SHLD-SNOUT-1-N61
SM
DFU 18 E75_TO_TRISTAR_CON_DETECT_CONN
TP2510
1
TP-P55
A FOR DIAGS
SHLD-EMI-LOWER-FRONT-N61 1 NORTH_AC_GND_SCREW 8 25 29
TP2509
FD2504
FID
0P5SM1P0SQ-NSP
2 3 FORCE_DFU 1
TP-P55
A FORCE DFU LCM BACKLIGHT
1 SH2503 CKPLUS_WAIVE=TERMSHORTED PP2510
SM 806-00230 P4MM
FD2505 806-7014 PP1V8
SM
TP2518
FID
15 13 12 11 10 7 6 5 3 2
27 26 24 23 20
PP
26 20 PP_LCM_BL_CAT1_CONN 1
A LCD BACKLIGHT SINK1
0P5SM1P0SQ-NSP SHLD-EMI-UPPER-EXT-N61 TP-P55
1
CL2502
FD2506 TH-NSP
PP_LCM_BL_CAT2_CONN TP2519
1
FID
26 20 A LCD BACKLIGHT SINK2
SH2504 OMIT_TABLE
B 0P5SM1P0SQ-NSP
1 SM 806-00424 SL-1.20X0.40-1.50X0.70-NSP
TP-P55
B
SHLD-N61-EMI-LOWER-BACK-TALL PP_LCM_BL_ANODE_CONN
TP2520
1
26 20 A LCD BACKLIGHT SOURCE
TP-P55
OMIT_TABLE
SH2506 806-8541
TP2517
SM LCD_TO_AP_PIFA_CONN 1
20 A LCD PIFA TEST POINT
TP-P55
SHLD-EMI-SA-N61

860-3948
SCREW HOLES + STANDOFFS
BS2503 860-7862 29 25 8 NORTH_AC_GND_SCREW
STDOFF-MLB-UNPLATED-0.85-N61-SM BS2512
STDOFF-2.70OD1.84ID-0.88H-TH
1 C2510 1 C2511 1 C2501 1 C2523
BS2511 220PF 56PF 4.7PF 220PF
STDOFF-2.6OD0.5H-0.5-1.7-TH
BS2510 10% 5% +/-0.1PF 10%
STDOFF-2.2OD0.25H-0.50-1.70 2 10V
X7R-CERM 2 16V
NP0-C0G
16V
2 NP0-C0G 10V
2 X7R-CERM
50_AP_UAT_FEED 1 01005 01005 01005 01005
29
860-8396 50_AP_WIFI_5G_CONN_ANT 860-7846
A
29 ROOM=ASSEMBLY ROOM=ASSEMBLY ROOM=ASSEMBLY ROOM=ASSEMBLY
SYNC_MASTER=N61_MLB
PAGE TITLE
SYNC_DATE=08/26/2013 A
860-3948 860-3948 BS2504 BS2509 POWER:BATT CONN,TPS,PD FEATURES
BS2501 BS2502 STDOFF-2.55OD1.4ID-0.99H-SM STDOFF-2.70OD1.84ID-0.88H-TH DRAWING NUMBER SIZE
STDOFF-MLB-UNPLATED-0.85-N61-SM STDOFF-MLB-UNPLATED-0.85-N61-SM
29 AP_TO_STOCKHOLM_ANT 860-7861 860-7862 Apple Inc. 051-9903 D
REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
25 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 25 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

VOLTAGE PROPERTIES
VOLTAGE=3.3V PP3V3_USB 2 12
VOLTAGE=5.0V PP_LED_DRV_LX 16
I55 I1
VOLTAGE=1.8V PP1V8_VA_L19_L67 10 12 16 VOLTAGE=5.0V PP_LED_BOOST_OUT 16
I56 I2

D I57

I58
VOLTAGE=3.0V
VOLTAGE=3.0V
PP3V0_TRISTAR
PP3V0_IMU
12 15 17 29

12 19 I4
VOLTAGE=2.9V PP2V9_LDO9 12
D
VOLTAGE=3.0V PP3V0_NAND 6 12
I60
VOLTAGE=3.0V PP3V3_ACC 12 17
VOLTAGE=1.8V PP_CODEC_TO_MIC1_BIAS_CONN 18
I59 I5
VOLTAGE=3.0V PP3V0_PROX_ALS 11 12 VOLTAGE=4.6V PP_E75_TO_TRISTAR_ACC2 17 18
I61 I7
VOLTAGE=4.6V PP_E75_TO_TRISTAR_ACC2_CONN 18 25
I8

VOLTAGE=4.6V PP_VCC_MAIN 10 12 14 15 16 17 23 31 39
VOLTAGE=1.8V PP1V8_LCM_CONN 20
I64 48 51 52 I10
VOLTAGE=1.0V PP1V0 7 12
VOLTAGE=22.0V PP_LCM_BL_ANODE_CONN 20 25
I65 I11
VOLTAGE=3.0V PP3V0_PROX_IRLED 11 12 VOLTAGE=-5.7V PN5V7_LCM_AVDDN_CONN 20
I67 I12
VOLTAGE=1.8V PP1V8_ALWAYS 3 5 12 14
VOLTAGE=5.7V PP5V7_LCM_AVDDH_CONN 20
I66 I13
VOLTAGE=3.0V PP3V0_MESA 12 21
I68
VOLTAGE=1.1V PP_CPU 4 12
I70
VOLTAGE=1.1V PP_GPU 4 12
VOLTAGE=1.8V PP1V8_MESA 21
I69 I16
VOLTAGE=16.5V PP16V5_MESA_CONN 21
I17

VOLTAGE=1.2V PP1V2_SDRAM 2 4 12 23
I71 VOLTAGE=5.0V PP_TRISTAR_PIN 17
VOLTAGE=1.8V PP1V8_SDRAM 3 4 10 12 13 14 15 17 29
I143
I72

VOLTAGE=1.8V PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
I73 24 25 27
VOLTAGE=1.8V PP1V8_GRAPE 12 24
I77
VOLTAGE=1.8V PP1V8_OSCAR 12 19 22
I76
VOLTAGE=1.2V PP1V2_NAND_VDDI 6
I75

VOLTAGE=1.8V PP_EXTMIC_BIAS_FILT_IN 10 VOLTAGE=1.2V PP1V2_RCAM_CONN 23


I74 I20
VOLTAGE=1.8V BOARD_ID2 3 27
VOLTAGE=1.8V PP1V8_RCAM_CONN 23
I78 I21
VOLTAGE=1.2V PP1V2 2 4 5 11 12
I79
VOLTAGE=5.0V PP_E75_TO_TRISTAR_ACC1_CONN 18 25 VOLTAGE=3.0V PP2V85_CAM_VDD 11 23

C
I80 I23

C I81
VOLTAGE=5.0V
VOLTAGE=22.0V
PP_E75_TO_TRISTAR_ACC1 17 18
PP_LCM_BL_ANODE 15 20
I24
VOLTAGE=1.8V
VOLTAGE=1.8V
PP2V85_RCAM_AVDD_CONN 23
PP_CUMULUS_VDDCORE 24
I82 I25
VOLTAGE=0.2V PP_LCM_BL_CAT2 15 20
VOLTAGE=1.2V PP_CUMULUS_VDDANA 24
I83 I26
VOLTAGE=0.2V PP_LCM_BL_CAT1 15 20
VOLTAGE=13.5V PP_SAGE_TO_TOUCH_VCPH_CONN 24
I87 I27
VOLTAGE=0.2V PP_LCM_BL_CAT2_CONN 20 25
VOLTAGE=-12V PN_SAGE_TO_TOUCH_VCPL_CONN 24
I86 I28
VOLTAGE=0.2V PP_LCM_BL_CAT1_CONN 20 25
VOLTAGE=13.5V PP_SAGE_TO_TOUCH_VCPH 24
I85 I30
VOLTAGE=-12V PN_SAGE_TO_TOUCH_VCPL 24
I29

VOLTAGE=-5.7V PN5V7_SAGE_AVDDN 15 20 24
I88
VOLTAGE=1.2V PP1V2_OSCAR 12 22
I89 VOLTAGE=-12V PN_SAGE_VCPL_F 24
VOLTAGE=3.0V PP3V0_MESA_CONN 21
I33
I90 VOLTAGE=5.7V PP_SAGE_LX 24
VOLTAGE=6V PP6V0_LCM_BOOST 15
I35
I91 VOLTAGE=17.0V PP_SAGE_LY 24
PP_STRB_DRIVER_TO_LED_WARM I34
VOLTAGE=5.0V 8 16
I92
VOLTAGE=5.0V PP_STRB_DRIVER_TO_LED_COOL 8 16
VOLTAGE=1.8V
I96
I38
PP_PMU_VREF 13

VOLTAGE=14V PP_SAGE_VBST_OUTH 24
I37

VOLTAGE=5.0V PP_TIGRIS_VBUS_DET 14
I40
VOLTAGE=1.8V PP_CODEC_TO_MIC1_BIAS 10 18 PP1V8_PLL
I93
VOLTAGE=1.8V PP_EXTMIC_BIAS_IN 10 PP_MIPIOD_VREG
I97
VOLTAGE=1.8V BOARD_ID0
I98 PP_EXTMIC_BIAS_FILT 10 VOLTAGE=2.5V
VOLTAGE=1.8V PP_CODEC_TO_FRONTMIC3_BIAS 10 11 I41 PP_PMU_VDD_REF 13
I99 VOLTAGE=1.8V PP_EXTMIC_BIAS 10
VOLTAGE=1.8V PP_CODEC_TO_REARMIC2_BIAS I42
8 10
I100 VOLTAGE=1.8V PP1V8_XTAL 2
VOLTAGE=1.8V PP_CODEC_FILT+ 10 I43
I101 VOLTAGE=1.8V PP_PMU_VDD_RTC 13
VOLTAGE=2.2V PP_CODEC_SPKR_VQ 10 I44
I103
VOLTAGE=2.5V PP_CODEC_VCPFILT- 10
I140 VOLTAGE=4.6V PP_BATT_VCC 14 16 25 40 45 46
VOLTAGE=2.5V PP_CODEC_VCPFILT+ 10 I46
I104 VOLTAGE=1.8V PP1V8_MESA_CONN
B B
21
VOLTAGE=2.5V PP_CODEC_VHP_FLYN 10 I48
I106 VOLTAGE=3.0V PP3V0_PROX_CONN 11
VOLTAGE=0.2V PP_CODEC_VHP_FLYC 10 I47
I105
VOLTAGE=2.5V PP_CODEC_VHP_FLYP 10
I107
VOLTAGE=1.8V PP1V8_FCAM_CONN 11
I108
VOLTAGE=3.0V PP2V85_FCAM_AVDD_CONN 11 VOLTAGE=1.0V
I109 I50 PP0V95_FIXED_SOC 4 7 12
VOLTAGE=1.8V PP_CODEC_TO_FRONTMIC3_BIAS_CONN 11
I110 VOLTAGE=1.0V PP0V95_FIXED_SOC_PCIE 7
VOLTAGE=3.0V PP3V0_ALS_CONN 11 I51
I111
VOLTAGE=1.2V VOLTAGE=1.2V PP1V2_PLL
I113 PP1V2_FCAM_VDDIO_CONN 11 I52 2

VOLTAGE=5.0V PP5V0_USB 12 14 17 18 25 VOLTAGE=1.0V PP_BUCK5_LX1 12


I112 I53
VOLTAGE=5.0V PP5V0_USB_TO_PMU 12 VOLTAGE=1.0V
I114 I54 PP_VAR_SOC 5 12
VOLTAGE=4.6V PP_BUCK5_LX0 12
I116
VOLTAGE=4.6V PP_BUCK3_LX 12
I115
VOLTAGE=4.6V PP_BUCK4_LX 12
I117 VOLTAGE=5.0V PMID_CAP 14
VOLTAGE=4.6V PP_BUCK2_LX 12 I141
I118
VOLTAGE=4.6V VOLTAGE=5.0V CHARGER_LDO
I120 PP_BUCK1_LX1 12 I147 14

VOLTAGE=4.6V VOLTAGE=4.6V CHG_BOOT


I119 PP_BUCK1_LX0 12 I148 14

VOLTAGE=4.6V PP_BUCK0_LX3 12 VOLTAGE=4.6V CHG_LX 14


I121 I149
VOLTAGE=4.6V PP_BUCK0_LX2 12
I122 VOLTAGE=3.0V VIBE_DRIVE_P 14 18
VOLTAGE=4.6V PP_BUCK0_LX1 12 I150
I126
VOLTAGE=4.6V VOLTAGE=3.0V VIBE_DRIVE_N
I124 PP_BUCK0_LX0 12 I151 14 18

VOLTAGE=6.0V PP_CHESTNUT_LXP 15
I125
VOLTAGE=6.0V PP_CHESTNUT_CP 15 VOLTAGE=1.8V
I123
I152
PP_RCAM_AF_CONN 23
VOLTAGE=6.0V PP_CHESTNUT_CN 15 VOLTAGE=-14.0V
I127
I154
PN_SAGE_VBST_OUTL 24
VOLTAGE=5.7V PP5V7_SAGE_AVDDH 15 24 VOLTAGE=-12.0V PN_SAGE_TO_TOUCH_VCPL_FILT 24
I128
I153
VOLTAGE=5.7V PP5V7_LCM_AVDDH 15 20
I129 VOLTAGE=2.7V PP_BB_VDD_2V7_CONN 18
VOLTAGE=5.1V PP5V1_GRAPE_VDDH 15 24 I155
I130

A I131
VOLTAGE=22.0V
VOLTAGE=18.0V
PP_WLED_LX 15
PP18V0_MESA_SW 15
A
I132 PAGE TITLE
I133

I134
VOLTAGE=17.0V
VOLTAGE=16.5V
P17V0_MOJAVE_LDOIN 15
PP16V5_MESA 15 21 25
SYSTEM:VOLTAGE PROPERTIES
VOLTAGE=8.0V PP_SPKAMP_SW 16 DRAWING NUMBER SIZE
I136
VOLTAGE=8.0V PP_L19_VBOOST 16 Apple Inc. 051-9903 D
I135
VOLTAGE=1.8V REVISION
PP_SPKAMP_FILT 16
I137
VOLTAGE=1.8V PP_SPKAMP_LDO_FILT 16
R
7.0.0
I138
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
26 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST
IV ALL RIGHTS RESERVED 26 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

N61 SPECIFIC
D D

C C
BOOTSTRAPPING (BOARD_REV, BOARD_ID, BOOT_CFG)

I6
3 BOARD_REV3 PP1V8 2 3 5 6 7 10 11 12 13 15 20 23
24 25 26
BOARD_REV[3:0]={GPIO34, GPIO35, GPIO36, GPIO37} 3 BOARD_REV0
I13 MAKE_BASE=TRUE
FLOAT=LOW, PULLUP=HIGH
1111 PROTOMLB1
1110 PROTOMLB2 NOSTUFF
1101 PROTO1
1100 PROTO2 3 BOARD_REV2 R0374 1ROOM=SOC 2 1.00K
1011 EVT 01005 MF 1/32W
B 1010
1001
EVT SPLIT CARBON DOE
CARRIER BUILD <--- SELECTED
5%
B
1000 DVT

26 3 BOARD_ID2 R0324 1ROOM=SOC 2 1.00K


01005 MF 5% 1/32W

BOARD_ID[4:0]={GPIO29, GPIO16, SPIO0_MISO, SPI0_MOSI, SPI0_SCLK}


FLOAT=LOW, PULLUP=HIGH 3 BOARD_ID1 R0325 1ROOM=SOC 2 1.00K
00100 N56, T133 MLB 01005 MF 5% 1/32W
00101 N56 DEV I11
00110 FIJI N61 MLB <--- SELECTED
3 BOOT_CONFIG1

BOOT_CONFIG[2:0]={GPIO28, GPIO25, GPIO18}


FLOAT=LOW, PULLUP=HIGH
000 SPI0
001 SPI0 TEST MODE
010 NAND <--- SELECTED
011 NAND TEST MODE
100 NVME
101 NVME TEST MODE
111 FAST SPI

A A
PAGE TITLE

SYSTEM:N61 SPECIFIC
DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
27 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST IV ALL RIGHTS RESERVED 27 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

D D

C C

B B

A A
PAGE TITLE

BLANK
DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
28 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST IV ALL RIGHTS RESERVED 28 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

RADIO_MLB HIERARCHICAL SYMBOL

D POWER D
POWER 26 17 15 14 13 12 10 4 3
PP1V8_SDRAM I314
MAKE_BASE=TRUE PP_WL_BT_VDDIO_AP 51

I315
VCC_MAIN, VBAT GOES TO RADIO_MLB DIRECTLY PP_STOCKHOLM_1V8_S2R 52 54

CHECK ALL PAGES IN RF SIDE! I407


RFFE_VIO_S2R 53

CELLULAR HOUSE KEEPING WLAN/BT HOUSE KEEPING


45_PMU_TO_WLAN_CLK32K I316
MAKE_BASE=TRUE CLK32K_AP
13 30 51
AP_TO_RADIO_ON_L I325
MAKE_BASE=TRUE RADIO_ON_L I317
3 30 32
13
PMU_TO_WLAN_REG_ON MAKE_BASE=TRUE WLAN_REG_ON 30 51
BB_TO_AP_RESET_DET_L I324
MAKE_BASE=TRUE BB_RESET_DET_L I318
3 30 35
13
WLAN_TO_PMU_HOST_WAKE MAKE_BASE=TRUE HOST_WAKE_WLAN 30 51
PMU_TO_BB_RST_L I326
MAKE_BASE=TRUE RF_PMIC_RESET_L I319
13 30 32
13
PMU_TO_BT_REG_ON MAKE_BASE=TRUE BT_REG_ON 30 51
AP_TO_BB_RST_L I327
MAKE_BASE=TRUE BB_RST_L I320
3 30 32
3
AP_TO_BT_WAKE MAKE_BASE=TRUE WAKE_BT 30 51
BT_TO_PMU_HOST_WAKE I321
MAKE_BASE=TRUE HOST_WAKE_BT
13 51
AP_TO_BB_WAKE_MODEM I329
MAKE_BASE=TRUE AP_WAKE_MODEM
3 35
BB_TO_PMU_HOST_WAKE_L I328
MAKE_BASE=TRUE BB_WAKE_HOST_L
13 30 35
BB_TO_AP_IPC_GPIO I331
MAKE_BASE=TRUE BB_IPC_GPIO
3 35
BB_TO_LEDDRV_GSM_BLANK I330
MAKE_BASE=TRUE GSM_TXBURST_IND
16 35
BB_TO_AP_GPS_SYNC I332
MAKE_BASE=TRUE BB_GPS_SYNC
3 30 35

HSIC IPC 3 AP_TO_WLAN_JTAG_SWCLK


I333
MAKE_BASE=TRUE WLAN_JTAG_SWDCLK 30 51
50_AP_BI_BB_HSIC1_DATA I368 50_BB_HSIC_DATA I334
2
MAKE_BASE=TRUE
30 34 3 AP_TO_WLAN_JTAG_SWDIO MAKE_BASE=TRUE WLAN_JTAG_SWDIO 30 51
50_AP_BI_BB_HSIC1_STB I369 50_BB_HSIC_STROBE I335 WLAN_PCIE_WAKE_L
13 WLAN_TO_PMU_PCIE_WAKE_L
MAKE_BASE=TRUE MAKE_BASE=TRUE
2 30 34 30 51
AP_TO_BB_HOST_RDY I371 BB_HOST_RDY I336
3 AP_TO_WLAN_DEVICE_WAKE PCIE_DEV_WAKE
MAKE_BASE=TRUE MAKE_BASE=TRUE
3 30 35 30 51
BB_TO_AP_DEVICE_RDY I370 BB_DEVICE_RDY I337 90_WLAN_PCIE_TDP
7 90_WLAN_TO_AP_PCIE1_RXDP_P
MAKE_BASE=TRUE MAKE_BASE=TRUE
3 30 35 30 51
I372 I340
C 3 BB_TO_AP_IPC_GPIO1 MAKE_BASE=TRUE BB_IPC_GPIO1 35 7 90_WLAN_TO_AP_PCIE1_RXDP_N

7 90_AP_TO_WLAN_PCIE1_TXDP_P
MAKE_BASE=TRUE
I338
MAKE_BASE=TRUE
I339
90_WLAN_PCIE_TDN
90_WLAN_PCIE_RDP
30 51

30 51
C
UART IPC 7 90_AP_TO_WLAN_PCIE1_TXDP_N

7 90_AP_TO_WLAN_PCIE1_REFCLK1_P
MAKE_BASE=TRUE
I342
MAKE_BASE=TRUE
90_WLAN_PCIE_RDN
90_WLAN_PCIE_REFCLK_P
30 51

51
AP_TO_BB_UART2_RTS_L I373 BB_UART_CTS_L I341 90_WLAN_PCIE_REFCLK_N
7 90_AP_TO_WLAN_PCIE1_REFCLK1_N
MAKE_BASE=TRUE MAKE_BASE=TRUE
3 30 35 51
BB_TO_AP_UART2_CTS_L I376 BB_UART_RTS_L I344 WLAN_PCIE_CLKREQ_L
7 WLAN_TO_AP_PCIE1_CLKREQ_L
MAKE_BASE=TRUE MAKE_BASE=TRUE
3 30 35 30 51
AP_TO_BB_UART2_TXD I374 BB_UART_RXD I343 WLAN_PCIE_PERST_L
7 AP_TO_WLAN_PCIE1_RST_L
MAKE_BASE=TRUE MAKE_BASE=TRUE
17 3 30 35 30 51
BB_TO_AP_UART2_RXD I375
MAKE_BASE=TRUE BB_UART_TXD
17 3 30 35

AUDIO I2S
45_AP_TO_BB_I2S3_BCLK I377
MAKE_BASE=TRUE BB_I2S_CLK
3 35
I378
3

3
AP_TO_BB_I2S3_DOUT
BB_TO_AP_I2S3_DIN
MAKE_BASE=TRUE
I379
MAKE_BASE=TRUE
BB_I2S_RXD
BB_I2S_TXD
30 35

30 35
WLAN HSIC IPC
AP_TO_BB_I2S3_LRCLK I380
MAKE_BASE=TRUE BB_I2S_WS
3 30 35
WLAN_TO_AP_UART4_RXD MAKE_BASE=TRUE
I345 WLAN_UART_TXD
3 30 51
AP_TO_WLAN_UART4_TXD MAKE_BASE=TRUE
I348 WLAN_UART_RXD
OSCAR UART 3

3
WLAN_TO_AP_UART4_CTS_L I347
MAKE_BASE=TRUE WLAN_UART_RTS_L
30 51

30 51
OSCAR_TO_BB_UART_TXD I382
MAKE_BASE=TRUE BB_OTHER_RXD AP_TO_WLAN_UART4_RTS_L I346
MAKE_BASE=TRUE WLAN_UART_CTS_L
22 30 35 3 30 51
BB_TO_OSCAR_UART_RXD I381
MAKE_BASE=TRUE BB_OTHER_TXD
22 30 35

BB DEBUG INTERFACES BT UART IPC


AP_TO_BT_UART1_RTS_L I349
MAKE_BASE=TRUE BT_UART_CTS_L
3 51
BT_TO_AP_UART1_CTS_L I352
MAKE_BASE=TRUE BT_UART_RTS_L
3 51
AP_TO_BT_UART1_TXD I351
MAKE_BASE=TRUE BT_UART_RXD
3 30 51
AP_TO_BB_COREDUMP I384
MAKE_BASE=TRUE BB_CORE_DUMP I350
3 30 35
3
BT_TO_AP_UART1_RXD MAKE_BASE=TRUE BT_UART_TXD 30 51
PMU_TO_BB_VBUS_DET I387
MAKE_BASE=TRUE BB_USB_VBUS
B
13

17
90_TRISTAR_BI_BB_USB_N
90_TRISTAR_BI_BB_USB_P
I386
MAKE_BASE=TRUE
I388
MAKE_BASE=TRUE
90_BB_USB_N
90_BB_USB_P
30 34

30 34
BT AUDIO PCM B
17 30 34

45_AP_TO_BT_I2S1_BCLK I354
MAKE_BASE=TRUE BT_PCM_CLK
3 51

RADIO ANTENNA CONTROL 3

3
AP_TO_BT_I2S1_DOUT
BT_TO_AP_I2S1_DIN
I353
MAKE_BASE=TRUE
I355
MAKE_BASE=TRUE
BT_PCM_IN
BT_PCM_OUT
51

51
PP_BB_VDD_2V7 I389
MAKE_BASE=TRUE PP_LDO14_RFSW I356
18 31 41 42
3
AP_TO_BT_I2S1_LRCLK MAKE_BASE=TRUE BT_PCM_SYNC 51
BB_GPIO0 I390
MAKE_BASE=TRUE BB_LAT_GPIO0
18 35
BB_GPIO2 I391 BB_LAT_GPIO2
OSCAR STATES
MAKE_BASE=TRUE
18 35
BB_GPIO3 I392
MAKE_BASE=TRUE BB_LAT_GPIO3
18 35
BB_GPIO4 I394 BB_LAT_GPIO4 I358
18
MAKE_BASE=TRUE
35
22
OSCAR_TO_RADIO_CONTEXT_A MAKE_BASE=TRUE OSCAR_CONTEXT_A 51
OSCAR_TO_RADIO_CONTEXT_B MAKE_BASE=TRUE
I357 OSCAR_CONTEXT_B
22 51

FCT TESTING STOCKHOLM


RADIO_TO_PMU_ADC_SMPS1 I395
MAKE_BASE=TRUE ADC_SMPS1 STOCKHOLM_TO_AP_UART3_CTS_L I359
MAKE_BASE=TRUE STOCKHOLM_RTS_L
13 30 3 30 52

13
RADIO_TO_PMU_ADC_PP_LDO11_VDDIO MAKE_BASE=TRUEI396 ADC_PP_LDO11 30 3
AP_TO_STOCKHOLM_UART3_RTS_L I360
MAKE_BASE=TRUE STOCKHOLM_CTS_L 30 52
RADIO_TO_PMU_ADC_PP_LDO5_SIM MAKE_BASE=TRUE
I398 ADC_PP_LDO5 STOCKHOLM_TO_AP_UART3_RXD I361 STOCKHOLM_UART_TXD
MAKE_BASE=TRUE
13 30 3 30 52
RADIO_TO_PMU_ADC_SMPS4 MAKE_BASE=TRUE
I397 ADC_SMPS4 AP_TO_STOCKHOLM_UART3_TXD I363
MAKE_BASE=TRUE STOCKHOLM_UART_RXD
13 30 3 30 52
AP_TO_STOCKHOLM_DWLD_REQ I362 STOCKHOLM_FW_DWLD_REQ
MAKE_BASE=TRUE
7 52
STOCKHOLM_TO_PMU_HOST_WAKE I364
MAKE_BASE=TRUE STOCKHOLM_HOST_WAKE

UPPER RADIO ANTENNA CONTROL


13 30 52
AP_TO_STOCKHOLM_EN I365
MAKE_BASE=TRUE STOCKHOLM_ENABLE
7 52
PP3V0_TRISTAR I366
MAKE_BASE=TRUE STOCKHOLM_VDD_MUX_3V0
29 26 17 15 12 54
AP_TO_STOCKHOLM_SIM_SEL I367 STOCKHOLM_SIM_SEL
MAKE_BASE=TRUE
I410 50_WIFI_5G_CONN_ANT 3 54
25 50_AP_WIFI_5G_CONN_ANT MAKE_BASE=TRUE
50 I406
25 AP_TO_STOCKHOLM_ANT MAKE_BASE=TRUE STOCKHOLM_ANT 52

I409
MAKE_BASE=TRUE 50_UPPER_ANT_FEED
50_AP_UAT_FEED
A
25 50

UAT_ANT_GND I411
MAKE_BASE=TRUE ANT_GND 50
PAGE TITLE
A
29 26 17 15 12
PP3V0_TRISTAR I404
MAKE_BASE=TRUE PAC_VDD_3V0 53
CELL:ALIASES
DRAWING NUMBER SIZE
I412
25 8 NORTH_AC_GND_SCREW MAKE_BASE=TRUE NORTH_ANT_GND 50
Apple Inc. 051-9903 D
REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
30 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUESTIV ALL RIGHTS RESERVED 29 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

AP INTERFACE & DEBUG CONNECTORS


PROBE POINTS
PP3105_RF PP3121_RF PP3115_RF PP3130_RF PP3141_RF PP3170_RF
D P2MM
SM
PP
1 CLK32K_AP 29 51
P2MM-NSM
SM
PP
1 STOCKHOLM_HOST_WAKE 29 52
P4MM-NSM
SM
PP
1 50_BB_HSIC_STROBE 29 34
P4MM
SM
PP
1 BB_JTAG_RST_L 34
P4MM
SM
PP
1 BB_UART_TXD 29 35
P4MM
SM
PP
1 RFFE1_CLK
35 39 40 41 42 43 44
D
WIFI_BT RADIO_STOCKHOLM SIM_DEBUG SIM_DEBUG SIM_DEBUG RF_DEBUG
PP3113_RF PP3122_RF PP3116_RF PP3131_RF PP3142_RF PP3171_RF
P4MM P4MM P4MM-NSM P4MM P4MM P4MM
SM SM SM SM SM SM RFFE1_DATA
PP
1 BB_COEX_UART_RXD 35 51 PP
1 BB_REQUEST_XO_CLK 32 52 PP
1 50_BB_HSIC_DATA 29 34 PP
1 BB_JTAG_TCK 34 PP
1 BB_UART_RXD 29 35 PP
1 35 39 40 41 42 43 44
WIFI_BT SIM_DEBUG SIM_DEBUG SIM_DEBUG SIM_DEBUG RF_DEBUG
PP3114_RF PP3123_RF PP3172_RF
P4MM P2MM-NSM PP3101_RF PP3132_RF PP3143_RF P4MM
SM
1 BB_COEX_UART_TXD
SM
1 STOCKHOLM_UART_RXD P4MM P4MM P4MM SM
1 RFFE2_CLK
SM SM SM
PP
WIFI_BT
35 51 PP
RADIO_STOCKHOLM
29 52
PP
1 BB_DEBUG_ERROR 35 PP
1 BB_JTAG_TMS 34 PP
1 BB_UART_RTS_L 29 35
PP
RF_DEBUG
35 45 46 48

SIM_DEBUG SIM_DEBUG SIM_DEBUG


PP3119_RF PP3124_RF PP3173_RF
P2MM P2MM PP3102_RF PP3133_RF PP3144_RF P4MM
SM SM
1 STOCKHOLM_UART_TXD P4MM P4MM P4MM SM
1 RFFE2_DATA
1 BT_UART_TXD SM SM SM
PP 29 51 PP
RADIO_STOCKHOLM
29 52
PP
1 RF_PMIC_RESET_L 29 32 PP
1 BB_JTAG_TDO 34 PP
1 BB_UART_CTS_L 29 35
PP
RF_DEBUG
35 45 46 48

WIFI_BT SIM_DEBUG SIM_DEBUG SIM_DEBUG


PP3120_RF PP3125_RF PP3175_RF
P2MM-NSM P2MM-NSM PP3103_RF PP3134_RF PP3145_RF P4MM BB_I2S_WS
SM SM
1 STOCKHOLM_CTS_L P4MM P4MM P4MM SM
1
1 BT_UART_RXD SM SM SM
PP 29 51 PP
RADIO_STOCKHOLM
29 52
PP
1 PS_HOLD_PMIC 32 PP
1 BB_JTAG_TDI 34 PP
1 BB_HOST_RDY 29 35
PP
RF_DEBUG
29 35

WIFI_BT SIM_DEBUG SIM_DEBUG SIM_DEBUG


PP3126_RF PP3176_RF
PP3152_RF P2MM-NSM PP3127_RF PP3135_RF PP3146_RF P4MM
P2MM SM
1 STOCKHOLM_RTS_L P4MM P4MM P4MM SM
1
BB_I2S_RXD
SM SM SM SM
PP
1 WAKE_BT 29 51
PP
RADIO_STOCKHOLM
29 52
PP
1 PMIC_RESOUT_L 32 34 PP
1 BB_JTAG_TRST_L 34 PP
1 BB_DEVICE_RDY 29 35
PP
RF_DEBUG
29 35

WIFI_BT SIM_DEBUG SIM_DEBUG SIM_DEBUG


PP3128_RF PP3177_RF
PP3153_RF P2MM PP3104_RF PP3136_RF PP3147_RF P4MM
P2MM SM
1 PP_PN65_VCC_SIM P4MM P4MM P4MM SM
1
BB_I2S_TXD
SM SM SM SM
PP
1 WLAN_REG_ON 29 51
PP
RADIO_STOCKHOLM
52
PP
1 MDM_CLK 32 34 PP
1 BB_DEBUG_STATUS 35 PP
1 BB_GPS_SYNC 29 35
PP
RF_DEBUG
29 35

WIFI_BT SIM_DEBUG SIM_DEBUG SIM_DEBUG


PP3174_RF PP3178_RF
PP3154_RF P4MM PP3109_RF PP3137_RF PP3148_RF P4MM
P4MM SM
1
P4MM P4MM P4MM SM
1
BB_OTHER_TXD
SM STOCKHOLM_SIM_SWP SM SM SM
PP
1 BT_REG_ON 29 51
PP
SIM_DEBUG
52 54
PP
1 PP_LDO11 30 31 33 34 35 37 38 PP
1 BB_CORE_DUMP 29 35 PP
1 BB_WAKE_HOST_L 29 35
PP
RF_DEBUG
29 35

WIFI_BT SIM_DEBUG 39 SIM_DEBUG SIM_DEBUG


PP3129_RF PP3179_RF
PP3155_RF P4MM PP3110_RF PP3138_RF PP3149_RF P4MM
P2MM SM
1 P4MM P4MM P4MM SM
1
BB_OTHER_RXD
SM REF_CLK_FROM_BB 32 52 SM SM SM 29 35
1 HOST_WAKE_WLAN PP
SIM_DEBUG PP
1 RADIO_ON_L 29 32 PP
1 BB_USB_VBUS 29 34 PP
1 BB_RESET_DET_L 29 35
PP
RF_DEBUG
PP 29 51
SIM_DEBUG SIM_DEBUG SIM_DEBUG

C PP3156_RF
P2MM
WIFI_BT
PP3165_RF
P4MM
SM
PP3111_RF
P4MM
SM
PP3139_RF
P4MM
SM
PP3150_RF
P4MM
SM
C
SM
1 WLAN_PCIE_WAKE_L PP
1 DSDS_SIM_CLK 34 54 PP
1 SPMI_DATA 32 34 PP
1 90_BB_USB_N 29 34 PP
1 BB_RST_L 29 32
PP 29 51
SIM_DEBUG SIM_DEBUG SIM_DEBUG SIM_DEBUG
WIFI_BT
PP3183_RF PP3112_RF PP3140_RF PP3151_RF
PP3157_RF P4MM P4MM P4MM P4MM
P2MM SM
1
SM
1 SPMI_CLK SM
1 90_BB_USB_P
SM
1 BOOT_HSIC
SM DSDS_SIM_RESET 34 54 32 34 29 34 30 35
1 WLAN_PCIE_PERST_L 29 51
PP
SIM_DEBUG
PP
SIM_DEBUG
PP
SIM_DEBUG
PP
SIM_DEBUG
PP
WIFI_BT PP3184_RF
PP3158_RF P4MM
P2MM SM
1
SM DSDS_SIM_DATA
PP
1 WLAN_PCIE_CLKREQ_L 29 51
PP
SIM_DEBUG
34 54

WIFI_BT
PP3186_RF
PP3159_RF P4MM
P4MM SM
1
SM DSDS_SIM_DETECT
PP
1 PCIE_DEV_WAKE 29 51
PP
SIM_DEBUG
34
TABLE_ALT_HEAD

WIFI_BT PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS:
PP3160_RF PP3187_RF PART NUMBER
P2MM P4MM
SM SM TABLE_ALT_ITEM

1 WLAN_UART_RTS_L 1 PP_LDO6 31 33 54 197S0565 197S0593 ALTERNATE Y3301_RF KDS 19.2MHZ XTAL


29 51 PP
PP SIM_DEBUG
WIFI_BT
TABLE_ALT_ITEM

PP3161_RF PP3188_RF 197S0598 197S0593 ALTERNATE Y3301_RF AVX 19.2MHZ XTAL


P2MM P4MM
SM SM TABLE_ALT_ITEM

1 WLAN_UART_CTS_L 1 DSDS_SIM_SWP 54 138S00005 138S00003 ALTERNATE C3216_RF 15UF CAPACITOR


PP 29 51 PP
SIM_DEBUG
WIFI_BT
TABLE_ALT_ITEM

138S0739 138S0706 ALTERNATE C4207_RF 1.0UF CAPACITOR


PP3162_RF PP3189_RF
P2MM P4MM TABLE_ALT_ITEM

SM SM 138S0945 138S0706 ALTERNATE C4207_RF 1.0UF CAPACITOR


PP
1 WLAN_UART_RXD 29 51 PP
1 DSDS_SIM_DATA_R 54
SIM_DEBUG
TABLE_ALT_ITEM

WIFI_BT 138S1103 138S0719 ALTERNATE C4007_RF 4.7UF CAPACITOR


PP3163_RF 39 38 37 35 34 33 31 30
PP_LDO11
P2MM TABLE_ALT_ITEM

SM 339S0231 339S0228 ALTERNATE U5201_RF CORONA MODULE USI


PP
1 WLAN_UART_TXD 29 51 PP_3178_RF
WIFI_BT P2MM-NSM TABLE_ALT_ITEM

RADIO_BB RADIO_BB RADIO_BB


SM 339S0242 339S0228 ALTERNATE U5201_RF CORONA MODULE TDK
1 BB_SIM_RESET 1 1 1
PP3190_RF PP 30 35
TABLE_ALT_ITEM
R3102_RF R3103_RF R3104_RF
P2MM 10K 10K 10K
B SM
PP
1 WLAN_JTAG_SWDCLK 29 51
PP_3179_RF
P2MM-NSM
SM
1
155S00024 155S0950 ALTERNATE F_TRI_RF TRIPLEXER BIN2
1%
1/32W
MF
1%
1/32W
MF
1%
1/32W
MF
B
WIFI_BT
PP BB_SIM_CLK 30 35 01005 2 01005 2 01005 2
PP3191_RF
P2MM
SM PP_3180_RF BOOT_HSIC
PP
1 WLAN_JTAG_SWDIO 29 51 P2MM-NSM
35 30

WIFI_BT SM
1 35 BOOT_HSIC_USB
PP BB_SIM_DATA 30 35
35 WATCHDOG_DISABLE
PP_3183_RF
P2MM-NSM
SM
PP
1 BB_SIM_DETECT 30 35

PP_3184_RF
P2MM-NSM
SM
1
SIM CARD ESD PROTECTION
PP PP_LDO5 30 31 33 54

PP3166_RF
P4MM DZ3102_RF
SM 5.5V-6.2PF
PP
1 90_WLAN_PCIE_RDN 29 51
WIFI_BT
35 30
BB_SIM_DETECT 1 2
PP3167_RF
P4MM
SM
1 90_WLAN_PCIE_RDP 0201
PP

PP3168_RF
P4MM-NSM
WIFI_BT
29 51

SIM CARD CONNECTOR VR3101_RF


ESDAVLC5-4BU4
SM
SM
1 90_WLAN_PCIE_TDN 29 51
PP
WIFI_BT 35 30
BB_SIM_DATA 1 4 4FF_SIM_SWP 30 54
54 33 31 30 PP_LDO5 PP_LDO5 30 31 33 54
PP3169_RF

GND
P4MM-NSM 1 1 DZ3101_RF BB_SIM_RESET 2 3 BB_SIM_CLK
SM C3101_RF
1 90_WLAN_PCIE_TDP 1 35 30 30 35
PP 29 51
R3101_RF 2.2UF 12V-33PF
WIFI_BT
15.00K
1%
20%
2 6.3V 2
01005-1
1

1/32W X5R

5
0201-1
DIFF-PAIR PROBE POINTS LOCATED OPPOSITE DC-BLOCKS VCC MF
A J3101_RF 201005
SYNC_MASTER=N/A SYNC_DATE=N/A A
BB_SIM_RESET 2 RSTSIMCARD-RCPT-N61I/O 7 BB_SIM_DATA PAGE TITLE
35 30 IN F-ST-SM BI 30 35

XW3101_RF
SHORT-10L-0.1MM-SM
AP INTERFACE & DEBUG CONNECTORS
35 30 IN
BB_SIM_CLK 3 CLK DETECT 12 BB_SIM_DETECT
OUT 30 35 DRAWING NUMBER SIZE
VREG_SMPS1_0V90 1 2 ADC_SMPS1
33 31

XW3102_RF
OUT 29

Apple Inc. 051-9903 D


SHORT-10L-0.1MM-SM SWP 6 4FF_SIM_SWP
BI 30 54 REVISION
GND
38 37 35 34 33 31 30
39
PP_LDO11 1 2 ADC_PP_LDO11
OUT 29
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY:
8
9
10
11
13
5

XW3103_RF BRANCH
SHORT-10L-0.1MM-SM
PP_LDO5 ADC_PP_LDO5 THE INFORMATION CONTAINED HEREIN IS THE
54 33 31 30 1 2 OUT 29 PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
XW3104_RF
SHORT-10L-0.1MM-SM I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
31 OF 55
31
VREG_SMPS4_2V075 1 2 ADC_SMPS4 29 SHEET
OUT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST IV ALL RIGHTS RESERVED 30 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

BASEBAND PMU (1 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

SWITCHERS OUTPUT CAPS


33 31 30 VREG_SMPS1_0V90 31 VREG_SMPS2_1V25
D RADIO_PMIC
1 C3229_RF
RADIO_PMIC
1 C3231_RF
RADIO_PMIC
1 C3233_RF
RADIO_PMIC
1 C3235_RF
RADIO_PMIC RADIO_PMIC
1 C3249_RF 1 C3251_RF
RADIO_PMIC
1 C3259_RF
RADIO_PMIC
1 C3260_RF
RADIO_PMIC
1 C3237_RF
RADIO_PMIC
1 C3239_RF
RADIO_PMIC
1 C3242_RF
RADIO_PMIC
1 C3244_RF
RADIO_PMIC RADIO_PMIC
1 C3253_RF 1 C3255_RF
RADIO_PMIC
1 C3258_RF
RADIO_PMIC
1 C3261_RF
RADIO_PMIC
1 C3262_RF
D
20UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
20UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2 6.3V
CERM-X5R
6.3V
2 X5R 2 6.3V
X5R 2 6.3V
X5R
6.3V
2 X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
CERM-X5R 2 6.3V
X5R
6.3V
2 X5R 6.3V
2 X5R 6.3V
2 X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R 2 6.3V
X5R
0402 0201-1 0201-1 0201-1 0201-1 0201-1 0201-1 0201-1 0402 0201-1 0201-1 0201-1 0201-1 0201-1 0201-1 0201-1 0201-1
23 17 16 15 14 12 10 PP_VCC_MAIN
52 51 48 39 31 26

RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC


1 C3270_RF 1 C3224_RF 1 C3223_RF 1 C3222_RF 1 C3216_RF 1 C3221_RF
5%
100PF 2.2UF
20%
2.2UF
20%
2.2UF
20%
15UF
20%
15UF
20%
16V
2 NP0-C0G 2 6.3V 2 6.3V 2 6.3V 6.3V
2 X5R 2 6.3V
X5R X5R X5R X5R
01005 0201-1 0201-1 0201-1 0402-1 0402-1
VREG_SMPS3_0V95 31 VREG_SMPS4_2V075 30 31

RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC RADIO_PMIC
1 C3230_RF 1 C3232_RF 1 C3234_RF 1 C3236_RF 1 C3250_RF 1 C3252_RF 1 C3257_RF 1 C3238_RF 1 C3240_RF 1 C3241_RF 1 C3243_RF 1 C3254_RF 1 C3256_RF
20UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
20UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2.2UF
20%
2 6.3V
CERM-X5R
6.3V
2 X5R 2 6.3V
X5R 2 6.3V
X5R
6.3V
2 X5R 2 6.3V
X5R 2 6.3V
X5R
6.3V
2 CERM-X5R 2 6.3V
X5R 2 6.3V
X5R
6.3V
2 X5R 6.3V
2 X5R 6.3V
2 X5R
0402 0201-1 0201-1 0201-1 0201-1 0201-1 0201-1 0402 0201-1 0201-1 0201-1 0201-1 0201-1

C VREG_RF_CLK_BYP C
AVDD_BYP
1 RADIO_PMIC
SWITCHERS BULK CAPS REF_BYP
U_PMICRF
PM8019
C3228_RF
20%
2 10V
1.0UF

RADIO_PMIC 1 RADIO_PMIC
C3227_RF BGA X5R-CERM
1 C3226_RF 0201-1
0.1UF SYM 5 OF 5
1.0UF 20% 26 VDD_INT_BYP VREG_RFCLK 91
52
PP_VCC_MAIN VBATT_S1 20% 4V
2 X5R RADIO_PMIC
17 16 15 14 12 10
51 48 39 31 26 23
IN MAKE_BASE=TRUE
31 10V
2 X5R-CERM 21 REF_BYP REG VREG_XO 74 VREG_XO_PMIC
01005 L3201_RF
VBATT_S1 0201-1 15 GND_REF
31
VREG_S1 27 2.2UH-20%-1.5A-0.160OHM
22 PP_VSW_S1 1 2 MAKK2016-SM 1235MA VREG_SMPS1_0V90
1 RADIO_PMIC 31 VBATT_S1 VDD_S1 VSW_S1_1 11 OUT 30 31 33
C3217_RF VOLTAGE=4.50V RADIO_PMIC
15UF 88 VSW_S1_2 16
20% 31 VBATT_S2 VDD_S2 L3203_RF
6.3V
2 X5R 94 VDD_S2 VREG_S2 82 2.2UH-20%-1.5A-0.160OHM
0402-1 PP_VSW_S2 1100MA VREG_SMPS2_1V25
47 VSW_S2 93 1 2 MAKK2016-SM
RADIO_PMIC OUT 31
31 VBATT_S3 VDD_S3 VOLTAGE=4.50V L3204_RF
VREG_S3 62
2.2UH-20%-1.5A-0.160OHM
VBATT_S4 1
52
17 16 15 14 12 10 IN PP_VCC_MAIN VBATT_S2 31
31 VDD_S4
VSW_S3_1 53
PP_VSW_S3 1 2 MAKK2016-SM 1350MA VREG_SMPS3_0V95 OUT 31
MAKE_BASE=TRUE
51 48 39 31 26 23
92 VOLTAGE=4.50V RADIO_PMIC
31 VREG_SMPS2_1V25 VDD_L1 VSW_S3_2 58
VBATT_S2 31 L3202_RF
31 30 VREG_SMPS4_2V075 2 VDD_L2_3 VREG_S4 23 2.2UH-20%-1.2A-0.15OHM
1 RADIO_PMIC PP_VSW_S4 1 2 0806 550MA VREG_SMPS4_2V075
C3218_RF 4 VSW_S4_1 6 OUT 30 31
15UF
20%
VDD_L7_8_11
VSW_S4_2 12
VOLTAGE=4.50V
6.3V 31 30 VREG_SMPS4_2V075 77
2 X5R VDD_L9 VREG_RX VOLTAGE=1.225V
0402-1 VREG_L1 86 PP_LDO1 OUT 33 37 38
72 VDD_L10 VOLTAGE=1.80V
VREG_L2 7 PP_LDO2 OUT 33

VREG_SMPS3_0V95 38 VDD_L12 VOLTAGE=1.80V


B 52
17 16 15 14 12 10
51 48 39 31 26 23
IN PP_VCC_MAIN
MAKE_BASE=TRUE
VBATT_S3 31
31

VREG_SMPS4_2V075 85 VDD_XO_RFC
VREG_L3 8
VOLTAGE=3.075V
PP_LDO3 OUT 32 33
B
VREG_L4 68
31 30
VBATT_S3 31 PP_LDO4 OUT 33
49 GND VREG_SIM VOLTAGE=1.80V
1 RADIO_PMIC VREG_L5 59 PP_LDO5 OUT 30 33 54
C3219_RF 52
15UF MDM_VREF_LPDDR2 VREF_DDR2 VOLTAGE=1.80V
VREG_L6 48
34 OUT
20% 39
52
31
PP_LDO6 OUT 30 33 54
6.3V
2 X5R 17 16
PP_VCC_MAIN 43 VIN_VPH1 VOLTAGE=1.90V
VREG_L7 10
12 10 IN
0402-1 15
26
14
23
PP_LDO7 OUT 33 35
51 48 54 VIN_VPH2 VREG_TX VOLTAGE=2.05V
VREG_L8 3 PP_LDO8 OUT 37 38

VOLTAGE=1.20V
52
17 16 15 14 12 10 IN PP_VCC_MAIN
MAKE_BASE=TRUE
VBATT_S4 31 VREG_L9 71 PP_LDO9 OUT 33
51 48 39 31 26 23
VOLTAGE=0.90V
VBATT_S4 31 VREG_L10 83 PP_LDO10 OUT 33

VREG_IO VOLTAGE=1.80V
1 RADIO_PMIC VREG_L11 9 PP_LDO11 OUT 30 33 34 35 37 38 39
C3220_RF
15UF
20% VREG_L12 33
VOLTAGE=0.95V
PP_LDO12 OUT 33
6.3V
2 X5R VOLTAGE=2.95V
0402-1 VREG_L13 34 PP_LDO13 OUT 33 50

VOLTAGE=5.0V
VREG_L14 28 PP_LDO14_RFSW OUT 29 41 42

1 RADIO_PMIC
RADIO_PMIC
1 RADIO_PMIC
C3201_RF1 C3202_RF
RADIO_PMICRADIO_PMICRADIO_PMICRADIO_PMICRADIO_PMIC
RADIO_PMIC
1RADIO_PMIC
C3203_RF1 C3204_RF1 C3205_RF1 C3206_RF1 C3207_RF1 C3208_RF1 C3209_RF 1RADIO_PMIC
C3210_RF C3211_RF1
RADIO_PMIC
RADIO_PMIC
C3212_RF1 C3213_RF
RADIO_PMIC
1 C3214_RF RADIO_PMIC
1 C3215_RF
1.0UF 10UF 1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 1.0UF 10UF 10UF 10UF 1.0UF 10UF 1.0UF 1.0UF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
2 10V 2
6.3V
X5R-CERM 2 10V
CERM-X5R 2 10V
X5R-CERM2 10V 2 10V
X5R-CERM 2 10V
X5R-CERM 2 10V
X5R-CERM 2
6.3V
2
X5R-CERM
6.3V
2
6.3V
X5R-CERM 2
CERM-X5R CERM-X5R CERM-X5R
10V
X5R-CERM
6.3V
2 CERM-X5R
10V
2 X5R-CERM 10V
2 X5R-CERM
0201-1 0402-9 0201-1 0201-1 0201-1 0201-1 0201-1 0201-1 0402-9 0402-9 0402-9 0201-1 0402-9 0201-1 0201-1

A A
BASEBAND PMU (1 0F 2)
PAGE TITLE

DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
32 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 31 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

BASEBAND PMU (2 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
C401
R411
L400
U404
BOARD_IDREVISION
0.00V N61 PROTO_MLB1
D 0.50V N61 DEV3 D
0.70V N61 DEV4
0.90V N61 PROTO_MLB2
1.10V N61/N56 PROTO1
1.30V N61/N56 PROTO2 XTAL19M_IN 32

1.40V N61/N56 EVT1 1 RADIO_PMIC


R3304_RF
100K
1.50V N61/N56 EVT2 (CARRIER) 1%
1/32W
MF
201005
1.60V N61/N56 DVT NOSTUFF

1.70V N61/N56 PVT


RADIO_PMIC

Y3301_RF
19.2MHZ-10PPM-7PF-80OHM
2.0X1.6-SM
1 3 32 XTAL19M_IN U_PMICRF
RADIO_PMIC PM8019 RADIO_PMIC
RADIO_PMIC
33 32 31
PP_LDO3 4 2 BGA C3303_RF
IN
1000PF R3309_RF
90
SYM 2 OF 5
64 100 2
C R3305_RF
1
39K U_PMICRF XTAL19M_OUT 84
XTAL_19M_IN
XTAL_19M_OUT
CLOCK
XO_OUT_A0

XO_OUT_A1 67
50_A0_PMCLK
REF_CLK_FROM_BB
1

10%
2 1
50_PMIC_RF_CLK
1% MF
1/32W01005
50_RF_CLK
RADIO_PMIC
OUT
C
1% PM8019 73
OUT 30 52
6.3V 1 C3302_RF
BGA XO_OUT_D0_EN X5R-CERM
1/32W
MF SYM 4 OF 5
34 IN GND_XO
SLEEP_CLK 80 SLEEP_CLK_32K OUT
01005
34
18PF
5%
2 01005 BOARD_ID 39 MPP_01 MPP_GPIO GPIO_01 13 RADIO_PMIC 79 XO_OUT_D0_EN 16V
2 CERM
32
NC BB_GPS_ENABLE R3308_RF XO_OUT_D0 78 MDM_CLK
BOARD_ID 32 32 VINYL 29 MPP_02 GPIO_02 30 BB_REQUEST_XO_CLK IN 30 52
PP_LDO3 1
100K2 XO_THERM_Y1 57 XO_THERM
OUT 30 34
01005
NOSTUFF
VDDPX_BIAS 18 MPP_03 GPIO_03 55 33 32 31 IN
PA_THERM1 42
RADIO_PMIC
33 OUT NC 1% 46 GND_XOADC NC
CALCULATE 44 MPP_04 GPIO_04 19 1/32W PA_THERM2 32 PA_CTL_QFE
WITH 2M 1 NC NC MF 1 39

IN PARALLEL R3306_RF VREF_DAC_BIAS 35 MPP_05 GPIO_05 14 BB_BUA_SIM 01005 RADIO_PMIC


TO GND 200K
1%
35 OUT
24 MPP_06 GPIO_06 25
IN 35
1 C3301_RF BATT_ID_THERM 37
1/32W NC NC 1000PF R3310_RF
10%
MF
2 01005
6.3V
2 X5R-CERM 100KOHM-1%
01005 01005
RADIO_PMIC
2 NOSTUFF

PP_LDO3 31 32 33

1 RADIO_PMIC
R3311_RF
100K
1%
1/32W
MF
2 01005

VINYL 32
DEFAULT CONFIGURATION
SUPPORTS VINYL
B 1 RADIO_PMIC
R3312_RF B
100K
1% U_PMICRF
1/32W PM8019
MF
2 01005 BGA
NOSTUFF SYM 3 OF 5
5 GND_S1 GND 36
87 INPUT_PWR 40
GND_S2 GND
U_PMICRF 63 GND_S3 GND 41
PM8019 17 GND_S4 GND 50
RADIO_PMIC BGA 51
R3301_RF SYM 1 OF 5 GND
1.00K2 RADIO_ON_L 70 CBL_PWR* OPT 66 GND 60
BB_RST_L 1 29
30
IN
CONTROL NC
30 29 IN 31 PON_TRIG GND 61
1% MF GND 89 69
1/32W01005
RADIO_PMIC 75 GND
34 30 PMIC_RESOUT_L PON_RST*
GND 56
R3307_RF OUT
20.0K2 65
34 IN PS_HOLD 1 30 PS_HOLD_PMIC PS_HOLD GND 45
5% MF 20
1/32W0100530 29 IN RF_PMIC_RESET_L RESIN*

34 30 SPMI_CLK 81 SPMI_CLK
BI
34 30 SPMI_DATA 76 SPMI_DATA
BI

A A
PAGE TITLE

BASEBAND PMU (2 OF 2) DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
33 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 32 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

BASEBAND (1 OF 3)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
C538
R500
L500
U502
RADIO_BB
U_BB_RF
ASIC-MDM9625M-333P
BGA (EBI1 PAD)
PP_LDO10 (MSM CORE)
J15 SYM 5 OF 6 F19 PP_LDO9
33 31 IN VDD_CORE VDD_P1 IN 31 33
PWR
D
K14
K15
VDD_CORE
VDD_CORE
VDD_P1
VDD_P1
L19
L20
RADIO_BB
U_BB_RF
D
L13 VDD_CORE VDD_P1 M1 ASIC-MDM9625M-333P
L14 VDD_CORE VDD_P1 T19 BGA
A2 GND GND M10
M8 SYM 6 OF 6
VDD_CORE
VDD_P2 B20(SDC1 PAD)
PP_LDO13 A20 GND GND M11
M9 VDD_CORE
IN 31 33 50
GND
C14 M14
M12 VDD_CORE VDD_P3 B2 (GENIO PP_LDO11
PAD) GND GND
IN 30 31 33 34 35 37 38 39
C20 GND GND M15
M13 VDD_CORE VDD_P3 J19
E14 GND GND M20
N7 VDD_CORE VDD_P3 K2
F12 GND GND N1
N8 VDD_CORE VDD_P3 V2
F13 GND GND N6
N11 VDD_CORE VDD_P3 V5
F14 GND GND N9
N12 VDD_CORE VDD_P3 V19
F20 GND GND N10
P7 VDD_CORE
VDD_P4 R19 PP_LDO6 (UIM1 PAD) G7 GND GND N13
P10 VDD_CORE
IN
G11 GND GND N14
P11 VDD_CORE VDD_P5 U19 PP_LDO5 (UIM2 PAD)
IN G12 GND GND P6
PP_LDO12 (MSM MEMORY)
E15 V9 (HSIC PAD)
PP_LDO9 H6 P8
33 31 IN VDD_MEM VDD_P6 IN 31 33 GND GND
F8 VDD_MEM H7 GND GND P9
VREF_SDC A19 VDDPX_BIAS
F9 VDD_MEM
IN 32 33
H10 GND GND P12
VREF_UIM U20
F15 VDD_MEM H11 GND GND R20
G8 VDD_MEM VDD_USB_CORE V13 PP_LDO12 31 33
H14 GND GND T20
IN
K10 VDD_MEM H15 GND GND V20
VDD_USB_1P8 U11 PP_LDO2
L9 VDD_MEM
IN 31 33 J1 GND GND W1
L10 VDD_MEM VDD_USB_3P3 V10 PP_LDO4 31
J6 GND GND W5
IN
N15 VDD_MEM J9 GND GND W9
VDD_A2 C12 PP_LDO7
P14 VDD_MEM IN 31 33 35 J10 GND GND W20
VDD_A2 C9
P15 VDD_MEM J13 GND GND W12
R7 B12 J14 A12
C R8
VDD_MEM
VDD_MEM
VDD_A2
VDD_A1 B9 PP_LDO1 IN 31 33 37 38
K8
GND
GND
GND
GND A6 C
VDD_A2 C6 K9 GND GND E12
E5 VDD_MEM
VDD_A1 B6 K12 GND GND E9
(MODEM SUB SYSTEM)
VREG_SMPS1_0V90 F6 VDD_MODEM K13 A9
33 31 30 IN B15 GND GND
F7 VDD_MODEM VDD_A1 PP_LDO1 IN 31 33 37 38
K19 E6
GND GND
F10 VDD_MODEM VDD_PLL U13 PP_LDO10 31 33
K20 GND GND A17
IN
F11 VDD_MODEM VDD_PLL R12 L1 GND GND C17
G6 VDD_MODEM VDD_PLL D17 L7 GND GND B17
G9 VDD_MODEM VDD_PLL2 E16 PP_LDO3 31 32 33
L8 GND GND P13
IN
G10 VDD_MODEM L11 GND GND R13
VDD_ALWAYS_ON T17
G13 VDD_MODEM NC L12 GND GND R14
G14 VDD_MODEM VDD_DDR_CORE_1P8 J20(LPDDR2)
PP_LDO11 L15 GND
IN 30 31 33 34 35 37 38 39
GND A15
G15 VDD_MODEM VDD_DDR_CORE_1P8 K1 M6 GND
H8 VDD_MODEM M7
VDD_DDR_CORE_1P2 E20(LPDDR2_CORE)
PP_LDO9 GND
H9 VDD_MODEM IN 31 33

VDD_DDR_CORE_1P2 H1
H12 VDD_MODEM
VDD_DDR_CORE_1P2 P1
H13 VDD_MODEM
VDD_DDR_CORE_1P2 P20
J7 VDD_MODEM
J8 VDD_MODEM VDD_QFPROM_PRG W8 (QFUSE PP_LDO3
PROGRAMMING)
31 32 33
IN
J11 VDD_MODEM
J12 VDD_MODEM
K6 VDD_MODEM
K7 VDD_MODEM
K11 VDD_MODEM
L6 VDD_MODEM

B B
(MSM CORE) (EBI1 PAD) (HSIC PAD) (USB 1.8V) (GPS ADC) (LPDDR2)
RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB
33 31 IN PP_LDO10 33 31 IN PP_LDO9 33 31 IN PP_LDO9 33 31 IN PP_LDO2 38 37 33 31 IN PP_LDO1 38 37 35 34 33 31 30 IN PP_LDO11
RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB 39 RADIO_BB
1 C3401_RF 1 C3404_RF 1 C3407_RF 1 C3410_RF 1 C3413_RF 1 C3416_RF 1 C3419_RF 1 C3422_RF 1 C3424_RF 1 C3427_RF 1 C3430_RF 1 C3432_RF 1 C3435_RF
2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 0.1UF 2.2UF 2.2UF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
4V
2 X5R-CERM 4V
2 X5R-CERM 4V
2 X5R-CERM 4V
2 X5R-CERM 4V
2 X5R-CERM 2 4V 2 4V 4V
2 X5R-CERM 4V
2 X5R-CERM 4V
2 X5R-CERM 2 4V 2 4V 2 4V
X5R-CERM X5R-CERM X5R X5R-CERM X5R-CERM
0201 0201 0201 0201 0201 0201 0201 0201 0201 0201 01005 0201 0201
NOSTUFF
(MSM MEMORY) (SDC1 PAD) (SDC/UIM) (COMBO DAC/BBRX) (PLL) (LPDDR2 CORE)
RADIO_BB
PP_LDO12 RADIO_BB
PP_LDO13 NOSTUFF RADIO_BB
VDDPX_BIAS RADIO_BB
PP_LDO7 RADIO_BB
PP_LDO10 RADIO_BB
PP_LDO9
33 31 IN 50 33 31 IN 33 32 IN 35 33 31 IN 33 31 IN 33 31 IN
RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB
1 C3402_RF 1 C3405_RF 1 C3408_RF 1 C3411_RF 1 C3414_RF 1 C3417_RF 1 C3420_RF 1 C3425_RF 1 C3428_RF 1 C3431_RF 1 C3433_RF 1 C3436_RF 1 C3438_RF
2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 0.1UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF
20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20% 20%
4V
2 X5R-CERM 4V
2 X5R-CERM 4V
2 X5R-CERM 4V
2 X5R-CERM 4V
2 X5R-CERM 2 4V 2 4V 4V
2 X5R 4V
2 X5R-CERM 4V
2 X5R-CERM 2 4V 2 4V 2 4V
X5R-CERM X5R-CERM X5R-CERM X5R-CERM X5R-CERM
0201 0201 0201 0201 0201 0201 0201 01005 0201 0201 0201 0201 0201
NOSTUFF NOSTUFF NOSTUFF
(PLL) (QFUSE)
(MODEM SUB SYSTEM) (GENIO PAD) (USB CORE) (BBRX) RADIO_BB
PP_LDO3 RADIO_BB
PP_LDO3
RADIO_BB RADIO_BB RADIO_BB RADIO_BB 33 32 31 33 32 31
33 31 30 IN VREG_SMPS1_0V90 38 37 35 34 33 31 30 IN PP_LDO11 33 31 IN PP_LDO12 38 37 33 31 IN PP_LDO1 IN
RADIO_BB
IN
RADIO_BB
RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB RADIO_BB 39 RADIO_BB RADIO_BB RADIO_BB RADIO_BB
1 C3434_RF 1 C3437_RF
1 C3403_RF 1 C3406_RF 1 C3409_RF 1 C3412_RF 1 C3415_RF 1 C3418_RF 1 C3421_RF 1 C3423_RF 1 C3426_RF 1 C3429_RF
2.2UF 2.2UF
2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 2.2UF 20% 20%
4V
20% 20%
4V
20%
4V
20%
4V
20%
4V
20% 20% 20% 20% 20% 2 4V 2 4V
2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 2 X5R-CERM 2 4V
X5R-CERM 2 4V
X5R-CERM
4V
2 X5R-CERM 4V
2 X5R-CERM 4V
2 X5R-CERM X5R-CERM
0201
X5R-CERM
0201
0201 0201 0201 0201 0201 0201 0201 0201 0201 0201 NOSTUFF

A A
PAGE TITLE

BASEBAND (1 OF 2) DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
34 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 33 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

BASEBAND (2 OF 3)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
C600
R606
L600
U602

D D

39 38 37 35 34 33 31 30
PP_LDO11

A2
VP
35 34 BB_SWD_ENABLE B2 IN1 IN2 C1 BB_SWD_ENABLE 34 35
U_JTAGRF
TS5A2066
34 30 29 90_BB_USB_P B1 COM1 BGA
COM2 C2 90_BB_USB_N 29 30 34

34 30 BB_JTAG_TCK A1 NO1 NO2 D2 BB_JTAG_TMS 30 34

GND

D1
RADIO_SIMCARD

PP_LDO11 30 31 33 34 35 37 38 39

RADIO_BB
1
R3509_RF
10K
C 1%
1/32W
MF
C
010052
NOSTUFF DSDS_SIM_DETECT 30 34
RADIO_BB
U_BB_RF
ASIC-MDM9625M-333P
PMIC_RESOUT_L W14 BGA V17
32 30 IN RESIN* RESOUT* NC
N2 SYM 1 OF 6 W18 RADIO_BB
30 IN BB_JTAG_RST_L SRST* DIGITAL PS_HOLD PS_HOLD OUT 32

SLEEP_CLK_32K W17 U_BB_RF


32 IN SLEEP_CLK P5 BB_JTAG_TDO RADIO_BB ASIC-MDM9625M-333P
TDO OUT 30
R3505_RF
BB_JTAG_TCK R2 BGA
34 30 IN
P3
TCK
PMIC_SPMI_DATA W15 SPMI_DATA BI 30 32 1 240 2 EBI1_CAL R1 EBI1_CAL SYM 2 OF 6 EBI1_VREF N20 MDM_VREF_LPDDR2
IN 31 34
30 IN BB_JTAG_TDI TDI V15 EBI1_EBI2 M5
P2 PMIC_SPMI_CLK SPMI_CLK 1% MF EBI1_VREF
34 30 IN BB_JTAG_TMS TMS
BI 30 32
1/32W01005 BDM_ZQG1 EBI1_ZQ R16
T4 U9 EBI1_VREF
30 IN BB_JTAG_TRST_L TRST* HSIC_CAL BB_HSIC_CAL
U10 50_BB_HSIC_DATA RADIO_BB F18 H20
R11 MODE_0
HSIC_DATA BI 29 30
1 RADIO_BB R3506_RF NC EBI2_CS* EBI2_AD_7 NC
NC R10 50_BB_HSIC_STROBE R3502_RF F16 H19
R9 MODE_1
HSIC_STROBE BI 29 30
240 1 240 2 NCG20 EBI2_CLE* EBI2_AD_6
H18NC
NC 1% EBI2_ALE* EBI2_AD_5
UIM1_RESET M19 DSDS_SIM_RESET 1/32W 1% MF NC NC
MDM_CLK W19 CXO
OUT 30 54
MF 1/32W01005 G19 EBI2_WE* EBI2_AD_4 H16
34 32 30 IN N18 DSDS_SIM_CLK NC NC
XO_OUT_D0_EN V18 CXO_EN
UIM1_CLK OUT 30 54
201005 G18 EBI2_OE* EBI2_AD_3 J18
32 OUT
UIM1_DATA P19 DSDS_SIM_DATA NC NC
BI 30 54 G16 EBI2_BUSY* EBI2_AD_2 K18
DSDS_SIM_DETECT N19 UIM1_DETECT NC NC
34 30
SDC1_DATA_3 B18 EBI2_AD_1 J16
NC NC
B19 SDC1_CMD SDC1_DATA_2 A18 EBI2_AD_0 K16
NC NC NC
C19 SDC1_CLK SDC1_DATA_1 D20
NC NC
SDC1_DATA_0 D19
30 29 BB_USB_VBUS U12 USB_HS_VBUS NC
IN
V12 USB_HS_ID USB_HS_DP V11 90_BB_USB_P
NCW13 BI 29 30 34

B 34 32 30 MDM_CLK USB_HS_SYSCLK USB_HS_DM


USB_HS_REXT
W11
W10
90_BB_USB_N
BB_USB_TRXTUNE
BI 29 30 34
B
1 RADIO_BB
R3501_RF
200
1% MDM_VREF_LPDDR2 31 34
1/32W
MF
201005 1 C3501_RF
1.0UF
20%
PP_LDO11 30 31 33 34 35 37 38 39
6.3V
2 X5R
0201-1
PP_LDO11 30 31 33 34 35 37 38 39
A1

VCC
1 1
U_EEP_RF R3507_RF R3508_RF
CAT24C08C4A 10K
1%
10K
1%
WLCSP 1/32W 1/32W
35 34
B1
BB_EEPROM_SCL SCL SDA B2 BB_EEPROM_SDA 34 35 MF MF
2 01005 201005

VSS
35 34 BB_EEPROM_SCL
A2

BB_EEPROM_SDA
A 35 34

A
PAGE TITLE

BASEBAND (1 OF 2) DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
35 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 34 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

BASEBAND (3 OF 3)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
C704
R700
L700
U702

D D

PP_LDO11 30 31 33 34 35 37 38 39

RADIO_BB
1 RADIO_BB
R3601_RF
10K U_BB_RF
1%
1/32W
ASIC-MDM9625M-333P
MF BGA
01005 2 R18 SYM 3 OF 6 H5
30 OUT BB_SIM_DATA GPIO_0 GPIO_38 GSM_TXBURST_IND OUT 29

BB_SIM_DETECT BB_SIM_DETECT U18 GPIO_1 GPIO GPIO_39 H2 CTRL_FWD_REV


30 35 30
35
IN
BLSP1 NC
RADIO_BB 30 BB_SIM_RESET T18 GPIO_2 GPIO_40 H3 BB_IPC_GPIO1 29
IN OUT
U_BB_RF BB_SIM_CLK P18 GPIO_3 GPIO_41 G3 UAT_SELECT
30 OUT NC
ASIC-MDM9625M-333P BB_UART_TXD U15 GPIO_4 GPIO_42 G2 LAT_SELECT
30 29 OUT NC
BGA BB_UART_RXD U14 GPIO_5 GPIO_43 F1 BB_UAT_GPIO0
30 29 IN
BLSP2 GRFC NC
SYM 4 OF 6 TX_DAC0_IREF C13 WTR_TX_IDAC BB_UART_CTS_L V14 GPIO_6 GPIO_44 F2 BB_UAT_GPIO1
WTR_BB_PRX_I_P E11 BBRX_IP_CH0 OUT 35 36 30 29 IN NC
36 IN ANALOG TX_DAC0_VREF E13 VREF_DAC_BIAS BB_UART_RTS_L U16 GPIO_7 GPIO_45 D3 BB_UAT_GPIO3
WTR_BB_PRX_I_N C11 BBRX_IM_CH0
32 35 30 29 OUT NC
36 IN U3 GPIO_8 GPIO_46 C1
E10 A14 NC U4
36 IN WTR_BB_PRX_Q_P BBRX_QP_CH0 TX_DAC0_IP WTR_BB_TX_I_P OUT 36
GPIO_9 GPIO_47 G5 NC
WTR_BB_PRX_Q_N C10 BBRX_QM_CH0 TX_DAC0_IM B14 WTR_BB_TX_I_N NC BLSP3 NC
36 IN OUT 36 W2 GPIO_10 GPIO_48 F3
TX_DAC0_QP B13 WTR_BB_TX_Q_P NC NC
WTR_BB_DRX_I_P B11 BBRX_IP_CH1
OUT 36 V3 GPIO_11 GPIO_49 E3 WLAN_TX_BLANK
36 IN
TX_DAC0_QM A13 WTR_BB_TX_Q_N NC NC
WTR_BB_DRX_I_N A11 BBRX_IM_CH1 OUT 36
BB_I2S_WS V7 GPIO_12 GPIO_50 F5
36 IN 30 29 OUT NC
WTR_BB_DRX_Q_P B10 BBRX_QP_CH1 TX_DAC1_IREF C8 PP_LDO7 BB_I2S_RXD V6 GPIO_13 GPIO_51 N5
36 IN 31 33 35 30 29 IN
BLSP4 NC
A10 E8 W7 N3
C 36 IN WTR_BB_DRX_Q_N
WFR_BB_PRX_I_P B5
BBRX_QM_CH1

BBRX_IP_CH2
TX_DAC1_VREF

TX_DAC1_IP A8
30 29

29
OUT
OUT
BB_I2S_TXD
BB_I2S_CLK U8
GPIO_14
GPIO_15
GPIO_52
GPIO_53 T3
BB_COEX_UART_TXD
BB_COEX_UART_RXD
OUT
IN
30 51

30 51
C
38 IN M18 GPIO_16 GPIO_54 E2 WTR_SSBI_TX_GPS
WFR_BB_PRX_I_N A5 BBRX_IM_CH2 TX_DAC1_IM B8 NC OUT 36
38 IN M16 GPIO_17 GPIO_55 D1 WTR_SSBI_PRX_DRX
WFR_BB_PRX_Q_P B4 BBRX_QP_CH2 TX_DAC1_QP A7 NC BLSP5 SSBI IN 36
38 IN N16 GPIO_18 GPIO_56 D2
WFR_BB_PRX_Q_N A4 BBRX_QM_CH2 TX_DAC1_QM B7 NC NC
38 IN L16 GPIO_19 GPIO_57 E1 WFR_SSBI
C4 C7 NCD18 T1
OUT 38

38 IN WFR_BB_DRX_I_P BBRX_IP_CH3 ET_DAC_M ET_DAC_N OUT 39 30 29 OUT BB_OTHER_TXD GPIO_20 GPIO_58 NC BB_DEBUG_SYNC (DEV)
38 WFR_BB_DRX_I_N C5 BBRX_IM_CH3 ET_DAC_P E7 ET_DAC_P 39 30 29 BB_OTHER_RXD C18 GPIO_21 GPIO_59 R6 GSM_TX_PHASE_D1 36
IN OUT IN OUT
WFR_BB_DRX_Q_P B3 BB_EEPROM_SDA E19 BLSP6 R3 GSM_TX_PHASE_D0
38 IN BBRX_QP_CH3 V16 34 BI GPIO_22 GPIO_60 OUT 36
A3 DNC NC E18 U7
38 IN WFR_BB_DRX_Q_N BBRX_QM_CH3 W16 34 BI BB_EEPROM_SCL GPIO_23 GPIO_61 BB_CORE_DUMP IN 29 30
DNC
C15 D4
NC 30 29 OUT BB_RESET_DET_L P16 GPIO_24 GPIO_62 V8 BB_DEBUG_STATUS OUT 30
36 IN WTR_BB_GPS_I_P GNSS_BB_IP DNC NC L18 W4
C16 C3 29 IN AP_WAKE_MODEM GPIO_25 GPIO_63 BB_DEBUG_ERROR OUT 30
36 IN WTR_BB_GPS_I_N GNSS_BB_IM DNC NC L5 W3
B16 29 OUT BB_LAT_GPIO0 GPIO_26 GPIO_64 BB_SWD_ENABLE OUT 34
36 IN WTR_BB_GPS_Q_P GNSS_BB_QP M3 U6
A16 BB_LAT_GPIO1 NC GPIO_27 GPIO_65 BB_IPC_GPIO BI 29
36 IN WTR_BB_GPS_Q_N GNSS_BB_QM K3 T2
29 OUT BB_LAT_GPIO2 GPIO_28 GPIO_66 BB_HOST_RDY IN 29 30

29 BB_LAT_GPIO3 L3 GPIO_29 GPIO_67 R15 BB_WAKE_HOST_L 29 30


OUT OUT
29 BB_LAT_GPIO4 M2 GPIO_30 GPIO_68 V4 BB_DEVICE_RDY 29 30
OUT OUT
BB_LAT_GPIO5 K5 GPIO_31 GPIO_69 U17 BB_BUA_SIM
NC GRFC IN 32
B1 GPIO_32 GPIO_70 V1 BB_GPS_SYNC
NC OUT 29 30
C2 GPIO_33 GPIO_71 W6
NC NC
30 IN WATCHDOG_DISABLE J5 GPIO_34 GPIO_72 U2 RFFE2_DATA BI 30 35 45 46 48

30 BOOT_HSIC L2 GPIO_35 GPIO_73 U5 RFFE2_CLK 30 35 45 46 48


IN BI
BOOT_HSIC_USB J3 RFFE U1 RFFE1_DATA
30 IN GPIO_36 GPIO_74 BI 30 39 40 41 42 43 44
J2 GPIO_37 GPIO_75 R5 RFFE1_CLK
NC BI 30 39 40 41 42 43 44

36 35
WTR_TX_IDAC 35 32 VREF_DAC_BIAS
RADIO_BB RADIO_BB RADIO_BB
B 1 C3601_RF
0.1UF
1 C3603_RF
2200PF
1 C3604_RF
2200PF
B
10% 10% 10%
2 6.3V 2 6.3V 2 6.3V
X7R X5R-CERM X5R-CERM
0201 01005 01005
35 33 31 PP_LDO7 NOSTUFF

U_BUFFER
RF5129
BGA
48 46 45 35 30 RFFE2_CLK A1 SCLK SDATA A2 RFFE2_DATA 30 35 45 46 48

48 46 45 44 43 41 40 35 RFFE_VIO A3 VIO SDATA_A B2 RFFE2_DATA_BUFFER 53

53 RFFE2_CLK_BUFFERB3 SCLK_A

B1 GND
R3602_RF
39 38 37 35 34 33 31 30 PP_LDO11 1
0.002 RFFE_VIO 35 40 41 43 44 45 46 48

1% VOLTAGE=1.80V
1/20W
MF
0201

A A
PAGE TITLE
RFFE2_DATA
MOBILE DATA MODEM (2 OF 2) DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


1 C3602_RF REVISION

5%
22PF
16V
R
7.0.0
2 CERM NOTICE OF PROPRIETARY PROPERTY: BRANCH
01005 THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
36 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 35 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

WTR TRANSCEIVER (1 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
C802
R802
L800
U803

D D
U_WTR_RF U_WTR_RF
WTR1625 WTR1625
BGA BGA

42 50_B8_PRX_WTR_IN 102 PRX_LB1_IN SYM 1 OF 5 PRX_BB_IP 99 WTR_BB_PRX_I_P 35


SYM 2 OF 5 RADIO_WTR
OUT 50_B8_B28B_DRX_WTR_IN 5 DRX_LB1_IN DRX_BB_IP 76 WTR_BB_DRX_I_P
LB1 DC PRX_BB_IM 108 WTR_BB_PRX_I_N LB1 DC
47 OUT
RADIO_WTR
50_B20_PRX_WTR_IN 92 PRX_LB2_IN
OUT 35
DRX_BB_IM 86 WTR_BB_DRX_I_N
42
PRX_BB_QP 107 WTR_BB_PRX_Q_P 35 47 50_B13_B17_DRX_WTR_IN 15 DRX_LB2_IN
OUT
RADIO_WTR
LB2 DC
OUT
LB2 DC DRX_BB_QP 61 WTR_BB_DRX_Q_P
50_B26_PRX_WTR_IN 73 PRX_LB3_IN PRX_BB_QM 97 WTR_BB_PRX_Q_N OUT
RADIO_WTR
42 OUT 35
47 50_B26_B28A_DRX_WTR_IN 16 DRX_LB3_IN DRX_BB_QM 68 WTR_BB_DRX_Q_N 35
OUT
LB3 DC 65 PRX_LB4_IN LB3 DC
41 50_B13_B17_B28_B29_PRX_WTR_IN 7 60 RADIO_WTR
47 50_B20_B29_DRX_WTR_IN DRX_LB4_IN GNSS_BB_IP WTR_BB_GPS_I_P OUT
LB4 DC
50_WFR_PRX_LB_CA_IN 91 LB4 DC 53 WTR_BB_GPS_I_N RADIO_WTR
38 OUT PRX_LB_CA_OUT 32 GNSS_BB_IM OUT
38 OUT 50_WFR_DRX_LB_CA_IN DRX_LB_CA_OUT 67 RADIO_WTR
MB1 NO DC 50 MB1 NO DC GNSS_BB_QP WTR_BB_GPS_Q_P OUT
38 IN 50_WFR_PRX_MB_CA_OUT PRX_MB_CA_IN 29 85 RADIO_WTR
38 IN 50_WFR_DRX_MB_CA_OUT DRX_MB_CA_IN GNSS_BB_QM WTR_BB_GPS_Q_N OUT 35
MB2 DC MB2 DC
50_B34_B39_PRX_WTR_IN 51 PRX_MB1_IN 50_B34_DRX_WTR_IN 28 DRX_MB1_IN
DNC 37
45 47

MB3 DC MB3 DC NC
47 50_DCS_WTR_IN 43 PRX_MB2_IN 47 50_B39_DRX_WTR_IN 20 DRX_MB2_IN
HB1 NO DC 27 HB1 NO DC 1
47 50_PCS_WTR_IN PRX_MB3_IN NC DRX_MB3_IN
HB2 DC 19 HB2 DC 2
46 50_B40A_PRX_WTR_IN PRX_HMB4_IN 47 50_B40_DRX_WTR_IN DRX_HMB4_IN
HB3 DC HB3 DC 50_B38X_DRX_WTR_IN 4 DRX_HB1_IN
46 50_B40B_B38X_PRX_WTR_IN9 PRX_HB1_IN 47

HBMB4 NO DC HBMB4 NO DC 50_B41A_DRX_WTR_IN 12 DRX_HB2_IN


46 50_B41A_PRX_WTR_IN 17 PRX_HB2_IN
47

50_B7_DRX_WTR_IN 13 DRX_HB3_IN
44 50_B7_PRX_WTR_IN 18 PRX_HB3_IN
47

30 DRX_HB_CA_OUT
33 NC
C NC PRX_HB_CA_OUT
49 100_GPS_WTR_IN_P 36 GNSS_RF_INP
C
49 100_GPS_WTR_IN_N 44 GNSS_RF_INM

U_WTR_RF
WTR1625
BGA
WTR_BB_TX_I_P 151 TX_BB_IP SYM 3 OF 5 TX_LB1_OUT 162
35
NC
35 WTR_BB_TX_I_N 160 TX_BB_IM TX_LB2_OUT 153 50_LB_2G_WTR_TX_OUT 40

35 WTR_BB_TX_Q_P 152 TX_BB_QP TX_LB3_OUT 163 50_B8_B26_B20_WTR_TX_OUT 42


35 WTR_BB_TX_Q_N 161 TX_BB_QM TX_LB4_OUT 154 50_B13_B17_B28_WTR_TX_OUT 41
35 WTR_TX_IDAC 127 DAC_REF 146
TX_MB1_OUT 50_B3_B4_WTR_TX_OUT 43

35 GSM_TX_PHASE_D0 123 GP_DATA0 TX_MB2_OUT 138 50_HB_2G_WTR_TX_OUT 40

35 GSM_TX_PHASE_D1 104 GP_DATA1 TX_MB3_OUT 139 50_B1_B25_B34_B39_WTR_TX_OUT 43

B RADIO_WTR
141

94
GND TX_MB4_OUT 155
NC B
R3702_RF GND TX_HB1_OUT 130 50_B7_WTR_TX_OUT 44

4.75K
1 2 WTR_RTUNE 71 RTUNE TX_HB2_OUT 121 50_B40_B38_B41_WTR_TX_OUT 44

1% 140
1/32W GND ADC_IN 109
MF
01005 55 GND PDET_RFFB 117 50_FWD_OR_REV_RF 45
118 GND
105 GND 122
35 WTR_SSBI_TX_GPS SSBI_TX_GNSS
35 WTR_SSBI_PRX_DRX 95 SSBI_PRX_DRX
156 GND
131 XO_IN

38 32 50_RF_CLK
RADIO_WTR
1 C3702_RF
100PF
5%
10V
A 2 NP0-C0G
01005
NOSTUFF
A
PAGE TITLE

RF TRANSCEIVER (1 0F 3) DRAWING NUMBER SIZE


RF_CLK IS SHARED BETWEEN WTR AND WFR. LENGTH DIFFERENCE BETWEEN THE TWO SHOULD BE < 5MM.
Apple Inc. 051-9903 D
REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
37 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 36 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

WTR TRANSCEIVER (2 OF 2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
C934
R926
L3802_RF
U902
38 31

33 31
38
PP_LDO8
MAKE_BASE=TRUE
PP_LDO1
MAKE_BASE=TRUE
VREG_2V
VREG_1P3V
37 38

37 38 WTR DECOUPLINGL3801_RF
CAPS
RADIO_WTR 22NH-3%-0.25A
VREG_2V MAKE_BASE=TRUE VDD_DRX_BB_2V 37 38 37 VREG_1P3V MAKE_BASE=TRUE 1 2 VDD_PRX_PLL_1P3V VREG_1P3V MAKE_BASE=TRUE VDD_PRX_LO_HB_1P3V 37
D
38 37 37

D RADIO_WTR WTR DECOUPLING SHARED WITH C3808_RF


1 C3812_RF
0201
RADIO_WTR
RADIO_WTR
1 C3820_RF
RADIO_WTR
1 C3830_RF
RADIO_WTR
1 C3801_RF 100PF 0.1UF RADIO_WTR
1 C3808_RF 0.1UF
5% 20% 20%
10UF 2 10V 4V
2 X5R 10UF 4V
2 X5R U_WTR_RF
20% NP0-C0G 20%
2 6.3V 01005 01005 6.3V
2 CERM-X5R 01005
90 WTR1625
CERM-X5R
0402 NOSTUFF NOSTUFF 0402 37 VDD_PRX_VCO_1P3V VDD_RF1_P_VCO BGA
37 VDD_PRX_VCO_2V 80 VDD_RF2_P_VCO SYM 4 OF 5 VDD_RF2_T_DA 129 VDD_TX_DA_2V 37

VDD_TX_DA_2V 37 VDD_SHDR_PLL_1P3V 37 VDD_DRX_LB_1P3V 37 37 VDD_PRX_LO_HB_1P3V 25 VDD_RF1_P_HB_LO VDD_RF1_T_DA 137 VDD_TX_DA_1P3V 37

RADIO_WTR RADIO_WTR 72
1 C3813_RF 1 C3821_RF 37 VDD_PRX_LB_1P3V VDD_RF1_P_LB VDD_RF1_T_UPC 136 VDD_TX_UPC_1P3V 37

100PF
5%
0.1UF
20% 37 VDD_PRX_HBMB_1P3V 34 VDD_RF1_P_HMB VDD_RF1_T_LO 135 VDD_TX_LO_1P3V 37

2 10V
NP0-C0G
4V
2 X5R 57 VDD_RF1_P_HMB_LO
01005 01005 37 VDD_PRX_LO_HBMB_1P3V VDD_RF2_T_BB 126 VDD_TX_BBF_2V 37

37 VDD_PRX_PLL_1P3V 79 VDD_RF1_P_PLL VDD_RF2_FBRX 116 VDD_FBRX_2V 37


RADIO_WTR
RADIO_WTR VDD_PRX_BB_2V 37 37 VDD_PRX_BB_2V 98 VDD_RF2_P_BB VDD_RF2_T_VCO 157 VDD_TX_VCO_2V 37

VDD_TX_BBF_2V 37 VDD_PRX_HBMB_1P3V 37 VDD_PRX_LB_1P3V 37


100
37 VDD_PRX_2V VDD_RF2_P_RX VDD_RF1_T_VCO 149 VDD_TX_VCO_1P3V 37
MAKE_BASE=TRUE
RADIO_WTR
1 C3814_RF 37 VDD_DRX_LO1_1P3V 14 VDD_RF1_D_LB_LO VDD_RF1_T_SYN 115 VDD_TX_SYNTH_1P3V 37
100PF
5% 38
VDD_DRX_LO2_1P3V VDD_RF1_D_LOM VDD_RF2_T_PLL 114 VDD_TX_PLL_2V
2 10V
37 37
NP0-C0G
01005 37 VDD_DRX_LB_1P3V 31 VDD_RF1_D_LB VDD_RF1_G_LNA 52 VDD_GPS_LNA_1P3V 37
NOSTUFF
37 VDD_DRX_HB_1P3V 22 VDD_RF1_D_HB VDD_RF1_G_VCO 74 VDD_GPS_VCO_1P3V 37
R3801_RF 11
0.00 2 37 VDD_DRX_MB_1P3V VDD_RF1_D_MB VDD_RF1_G_PLL 93 VDD_GPS_PLL_1P3V 37
1 VDD_PRX_VCO_2V 37 VDD_SHDR_VCO_1P3V VDD_DRX_LO2_1P3V 37
1% RADIO_WTR RADIO_WTR RADIO_WTR VDD_DRX_BB_2V 54 VDD_RF2_D_BB VDD_RF1_G_BB 59 VDD_GPS_BB_1P3V
C 1/20W
MF
0201
1 C3815_RF
0.1UF
1 C3823_RF
0.1UF
1 C3833_RF
0.1UF 37 VDD_SHDR_VCO_1P3V 48 VDD_RF1_S_VCO GND 113
C
20% 20% 20%
4V
2 X5R 4V
2 X5R 4V
2 X5R 37 VDD_SHDR_VCO_2V 62 VDD_RF2_S_VCO VDD_RF2_XO 147 VDD_XO_2V 37
01005 01005 01005
37 VDD_SHDR_PLL_1P3V 78 VDD_RF1_S_PLL VDD_DIO 103 VDD_MSM_1P8V 37

R3802_RF
0.00 2 VDD_SHDR_VCO_2V
1 37
VDD_PRX_VCO_1P3V 37
VDD_DRX_LO1_1P3V 37
1%
1/20W
RADIO_WTR RADIO_WTR
MF 1 C3816_RF 1 C3809_RF
0201
0.1UF
20% DELETED C3805 PR REVIEW FEEDBACK 0.1UF
20%
4V
2 X5R 4V
2 X5R
01005 01005

R3803_RF
1
0.00 2
VDD_TX_VCO_2V 37 VDD_PRX_LO_HBMB_1P3V 37 VDD_DRX_MB_1P3V
89 GND U_WTR_RF
37
56 GND WTR1625
1% RADIO_WTR RADIO_WTR 83 BGA GND 111
1/20W GND
MF 1 C3817_RF 1 C3806_RF
82 SYM 5 OF 5 GND 101
0201
0.1UF
20%
0.1UF
20% 58
GND
4V 4V GND
2 X5R 2 X5R GND 110
01005 01005 35 GND
GND 145
8 GND
GND 144
26 GND
GND 143
64 GND
VDD_TX_PLL_2V 37 VDD_TX_SYNTH_1P3V 37 VDD_DRX_HB_1P3V 37 GND 128
42 GND
RADIO_WTR RADIO_WTR GND 120
41 GND
1 C3802_RF 1 C3824_RF RADIO_WTR GND 119
B 0.1UF
20%
0.1UF
20%
1
R3807_RF
81 GND
GND 106 B
4V
2 X5R 4V
2 X5R 0.00
1%
21 GND GND 150
01005 01005 1/20W 6 GND GND 134
NOSTUFF MF 24
20201 GND
GND 159
39
R3808_RF GND
GND 142
1
0.00 2 VDD_XO_2V 37 VDD_TX_LO_1P3V 37 VDD_GPS_LNA_1P3V 10 125
37 GND GND
0% RADIO_WTR RADIO_WTR RADIO_WTR MAKE_BASE=TRUE 3 GND GND 124
1/32W
MF 1 C3803_RF 1 C3825_RF 1 C3828_RF 23 GND GND 148
01005
0.1UF
10%
0.1UF
20%
0.1UF
20%
46 GND GND 158
2 10V
X5R-CERM
4V
2 X5R VDD_GPS
MAKE_BASE=TRUE
4V
2 X5R 49 GND 133
0201 01005 01005 GND 112
69 GND
GND 132
88 GND
GND
70 GND GND 45
VDD_FBRX_2V 37 VDD_TX_UPC_1P3V 37 VDD_GPS_BB_1P3V 37 63 GND GND 66
RADIO_WTR RADIO_WTR 40 GND GND 84
I175 1 C3818_RF 1 C3826_RF VDD_GPS_PLL_1P3V 37 GND 75
47
VDD_PRX_2V 37 0.1UF
20%
100PF
5% RADIO_WTR MAKE_BASE=TRUE 87
GND
4V GND GND 164
2 X5R 2 10V
NP0-C0G
1 C3829_RF
77
01005 01005 0.1UF
20% 96
GND
RADIO_WTR
4V GND
2 X5R
01005
R3806_RF
PP_LDO11 MAKE_BASE=TRUE VDD_MSM_1P8V 37 1
0.00 2 VDD_TX_VCO_1P3V 37
38 35 34 33 31 30
39
RADIO_WTR RADIO_WTR 1%
1/20W
RADIO_WTR
1 C3811_RF 1 C3819_RF MF 1 C3807_RF VDD_GPS_VCO_1P3V 37

A 1.0UF
10%
6.3V
2 X5R-CERM
0.1UF
20%
4V
2 X5R
0201
0.1UF
20%
4V
2 X5R
A
PAGE TITLE
0201-1 01005
NOSTUFF
L3802_RF
01005
RF TRANSCEIVER (2 OF 3) DRAWING NUMBER SIZE
8.2NH-3%-0.19A-1.6OHM
Apple Inc. 051-9903 D
1 2 VDD_TX_DA_1P3V 37 REVISION
01005 RADIO_WTR
1 C3827_RF
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
100PF
5% THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
2 10V
NP0-C0G THE POSESSOR AGREES TO THE FOLLOWING: PAGE
01005
NOSTUFF
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
38 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 37 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

WFR TRANSCEIVER
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
C1019
R1016
L1000
U1002
U_WFR_RF
WFR1620
D BGA
SYM 1 OF 2
GND 1 D
MB1 DC 22 61
37 31 PP_LDO8 VREG_2V 37 38 43 50_B25_PRX_WFR_IN PRX_MB1_IN RX_OTHER GND
MAKE_BASE=TRUE
RADIO_WFR 50_B1_B4_PRX_WFR_IN 16
MB2 NO DC 43 PRX_MB2_IN
37 33 31 PP_LDO1 VREG_1P3V 37 38
6 SSBI_PRX_DRX 13 WFR_SSBI 35
MAKE_BASE=TRUE R3903_RF 43 50_B3_PRX_WFR_IN PRX_MB3_IN
MB3 DC 34
VREG_1P3V VDD_DIG_1P3V 38 38 37 VREG_2V
0.00 2 VDD_PRX_VCO_WFR_2V 27 GND
38 37
MAKE_BASE=TRUE 1 38 50_WFR_PRX_HB_CA_IN NC PRX_HB_CA_IN
MAKE_BASE=TRUE
RADIO_WFR 1% RADIO_WFR 3 PRX_MB_CA_OUT 5 50_WFR_PRX_MB_CA_OUT OUT 36
1 C3904_RF 1/20W
1 C3912_RF 36 IN 50_WFR_PRX_LB_CA_IN PRX_LB_CA_IN
MF
RADIO_WFR
1 C3901_RF 0.1UF 1 RADIO_WFR 0201
0.1UF MB1 DC 49 DRX_MB_CA_OUT 65 50_WFR_DRX_MB_CA_OUT OUT 36
20% C3903_RF 20% 47 50_B25_DRX_WFR_IN DRX_MB1_IN
10UF 4V
2 X5R 10UF 2 4V MB2 NO DC 50_B1_B4_DRX_WFR_IN 54 DRX_MB2_IN PRX_BB_IP 29 WFR_BB_PRX_I_P
20% 20% X5R 47 35
6.3V
2 CERM-X5R 01005 2 6.3V 01005 47 50_B3_DRX_WFR_IN 66 DRX_MB3_IN PRX_BB_IM 28 WFR_BB_PRX_I_N 35
CERM-X5R
MB3 DC 25
0402 0402
43 PRX_BB_QP WFR_BB_PRX_Q_P 35
NC DRX_HB_CA_IN 30
PRX_BB_QM WFR_BB_PRX_Q_N 35
RADIO_WFR
50_WFR_DRX_LB_CA_IN 36
36 IN DRX_LB_CA_IN 62
VDD_DRX_LO_1P3V 38 VDD_XO_WFR_2V 38 DRX_BB_IP WFR_BB_DRX_I_P 35

RADIO_WFR RADIO_WFR RADIO_WFR 52 GND DRX_BB_IM 63 WFR_BB_DRX_I_N 35


1 C3905_RF 1 C3913_RF DRX_BB_QP 57 WFR_BB_DRX_Q_P
0.1UF 0.1UF R3901_RF WFR_RTUNE 19 R_TUNE
35

20% 20% 4.75K


1 2 DRX_BB_QM 64 WFR_BB_DRX_Q_N 35
4V
2 X5R 2 4V 7 XO_IN
X5R 1%
01005 01005 1/32W
MF
01005

VDD_DRX_LB_WFR_1P3V 38

36 32 50_RF_CLK
RADIO_WFR
1 C3919_RF
100PF
C 5%
2 10V
NP0-C0G
C
01005
NOSTUFF
I113
VDD_DRX_MB_HB_FE_1P3V 38 VDD1_DRX_BB_2V 38
RADIO_WFR RADIO_WFR
1 C3907_RF 1 C3915_RF
0.1UF
20%
0.1UF
20%
4V
2 X5R 2 4V
X5R
01005 01005
NOSTUFF U_WFR_RF
WFR1620
I114 BGA
VDD_PRX_MBHB_FE_1P3V VDD1_PRX_BB_2V 38 37
38 VDD_PRX_VCO_WFR_2V VDD_RF2_P_VCO SYM 2 OF 2 GND 46
RADIO_WFR RADIO_WFR PWR_GND
1 C3908_RF 1 C3916_RF 38
33
VDD_PRX_VCO_WFR_1P3V VDD_RF1_P_VCO GND 35
0.1UF
20%
0.1UF
20%
4V VDD_PRX_LO_WFR_1P3V31 VDD_RF1_P_LO GND 42
2 4V
38
2 X5R X5R
01005 01005 38
44
VDD_PRX_PLL_WFR_1P3V VDD_RF1_P_PLL GND 53
NOSTUFF
38 VDD_PRX_LB_FE_1P3V 15 VDD_RF1_P_LB_FE GND 20

38 VDD1_PRX_BB_2V 23 VDD_RF2_P_BB GND 51


VDD_PRX_LB_FE_1P3V 38

38
10
VDD_PRX_MBHB_FE_1P3V VDD_RF1_P_MHB_FE GND 41

38 VDD_DRX_LO_1P3V 47 VDD_RF1_D_LO GND 45

38 VDD1_DRX_BB_2V 56 VDD_RF2_D_BB GND 50

B RADIO_WFR GND 18 B
R3902_RF 38 VDD_DRX_LB_WFR_1P3V39 VDD_RF1_D_LB_FE GND 9
0.00 2VDD_PRX_VCO_WFR_1P3V 59 VDD_RF1_D_MHB_FE
1 38 39 37 35 34 33 31 30 PP_LDO11 VDD1_1P8V 38 38 VDD_DRX_MB_HB_FE_1P3V GND 11
1% RADIO_WFR MAKE_BASE=TRUE
RADIO_WFR 24
1/20W
1 C3910_RF 1 C3917_RF 38 VDD_DIG_1P3V VDD_RF1_DIG GND 21
MF
0201
0.1UF
20%
0.1UF
20%
14 GND GND 32
4V
2 X5R 2 4V
X5R VDD1_1P8V 2 VDD_DIO GND 4
01005 01005 38

38 VDD_XO_WFR_2V 17 VDD_RF2_XO GND 38

GND 55
VDD_PRX_PLL_WFR_1P3V 38
GND 40
RADIO_WFR
1 C3911_RF GND 60
0.1UF
20%
4V GND 48
2 X5R
01005 GND 58

GND 26

GND 8
VDD_PRX_LO_WFR_1P3V 38
RADIO_WFR GND 12
1 C3902_RF
0.1UF
20%
4V
2 X5R
01005
A A
PAGE TITLE

RF TRANSCEIVER (3 OF 3) DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
39 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 38 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

QFE DCDC
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
C1110
R1102
L1104
U1101

D D

XW4001_RF
SHORT-10L-0.25MM-SM
39 31 26 23 17 16 15 14 12 10
52 51 48
PP_VCC_MAIN 1 2 VBATT_SW 39
L4002_RF U_QPOET
NOSTUFF RADIO_QPOET 22-OHM-25%-1800MA QFE1100
SHOULD BE PLACED PP_VCC_MAIN QPOET_BATT BGA PP_VCC_MAIN
MAX 0.25MM AWAY 1 C4001_RF 48 39 31 1 2 14 BYP_BATT VDD_BATT 15
FROM QPOET 14 12 10
26 23 17 16 15
10 12 14 15 16 17 23 26 31 39
48 51 52
10UF 52 51
44 43 42 41 39 VPA_ET 0201 10 BYP_LOAD VDD_BATT 16
20%
XW4002_RF 6.3V
2 CERM-X5R 28
SHORT-10L-0.25MM-SM
0402 39 VBATT_SW VDD_BUCK VDD_AMP 5 APT_VINPUT 39
1 2 SW_GROUND 39
SW_GROUND 27 GND_BUCK VDD_1P8 17 PP_LDO11
NOSTUFF 39 30 31 33 34 35 37 38 39
BOTH XW’S QPOET_VSW 1.5UH-1.95A-0.111OHM
> 1.0MM ET_DAC_P 7 AMP_INP VSW_BUCK 23 1 2
PSB25201T-SM
TO CREATE 35 IN
RADIO_QPOET
INDUCTANCE ET_DAC_N 2 AMP_INM L4003_RF
AMP_OUT 4
35 IN VPA_ET 39 41 42 44 43 42 41 39 VPA_ET
43 44
RFFE1_DATA 26 SDATA
C_BUCK 11
44 43 42 41 40 35 30 BI VPA_APT 39 VPA_APT
44 40 RADIO_QPOET
44 43 42 41 40 35 30 RFFE1_CLK 21 SCLK C_BUCK 12 RADIO_QPOET
BI 1 C4008_RF
1 C4007_RF
PA_CTL_QFE 13 C_SW_BUCK 8 470PF
32
BST_L MPP1 4.7UF 10% X5R
C_SW_BUCK 9 2 10V 01005
C 39 31 26 23 17 16 15 14 12 10
52 51 48
PP_VCC_MAIN 1
0805
2 20 VSW_BOOST
C_GSM 6 GSM_CAP 39 GSM_CAP
20%
2 10V
X5R-CERM
0402 VPA_ET_FILTER C
2.2UH-20%-0.7A-0.23OHM 19 USID_LSB (USID) 1 RADIO_QPOET
RADIO_QPOET
R4001_RF
22 PA_VBAT 18 VPA_BATT 41 42 43 2.2
GND 44 RADIO_QPOET RADIO_QPOET 5%
CRITICAL TO STAY 1/32W
24 VOUT_BOOST 25 VOUT_BOOST 39 1 C4005_RF @ 4.7UF TO MEET
QPOET TIMING
MF
GND_BOOST 20UF 2 01005
L4001_RF GND 1 20%
6.3V
2 CERM-X5R
PP_VCC_MAIN GND_AMP 3 0402
31 39 48 51
10 12 14 15
16 17 23 26
52
(CAN BE CHANGED TO 20UF)
RADIO_QPOET
1 C4010_RF
470PF
VOUT_BOOST_GND 39
10% X5R
2 10V 01005

MITIGATE RX1 DESENSE


IN VLB (B13)

B B
BOOST FILTER
I/O @ 1.8V
L4004_RF
22-OHM-25%-1800MA
34 33 31 30 PP_LDO11 39 VOUT_BOOST 1 2 APT_VINPUT 39
39 38 37 35
0201
RADIO_QPOET
1 C4002_RF RADIO_QPOET
1 C4003_RF RADIO_QPOET
1 C4006_RF
10UF 10UF 10UF
20% 20% 20%
2 6.3V
CERM-X5R
6.3V
2 CERM-X5R 2 6.3V
CERM-X5R
0402 0402 0402

39 VOUT_BOOST_GND

2
XW4004_RF
SHORT-10L-0.25MM-SM
NOSTUFF
1

A A
PAGE TITLE

QFE DCDC DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
40 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 39 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

2G PA
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
C1208
R1200
L1204
U1201

D D

46 45 26 25 16 14 PP_BATT_VCC VPA_APT 39 44
RADIO_2G
1 C4107_RF RADIO_2G RADIO_2G

56PF
5%
1 C4108_RF 1 C4109_RF 1 C4112_RF 1 C4119_RF
2 16V
NP0-C0G
2.2UF 2.2UF 100PF 220PF
20% 20% 5% 2%
01005 2 6.3V
2 6.3V
2
16V
2
50V
X5R X5R NP0-C0G C0G
RADIO_2G 0201-1 0201-1 01005 0201

C4103_RF NOSTUFF
100PF
36 50_HB_2G_WTR_TX_OUT 1 2 L4102_RF
3.0NH+/-0.1NH-0.6A
5%
16V 1 2 50_HB_2G_ASM_IN 45
NP0-C0G RADIO_2G

10
01005 0201

4
RADIO_2G 1 C4117_RF
1 C4113_RF
VBATT V2G 0.8PF 12PF
U_2GPARF +/-0.05PF
25V
2 C0G
5%
25V
2 NP0-C0G-CERM
SKY77356-11 0201 0201-2

C 50_HB_2G_PA_IN5 HB_RF_IN LGA HB_RF_OUT 12


50_LB_2G_PA_IN6 LB_RF_IN LB_RF_OUT 7
50_HB_2G_PA_OUT
50_LB_2G_PA_OUT
NOSTUFF
C
VIO 3 RFFE_VIO 35 41 43 44 45
46 48
SCLK 1 RFFE1_CLK
SDATA 2 RFFE1_DATA
30 35 39 41 42
43 44 L4101_RF
30 35 39 41 42
43 44 6.2NH-3%-0.4A
GND THRM
1 2 50_LB_2G_ASM_IN 45
RADIO_2G RADIO_2G
PAD 0201
1 C4118_RF
C4104_RF

8
9
11

13
100PF 1.2PF
+/-0.1PF
36 50_LB_2G_WTR_TX_OUT 1 2 2 25V
C0G-CERM
0201
5%
16V
NP0-C0G
01005

B B

A A
PAGE TITLE
2G PA
DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
41 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 40 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

VERY LOW BAND PAD (B13, B17, B28)


CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
C1332
R1300
L4215_RF
U1304
L4216_RF
8.2NH-3%-0.19A-1.6OHM

D 1
01005
2 50_B28A_ASM_TRX 45 D
1

1 C4211_RF
L4207_RF 2.4PF
44 43 42 39 VPA_ET 18NH-3%-140MA +/-0.1PF
01005 16V
2 NP0-C0G
NOSTUFF 01005-1
RADIO_VLB_PAD RADIO_VLB_PAD
2
1 C4209_RF
1 C4208_RF
RADIO_VLB_PAD 1 C4229_RF 68PF
47PF 12PF 5%
5%
C4204_RF
2 16V 5%
16V 2 16V
NP0-C0G
100PF CERM 2 CERM
1
50_B28_WTR_TX_OUT 2 01005 01005
01005 L4217_RF
41 NOSTUFF 8.2NH-3%-0.19A-1.6OHM
44 43 42 39 VPA_BATT PLACE INDUCTOR CLOSE TO PA 1
5%
10V
2 50_B28B_ASM_TRX 45
NP0-C0G 1 C4228_RF 01005
01005
1PF RADIO_VLB_PAD
+/-0.1PF
2
16V 1 C4207_RF 1
NP0-C0G
01005 1.0UF 1 C4213_RF
20% 1.0PF
2 10V
X5R-CERM L4208_RF +/-0.1PF
16V
0201-1 18NH-3%-140MA 2 NP0-C0G
01005 01005
RADIO_VLB_PAD RADIO_VLB_PAD RADIO_VLB_PAD
NOSTUFF

35

29
28
FL_B17LP
2 BAND17 RADIO_VLB_PAD
RADIO_VLB_PAD VBAT VCC1 VCC2 LFL15710MTCTD717
C4205_RF B28A_ANT 22 50_B28A_PAD_ANT L4222_RF 0402
C4226_RF
100PF 50_B28_PAD_IN 40 B28_IN 11 50_B28B_PAD_ANT 6.8NH-3%-0.210A
1
50_B17_FILTER_TX_OUT 2 50_B17_PAD_IN 39 B17_IN U_VLBPAD B28B_ANT
B17_ANT 25 50_B17_PAD_ANT
PLACE INDUCTOR CLOSE TO PA 1 2 4
50_B17_PAD_LPF_IN IN OUT 2
100PF
1 2 50_B17_ASM_TRX
41
SKY77802-12 45

C 5%
10V
NP0-C0G
1
RADIO_VLB_PAD
50_B13_PAD_IN 37 B13_IN
LGA B13_ANT

B29_RX_IN 17
8 50_B13_PAD_ANT
50_B29_PAD_ANT
1 C4227_RF
01005
GND
50_B17_PAD_LPF_OUT 5%
10V
NP0-C0G
C
01005 41 CTRL_VLB_BAND_SELECT_1
3 SW1 1.0PF 01005

1
3
L4204_RF +/-0.1PF
22NH-5%-0.1A 41 CTRL_VLB_BAND_SELECT_2
4 SW2 L4224_RF 2 16V
NP0-C0G
01005 22-OHM-25%-0.2A-0.9DCR 01005
NOSTUFF 15 RX_OUT 31 1 2 RADIO_VLB_PAD
VIO
42 LB_VLB_VIO RFFE_VIO 35 40 43 44 45 46 48

2 SCLK 33 01005 RFFE1_CLK 30 35 39 40 42 43


44 L4223_RF
RADIO_VLB_PAD SDATA 32 RFFE1_DATA 3.3NH+/-0.1NH-290MA
C4220_RF 1 2 50_B13_ASM_TRX 45
100PF THRM
1
50_B13_FILTER_TX_OUT 2 GND PAD
1 C4230_RF 01005
41
15PF 1 C4231_RF
5%
5% 16V 1.0PF

1
2
5
6
7
10
9
12
13
14
16
18
19
20
21
23
24
26
27
30
34
36
38

41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
10V 1 2 NP0-C0G-CERM +/-0.1PF
NP0-C0G 01005 16V
2 NP0-C0G
01005 RADIO_VLB_PAD 01005
L4205_RF RADIO_VLB_PAD
22NH-5%-0.1A NOSTUFF
01005
NOSTUFF PLACE INDUCTOR CLOSE TO PA

L4221_RF
5.1NH-3%-0.250A
1 2 50_B29_ASM_TRX 45
01005
1
NOSTUFF
B RADIO_VLB_PAD
L4206_RF
B
18NH-3%-140MA
01005

2
C4221_RF L4211_RF
100PF 22NH-3%-0.25A
1 2 50_B13_B17_B28_B29_PRX_WTR_IN
50_B13_B17_B28_B29_PAD_RX 50_B13_B17_B28_B29_MCH_RX 1 2 36
0201
41 CTRL_VLB_BAND_SELECT_1 5%
16V RADIO_WTR
PP_LDO14_RFSW 29 31 42 NP0-C0G
01005 1 C4219_RF
41 CTRL_VLB_BAND_SELECT_2 1.0PF
RADIO_VLB_PAD +/-0.1PF
1 C4201_RF 2 16V
NP0-C0G
RADIO_VLB_PAD RADIO_VLB_PAD
1 C4203_RF 1 C4206_RF
47PF
5%
FL_B13TX 01005
SAW-BAND13-TX-INTERSTAGE NOSTUFF
100PF 100PF 2 16V
CERM B8817
5%
10V
5%
10V
01005 C4224_RF LGA
2 NP0-C0G 2 NP0-C0G 100PF
01005 01005 1 2 50_B13_TX_FILT_IN 1 INPUT_UNBAL OUTPUT_UNBAL 4 50_B13_FILTER_TX_OUT 41
RADIO_VLB_PAD
1

GND
GND
GND
5%
VDD 10V
50_VLB_SW_MCH_IN NP0-C0G
U_VLB_SW 41
01005

2
3
5
1 RADIO_VLB_PAD
RADIO_VLB_PAD RADIO_VLB_PAD
CXA2973GC
3 V1 BGA RF1 6
RADIO_VLB_PAD L4212_RF
2 V2 RF2 5 50_B28_WTR_TX_OUT 22NH-5%-0.1A
C4225_RF 01005
C4202_RF RF3 7 50_B13_WTR_TX_OUT 100PF
100PF 4 50_B17_WTR_TX_OUT 1 50_B17_WTR_FILT_IN
2
1 2 RF4
50_B13_B17_B28_WTR_TX_OUT 50_VLB_SW_MCH_IN
A 36

5%
41 GND
5%
2
FL_B17TX A
8
9

10V
10V NP0-C0G PAGE TITLE
NP0-C0G
01005
1
RADIO_VLB_PAD
RADIO_VLB_PAD
01005
1 SAW-BAND17-TX-INTERSTAGE
B8822
LGA
VERY LOW BAND PAD
L4213_RF DRAWING NUMBER SIZE
L4202_RF
22NH-5%-0.1A 22NH-5%-0.1A
01005
1 INPUT_UNBAL GND OUTPUT_UNBAL 4 50_B17_FILTER_TX_OUT 41
Apple Inc. 051-9903 D
GND
GND
01005
NOSTUFF V2 V1 BAND RADIO_VLB_PAD R
REVISION
7.0.0
0 1 B28 2 NOTICE OF PROPRIETARY PROPERTY:
2
3
5
2 RADIO_VLB_PAD BRANCH

1 0 B13 THE INFORMATION CONTAINED HEREIN IS THE


PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
1 1 B17 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
42 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 41 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

LOW BAND PAD (B8, B26, B20)


CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
C4318_RF
R1400
L4322_RF
U1402
RADIO_WTR

C4309_RF L4314_RF
100PF
18NH+/-3%-0.250A
D 1 2 50_B20_MATCH_1 1
0201
2 50_B20_PRX_WTR_IN 36 D
5% RADIO_WTR
16V 1 C4312_RF
NP0-C0G
01005 0.8PF
+/-0.05PF
16V
2 C0G-CERM
01005
NOSTUFF

RADIO_WTR

C4310_RF L4312_RF
100PF
7.5NH+/-3%-0.2A
1 2 50_B26_MATCH_2 1 2 50_B26_PRX_WTR_IN 36
01005
5%
16V
NP0-C0G
01005
VPA_ET 39 41 43 44 L4313_RF
8.2NH-3%-0.19A-1.6OHM
1 2 50_B26_MATCH_1
CAPACITOR THAT’S SUPPOSED TO GO HERE IS LOCATED ON 01005
VERY LOW BAND PAD. THE 2 PAD’S NEED TO SHARE DECOUPLING RADIO_WTR
1 C4314_RF
44 43 41 39 VPA_BATT 47PF
5%
RADIO_LB_PAD
16V
2 CERM
CAPACITOR THAT’S SUPPOSED TO GO HERE IS LOCATED ON 01005
C4304_RF
100PF VERY LOW BAND PAD. THE 2 PAD’S NEED TO SHARE DECOUPLING
42 50_B20_WTR_TX_OUT 1 2
CAPACITOR THAT’S SUPPOSED TO GO HERE IS LOCATED ON
C
5%
10V
NP0-C0G
01005
1 VERY LOW BAND PAD. THE 2 PAD’S NEED TO SHARE DECOUPLING RADIO_WTR

C4311_RF L4315_RF C
RADIO_LB_PAD
100PF
15NH-3%-0.140A
L4303_RF 1 250_B8_MATCH_1
22NH-5%-0.1A
1 2 50_B8_PRX_WTR_IN 36

01005 01005
NOSTUFF 5%
16V

36
NP0-C0G
C4313_RF

5
6
2 01005 1
VBATT VCC1 VCC2 0.9PF
+/-0.05PF
16V
2 CERM
CTRL_LB_BAND_SELECT_1 28 SW1 B20RX 25 50_B20_PAD_RX
RADIO_LB_PAD
42

CTRL_LB_BAND_SELECT_2 27 SW2 U_LBPAD B26RX 20 50_B26_PAD_RX


01005

C4303_RF
42
SKY77803-12 B8RX 10 50_B8_PAD_RX
100PF 50_B20_PAD_IN 34 B20IN LGA
42 50_B26_WTR_TX_OUT1 2 50_B26_PAD_IN 33 B26IN B20ANT 22 50_B20_PAD_ANT
5% 50_B8_PAD_IN 31 B8IN B26ANT 17 50_B26_PAD_ANT
1 10V
NP0-C0G
1 B8ANT 14 50_B8_PAD_ANT L4316_RF
RADIO_LB_PAD
01005 RADIO_LB_PAD
4.3NH-3%-0.270A
VIO 3 LB_VLB_VIO 41
1 2
L4322_RF L4304_RF 50_B20_ASM_TRX 45
22NH-5%-0.1A 22NH-5%-0.1A SCLK 1 RFFE1_CLK 30 35 39 40 41 43 44
01005
01005 01005 SDATA 2 RFFE1_DATA 30 35 39 40 41 43 44
1
NOSTUFF NOSTUFF
2 2 THRM
PLACE INDUCTOR CLOSE TO PA
RADIO_LB_PAD 1 C4317_RF
GND L4308_RF 1.0PF
PAD +/-0.1PF
RADIO_LB_PAD
18NH-3%-140MA 16V
2 NP0-C0G
01005
01005
4
7
8
9
11
13
12
15
16
18
19
21
23
24
26
29
30
32
35

37
38
39
40
41
42
43
44
45
46
47
48
C4302_RF NOSTUFF
100PF
2
42 50_B8_WTR_TX_OUT1 2

5%
10V
B NP0-C0G
01005
1
RADIO_LB_PAD
L4320_RF
4.3NH-3%-0.270A B
L4305_RF 1 2 50_B26_ASM_TRX 45
22NH-5%-0.1A 01005
01005
NOSTUFF
PLACE INDUCTOR CLOSE TO PA
2 1 C4318_RF
0.6PF
+/-0.05PF
2 16V
CERM
01005

PP_LDO14_RFSW
L4321_RF
3.6NH+/-0.1NH-0.280A
DECOUPLING SHARED W C4201_RF 1 2 50_B8_ASM_TRX 45
41 31 29

01005
1 RADIO_LB_PAD
42 CTRL_LB_BAND_SELECT_1 PLACE INDUCTOR CLOSE TO PA 1 C4307_RF
RADIO_LB_PAD
1

CTRL_LB_BAND_SELECT_2
42
VDD L4306_RF 10PF
5%
50_LB_SW_MCH_IN 18NH-3%-140MA 2 16V
U_LB_SW 42
01005
RADIO_LB_PAD
CERM
01005
RADIO_LB_PAD
CXA2973GC V2 V1 BAND NOSTUFF NOSTUFF
3 V1 BGA RF1 6 2
C4301_RF
100PF R4301_RF 2 V2 RF2 5 50_B8_WTR_TX_OUT 42 0 1 B8
50_B8_B26_B20_WTR_TX_OUT 0.00 2 7 50_B20_WTR_TX_OUT
36
1 2 50_LB_SW_T_MCH
1 50_LB_SW_MCH_IN 42
RF3
4 50_B26_WTR_TX_OUT
42
1 0 B20
A WTR OUTPUT HAS DC 5%
10V
0%
1/32W
MF
GND
RF4 42

1 1 B26 A
NP0-C0G PAGE TITLE
8
9

FIRST SHUNT MUST


LOW BAND PAD
01005
01005
BE A CAPACITOR. 1 C4320_RF DRAWING NUMBER SIZE
0.5PF
+/-0.05PF
2 16V
C0G-CERM Apple Inc. 051-9903 D
01005 REVISION
NOSTUFF
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
43 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 42 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
C4426_RF
MID BAND PAD (B1, B25, B3, B4, B34, B39)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
R1500
L4409_RF
RADIO_WFR
U1501
C4420_RF L4404_RF
100PF 2.2NH+/-0.1NH-0.380A
1 2 50_B3_MATCH_1 1 2 50_B3_PRX_WFR_IN 38
01005

D
5%
16V
NP0-C0G
01005 L4403_RF
RADIO_WFR
D
3.6NH+/-0.1NH-0.280A C4425_RF
33PF
1 2 1 2
01005 50_B3_MATCH_1_MATCH
5%
16V
NP0-C0G-CERM
01005

VPA_ET NOSTUFF
RADIO_MB_PAD
39 41 42 44

RADIO_MB_PAD
L4405_RF
1.5NH+/-0.1NH-220MA
1 C4408_RF 1 C4409_RF
47PF 47PF 1 2 50_B1_B4_PRX_WFR_IN 38
5% 5% 01005
2 16V
CERM 2 16V
CERM
01005 01005
MB_ET_RC_FILT L4406_RF
RADIO_MB_PAD 2.7NH+/-0.1NH-0.370A
1 1 2
R4401_RF
0.00
0%
01005
RADIO_WFR
1/32W
MF
VPA_BATT 201005
NOSTUFF
RADIO_WFR
44 42 41 39

RADIO_MB_PAD C4422_RF L4409_RF


100PF
2.0NH+/-0.1NH-0.380A
1 C4407_RF
1 2 50_B25_MATCH_1 1 2 50_B25_PRX_WFR_IN
1.0UF
20% 01005
38

10V
2 X5R-CERM 5% 1
16V
0201-1 NP0-C0G
01005
L4402_RF

26
C
3.5NH+/-0.1NH-0.280A
C

36
27
RADIO_MB_PAD 01005

VBATT

VCC1
VCC2
C4403_RF C4423_RF
100PF B3RX 12 50_B3_PAD_RX
2 33PF
RADIO_WFR
50_B3_B4_WTR_TX_OUT 1 2 35
50_B3_B4_PAD_IN B3/4IN 1 2
B1/4RX 10 50_B1_B4_PAD_RX
36
RADIO_MB_PAD 50_B25_MATCH_2
RADIO_MB_PAD
5%
16V
U_MBPAD B25RX 5 50_B25_PAD_RX FL_B39LP
5%
16V
NP0-C0G
RADIO_MB_PAD
01005 RADIO_MB_PAD AFEM-8020-AP1 BAND34-39 NP0-C0G-CERM
01005
1 C4401_RF 1 C4406_RF LGA LFL151G95TCSD734
16 50_B1_B3_B4_PAD_ANT RADIO_MB_PAD
18PF 18PF B1/3/4ANT L4421_RF 0402
2% 2% 34 B1/25/34/39IN
50_B1_B25_B34_B39_PAD_IN B25ANT 8 50_B25_PAD_ANT 0.9NH+/-0.1NH-0.32A-0.6OHM R4402_RF
2 16V
CERM 2 16V
CERM 24 50_B34_B39_PAD_ANT 1 2 0.00
01005 01005 B34/39TX 4 IN OUT 2 50_B34_B39_LPF_OUT 1 2 50_B34_B39_HB_SWITCH_IN 46
50_B34_B39_LPF_IN
NOSTUFF NOSTUFF 01005 0%
VIO 1 RFFE_VIO 45 46 48
35 40 41 NOSTUFF 1/32W
44 GND MF
SCLK 2 RFFE1_CLK 42 44
30 35 39
1 C4410_RF 01005
RADIO_MB_PAD 40 41 TDD-LTE 1 C4414_RF
3 RFFE1_DATA 0.6PF

1
3
44
SDATA 30 35 39
+/-0.05PF 12PF
40 41 42
C4404_RF 16V
2 CERM 5%
100PF 2 16V

EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
01005 CERM

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
36 50_B1_B25_B34_B39_WTR_TX_OUT 1 2 RADIO_MB_PAD
01005
NOSTUFF
5% RADIO_MB_PAD

4
6
7
9
11
14
13
15
17
18
19
20
21
22
23
25
28
29
30
31
32
33
37
38
39
40
41
42
43
44
45
46
47
48
16V
NP0-C0G
01005 L4407_RF
1.0NH+/-0.1NH-0.580A
1 2 50_B1_B3_B4_ASM_TRX 45
01005
1 C4418_RF
0.2PF
+/-0.1PF
16V
2 NP0-C0G
01005
NOSTUFF
B B

L4408_RF
3.8NH-+/-0.1NH-0.27A
1 2 50_B25_ASM_TRX 45
01005
1 C4419_RF
1 C4413_RF 1.5PF
+/-0.05PF
1.2PF 2 16V
+/-0.05PF NP0-C0G-CERM
16V 01005
2 NP0-C0G-CERM
01005

A A
PAGE TITLE

MID BAND PAD DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
44 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 43 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
C4533_RF
HIGH BAND PAD (B7, B38, B40, B41, XGP)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
R1600
L1616
U1601

D VPA_ET 39 41 42 43
RADIO_WTR

C4521_RF L4512_RF
D
100PF 3.3NH+/-0.1NH-290MA
1 2 50_B7_MATCH_11 2 50_B7_PRX_WTR_IN
1 C4507_RF 01005
36

68PF 5% RADIO_WTR
5% 16V
16V
2 NP0-C0G NP0-C0G C4522_RF
01005 1.8PF
01005
1 2

+/-0.1PF
16V
L4509_RF NP0-C0G
01005
2.1NH+/-0.1NH-0.6A
RADIO_HB_PAD 1 2 50_B7_ASM_TRX 45

R4506_RF
C4501_RF RADIO_HB_PAD
1 C4512_RF
0201
18PF
0.00 50_B7_PAD_MTCH 1 2 0.2PF
36 50_B7_WTR_TX_OUT 1 2
+/-0.1PF
0%
2% 2 16V
NP0-C0G
1/32W 01005
MF 16V
01005 RADIO_HB_PAD CERM NOSTUFF
RADIO_HB_PAD 01005 43 42 41 39 VPA_BATT
1 C4503_RF
1.0PF
+/-0.1PF
RADIO_HB_PAD
1 C4505_RF
C4526_RF
VPA_APT 39 100PF
2 16V
40
NP0-C0G
01005
1.0UF
20%
1 2 50_B41B_TX_OUT 44
10V
2 X5R-CERM
1 C4506_RF 1 C4532_RF RADIO_HB_PAD
100PF 68PF 5%
0201-1
2
5%
16V
5%
25V
2 NP0-C0G-CERM
1 C4510_RF 16V
NP0-C0G
1 C4520_RF
NP0-C0G
01005
1.0PF 01005 0.7PF
01005 +/-0.1PF +/-0.1PF
16V 16V

24
21
20
19
2 NP0-C0G 2 NP0-C0G
01005 01005
NOSTUFF

VBATT

VCC1
VCC2

VAPT
C RADIO_HB_PAD B7RX 11 50_B7_RX_PAD FT_B40
C
50_B7_PAD_IN 25 RADIO_HB_PAD
15 50_B7_ANT_PAD TX-BAND40-LTE
B7IN B7ANT
C4533_RF U_HBPAD L4520_RF SAFFU2G35MA0F57 L4526_RF
100PF AFEM-8010-AP1 B41B 7 50_B41B_TX_PAD 1.3NH+/-0.1NH-0.400A LGA 2.2NH+/-0.1NH-0.380A
50_B40_B38_B41_WTR_TX_OUT 26 LGA 3
36
1 2 50_B38_B40_B41_PAD_IN B38/40/41IN B40/B41 50_B40_B41_TX_PAD 1 2 50_B40_TX_FILTER_IN1 UNBAL_PRT1 4 1
UNBAL_PRT450_B40_TX_FILTER_OUT 2 50_B40_TX_HB_SWITCH_IN
5 50_B41C_TX_PAD

GND
01005 01005

GND
GND
5% B41C
16V RADIO_HB_PAD B40A/B41A 9 50_B40A_B41A_TX_PAD 1
NP0-C0G 1
01005

2
3
5
27 RFFE_VIO 46 48 TDD-LTE
VIO 35 40 41
43 45 L4527_RF
1 C4502_RF SCLK 28 RFFE1_CLK 43
30
40
35
41
39
42 9.1NH-3%-0.17A-1.7OHM L4523_RF
1PF SDATA 1 RFFE1_DATA 30 35 39 01005 9.1NH-3%-0.17A-1.7OHM
+/-0.1PF 40 41 42 01005
16V 43
2 NP0-C0G
01005

EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
EPAD
2

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2

L4515_RF

2
4
6
8
10
13
12
14
16
17
18
22
23

29
30
31
32
33
34
35
36
37
2.2NH+/-0.1NH-0.380A
C4531_RF
15PF 1 2 50_B41C_FILTER_IN 44
50_B40A_TX_HB_SWITCH_MCH 1 2 50_B40A_TX_HB_SWITCH_IN 01005
1
1
5%
16V
1 NP0-C0G-CERM L4521_RF
01005 L4528_RF 6.8NH-3%-140MA
22NH-3%-0.12A-3.2OHM 01005
L4506_RF 01005 RADIO_HB_PAD
NOSTUFF
7.5NH+/-3%-0.2A
01005 2
2

FT40A41A 2

B LTE-BAND-40A-41A-TX
LGA C4528_RF L4516_RF
1.2NH+/-0.1NH-0.550A
B
6 BAND_40A 3 3.0PF
44 50_B40A_B41A_FILTER_IN ANT 50_B41A_TX_HB_SWITCH_IN
BAND_41A 1 1 2 46
1 2 50_B40A_B41A_FILTER_IN
50_B41A_TX_HB_SWITCH_MCH 01005
GND
GND
GND
GND
GND
GND

+/-0.1PF
1 16V
TDD-LTE 1 NP0-C0G
01005
2
4
5
7
8
9

L4501_RF L4507_RF
1.0NH+/-0.1NH-0.22A-0.9OHM
01005 3.9NH+/-0.1NH-0.270A
NOSTUFF 01005
RADIO_HB_PAD
L4524_RF
2 1.8NH+/-0.1%-0.380A
2
1 250_B41B_TX_HB_SWITCH_IN
01005

L4522_RF
2.7NH+/-0.1NH-0.370A
44 50_B41B_TX_OUT 1 44 2 50_B41B_FILTER_IN
44 50_B41C_FILTER_IN 01005 RADIO_HB_PAD

1 NOSTUFF FT_41BC
A RADIO_HB_PAD
1 NOSTUFF
RADIO_HB_PAD
SAW-BAND-41B-41C-TDD-TX
SAWEN2G58QA0F57 L4525_RF A
L4504_RF 1 RF1/
50_B41B_FILTER_IN RF2/ 9 50_B41B_TX_HB_SWITCH_MCH 1.2NH+/-0.1NH-0.550A PAGE TITLE
3.0NH+/-0.1NH-200MA
01005
L4508_RF
2.4NH+/-0.1NH-200MA
01005
44

44
B41BIN
4 RF3/
50_B41C_FILTER_IN B41CIN
LGA
B41BOUT
RF4/ 6 50_B41C_TX_HB_SWITCH_MCH
B41COUT
1 2 50_B41C_TX_HB_SWITCH_IN
01005
HIGH BAND PAD DRAWING NUMBER SIZE
GND
GND
GND
GND
GND
GND

2 Apple Inc. 051-9903 D


2 REVISION
TDD-LTE
7.0.0
2
3
5
7
8
10

NOTICE OF PROPRIETARY PROPERTY: BRANCH


THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
45 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 44 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

ANTENNA SWITCH
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
C1702
R1700
L4608_RF
U1702

D D

L4608_RF
22-OHM-25%-0.2A-0.9DCR
R4603_RF
VCC_ASM_FILTERED 1 2 PP_BATT_VCC 14 16 25 26 40 46
1
0.00 2
RADIO_ASM 01005 50_FWD_REV_CPL_OUT 50_FWD_OR_REV_RF 36
1 C4602_RF 0%
1/32W
47PF
5%
16V
1
R4601_RF MF
01005 1
R4602_RF
2 CERM 105 RADIO_ASM
01005 1% 105
1/32W 1%
MF 1/32W
2 01005
RADIO_ASM
MF
01005
NOSTUFF 2RADIO_ASM
ASM NEEDS TO BE UPDATED WITH A NEW PINOUT VERSION NOSTUFF
C 46 50_HB_SWITCH_TX C

29
RADIO_ASM
R4608_RF
1
0.00 2 VDD
FRX34B39 46 50_HB_SWITCH_RX
BAND34-39 0%
50_HB_SW_RX_ASM_MCH
1 RF1 U_ASM_RF
1/32W
L4601_RF SAWFD1G90LC0F57 MF
01005
2 RF3 RF5159
LGA
FWD/REV 32 50_ANT2_CONN 50
2.4NH+/-0.1NH-200MA LGA
44 50_B7_ASM_TRX 3 RF7
36 50_B34_B39_PRX_WTR_IN 1 2 50_B34_B39_FILT_RX 1 INPUT OUT_FIL1 9
50_B39_RX_ASM_OUT 4 RX1
01005
1 OUT_FIL2 6 50_B34_RX_ASM_OUT 22 TRX6
43 50_B1_B3_B4_ASM_TRX 23 TRX7 A2 21
GND 43 50_B25_ASM_TRX 24 TRX8
L4602_RF
2
3
4
5
7
8
10

3.3NH+/-0.1NH-180MA RADIO_ASM 12 HBTX


40 50_HB_2G_ASM_IN
01005 TDD-LTE
RADIO_ASM 48 50_HB_DIVERSITY_ASM 20 HBRF2
2 TO DIVERSITY MODULE 50_B17_ASM_TRX 8
41 TRX2
42 50_B8_ASM_TRX 18 TRX3
41 50_B28A_ASM_TRX 9 TRX0
41 50_B28B_ASM_TRX 10 TRX1 R4609_RF
50_B26_ASM_TRX 16 5 50_ASM_ANT1_OUT 1
0.00 2 50_ANT1_CONN
42 TRX4 A1 50

41 50_B13_ASM_TRX 17 TRX5 1%
1/20W
42 50_B20_ASM_TRX 11 TRX11 MF
0201
41 50_B29_ASM_TRX 7 RX2 VIO 26 RFFE_VIO 35 40 41 43 44 46 48

SCLK 28 RFFE2_CLK 30 35 46 48
50_LB_2G_ASM_IN 14 LBTX
TO DIVERSITY MODULE SDATA 27 RFFE2_DATA 30 35 46 48
1 1 50_LB_DIVERSITY_ASM 19 LBRF2
B RADIO_ASM RADIO_ASM
48

GND 1 C4606_RF
22PF
B
L4603_RF L4604_RF 5%

13
15
25
30
6
31
33
1.0NH+/-0.1NH-0.22A-0.9OHM 1.0NH+/-0.1NH-0.22A-0.9OHM 16V
2 CERM
01005 01005
NOSTUFF NOSTUFF 01005

2 2
RADIO_ASM
RADIO_ASM

A A
PAGE TITLE

ANTENNA SWITCH DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
46 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 45 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

HIGH BAND SWITCH


CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

D D

R4703_RF
1
0.00 2
36 50_B40A_PRX_WTR_IN 50_B40A_PRX_FILTER
0%
1/32W
MF 1
01005 PP_BATT_VCC 14 16 25 26 40 45

L4705_RF
RADIO_HBSWITCH RADIO_HBSWITCH
2.0NH+/-0.1NH-0.380A
01005 FR40A41A RADIO_HBSWITCH
1 C4710_RF
SAW-BAND-40A-41A-TDD-RX C4709_RF 47PF
885055 18PF 5%
2 9 RX_B40A 16V
2 CERM
LGA ANT 2 50_B40A_B41A_RX_MATCH 1 2
6 RX_B41A 01005
2% 1

1
16V

GND
GND
GND
GND
GND
GND
GND
CERM
01005 VBATT
L4709_RF U_HBS_RF
C TDD-LTE
C

10
8
7
5
4
3
1
3.3NH+/-0.1NH-290MA
RADIO_HBSWITCH 01005 44 50_B40A_TX_HB_SWITCH_IN 11 TX1 CXM3652UR
12 UQFN
C4720_RF C4704_RF 44 50_B41A_TX_HB_SWITCH_IN
7
TX2 C4721_RF
6.0PF 100PF 2 44 50_B40_TX_HB_SWITCH_IN TX3 100PF
36 50_B41A_PRX_WTR_IN 1 2 50_B41A_PRX_MATCH1 1 2 44 50_B41B_TX_HB_SWITCH_IN 8 TX4 TX RF1 5 50_HB_SWITCH_TX_OUT 1 2 50_HB_SWITCH_TX 45

50_B41A_PRX_FILTER 44 50_B41C_TX_HB_SWITCH_IN 9 TX5


+/-0.1PF 5% 5%
16V 1 16V 43 50_B34_B39_HB_SWITCH_IN 10 TX6 25V
NP0-C0G NP0-C0G C0G
01005 01005 0201
L4706_RF R4708_RF 50_B40A_B41A_RX 14 RX1
1.0NH+/-0.1NH-0.580A 0.00 2
01005 50_B40B_RX_MATCH 1 50_B40B_RX 13 RX2 RX RF1 16 50_HB_SWITCH_RX 45

0% 50_B38X_RX 15 RX3
1/32W
2 MF 1
01005 48 45 44 43 41 40 35 RFFE_VIO 4 VIO
50_B41A_PRX_MATCH2
RFFE2_CLK 3 SCLK
RADIO_HBSWITCH
1 C4702_RF L4710_RF 48 45 35 30

RFFE2_DATA 2 SDATA
12NH-3%-0.140A 45 35 30
48
15PF 01005 THRM
5% RADIO_HBSWITCH
16V
2 NP0-C0G-CERM GND PAD
01005

17
2
TDD-LTE

RADIO_HBSWITCH

FR38X40B
C4701_RF L4713_RF SAW-BAND-40B-38X-TDD-RX
2.7NH+/-0.1NH-0.370A 885056
100PF
2 RF3/RX_B40B 9 R4707_RF
36 50_B40B_B38X_PRX_WTR_IN 1 2 1
50_B40B_B38X_PRX_MATCH2 2 RF1/ANTLGA 6 50_B38X_RX_MATCH 1
0.00 2
01005 RF2/RX_B38X
5%
50_B40B_B38X_PRX_FILTER
0%
10V
GND
GND
GND
GND
GND
GND
GND

1/32W
NP0-C0G 1 MF 1
01005 1 01005
B TDD-LTE B
1
3
4
5
7
8
10

L4704_RF L4712_RF L4708_RF


3.7NH-+/-0.1NH-0.27A 2.9NH-+/-0.1NH-0.36A
01005 2.7NH+/-0.1NH-0.370A 01005
01005
RADIO_HBSWITCH

2 2
2

A A
PAGE TITLE

HIGH BAND SWITCH DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
47 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 46 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

RX DIVERSITY (1)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
C4826_RF
R1800
L1829
U1801
MIDBAND
D MIDBAND DIVERSITY - WFR HIGHBAND DIVERSITY - WTR LOWBAND DIVERSITY - WTR D
RADIO_WTR
L4806_RF L4813_RF RADIO_WTR
L4825_RF
1.8NH+/-0.1%-0.380A C4813_RF C4823_RF
3.3NH+/-0.1NH-290MA 100PF 18NH-3%-0.140A 100PF
38 50_B1_B4_DRX_WFR_IN 1 2 50_B1_B4_DRX_DSM 48
1 2 1 2 1 2
01005 36 50_B7_DRX_WTR_IN
1 2 50_B7_DRX_WTR_MCH 50_B7_DRX_DSM 48 50_B8_B28B_DRX_WTR_IN 50_B8_B28B_DRX_DSM 48
01005 01005-1
5% 16V01005 50_B8_B28B_DRX_WTR_MCH 5%
RADIO_WTR RADIO_WTR NP0-C0G 16V
NP0-C0G
L4803_RF C4809_RF
01005
3.6NH+/-0.1NH-0.280A 1.1PF R4811_RF 1 C4820_RF
1 2 0.00 2 0.3PF
1 2 50_B7_DRX_MATCH1 +/-0.05PF
01005
+/-0.1PF
0% 2 16V
C0G-CERM
1/32W
16V MF 01005
NP0-C0G 01005
01005

RADIO_WFR RADIO_WTR RADIO_WTR


RADIO_WTR
L4805_RF C4805_RF L4826_RF C4825_RF
1.8NH+/-0.1%-0.380A 100PF R4818_RF 22NH-5%-0.1A 100PF
1 2 0.00 2
38 50_B3_DRX_WFR_IN 1 2 50_B3_DRX_DSM 48 36 50_B38X_DRX_WTR_IN 1 50_B38X_DRX_DSM 48 36
1 2 1 2 50_B13_B17_DRX_DSM 48
01005 50_B3_DRX_WFR_MCH
5% 16V01005
0% 50_B13_B17_DRX_WTR_IN 01005 50_B13_B17_DRX_WTR_MCH
5%
1/32W
NP0-C0G MF 10V
L4801_RF 01005 NP0-C0G
C4824_RF2.4NH+/-0.1NH-0.370A 01005
33PF L4814_RF 1 C4831_RF
1 2 1 2 1.8NH+/-0.1%-0.380A 0.8PF
+/-0.05PF

C 5%
16V 50_B3_DRX_WFR_MCH_MATCH
NP0-C0G-CERM
01005 1
01005
2 2 16V
C0G-CERM
01005 C
01005

RADIO_WTR
RADIO_WTR RADIO_WTR
RADIO_WFR
L4804_RF C4804_RF L4830_RF L4823_RF C4827_RF
1.6NH+/-0.1NH-0.390A 100PF 0.4NH+/-0.1NH-0.990A 22NH-5%-0.1A 100PF
1 2 1 2 1 2 1 2
50_B20_B29_DRX_DSM
38 50_B25_DRX_WFR_IN 1 2 50_B25_DRX_DSM 48 36 50_B40_DRX_WTR_IN 50_B40_DRX_FILTER 48 36 48
50_B20_B29_DRX_WTR_MCH
01005 50_B25_DRX_WFR_MCH
5% 16V01005
01005 50_B20_B29_DRX_WTR_IN 01005
5%
RADIO_WFR NP0-C0G 10V
NP0-C0G
L4802_RF 01005
C4802_RF 2.3NH+/-0.1NH-0.370A
33PF
1 C4832_RF
1 2 1 2
L4812_RF 0.8PF
+/-0.05PF
2.4NH+/-0.1NH-0.370A 16V
2 C0G-CERM
01005
5% 50_B25_DRX_MATCH 1 2 01005
16V
NP0-C0G-CERM 01005
01005

RADIO_WTR
RADIO_WTR RADIO_WTR C4826_RF L4829_RF
C4816_RF 100PF 8.2NH-3%-0.19A-1.6OHM
R4817_RF 100PF 50_B26_B28A_DRX_DSM
0.00 2 50_B26_B28A_DRX_WTR_IN 1 2 1 2

MIDBAND DIVERSITY - WTR


36 48
36 50_B41A_DRX_WTR_IN 1 1 2 50_B41A_DRX_FILTER 48
50_B26_B28A_DRX_WTR_MCH 01005
0% 50_B41A_DRX_WTR_MCH 5%
1/32W 5% 16V01005 16V
RADIO_WTR01005
MF NP0-C0G NP0-C0G 1
01005
B RADIO_WTR
L4807_RF
C4830_RF
15PF
L4815_RF
1.3NH+/-0.1NH-0.400A L4827_RF B
2.0NH+/-0.1NH-0.380A 1 2 1 2 13NH-+/-0.3%-0.14A
01005
36 50_B34_DRX_WTR_IN1 2 50_B34_DRX_DSM 48
5%
01005
01005 16V 50_B41A_DRX_WTR_MCH_MATCH
NP0-C0G-CERM 2
RADIO_WTR 01005
L4808_RF
3.6NH+/-0.1NH-180MA
1 2
01005
NOSTUFF
RADIO_WTR
RADIO_WTR
L4819_RF C4817_RF
2.2NH+/-0.1NH-0.380A 100PF
RADIO_WTR 36 50_PCS_WTR_IN 1 2 1 2 50_PCS_DSM_OUT 48
RADIO_WTR 01005 50_PCS_WTR_RX_MCH
L4809_RF C4808_RF 5% 16V01005
2.0NH+/-0.1NH-0.380A 100PF NP0-C0G
36 50_B39_DRX_WTR_IN 1 2 50_B39_DRX_WTR_MCH1 1 2 50_B39_DRX_DSM 48 RADIO_WTR
01005
5% 16V01005 C4811_RF L4820_RF
RADIO_WTR NP0-C0G 47PF 2.7NH+/-0.1NH-0.370A
L4810_RF 1 2 1 2
C4806_RF
2.2NH+/-0.1NH-0.380A
33PF 5% 50-PCS_DRX_WTR_MCH2
01005
1 2 1 2 16V
CERM
01005 01005
5% 50_B39_DRX_WTR_MCH2
16V
NP0-C0G-CERM
01005
RADIO_WTR
L4822_RF
A 2.2NH+/-0.1NH-0.380A C4818_RF
100PF A
50_DCS_WTR_IN 1 2 1 2 50_DCS_DSM_OUT PAGE TITLE
36
01005 50_DCS_WTR_RX_MCH
5% 16V01005
NP0-C0G
48

RX DIVERSITY DRAWING NUMBER SIZE


RADIO_WTR
L4821_RF Apple Inc. 051-9903 D
C4812_RF
47PF 5.6NH-3%-0.23A-1.3OHM REVISION

1 2 1 2
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
5% 50_DCS_DRX_WTR_MCH2
01005
16V THE INFORMATION CONTAINED HEREIN IS THE
CERM PROPRIETARY PROPERTY OF APPLE INC.
01005 THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
48 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 47 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

RX DIVERSITY (2)
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
C1900
R1900
L1900
U1901

D D

L4905_RF
22-OHM-25%-0.2A-0.9DCR
C VCC_DSM 1 2 PP_VCC_MAIN 10 12 14 15 16 17
23 26 31 39 51 52
C
01005
1 C4901_RF
15PF
5%
16V
2 NP0-C0G-CERM
01005

2
VBATT

VIO 3 RFFE_VIO 35 40 41 43 44 45 46

47 50_B1_B4_DRX_DSM 32 B1/B4 U_DSM_RF


33 HFQSWBXUA-221 SDATA 4 RFFE2_DATA 30 35 45 46
47 50_B3_DRX_DSM B3
16 LGA
47 50_B7_DRX_DSM B7 SCLK 5 RFFE2_CLK 30 35 45 46

47 50_B8_B28B_DRX_DSM 19 B8/B28B
ANT LB 7 50_LB_DIVERSITY_ASM
50_B13_B17_DRX_DSM 25
45
47 B13/B17
47 50_B25_DRX_DSM 34 B25 ANT HB 9 50_HB_DIVERSITY_ASM 45

47 50_B26_B28A_DRX_DSM21 B26/B28A
PCS 29 50_PCS_DSM_OUT
47 50_B20_B29_DRX_DSM 23 B20/B29
47

47 50_B34_DRX_DSM 12 B34 DCS 30 50_DCS_DSM_OUT 47


FD40B41A 47 50_B39_DRX_DSM 13 B39
SAW-2-1-BAND-40-41A-DRX
47 50_B38X_DRX_DSM 17 B38X
B39252B9920P810
47 50_B40_DRX_FILTER 6 B40OUT B40IN 4 50_B40_DRX_DSM 14 B40
47 50_B41A_DRX_FILTER 9 B41AOUT
LGA B41AIN
1 50_B41A_DRX_DSM 15 B41A
GND
GND
GND
GND
GND
GND

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
THRM
PAD
1 1
1 1
10
8
7
5
3
2

1
6
8
10
11
18
20
22
24
26
27
28
31

35
36
37
38
39
40
B L4901_RF L4903_RF
B
9.1NH-3%-0.17A-1.7OHM L4902_RF 8.2NH-3%-0.19A-1.6OHM L4904_RF
01005 5.6NH-3%-0.23A-1.3OHM 01005 5.1NH-3%-0.250A
RADIO_DSM 01005 RADIO_DSM 01005
RADIO_DSM RADIO_DSM
2 2
2 2

A A
PAGE TITLE

GPS DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
49 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 48 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

GPS
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
C1900
R1900
L1900
U1901

D D

C L5002_RF
C
10NH-3%-0.170A
FL_GPSRF 100_GPS_DSM_P_OUT 1 2 100_GPS_WTR_IN_P 36
LNA-GNSS-BAL 01005
B8821
LGA RADIO_GPS
BAL_PORT 3 1 C5001_RF
50 50_GPS_DSM_IN 1 UNBAL_PORT BAL_PORT 4 1.0PF
+/-0.1PF

GND
GND
16V
2 NP0-C0G
01005

2
5
L5003_RF
10NH-3%-0.170A
100_GPS_DSM_M_OUT 1 2 100_GPS_WTR_IN_N 36
01005

B B

A A
PAGE TITLE

GPS DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
50 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 49 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

ANTENNA FEED’S
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
TEST & COAX CONNECTOR FOR LOWER SECTION OF MLB

RADIO_LOW_ANT RADIO_UP_ANT
D LOW_COAX UP_COAX D
MM6829-2700B MM6829-2700B
F-ST-SM F-ST-SM R5130_RF
0.00
45 50_ANT2_CONN 1 1 50_ANT2_UPPER_COAX_CONN
1 2 50_TRIPLEX_CELL
1%
1/20W 1

3
2

2
3
MF
0201
RADIO_UP_ANT
L5124_RF
18NH-3%-0.140A
01005
RADIO_UP_ANT
NOSTUFF
L5128_RF
2
33-OHM-25%-1500MA
VOLTAGE=2.95V
PP_LDO13_GPS 1 2 PP_LDO13 31 33
RADIO_UP_ANT
0201
UAT_SPLT
MM6829-2700B F_TRI_RF 1
1 C5130_RF
F-ST-SM R5131_RF ACFM-W012-AP1 CELL 1
C5129_RF
22PF
2.2UF
50_CELL_WIFI_GPS_TRIPLEX_ANT 0.00 2 6 LGA 20%
1 1 50_TRIPLEX_ANT_MCH ANT GPS/GNSS 9 5%
16V 2
6.3V
X5R
2 CERM
1% GND WIFI 14 01005
0201-1
1/20W RADIO_UP_ANT
1 1 EPAD

2
3
MF RADIO_UP_ANT RADIO_UP_ANT
0201

17

16
15
13
12
11
10
8
7
5
4
3
2
50_TRIPLEX_GPS
L5126_RF L5125_RF

1
10NH-3%-0.3A 18NH-3%-0.140A
0201 01005 L5127_RF VDD
SKY65746-14
NOSTUFF
RADIO_UP_ANT
NOSTUFF
3.9NH+/-0.1NH-0.270A
2 2 1 2
50_GPS_LNA_INU_GPSLNA
3 RF_IN RF_OUT 6 50_GPS_DSM_IN 49
LGA
01005

C 51
50_WIFI_2G_NOTCHPLEXER_IN 1 GND EPAD C

2
4
5

7
L5123_RF
18NH-3%-0.140A
01005
RADIO_UP_ANT
NOSTUFF
2

TP_SHORT_PIN
P2MM-NSM
SM
PP
1 NORTH_ANT_GND 29

RADIO_UP_ANT
UAT_METR
TP_UAT_GND TP_UAT C5122_RF MM6829-2700B
F-ST-SM
P2MM-NSM
SM
P2MM-NSM
SM
12PF
PP
1 PP
1 29 50_UPPER_ANT_FEED 1 2 50_UPPER_ANT_MCH 1

5%
ANT_GND 1 25V

3
2
29 50
CERM
B L5122_RF
12NH-310MA
1 C5111_RF
0.7PF
0201 1
B
03015 +/-0.05PF
2 25V
L5112_RF
C0G-CERM 12NH-310MA
0201 03015
NOSTUFF
2
2
50_UAT_MATCH
1 C5112_RF
15PF
2
5%
25V
TO 5GHZ WIFI ANTENNA FEED FROM 5GHZ WIFI
NPO
0201

50 29 ANT_GND WIFI_BT WIFI_BT


WI5G_ANT WI5G_CN
TP_WIFI_5G_GND TP_WIFI_5G MM6829-2700B MM6829-2700B
P2MM-NSM P2MM-NSM R5132_RF F-ST-SM F-ST-SM
1 50_WIFI_5G_CONN_ANT 1 0.00 250_WIFI_5G_CONN_MCH
SM SM
PP
1 29
PP
1 1 50_WIFI_5G_IN_OUT BI 51

1%
1/20W
1 C5132_RF

3
2

2
3
MF RADIO_UP_ANT
0201
0.2PF
+/-0.05PF
25V
2 COG-CERM
0201
50 29 ANT_GND NOSTUFF

A A
PAGE TITLE

L5129_RF
1.4NH+/-0.1NH-1.1A
LOW_ANT
MM5829-2700
F-ST-SM
ANTENNA FEEDS DRAWING NUMBER SIZE
45 50_ANT1_CONN 1 2 50_ANT1_SW 1
Apple Inc. 051-9903 D
0201 REVISION
1 C5128_RF R
7.0.0

4
3
2
0.2PF
+/-0.05PF NOTICE OF PROPRIETARY PROPERTY: BRANCH
2 25V
COG-CERM
0201 THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
RADIO_LOW_ANT I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
51 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 50 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

WLAN/BT
WIFI_BT
39 31 26 23 17 16 15 14 12 10
PP_VCC_MAIN
52 48 IN

WIFI_BT
1 C5202_RF WIFI_BT
1 C5203_RF

D 20%
10UF 27PF
5% D
2 6.3V
CERM-X5R 2 16V
NP0-C0G
WIFI_BT
0402-1 01005
R5214_RF
1
0 2
50_WIFI_2G_NOTCHPLEXER_IN
BI 50

WIFI_BT 5% WIFI_BT
1/20W
WIFI_BT C5213_RF MF 1 C5211_RF
R5208_RF 201
PP_WL_BT_VDDIO_AP 1 0.00 2 51 PP_WLAN_VDDIO_1V8 0.2PF 0.2PF
+/-0.1PF +/-0.05PF
29 IN
VOLTAGE=1.80V 16V 2 25V
0% NP0-C0G COG-CERM
1/32W WIFI_BT WIFI_BT 01005 0201
MF 1 C5204_RF 1 C5205_RF NOSTUFF NOSTUFF
01005 0.01UF 27PF
10% 5%
2 6.3V 2 16V
X5R NP0-C0G WIFI_BT
01005 01005
WIFI_BT FL5201_RF WIFI_BT
5.15-5.92GHZ

VDDIO_1P8V 22

VBATT 23
VBATT 24

VBATT_RF_VCC 54
VBATT_RF_VCC 55
R5215_RF LFB185G53CGCD878 R5216_RF
1
0 2 50_WIFI_5G_BPF_RADIO 1 3 50_WIFI_5G_BPF_MATCH 1
0 2 50_WIFI_5G_IN_OUT
BI 50

32K INTERFACE TO AP WIFI_BT 5%


1/20W
WIFI_BT WIFI_BT 5%
1/20W
WIFI_BT
C5208_RF C5212_RF C5216_RF C5217_RF

2
MF MF
201 201
0.2PF 0.2PF 0.2PF 0.2PF
+/-0.1PF +/-0.1PF +/-0.1PF +/-0.1PF
WIFI_BT 16V 16V 16V 16V
30 29 IN
CLK32K_AP 36 CLK32K 2G_ANT 45 50_WLAN_G_ANT NP0-C0G
01005
NP0-C0G
01005
NP0-C0G
01005
NP0-C0G
01005
5G_ANT 58 50_WLAN_A_ANT NOSTUFF NOSTUFF NOSTUFF NOSTUFF
WLAN_VIN_1P35 26 VIN_LDO WIFI_BT
WIFI_BT
C5201_RF WLAN_SR_VLX 28 SR_VLX
7.5UF WIFI_BT U5201_RF
20% LBEE5U8ZKC-646 GPIO_1 8 PCIE_DEV_WAKE IN 29 30
4V L5201_RF
CERM 2.2UH-20%-0.3A-0.38OHM 30 29 IN
WLAN_REG_ON 9 WL_REG_ON LGA BT_HOST_WAKE 43 HOST_WAKE_BT OUT 29
0402 WAKE_BT
30 29
BT_REG_ON 10 BT_REG_ON BT_DEV_WAKE 42 29 30

C
1 3 1 2 IN IN
C 2 4
WLAN_SR_LC 0603
BT_UART_CTS* 38 BT_UART_CTS_L 29
1 WIFI_BT
IN R5210_RF
30 29
HOST_WAKE_WLAN 30 GPIO_0 BT_UART_RTS* 39 BT_UART_RTS_L 29 100K
OUT OUT
WLAN_PCIE_WAKE_L 12 41 BT_UART_RXD 5%
30 29 OUT PCIE_WAKE* BT_UART_RXD IN 29 30 1/32W
WLAN_PCIE_PERST_L 14 40 BT_UART_TXD MF
51 30 29 IN PCIE_PRST* BT_UART_TXD OUT 29 30
2 01005
30 29
WLAN_PCIE_CLKREQ_L 13 PCIE_CLKREQ*
BI
29
90_WLAN_PCIE_REFCLK_N 16 PCIE_REFCLK_N
IN
29
90_WLAN_PCIE_REFCLK_P 17 PCIE_REFCLK_P
IN 49 BT_PCM_CLK
90_WLAN_PCIE_RDN 20 BT_PCM_CLK BI 29
30 29 IN PCIE_RDN 50 BT_PCM_SYNC
90_WLAN_PCIE_RDP 21 BT_PCM_SYNC BI 29
30 29 IN PCIE_RDP 48 BT_PCM_IN
90_WLAN_PCIE_TDN 18 BT_PCM_IN IN 29
30 29 OUT PCIE_TDN 47 BT_PCM_OUT
90_WLAN_PCIE_TDP 19 BT_PCM_OUT OUT 29
30 29 OUT PCIE_TDP

DC BLOCKS LOCATED ON AP SIDE


SWIZZLE DATA LANE ON TOP-LEVEL UART_RTS(GPIO_7) 56 WLAN_UART_RTS_L
OUT 29 30

UART_CTS(GPIO_8) 4 WLAN_UART_CTS_L 29 30
IN
51
JTAG_SEL 11 JTAG_SEL UART_RX(GPIO_9) 3 WLAN_UART_RXD 29 30
IN
30 29
WLAN_JTAG_SWDCLK 31 JTAG_TCK(GPIO_2) UART_TX(GPIO_10) 2 WLAN_UART_TXD 29 30
IN OUT
WLAN_JTAG_SWDIO 34 WIFI_BT
30 29 BI JTAG_TMS(GPIO_3) R5206_RF
29 IN
OSCAR_CONTEXT_A 32 JTAG_TDI(GPIO_4)
SECI_TX(GPIO_13) 6 WLAN_COEX_TXD 1
0.002 BB_COEX_UART_RXD 30 35
35 JTAG_TDO(GPIO_5)
NC SECI_RX(GPIO_14) 5 WLAN_COEX_RXD 0%
29
OSCAR_CONTEXT_B 33 JTAG_TRST(GPIO_6) 1/32W
IN
RF_SW_CTRL_8 7 NC MF
01005
GND THRM_PAD
WIFI_BT
51 30 29 WLAN_PCIE_PERST_L R5205_RF
0.002
1
15
25
27
29
37
44
46
51
52
53
57

59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
B 1
0%
BB_COEX_UART_TXD 30 35
B
1 C5215_RF 1/32W
MF
100PF 01005
5%
16V
2 NP0-C0G
01005

PP_WLAN_VDDIO_1V8 51

1 WIFI_BT
R5201_RF
10K
5%
1/32W
MF
2 01005
NOSTUFF

JTAG_SEL
A 51

SYNC_MASTER=N/A SYNC_DATE=N/A A
PAGE TITLE
1 WIFI_BT
R5202_RF WIFI/BT: MODULE AND FRONT END
10K DRAWING NUMBER SIZE
5%
1/32W
MF Apple Inc. 051-9903 D
2 01005 REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.

MODULE BOOT-STRAPPED TO PCIE INTERNALLY THE POSESSOR AGREES TO THE FOLLOWING:


I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
PAGE
52 OF 55
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSE ONLY - NOT A CHANGE REQUEST III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 51 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1
C2101

STOCKHOLM
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.
R2100
L2102
U2100

D D

REMOVING BULK CAP 4.7UF 0402 -->


BECAUSE OF OTHER BULK CAPS IN LAYOUT

52
31 26 23
14 12 10 IN
PP_VCC_MAIN
17 16 15
51 48 39

52 51
PP_STOCKHOLM_VDD 14
PP_VCC_MAIN 10 IN
VOLTAGE=1.80V RADIO_STOCKHOLM RADIO_STOCKHOLM
12
54 52 29 IN PP_STOCKHOLM_1V8_S2R 48 39 31 26 23 17 16 15
1 C5304_RF 1 C5305_RF
RADIO_STOCKHOLM PP_STOCKHOLM_ESE
NC

NC

1 C5302_RF VOLTAGE=1.80V 1UF 0.1UF


RADIO_STOCKHOLM 20% 20%
1UF 1 C5303_RF 10V 6.3V RADIO_STOCKHOLM
C5306_RF 1 1 RADIO_STOCKHOLM
C5307_RF
C6
C7
D7
D3

VUP G2
TVDD E7

SVDD_IN G1

SVDD B7
ESE_VDD C5
20% 2 X5R 2 X5R-CERM
10V 0.1UF 0201 01005 0.22UF 0.22UF
2 X5R 20% 20% 20% C5312_RF
VDD/RF_IF_VDD
VBAT
VDHF
PVDD

C
0201 2 6.3V
X5R-CERM
01005
6.3V 2
X5R
0201
6.3V
2 X5R
0201
220PF
STOCKHOLM_ANT_MATCH
1 2 1 C5314_RF 1 C5315_RF C
390PF 220PF

C5

D5
1 C5310_RF 2% 2% 2%
R5319_RF

3
4
560PF
50V 2 50V
C0G
50V
2 NPO-COG
1.00K2 VDD VDD_RF NPO-COG

BAL1
ATB201206E-20011

UNBAL
STOCKHOLM_RF_DATA_IO 1 10% 0402 0402 0402
52 50V
U5301_RF 2 X7R-CERM 29
PN65V 5% RADIO_STOCKHOLM
U5302_RF 0201 STOCKHOLM_ANT

T5301_RF
1/32W

STOCKHOLM_HOST_WAKE D1
UFLGA
A4 STOCKHOLM_SIM_SWP
MF
01005 AS3923-B0-BWLT
RADIO_STOCKHOLM
C5313_RF 1 C5316_RF
30 29 OUT IRQ SIM_SWIO BI 30 54 WLCSP 33PF 330PF

0805
ALWAYS ON PULL-UP --> NC B3 SVDD_REQ SIM_VCC A5 VOLTAGE=1.80V PP_PN65_VCC_SIM A2 RF_IF_VDD CDMP1 B3 1 2 2%
STOCKHOLM_FW_DWLD_REQ A1
OUT
A4
L5301_RF 25V
2 NPO-COG
52 29 IN DWL SIM_PMU_VCC B5 PP_PN65_SIM_PMU
IN 54 RF_DATA_IO CDMP2 B4 78NH-5%-0.97A-0.13OHM 2% TP5303_RF
1 0201
BB_REQUEST_XO_CLK A2 CLK_REQ TX_PWR_REQ F2 A5 RF_CLK_RX
STOCKHOLM_CDMP2 25V A
32 30 OUT NC 1 2 NPO-COG TP-P55
REF_CLK_FROM_BB A3 CLK_XTAL1 1 B2 RF_CLK_TX 0201

BAL0
32 30 IN
ESE_DWPM_DBG D5 R5303 RFO1 C4 0402 TP5304_RF

GND
STOCKHOLM_UART_RXD C1 RX NC 10K 1
30 29 IN
ESE_DWPS_DBG E5 5%
STOCKHOLM_RFO1 L5302_RF A
30 29 OUT
STOCKHOLM_UART_TXD D2 TX NC 1/32W 78NH-5%-0.97A-0.13OHM
STOCKHOLM_RF02 TP-P55
RFO2 C3

2
1
STOCKHOLM_CTS_L B1 MF
30 29 IN CTS G7 R5316_RF 2 01005 1 2
STOCKHOLM_RTS_L ANT1 NC
30 29 OUT
B2 RTS F6
STOCKHOLM_RF_CLK_RX 0.00 2 A1 TIO 0402
RXP/RF_CLK_RX 1 STOCKHOLM_RF_CLK_RX_ASM3923 STOCKHOLM_RFI1
52 29
STOCKHOLM_ENABLE E1 VEN RFI1 D1 1 C5311_RF
IN G3 0% A3 GP_IO
TX1 NC NC 560PF
1/32W
E3 SMX_RST* TX2 G5 MF 52 29 STOCKHOLM_ENABLE B1 NRES 10%
NC 01005 RFI2 C1
STOCKHOLM_RFI2 50V
2 X7R-CERM
E4 SMX_CLK RXN/RF_CLK_RX F5
NC R5317_RF 0201
F4 ESE_IO1 ANT2 G6 0.00 RADIO_STOCKHOLM
NC NC STOCKHOLM_RF_CLK_TX 1 2 STOCKHOLM_RF_CLK_TX_ASM3923 VSP_RF D3
STOCKHOLM_VSP_RF
E6 ESE_IO2 VMID F7
NC 0%
A7 ESE_IO3 1/32W
NC RF_CLK_TX F1 MF VSP C2
STOCKHOLM_VSP
A6 ESE_IO4

B5 VSS_DMP
01005
NC RF_DATA_IO B4
R5318_RF

D4 VSS_RF
0.00 1 C5308_RF 1 C5309_RF
C3 XTAL2 1
STOCKHOLM_RF_DATA_IO 2 STOCKHOLM_RF_DATA_IO_ASM3923
NC 52
1UF 0.022UF
TVSS
PVSS

D2 VSS
VSS

GND
GND
GND
GND
GND

0% 20% 10%
1/32W 6.3V
2 X5R 2 6.3V
STOCKHOLM_VMID X5R-CERM

B B
MF
01005 0201 0201
RADIO_STOCKHOLM RADIO_STOCKHOLM
E2

B6
C4
D4
D6
F3

G4
C2

RADIO_STOCKHOLM
1 C5317_RF TP5301_RF
1 STOCKHOLM_TIO
A
0.1UF TP-P55
20%
6.3V
2 X5R-CERM TP5302_RF
1
01005 A
TP-P55

54 52 29 PP_STOCKHOLM_1V8_S2R NOSTUFF
1 RADIO_STOCKHOLM
R5301_RF
100K
5%
1/32W
MF
2 01005
52 29 IN STOCKHOLM_ENABLE

52 29 IN STOCKHOLM_FW_DWLD_REQ

1 RADIO_STOCKHOLM
R5302_RF
100K
5%
1/32W
MF
2 01005

A SYNC_MASTER=N/A SYNC_DATE=N/A A
PAGE TITLE

DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
53 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 52 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

ON-BOARD JUMPER FLEX


D D

UAT JUMPER
L5408_RF
120NH-5%-40MA
PAC2_VDD_3V0_FILTER 1 2 PAC_VDD_3V0 29
0201
1 C5405_RF 1 C5403_RF
33PF 0.01UF
5% 10%
2 16V 25V
2 X5R-CERM
NP0-C0G
01005 0201

6
C C

VDD
U5411_RF L5407_RF
R5401_RF RF1331 120NH-5%-40MA
RFFE2_CLK_BUFFER 0 WLCSP VIO_FILT RFFE_VIO_S2R
35 1 2 SCLK_FILT 5 SCLK VIO 3 1 2 29

5%
1/20W
MF
201
SDAT_FILT 4 SDAT 0201
1 C5401_RF 1
33PF RF1A
5% 10 RF1B 1 C5408_RF 1 C5404_RF
2 16V
NP0-C0G 0.01UF 33PF
01005 9 10% 5%

RFGND1
RFGND2
RF2A
8 2 25V
X5R-CERM 2 16V
NP0-C0G

GNDA
RF2B 0201 01005

11

2
7
R5402_RF
RFFE2_DATA_BUFFER 1
0 2
35

5% MF
1/20W 201 1 C5402_RF
33PF
5%
2 16V
NP0-C0G L5403_RF C5407_RF TP3
01005 13NH-280MA 12PF P2MM-NSM
L_2AB 1 2 UAT_MID 1 2 UAT SM
1 PP
03015
1 C5409_RF 2%
25V
B 0.5PF
0.05PF
25V
2 NP0-C0G
C0G-CERM
0201 B
0201

L5402_RF
13NH-280MA
L_1B 1 2
03015

L5401_RF
27NH
L_1A 1 2
03015

L5400_RF
13NH-280MA
03015

A A
PAGE TITLE

JUMPER
DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
54 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 53 OF 54
8 7 6 5 4 3 2 1
8 7 6 5 4 3 2 1

DSDS
CONFIDENTIAL AND PROPRIETARY APPLE SYSTEM DESIGN. FOR REFERENCE PURPOSES ONLY - NOT A CHANGE REQUEST.

D D

54 33 31 30 PP_LDO6

1
R5501_RF
1 C5501_RF 15.00K
2.2UF 1%
20% 1/32W
MF
2 6.3V
X5R 2 01005
0201-1
NOSTUFF

8
NOSTUFF
VCC

U5501_RF
5
ST33F1MFE
34 30
DSDS_SIM_CLK CLK UFDFPN SWIO 2 DSDS_SIM_SWP 30 54

DSDS_SIM_RESET 6 IO1 3 NC
R5503_RF 34 30 RST
NC1 7
C 0.00 2 NC C

EPAD
DSDS_SIM_DATA DSDS_SIM_DATA_R 4

GND
1 30
34 30 IO0
0%
1/32W
MF NOSTUFF NOSTUFF

9
01005

52 29 PP_STOCKHOLM_1V8_S2R

29
STOCKHOLM_VDD_MUX_3V0

1 C5502_RF
2.2UF

D2
20%

A2
2 6.3V
X5R
B 0201-1
NOSTUFF
V+ VIO
U5502_RF
B
R5504_RF TS3DS26227YZT D1 4FF_SIM_SWP
BI 30 54
PP_LDO5 1
0.00 2 PP_PN65_SIM_PMU WCSP NC1
54 33 31 30 52 54
54 29
STOCKHOLM_SIM_SEL A1 IN1 NO1 B1 DSDS_SIM_SWP 30 54
0% IN BI
1/32W D3 NC2
MF 54 33 31 30
PP_LDO5 COM1 C1 STOCKHOLM_SIM_SWP 30 52 54
01005 BI
PP_LDO6 B3 NO2 IN2 A3 STOCKHOLM_SIM_SEL
R5505_RF 54 33 31 30 29 54

4FF_SIM_SWP 1
0.00 2 STOCKHOLM_SIM_SWP PP_PN65_SIM_PMU C3 COM2 1
54 30 30 52 54 54 52 OUT R5502_RF NOSTUFF
0% VOLTAGE=3.00V 10K DEFAULT LOW = 4FF
1/32W 1%
MF GND 1/32W
01005 MF
NOSTUFF 01005 2

B2
C2
RADIO_BB

A A
PAGE TITLE

JUMPER
DRAWING NUMBER SIZE

Apple Inc. 051-9903 D


REVISION
R
7.0.0
NOTICE OF PROPRIETARY PROPERTY: BRANCH
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
THE POSESSOR AGREES TO THE FOLLOWING: PAGE
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
55 OF 55
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET
IV ALL RIGHTS RESERVED 54 OF 54
8 7 6 5 4 3 2 1

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