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A Major-Project Report on
Bachelor of Technology
in
Electrical Engineering
Submitted by:
Certificate
Certified that the major-project work entitled “Multilevel Inverter With Reduced
Switches” is bonafide work carried out by Mayuri Sunil Ethape, Kshitija Shivajirao
Kalyankar and Saiprasad Gangaram Konda in partial fulfillment of requirements for
award of the Degree of Bachelor of Technology in Electrical Engineering from Dr.
Babasaheb Ambedkar Marathwada University, Aurangabad during the year 2020-2021. It is
certified that all the suggestions indicated for internal assessment have been incorporated
in the report. The Major-project report has been approved as it satisfies the academic
requirements in respect of Major-project work prescribed for the Bachelor of Technology
degree.
1)
2)
3)
DECLARATION
Page |3
We further undertake that the matter embodied in the report has not been
submitted previously for the award of any degree or diploma by us to any other university
or institution.
Place: Aurangabad Mayuri Sunil Ethape
ACKNOWLEDGEMENT
Page |4
The satisfaction that accompanies the successful completion of this project would
be incomplete without the mention of the people who made it possible, without whose
constant guidance and encouragement would have made efforts go in vain. We consider
our privileged to express gratitude and respect towards all those who guided us through
the completion of this project.
We convey thanks to our Major-Project guide Mr. B. Raja Guru of Electrical
Engineering Department for providing encouragement, constant support and guidance
which was of a great help to complete this Major-project successfully.
We grate Dr.R.K.Kanhe, Head of the Department Electrical Engineering for
giving us the support and encouragement that was necessary for the completion of this
Major-project.
We would also like to express our gratitude to Dr. S.P. Bhosle, Principal,
Maharashtra Institute of Technology, Aurangabad for providing us congenial
environment to work in.
Page |1
ABSTRACT
Multilevel inverters are used to convert DC supply into AC supply for the medium
and high voltage and power applications. It generates output voltage with less harmonic
distortion and quality of power is improved. Their performance is highly superior to that
of the conventional inverters due to reduced harmonic distortion. Circuit complexity is
major issue in most of the topologies of multilevel inverter. As the number of level
increases the number of switches increases and the switching method becomes more
complicated. The main objective of the proposed topology is to increase number of levels
in the output voltage with reduced number of switches. This concept helps to reduce the
complexity of switching method and overall cost compared to other multilevel inverters.
The topology we used requires three dc voltage sources and nine switches to get 15 levels
output and four dc voltage sources and ten switches to get 25 levels output. The operation
and performance of the single-phase 15-level multilevel inverter and single-phase 25-
level multilevel inverter is verified by the simulation. Simulation analysis of the inverter
topology is carried out by using MATLAB/SIMULINK software. The results for THD
are validated by using the FFT window.
Page |2
INDEX
LIST OF FIGURES
LIST OF TABLES
CHAPTER I
INTRODUCTION
This project is about multilevel inverter (MLI). The multilevel inverter used to
convert the DC power to AC power which is connected to AC loads .This chapter gives a
brief summary about the project.
1.1 Introduction
Multilevel Inverters are very popular now days because of lesser harmonic
content, high voltage operation capability, low switching losses and high efficiency. The
word ‘multilevel converter’ refers to the converter itself. Power which flow from the ac
side to the dc side of the multilevel converter operated in rectification mode. Vice-versa,
the power also can flow from the dc side to the ac side of the converter. This mode is
called as inverting mode of operation. The ‘multilevel inverter’ term basically is a
‘multilevel converter’ that uses the inverting mode of operation. Multilevel inverters are
developed for producing desired output at different levels from DC voltage sources. By
increasing the number of dc voltage sources, close to sinusoidal waveform can be
generated. Multilevel inverters have a number of applications such as ups, in power grid,
as solar inverter, induction heating and number of other applications.
Multilevel inverter is an arrangement of power semiconductor switches and
voltage sources. Multilevel inverters are suitable for high-voltage and high-power
applications because of their ability to synthesize output voltage waveforms with a better
harmonic spectrum and attain higher voltages. There are three main types of multilevel
inverters: diode-clamped, capacitor-clamped and cascaded H-bridge inverter. From this,
cascade MLI has more amount of interest in industry because it requires fewer
components with high power quality waveform due to reduction in harmonic distortion
and also the reduction of dv/dt stresses on the load.
Page |2
The diode clamped inverter produce multiple outputs voltages utilizing the
technique of connection of the phases to a series bank of capacitors. The first diode
clamped inverter was limited to three levels but nowadays the level can be extended by
increasing the number of capacitor connected across the dc bus resulting in additional
voltage levels. The diode is used as the clamping device to clamp the dc bus voltage so as
to achieve steps in the output voltage, however the number of level of multilevel inverter
must be odd number because in the case of even number level the neutral point can’t be
accessed.
Page |4
Advantages:
All of the phases share a common dc bus, which minimizes the capacitance
requirements of the converter.
The capacitors can be pre-charged as a group.
Efficiency is high for fundamental frequency switching.
Another multilevel inverter topology is the flying capacitor which utilizes a series
connection of capacitor. The main concept of this inverter is to use capacitors as clamping
switching cells. The capacitors transfer the limited amount of voltage to electrical
devices. This inverter uses the same switching states as the diode clamping inverter but it
doesn’t require any clamping diode it uses capacitor instead. This topology has several
unique and attractive features when compared to the diode-clamped inverter. One feature
is that added clamping diodes are not needed. Furthermore, the flying capacitor inverter
has switching redundancy within the phase which can be used to balance the flying
capacitors so that only one dc source is needed.
Advantage:
Each branch can be analyzed separately and individually.
Disadvantage:
Pre-charging of capacitors is necessary and difficult.
Advantages:
The number of possible output voltage levels is more than twice the number of dc
sources.
The series of H-bridges makes for modularized layout and packaging. This will
enable this manufacturing process to be done more quickly and cheaply.
1.3 Configurations
The number of levels of the MLI depends upon the magnitude of the dc voltage
source. The selection of the voltage sources can be done in two ways as:
In this configuration, each dc voltage source has the same magnitude, i.e. V 1 = V2 =
Vdc. With such configuration, seven levels with the 3S-15L topology and nine levels with
the 4S-25L topology are achieved at the output.
1.4 Necessities
1.5 Objective
1.6 Theme
CHAPTER II
Literature Survey
In the recent years, multilevel inverter has been attracted a large interest in heavy
duty industries and high voltage applications. The utilization of multilevel inverter has
become a good solution for high-power and power quality demanding applications. The
term multi-level implies that an n-level inverter is capable of producing an n-voltage level
rather than producing two levels as in the conventional two levels inverter. Beside that the
multilevel inverter can draw an input current with low distortion, operate at higher
switching frequency and lower switching frequency with lower switching loss and
achieving higher efficiency and resulting lower total harmonic distortion in the in the
output waveform without using any filter circuit.
Nowadays, with rapid growth in the industry and introducing the higher power
application equipment which reaches the megawatt level it is hard to connect a single
power semiconductor switch directly to medium voltage grids about 6.9Kv. Due to these
reasons a new family of multi-level inverters was proposed as a solution for working with
high power application. The first proposed multilevel inverter was to use three levels
inverter. Subsequently several multilevel inverter has been introduced including a n-level
of inverter. The main concept implies in multilevel inverter is to use several
semiconductors switches to produces several voltage levels.
A Topology for 9-Level Multilevel Inverter with Converting Its Optimal Structure
IDevkant Sharma, IIAnurag Mondal I,IIDept. of Electronics & Communication
Engineering, Institute of Technology & Management, Gwalior, India----This
paper presents a noble multilevel inverter topology using one bidirectional switch
and other unidirectional switches which is used in single phase 9-level multilevel
inverter.. By this topology, number of power switches can be minimized with
minimum complexity as compare to other conventional multilevel inverter
methods
(ask sir that is it required)
(Senior Member, IEEE), AND MUDASIR AHMED MEMON1 ---- In this paper, two new
topologies for the staircase output voltage generations have been proposed with a
lesser number of switch requirement. First topology requires 3 DC sources to get
15 levels of output by using 10 switches. And the second topology, which consists
of 4 DC sources with 12 switches to synthesize 25 level of output.
Page |9
In the past decades, most of researches have focused in finding renewable energy
resources which is environmentally friendly and reduce the dependency on the fossil fuel
resources which is the main factor for global warming and environmental pollution. Since
most of the renewable energy resources produces a DC power in nature the invention of
inverter has offered a great solution to use these DC power as an AC power which is most
frequently used by appliances and machinery.
The inverter has attracted a large interest to be used in heavy duty industries and high
power application but with the rapid growth in the industry and introducing the higher
power application equipment which reaches the megawatt level it is hard to connect a
single power semiconductor switch (conventional two level inverter) directly to medium
voltage grids, also the two level inverter with higher harmonic distortion which need a
complex filtering circuit to get the sinusoidal waveform. Due to this drawbacks of the
conventional two level inverter, it recommended to use the multilevel inverter(MLI)
which has many advantages compared to single stage inverter like minimum harmonic
distortion which produce almost sinusoidal waveform without filtering circuit, also the
MLI can operate with high power applications and produce high level output voltage with
less switching losses. Thus the MLI is recommended not only for the use in high power
applications but it can be used for industrial applications as alternative in high power and
medium voltage situations.
P a g e | 10
CHAPTER III
System Development
3.1 Methodology
Generally the power electronic inverters are operated in the “switched mode”.
This means the switches within the inverter are always in either one of the two states -
turned on or turned off. Any operation of inverter to produce an ac voltage from a dc
source the semiconductors switches must alternate between these two states on and off in
organized and time sequencing manner to generate an ac supply which consist positive
and negative portions from a dc source only one portion .This happens by proposing
different control strategy and modulation techniques that will control and trigger the
inverter switches at different time portion.
There are many ways and techniques have been developed to control multilevel
inverter switching, from the very basic fundamental switching up to the most advance
space vector pulse width modulation switching scheme. But, the most famous and applied
by industries is the pulse width modulation (PWM) switching control scheme. PWM
P a g e | 11
switching control scheme comes with advantages over the traditional multilevel
fundamental switching scheme.
One benefit of PWM methods employing much higher switching frequencies
concerns harmonics. The harmonics filtering exercise is much easier and cheaper due to
the fact that the undesirable harmonics occur at much higher switching frequencies. Also,
the produced harmonics might be above the bandwidth of some actual system. This
means that there is no power dissipation caused by the harmonics. On the contrary,
multilevel fundamental switching scheme creates harmonics at lower switching
frequencies and this increased the complexity of the filtering activity.
The output voltage levels of MLI depend on the switching technique of the
switches. There are many techniques have been developed to control multilevel inverter
switching like pulse width modulation technique and space vector pulse width modulation
technique. The most efficient technique to control the output voltage is PWM control
technique for inverters. In this technique, a fixed DC voltage is supplied to inverter and a
controlled AC output voltage is obtained by controlling on-off period of the
semiconductor switches of the inverter.
In PWM technique one reference signal (modulating signal) is compared with the
carrier signal and the pulses are obtained as shown in fig.2. There is one pulse of fixed
magnitude in every PWM period. However, the width of the pulse changes from pulse to
pulse according to a reference signal. When a PWM signal is applied to the gate terminal
of a switch, it causes the turn on and turns off of the switch to change from one PWM
period to another PWM period according to the modulating signal. This is the most
widely used PWM technique for inverters.
P a g e | 12
The switching angles are a factor for deciding the performance of the MLI. It can be
rectified by using any optimization methods such as Genetic algorithm, Resultant theory
and Newton Rapson method but with the use of these methods we go through under more
mathematical calculation regardless to go to the Property of the sinusoidal wave to allow
proper switching angles so that its leads to resemblance output waveforms to sinusoidal
waveforms. These angles for V level inverter can be obtained by,
360°
∝=β ×
2× ν
Where,
α= Switching angle,
β= 1, 2, 3, ---------- (ν -1),
ν=Level of output voltage
P a g e | 13
3.2 Working
The circuit is built by using three DC voltage sources with nine semiconductor
switches. This DC sources gives required voltage to the each switch. The circuit is
supplied with four asymmetrical DC input voltages means V1 = Vdc, and V2 = 3Vdc. The
circuit consist eight unidirectional switches from S1-S8 along with one bidirectional
switch S9.These switches operate on switching frequency of fs.
P a g e | 14
There are two cycles are used in this converter to improve the output of the
converter that results the operation of the converter divided into two cases. The cases are
classified according to switching modes of operation are as follows:-
1. Positive half cycle
2. Negative half cycle
According to the switching pulses all the switches are turned ON/OFF. The
following table is a switching pattern for proposed 15 levels MLI topology.
The 15 different levels of operation are shown in this section. Based on pulse
signals, semiconductor switches are used in different time periods to create the different
voltage levels. As we can see figure.3, there are three DC voltage sources connected with
nine semiconductor switches and every time the switch connected with respective voltage
sources gets the gate signal, it turns on. Then the DC source provides the respective
voltage level to the circuit. Different conduction mode for proposed topology in positive
and negative half cycle is given as:-
In this circuit, switches S1, S3, S5 and S7 are in ON state while all other switches
are OFF, the voltage 0Vdc is across the load. All the three DC sources are in OFF
condition. (add ckt at center and increase size) verify the numbering
a) 0Vdc
B) 1Vdc Across Load
In this circuit, switches S1, S3, S5 and S8 are in ON state while all other switches
are OFF; the voltage 1Vdc is across the load. Only one source is in ON condition while
others are in OFF condition.
P a g e | 16
b) 1Vdc
In this circuit, switches S2, S5, S7 and S9 are in ON state while all other switches
are OFF; the voltage 2Vdc is across the load. In this two DC sources are in ON condition
while one in OFF condition.
c) 2Vdc
D) 3Vdc Across Load
In this circuit, switches S2, S5, S8 and S9 are in ON state while all other switches
are OFF; the voltage 3Vdc is across the load. In this one source is in ON condition while
other two DC sources are in OFF condition.
d) 3Vdc
P a g e | 17
E) 4VdcAcross Load
In this circuit, switches S1, S5, S8 and S9 are in ON state while all other switches
are OFF; the voltage 4Vdc is across the load. In this two DC sources are in ON condition
while other one in OFF condition.
e) 4Vdc
In this circuit, switches S2, S4, S5 and S7 are in ON state while all other switches
are OFF; the voltage 5Vdc is across the load. All the three DC sources are in ON
condition.
f) 5Vdc
G) 6Vdc Across Load
In this circuit, switches S2, S4, S5 and S8 are in ON state while all other switches
are OFF; the voltage 6Vdc is across the load. In this two DC sources are in ON condition
while one in OFF condition.
P a g e | 18
g) 6Vdc
In this circuit, switches S1, S4, S5 and S8 are in ON state while all other switches
are OFF; the voltage 7Vdc is across the load. All the three DC sources are in ON
condition.
h) 7Vdc
Fig. 4: Different switching states of proposed MLI to get different voltages as 0Vdc,
1Vdc,------7Vdc in positive half cycle respectively
P a g e | 19
a) 0Vdc b) -1Vdc
c) -2Vdc d)-3Vdc
-
e) -4Vdc f) -5Vdc
g) -6Vdc h) -7Vdc
P a g e | 20
Fig. 5: Different switching states of proposed MLI to get different voltages as 0Vdc,
1Vdc,------7Vdc in negative half cycle respectively
The circuit is built by using four DC voltage sources with ten semiconductor
switches. This DC sources gives required voltage to the each switch. The circuit is
supplied with four asymmetrical DC input voltages means V1 = Vdc, and V2 = 5Vdc. The
circuit consist nine unidirectional switches from S1-S9 along with one bidirectional
switch S10. These switches operate on switching frequency of fs.
P a g e | 21
There are two cycles are used in this converter to improve the output of the
converter that results the operation of the converter divided into two cases. The cases are
classified according to switching modes of operation are as follows:-
3. Positive half cycle
4. Negative half cycle
According to the switching pulses all the switches are turned ON/OFF. The
following table is a switching pattern for proposed 25 levels MLI topology.
Generation
of Various Switching Sequence Load
Levels Voltage
S1 S2 S3 S4 S5 S6 S7 S8 S9 S10
12 1 0 0 1 1 0 0 1 0 0 12Vdc
11 0 0 0 1 1 0 0 1 0 1 11Vdc
10 1 0 0 1 1 0 1 0 0 0 10Vdc
9 0 0 0 1 1 0 1 0 0 1 9Vdc
8 0 1 0 1 1 0 1 0 0 0 8Vdc
7 1 0 0 0 1 0 0 1 1 0 7Vdc
6 0 0 0 0 1 0 0 1 1 1 6Vdc
5 1 0 0 0 1 0 1 0 1 0 5Vdc
4 0 0 0 0 1 0 1 0 1 1 4Vdc
3 0 1 0 0 1 0 1 0 1 0 3Vdc
2 1 0 1 0 1 0 0 1 0 0 2Vdc
1 0 0 1 0 1 0 0 1 0 1 Vdc
0 1 0 1 0 1 0 1 0 0 0 0Vdc
-1 0 0 0 1 0 1 0 1 0 1 -Vdc
-2 0 1 0 1 0 1 1 0 0 0 -2Vdc
-3 1 0 0 0 0 1 0 1 1 0 -3Vdc
-4 0 0 0 0 0 1 0 1 1 1 -4Vdc
-5 0 1 0 0 0 1 0 1 1 0 -5Vdc
-6 0 0 0 0 0 1 1 0 1 1 -6Vdc
-7 0 1 0 0 0 1 1 0 1 0 -7Vdc
-8 1 0 1 0 0 1 0 1 0 0 -8Vdc
-9 0 0 1 0 0 1 0 1 0 1 -9Vdc
-10 0 1 1 0 0 1 0 1 0 0 -10Vdc
-11 0 0 1 0 0 1 1 0 0 1 -11Vdc
-12 0 1 1 0 0 1 0 1 0 0 -12Vdc
Table2: Switching pattern for proposed 25-level MLI
P a g e | 22
The 25 different levels of operation are shown in this section. Based on pulse
signals, semiconductor switches are used in different time periods to create the different
voltage levels. As we can see figure.3, there are four DC voltage sources connected with
ten semiconductor switches and every time the switch connected with respective voltage
sources gets the gate signal, it turns on. Then the DC source provides the respective
voltage level to the circuit. Different conduction mode for proposed topology in positive
and negative half cycle is given as:-
Check fig no
3.2.2.1 Positive Circuits:
A) 0VdcAcross Load (no need to write across load)
In this circuit, switches S1, S3, S5, S7 are in ON state while all other switches are
OFF, the voltage +Vdc is across the load. All the three DC sources are in OFF condition.
(add ckt at center and increase size) verify the numbering
a) 0Vdc
B) 1Vdc Across Load
P a g e | 23
In this circuit, switches S1, S3, S5, S8 are in ON state while all other switches are
OFF, the voltage 1Vdc is across the load. Only one source is in ON condition while others
are in OFF condition.
b) 1Vdc
In this circuit, switches S2, S5, S7, S9 are in ON state while all other switches
areOFF , the voltage 2Vdc is across the load. In this two DC sources are in ON condition
while one in OFF condition.
P a g e | 24
c) 2Vdc
In this circuit, switches S2, S5, S8, S9 are in ON state while all other switches
areOFF , the voltage 3V dc is across the load. In this one source is in ON condition while
other two DC sources are in OFF condition.
d) 3Vdc
E) 4VdcAcross Load
P a g e | 25
In this circuit, switches S1, S5, S8, S9 are in ON state while all other switches are
OFF, the voltage 4Vdc is across the load. In this two DC sources are in ON condition
while other one in OFF condition.
e) 4Vdc
In this circuit, switches S2, S4, S5, S7 are in ON state while all other switches are
OFF, the voltage 5Vdc is across the load. All the three DC sources are in ON condition.
P a g e | 26
f) 5Vdc
In this circuit, switches S2, S4, S5, S8 are in ON state while all other switches
areOFF , the voltage 6Vdc is across the load. In this two DC sources are in ON condition
while one in OFF condition.
P a g e | 27
g) 6Vdc
In this circuit, switches S1, S4, S5, S8 are in ON state while all other switches are
OFF, the voltage 7Vdc is across the load. All the three DC sources are in ON condition.
h) 7Vdc
I) 8VdcAcross Load (no need to write across load)
In this circuit, switches S1, S3, S5, S7 are in ON state while all other switches are
OFF, the voltage +Vdc is across the load. All the three DC sources are in OFF condition.
(add ckt at center and increase size) verify the numbering
P a g e | 28
a) 8Vdc
J) 9Vdc Across Load
In this circuit, switches S1, S3, S5, S8 are in ON state while all other switches are
OFF, the voltage 1Vdc is across the load. Only one source is in ON condition while others
are in OFF condition.
b) 9Vdc
In this circuit, switches S2, S5, S7, S9 are in ON state while all other switches
areOFF , the voltage 2Vdc is across the load. In this two DC sources are in ON condition
while one in OFF condition.
c) 10Vdc
In this circuit, switches S2, S5, S8, S9 are in ON state while all other switches
areOFF , the voltage 3V dc is across the load. In this one source is in ON condition while
other two DC sources are in OFF condition.
P a g e | 30
l) 11Vdc
M) 12VdcAcross Load
In this circuit, switches S1, S5, S8, S9 are in ON state while all other switches are
OFF, the voltage 4Vdc is across the load. In this two DC sources are in ON condition
while other one in OFF condition.
M) 12Vdc
Fig. 4: Different switching states of proposed MLI to get different voltages as 0Vdc,
1Vdc,------7Vdc in positive half cycle respectively
P a g e | 31
-1Vdc
-2Vdc
P a g e | 32
-3Vdc
-4Vdc
P a g e | 33
-5Vdc
-6Vdc
P a g e | 34
-7Vdc
-8Vdc
P a g e | 35
-9Vdc
-10Vdc
P a g e | 36
-11Vdc
-12Vdc
P a g e | 37
Fig. 5: Different switching states of proposed MLI to get different voltages as -0Vdc,
-1Vdc,------7Vdc in negative half cycle respectively
CHAPTER IV
Performance Analysis
4.1 Simulation
Simulation and modeling are a way to create a virtual representation of real world
system that includes software and hardware. If the software components of this model are
driven by mathematical relationships, we can simulate this virtual representation under a
wide range of conditions to see how it behaves.
Modeling and simulation are especially valuable for testing conditions that might
be difficult to reproduce with hardware prototype alone, especially in the early phase of
the design process when hardware may not be available. Iterating between modelling and
simulation can improve the quality of the system design early, thereby reducing the
number of errors found later in the design process.
P a g e | 38
1. Matlab/Simulink
4.1.1.1 Matlab/Simulink
In Simulink, by taking all the required blocks in the model file, arranging and
connecting the blocks to each other circuit construction procedure is completed. For
measuring the parameter like current and voltage at particular branch, need to connect
current measurement block in series with that branch/element and voltage measurement
block across the branch/element respectively. Output of the measurement blocks has only
one node that connects to the scope, to getting results in the waveforms. Powergui block
must be available in the model file as that converts the output circuit into the readable
format.
Flow Chart
P a g e | 39
4.3Simulation Circuits
C
Discrete, P1
Ts = 5e-05 s. S1
E
powergui
m
a
k
+
D1
C
RC
P2
S2
E
DC +
+
R1 v
-
Voltage Measurement Scope
C
+
P3
S3
E
C2
D2
m
a
k
C
P4
S4
E
Fig. 6: Simulation circuit of 3 Level MLI in Simulink
Output Voltage:
g
C
C
Discrete,
P1 P3 Ts = 5e-05 s.
S3
S1
powergui
m
E
E
DC
g
C
C
P4 P2
S4 S2
m
E
+
+
LOAD -
v
Voltage MeasurementScope
g
C
C
P5 P7
S5 S7
m
E
E
DC1
g
C
C
P8
P6
S8 S6
m
m
E
E
Fig. 8: Simulation circuit of 5 Level MLI in Simulink
Output Voltage:
DC1
k
m
E
m
D1
a
S1
C
g
P1
DC2 P6 P7
k
m
m
S2 D2
a
C
g
P2
Discrete,
g
C
C
Ts = 5e-05 s.
k
m
S8 powergui
DC3 S6
m
D3
E
a
E
m
+
S3
C
g
+
LOAD v
P3 -
Voltage Measurement Scope
g
C
C
S7 S9
m
E
E
k
m
DC4
E
m
D4
a
S4
C
g
P4
DC5
k
m
E
m
D5
P5
a
S5
C
g
Output Voltage:
(change all blur images)
are given to the circuit by pulse width modulation technique (for the generation of
positive and negative cycles).The simulation circuit of the fifteen level multilevel inverter
is shown as below.
PWM1 Discrete,
Ts = 5e-05 s.
powergui
C
P1
S1
E
PWM5
PWM7
E
m
Scope
PWM3
S3
C
g
PWM9 P5
g
C
C
v
P7
+
-
VM1
P9 P3 S5 S7
m
E
E
V2
V1
g m m g
+
C E E C
PWM6 LOAD
C
S9 S10 P6
C
V3 P8
S6 PWM8
E
S8
E
PWM2
E
m
PWM4 S4
C
g
P2
g
S2 P4
m
The angles at which gate terminal of IGBT will triggered are the firing angles.
This pulses are obtained according to the given formulas and the switching table. Fig. 13,
14, 15 shows all gate pulses applied to different switches for conduction.
For S1, S2, S3
4.3.2.2 Output Voltage: (check all ckt fig and output size)
The magnitude of AC voltage has been varied based on the proportion of supply
side DC source.
P a g e | 45
PWM1
Discrete,
Ts = 5e-05 s.
powergui
C
P1
S1
E
PWM5
E
m
V1
PWM3 PWM7
Scope
S3
C
g
P5
g
C
C
v
P10 PWM10 P7
+
-
PWM9 P9 VM1
P3 S5 S7
m
E
E
V3
g m m g g m m g
+
C E E C C E E C
LOAD
C
S11 S12 S9 S10 P6
C
V4 P8
S6
E
PWM6 S8
E
PWM8
E
m
PWM2
PWM4 S4
C
g
V2
P2
g
S2 P4
m
The angles at which gate terminal of IGBT will triggered are the firing angles.
These pulses are obtained according to the given formulas and the switching table. Fig.
13, 14, 15 shows all gate pulses applied to different switches for conduction.
For S1, S2, S3
The magnitude of AC voltage has been varied based on the proportion of supply
side DC source.
CHAPTER V
Result and Comparison
According to the output of the proposed MLI the following results are obtained
for the different levels of MLI.
5.1FFT Analysis
Fig. 17 shows the output voltage and the harmonic analysis of the 3-level
inverterusing 4 switches with 2 diodes.For 3-level MLI, the THD value is 69.26%.
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Fig.18 shows the output voltage and the harmonic analysis of the5-level
inverterusing 8 switches with 2 sources.For 5-level MLI, the THD value is 42.93%.
Fig. 19 shows the output voltage and the harmonic analysis of the 5-level inverter
using 8 switches with 2 sources. For 5-level MLI, the THD value is 42.93%.
The various topologies are compared according to the levels associated with the numbers
of switches used. The required number of switches and DC sources for the different
topologies are as shown below. The graph drawn based on between the number of sources
and switches used versus THD values.
80
70
60
50
3 level
5level
40
11 level
15 level
30 25 level
20
10
0
Switches DC Sources THD
CHAPTER VI
Conclusion
6.1 Conclusion
In this project, fifteen level asymmetric cascaded multilevel inverter is presented.
The projected inverter can create high quality output voltage close to sinusoidal Waves.
It is used to provide improved performance than the conventional cascaded Multilevel
inverter. And also this proposed method is used to minimize the switching losses. The
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THD calculations is done by FFT analysis of output waveform of each inverter and it was
found that, as the levels of inverter is increased the THD is decreased. The total harmonic
distortion (THD) can be supplementary reduced.
A single phase 15 level reduced switch topology is introduced and its various
modes of operation are studied. The results for proposed topology is summarized as
follows:
The proposed MLI uses only 9 switches to give 15 level of output.
It is seen from the simulation results that the THD for the output voltages and the
current of the proposed system is lower than the conventional one.
The configuration of reduced circuit complexity will be adequate for low and
medium power applications whereas typical MLI cannot compete with standard
UPS
The inverter can be easily expanded by increasing the levels with minimum
number of switches. Thus, overall cost gets reduced.
6.2 Advantages
6.3 Applications
CHAPTER VII
References
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