Professional Documents
Culture Documents
The software and hardware described in this document is furnished under a license and
may be used or disclosed only in accordance with the terms of such license.
Trademarks
ABB and Relion are registered trademarks of the ABB Group. All other brand or
product names mentioned in this document may be trademarks or registered
trademarks of their respective holders.
Warranty
Please inquire about the terms of warranty from your nearest ABB representative.
ABB Inc.
1021 Main Campus Drive
Raleigh, NC 27606, USA
Toll Free: 1-800-HELP-365, menu option #8
ABB Inc.
3450 Harvester Road
Burlington, ON L7N 3W5, Canada
Toll Free: 1-800-HELP-365, menu option #8
This document has been carefully checked by ABB but deviations cannot be
completely ruled out. In case any errors are detected, the reader is kindly requested to
notify the manufacturer. Other than under explicit contractual commitments, in no
event shall ABB be responsible or liable for any loss or damage resulting from the use
of this manual or the application of the equipment.
Conformity
This product complies with the directive of the Council of the European Communities
on the approximation of the laws of the Member States relating to electromagnetic
compatibility (EMC Directive 2004/108/EC) and concerning electrical equipment for
use within specified voltage limits (Low-voltage directive 2006/95/EC). This
conformity is the result of tests conducted by ABB in accordance with the product
standards EN 50263 and EN 60255-26 for the EMC directive, and with the product
standards EN 60255-1 and EN 60255-27 for the low voltage directive. The product is
designed in accordance with the international standards of the IEC 60255 series and
ANSI C37.90.
Table of contents
Table of contents
Section 1 Introduction..........................................................................17
Introduction to the technical reference manual.......................................17
About the complete set of manuals for an IED..................................17
About the technical reference manual...............................................18
This manual.......................................................................................19
Introduction...................................................................................19
Principle of operation....................................................................19
Input and output signals...............................................................23
Function block..............................................................................23
Setting parameters.......................................................................24
Technical data..............................................................................24
Intended audience.............................................................................24
Revision notes...................................................................................25
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Function block...................................................................................82
Input and output signals....................................................................82
Setting parameters............................................................................82
Test mode functionality TEST.................................................................82
Introduction........................................................................................82
Principle of operation.........................................................................83
Function block...................................................................................85
Input and output signals....................................................................85
Setting parameters............................................................................85
IED identifiers.........................................................................................86
Introduction........................................................................................86
Setting parameters............................................................................86
Product information.................................................................................86
Introduction........................................................................................86
Setting parameters............................................................................87
Factory defined settings....................................................................87
Signal matrix for binary inputs SMBI.......................................................87
Introduction........................................................................................87
Principle of operation.........................................................................88
Function block...................................................................................88
Input and output signals....................................................................88
Signal matrix for binary outputs SMBO ..................................................89
Introduction........................................................................................89
Principle of operation.........................................................................89
Function block...................................................................................90
Input and output signals....................................................................90
Signal matrix for mA inputs SMMI..........................................................90
Introduction........................................................................................90
Principle of operation.........................................................................91
Function block...................................................................................91
Input and output signals....................................................................91
Signal matrix for analog inputs SMAI......................................................92
Introduction........................................................................................92
Principle of operation.........................................................................92
Frequency values..............................................................................92
Function block...................................................................................94
Input and output signals....................................................................94
Setting parameters............................................................................95
Summation block 3 phase 3PHSUM......................................................97
Introduction........................................................................................97
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Principle of operation.........................................................................97
Function block...................................................................................98
Input and output signals....................................................................98
Setting parameters............................................................................98
Authority status ATHSTAT......................................................................99
Introduction........................................................................................99
Principle of operation.........................................................................99
Function block.................................................................................100
Output signals..................................................................................100
Setting parameters..........................................................................100
Denial of service DOS..........................................................................100
Introduction......................................................................................100
Principle of operation.......................................................................100
Function blocks................................................................................101
Signals.............................................................................................101
Settings............................................................................................102
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Introduction......................................................................................169
Principle of operation.......................................................................171
Function inputs...........................................................................171
Function block.................................................................................178
Input and output signals..................................................................178
Setting parameters..........................................................................179
Technical data.................................................................................181
Thermal overload protection, one time constant LPTTR......................182
Introduction......................................................................................182
Principle of operation.......................................................................183
Function block.................................................................................187
Input and output signals..................................................................187
Setting parameters..........................................................................188
Technical data.................................................................................189
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Introduction......................................................................................219
Principle of operation.......................................................................219
Measurement principle...............................................................220
Time delay..................................................................................220
Voltage dependent time delay....................................................221
Blocking......................................................................................222
Design........................................................................................222
Function block.................................................................................223
Input and output signals..................................................................223
Setting parameters..........................................................................224
Technical data.................................................................................225
Overfrequency protection SAPTOF (81)...............................................225
Introduction......................................................................................226
Principle of operation.......................................................................226
Measurement principle...............................................................226
Time delay..................................................................................226
Blocking......................................................................................227
Design........................................................................................227
Function block.................................................................................228
Input and output signals..................................................................228
Setting parameters..........................................................................229
Technical data.................................................................................229
Rate-of-change frequency protection SAPFRC (81)............................229
Introduction......................................................................................230
Principle of operation.......................................................................230
Measurement principle...............................................................230
Time delay..................................................................................231
Blocking......................................................................................231
Design........................................................................................231
Function block.................................................................................233
Input and output signals..................................................................233
Setting parameters..........................................................................233
Technical data.................................................................................234
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Table of contents
Section 11 Control...............................................................................283
Apparatus control APC.........................................................................283
Introduction......................................................................................283
Principle of operation.......................................................................283
Error handling..................................................................................284
Bay control QCBAY.........................................................................286
Introduction.................................................................................286
Principle of operation..................................................................287
Function block............................................................................287
Input and output signals.............................................................287
Setting parameters.....................................................................287
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Introduction......................................................................................322
Principle of operation.......................................................................322
Function block.................................................................................323
Input and output signals..................................................................323
Setting parameters..........................................................................324
Section 12 Logic..................................................................................325
Configurable logic blocks......................................................................325
Introduction......................................................................................325
Inverter function block INV..............................................................326
OR function block OR......................................................................326
AND function block AND.................................................................327
Timer function block TIMER............................................................328
Pulse timer function block PULSETIMER........................................328
Exclusive OR function block XOR...................................................329
Loop delay function block LOOPDELAY.........................................329
Set-reset with memory function block SRMEMORY.......................330
Reset-set with memory function block RSMEMORY.......................331
Controllable gate function block GATE............................................332
Settable timer function block TIMERSET........................................333
Technical data.................................................................................333
Fixed signal function block FXDSIGN...................................................334
Principle of operation.......................................................................334
Function block.................................................................................335
Input and output signals..................................................................335
Setting parameters..........................................................................335
Boolean 16 to Integer conversion B16I.................................................335
Introduction......................................................................................336
Operation principle..........................................................................336
Function block.................................................................................337
Input and output signals..................................................................337
Setting parameters..........................................................................338
Boolean 16 to Integer conversion with logic node representation
B16IFCVI..............................................................................................338
Introduction......................................................................................338
Operation principle..........................................................................338
Function block.................................................................................340
Input and output signals..................................................................340
Setting parameters..........................................................................341
Integer to Boolean 16 conversion IB16.................................................341
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Introduction......................................................................................341
Operation principle..........................................................................341
Function block.................................................................................343
Input and output signals..................................................................343
Setting parameters..........................................................................344
Integer to Boolean 16 conversion with logic node representation
IB16FCVB.............................................................................................344
Introduction......................................................................................344
Operation principle..........................................................................344
Function block.................................................................................346
Input and output signals..................................................................346
Setting parameters..........................................................................347
Section 13 Monitoring..........................................................................349
Measurements......................................................................................349
Introduction......................................................................................350
Principle of operation.......................................................................351
Measurement supervision..........................................................351
Measurements CVMMXN...........................................................355
Phase current measurement CMMXU........................................360
Phase-phase and phase-neutral voltage measurements
VMMXU, VNMMXU....................................................................361
Voltage and current sequence measurements VMSQI,
CMSQI........................................................................................361
Function block.................................................................................361
Input and output signals..................................................................363
Setting parameters..........................................................................367
Technical data.................................................................................381
Event counter CNTGGIO......................................................................382
Identification....................................................................................382
Introduction......................................................................................383
Principle of operation.......................................................................383
Reporting....................................................................................383
Design........................................................................................383
Function block.................................................................................384
Input signals....................................................................................384
Setting parameters..........................................................................385
Technical data.................................................................................385
Event function EVENT..........................................................................385
Introduction......................................................................................385
Principle of operation.......................................................................385
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Function block.................................................................................387
Input and output signals..................................................................387
Setting parameters..........................................................................388
Logical signal status report BINSTATREP...........................................390
Introduction......................................................................................390
Principle of operation.......................................................................391
Function block.................................................................................391
Input and output signals..................................................................392
Setting parameters..........................................................................393
Measured value expander block RANGE_XP......................................393
Introduction......................................................................................393
Principle of operation.......................................................................393
Function block.................................................................................394
Input and output signals..................................................................394
Disturbance report DRPRDRE.............................................................394
Introduction......................................................................................395
Principle of operation.......................................................................396
Function block.................................................................................403
Input and output signals..................................................................404
Setting parameters..........................................................................406
Technical data.................................................................................416
Sequential of events.............................................................................416
Introduction......................................................................................416
Principle of operation.......................................................................416
Function block.................................................................................417
Input signals....................................................................................417
Technical data.................................................................................417
Indications.............................................................................................418
Introduction......................................................................................418
Principle of operation.......................................................................418
Function block.................................................................................419
Input signals....................................................................................419
Technical data.................................................................................419
Event recorder .....................................................................................419
Introduction......................................................................................419
Principle of operation.......................................................................420
Function block.................................................................................420
Input signals....................................................................................420
Technical data.................................................................................421
Trip value recorder................................................................................421
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Introduction......................................................................................421
Principle of operation.......................................................................421
Function block.................................................................................422
Input signals....................................................................................422
Technical data.................................................................................422
Disturbance recorder............................................................................422
Introduction......................................................................................422
Principle of operation.......................................................................423
Memory and storage...................................................................424
IEC 60870-5-103........................................................................425
Function block.................................................................................426
Input and output signals..................................................................426
Setting parameters..........................................................................426
Technical data.................................................................................426
Section 14 Metering............................................................................427
Pulse-counter logic PCGGIO................................................................427
Introduction......................................................................................427
Principle of operation.......................................................................427
Function block.................................................................................430
Input and output signals..................................................................430
Setting parameters..........................................................................431
Technical data.................................................................................431
Function for energy calculation and demand handling ETPMMTR......431
Introduction......................................................................................432
Principle of operation.......................................................................432
Function block.................................................................................433
Input and output signals..................................................................433
Setting parameters..........................................................................434
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Table of contents
Principle of operation..................................................................439
Function block............................................................................440
Setting parameters.....................................................................440
IEC 61850-8-1 redundant station bus communication....................440
Introduction.................................................................................441
Principle of operation..................................................................441
Function block............................................................................443
Output signals.............................................................................443
Setting parameters.....................................................................443
Goose binary receive GOOSEBINRCV................................................444
Function block.................................................................................444
Input and output signals..................................................................444
Setting parameters..........................................................................445
Multiple command and transmit MULTICMDRCV,
MULTICMDSND...................................................................................446
Introduction......................................................................................446
Principle of operation.......................................................................446
Design..............................................................................................447
General.......................................................................................447
Function block.................................................................................447
Input and output signals..................................................................448
Setting parameters..........................................................................450
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Table of contents
Block diagram.............................................................................459
Power supply module (PSM)...........................................................459
Introduction.................................................................................459
Design........................................................................................460
Technical data............................................................................460
Local human-machine interface (Local HMI)...................................460
Transformer input module (TRM)....................................................461
Introduction.................................................................................461
Design........................................................................................461
Technical data............................................................................461
Analog digital conversion module, with time synchronization
(ADM) .............................................................................................462
Introduction.................................................................................462
Design........................................................................................463
Binary input module (BIM)...............................................................465
Introduction.................................................................................465
Design........................................................................................465
Technical data............................................................................469
Binary output modules (BOM).........................................................470
Introduction.................................................................................470
Design........................................................................................470
Technical data............................................................................471
Static binary output module (SOM).................................................472
Introduction.................................................................................472
Design........................................................................................472
Technical data............................................................................474
mA input module (MIM)...................................................................476
Introduction.................................................................................476
Design........................................................................................476
Technical data............................................................................477
Optical ethernet module (OEM).......................................................478
Introduction.................................................................................478
Functionality...............................................................................478
Design........................................................................................478
Technical data............................................................................479
GPS antenna...................................................................................479
Introduction.................................................................................479
Design........................................................................................479
Technical data............................................................................481
IRIG-B time synchronization module IRIG-B...................................481
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Table of contents
Introduction.................................................................................481
Design........................................................................................481
Technical data............................................................................483
Dimensions...........................................................................................484
Case without rear cover...................................................................484
Case with rear cover........................................................................486
Flush mounting dimensions.............................................................488
Wall mounting dimensions...............................................................489
Mounting alternatives............................................................................489
Flush mounting................................................................................489
Overview.....................................................................................489
Mounting procedure for flush mounting......................................491
19” panel rack mounting..................................................................492
Overview.....................................................................................492
Mounting procedure for 19” panel rack mounting.......................493
Wall mounting..................................................................................494
Overview.....................................................................................494
Mounting procedure for wall mounting.......................................494
How to reach the rear side of the IED........................................495
Technical data......................................................................................496
Enclosure.........................................................................................496
Connection system..........................................................................496
Influencing factors...........................................................................497
Type tests according to standard....................................................498
Section 17 Labels................................................................................501
Labels on IED.......................................................................................501
Section 20 Glossary............................................................................555
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Technical reference manual
1MRK511250-UUS B Section 1
Introduction
Section 1 Introduction
Decommissioning
Commissioning
Maintenance
Engineering
Operation
Installing
Engineeringmanual
Installation and
Commissioning manual
Operator’s manual
Application manual
Technical reference
manual
IEC09000744-1-en.vsd
IEC09000744 V1 EN
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Technical reference manual
Section 1 1MRK511250-UUS B
Introduction
The Operator’s Manual (OM) contains instructions on how to operate the protection
IED during normal service once it has been commissioned. The operator’s manual can
be used to find out how to handle disturbances or how to view calculated and measured
network data in order to determine the cause of a fault.
The Engineering Manual (EM) contains instructions on how to engineer the IEDs
using the different tools in PCM600. The manual provides instructions on how to set
up a PCM600 project and insert IEDs to the project structure. The manual also
recommends a sequence for engineering of protection and control functions, LHMI
functions as well as communication engineering for IEC 61850 and DNP3.
• Local HMI describes the control panel on the IED and explains display
characteristics, control keys and various local HMI features.
• Basic IED functions presents functions for all protection types that are included in
all IEDs, for example, time synchronization, self supervision with event list, test
mode and other general functions.
• Current protection describes functions, for example, over current protection,
breaker failure protection and pole discordance.
• Voltage protection describes functions for under voltage and over voltage
protection and residual over voltage protection.
• Frequency protection describes functions for over frequency, under frequency and
rate of change of frequency protection.
• Multipurpose protection describes the general protection function for current and
voltage.
• Secondary system supervision describes current based functions for current circuit
supervision and fuse failure supervision.
• Control describes control functions, for example, synchronization and energizing
check and other product specific functions.
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Technical reference manual
1MRK511250-UUS B Section 1
Introduction
1.1.3.1 Introduction
Describes how the function works, presents a general background to algorithms and
measurement techniques. Logic diagrams are used to illustrate functionality.
Logic diagrams
Logic diagrams describe the signal logic inside the function block and are bordered by
dashed lines.
Signal names
Input and output logic signals consist of two groups of letters separated by two dashes.
The first group consists of up to four letters and presents the abbreviated name for the
corresponding function. The second group presents the functionality of the particular
signal. According to this explanation, the meaning of the signal BLKTR in figure 4 is
as follows:
• BLKTR informs the user that the signal will BLOCK the TRIP command from the
under-voltage function, when its value is a logical one (1).
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Technical reference manual
Section 1 1MRK511250-UUS B
Introduction
Input signals are always on the left hand side, and output signals on the right hand side.
Settings are not displayed.
Input and output signals can be configured using the ACT tool. They can be connected
to the inputs and outputs of other functions and to binary inputs and outputs. Examples
of input signals are BLKTR, BLOCK and VTSU. Examples output signals are TRIP,
START, STL1, STL2, STL3.
Setting parameters
Signals in frames with a shaded area on their right hand side represent setting
parameter signals. These parameters can only be set via the PST or LHMI. Their values
are high (1) only when the corresponding setting parameter is set to the symbolic value
specified within the frame. Example is the signal Block TUV=Yes. Their logical
values correspond automatically to the selected setting value.
Internal signals
Internal signals are illustrated graphically and end approximately 2 mm from the frame
edge. If an internal signal path cannot be drawn with a continuous line, the suffix -int is
added to the signal name to indicate where the signal starts and continues, see figure 1.
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Technical reference manual
1MRK511250-UUS B Section 1
Introduction
BLKTR
TEST
TEST
AND
Block TUV=Yes BLOCK-int.
OR
BLOCK
VTSU
BLOCK-int.
AND
PU_V_A
BLOCK-int.
AND 0-t TRIP
AND OR
PU_V_B 0
BLOCK-int.
PICKUP
AND
PU_V_C
PU_A
PU_B
PU_C
xx04000375_ansi.vsd
ANSI04000375 V1 EN
External signals
Signal paths that extend beyond the logic diagram and continue in another diagram
have the suffix “-cont.”, see figure 2 and figure 3.
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Technical reference manual
Section 1 1MRK511250-UUS B
Introduction
STZMPP-cont.
OR
PHSEL
PUND_AB-cont.
AND
AB
PUND_BC-cont.
AND
BC
PUND_CA-cont.
AND
CA
PUND_AG-cont.
AND
AG
PUND_BG-cont.
AND
BG
PUND_CG-cont.
AND
CG
PUND_GND-cont.
OR
OR
LOVBZ PU_ND
AND
1--BLOCK OR
BLK-cont.
xx04000376_ansi.vsd
ANSI04000376 V1 EN
STND_AG-cont.
or
STND_BG-cont.
0 PU_A
AND
STND_CG-cont. 15 ms
STND_AB-cont. or 0 PU_B
AND
STND_BC-cont. 15 ms
0 PU_C
STND_CA-cont. AND
or 15 ms
AND 0 PICKUP
or 15 ms
BLK-cont.
Xx04000377_ansi.vsd
ANSI04000377 V1 EN
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Technical reference manual
1MRK511250-UUS B Section 1
Introduction
Input and output signals are presented in two separate tables. Each table consists of two
columns. The first column contains the name of the signal and the second column
contains the description of the signal.
Input signals are always on the left hand side and output signals on the right hand side.
Settings are not displayed. Special kinds of settings are sometimes available. These are
supposed to be connected to constants in the configuration scheme and are therefore
depicted as inputs. Such signals will be found in the signal list but described in the
settings table.
• The ^ character in front of an input or output signal name in the function block
symbol given for a function, indicates that the user can set a signal name of their
own in PCM600.
• The * character after an input or output signal name in the function block symbol
given for a function, indicates that the signal must be connected to another
function block in the application configuration to achieve a valid application
configuration.
IEC 61850 - 8 -1
Logical Node Mandatory
signal (*)
Inputs Outputs
PCGGIO
BLOCK INVALID
READ_VAL RESTART
BI_PULSE* BLOCKED
RS_CNT NEW_VAL
^SCAL_VAL
en05000511-1-en.vsd
User defined
name (^)
Diagram
Number
IEC05000511 V2 EN
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Technical reference manual
Section 1 1MRK511250-UUS B
Introduction
These are presented in tables and include all parameters associated with the function in
question.
The technical data section provides specific technical information about the function or
hardware described.
Requirements
The system engineer must have a thorough knowledge of protection systems,
protection equipment, protection functions and the configured functional logics in the
protective devices. The installation and commissioning personnel must have a basic
knowledge in the handling electronic equipment.
Documents related to RES670 Identity number
Operator’s manual 1MRK 511 251-UUS
Installation and commissioning manual 1MRK 511 252-UUS
Technical reference manual 1MRK 511 250-UUS
Application manual 1MRK 511 253-UUS
Product guide pre-configured 1MRK 511 266-BUS
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Technical reference manual
1MRK511250-UUS B Section 1
Introduction
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Technical reference manual
26
1MRK511250-UUS B Section 2
Analog inputs
2.1 Introduction
Analog input channels must be configured and set properly to get correct measurement
results and correct protection operations. For power measuring and all directional and
differential functions the directions of the input currents must be defined properly.
Measuring and protection algorithms in the IED use primary system quantities. Setting
values are in primary quantities as well and it is important to set the data about the
connected current and voltage transformers properly.
The direction of a current depends on the connection of the CT. The main CTs are
typically star (WYE) connected and can be connected with the Star (WYE) point to the
object or from the object. This information must be set in the IED.
• Positive value of current or power means that the quantity has the direction into
the object.
• Negative value of current or power means that the quantity has the direction out
from the object.
For directional functions the directional conventions are defined as follows (see figure
5)
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Technical reference manual
Section 2 1MRK511250-UUS B
Analog inputs
Protected Object
Line, transformer, etc
e.g. P, Q, I e.g. P, Q, I
Measured quantity is Measured quantity is
positive when flowing positive when flowing
towards the object towards the object
en05000456_ansi.vsd
ANSI05000456 V1 EN
The settings of the IED is performed in primary values. The ratios of the main CTs and
VTs are therefore basic data for the IED. The user has to set the rated secondary and
primary currents and voltages of the CTs and VTs to provide the IED with their rated
ratios.
The CT and VT ratio and the name on respective channel is done under Main menu/
Hardware/Analog modules in the Parameter Settings tool.
The function blocks are not represented in the configuration tool. The
signals appear only in the SMT tool when a TRM is included in the
configuration with the function selector tool. In the SMT tool they can
be mapped to the desired virtual input (SMAI) of the IED and used
internally in the configuration.
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Technical reference manual
1MRK511250-UUS B Section 2
Analog inputs
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Technical reference manual
Section 2 1MRK511250-UUS B
Analog inputs
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Technical reference manual
1MRK511250-UUS B Section 2
Analog inputs
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Section 2 1MRK511250-UUS B
Analog inputs
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1MRK511250-UUS B Section 2
Analog inputs
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Technical reference manual
Section 2 1MRK511250-UUS B
Analog inputs
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1MRK511250-UUS B Section 2
Analog inputs
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Technical reference manual
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1MRK511250-UUS B Section 3
Local HMI
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Technical reference manual
Section 3 1MRK511250-UUS B
Local HMI
ANSI12000179 V1 EN
3.2.1 Medium
The following case sizes can be equipped with the medium size LCD:
• 1/1 x 19”
This is a fully graphical monochrome LCD which measures 4.7 x 3.5 inches. It has 28
lines with up to 40 characters per line.
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Technical reference manual
1MRK511250-UUS B Section 3
Local HMI
3.2.2 Design
The different parts of the medium size local HMI are shown in figure 7. The local HMI
exists in an IEC version and in an ANSI version. The difference is on the keypad
operation buttons and the yellow LED designation.
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Technical reference manual
Section 3 1MRK511250-UUS B
Local HMI
1 2 3
ANSI12000180
8 7
ANSI12000180 V1 EN
40
Technical reference manual
1MRK511250-UUS B Section 3
Local HMI
3.3 Keypad
The keypad is used to monitor and operate the IED. The keypad has the same look and
feel in all IEDs. LCD screens and other details may differ but the way the keys
function is identical.
IEC06000531 V1 EN
Table 7 describes the HMI keys that are used to operate the IED.
IEC06000532 V1 EN
IEC06000533 V1 EN
Press to open two sub menus: Key operation and IED information.
IEC05000103 V1 EN
Press to open the main menu and to move to the default screen.
IEC05000105 V1 EN
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Technical reference manual
Section 3 1MRK511250-UUS B
Local HMI
Key Function
Press to start the editing mode and confirm setting changes, when in editing mode.
IEC05000108 V1 EN
Press to navigate forward between screens and move right in editing mode.
IEC05000109 V1 EN
Press to navigate backwards between screens and move left in editing mode.
IEC05000110 V1 EN
Press to move up in the single line diagram and in the menu tree.
IEC05000111 V1 EN
Press to move down in the single line diagram and in the menu tree.
IEC05000112 V1 EN
3.4 LED
3.4.1 Introduction
The LED module is a unidirectional means of communicating. This means that events
may occur that activate a LED in order to draw the operators attention to something
that has occurred and needs some sort of action.
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Technical reference manual
1MRK511250-UUS B Section 3
Local HMI
Alarm indication LEDs and hardware associated LEDs are located on the right hand
side of the front panel. Alarm LEDs are located on the right of the LCD screen and
show steady or flashing light.
Alarm LEDs can be configured in PCM600 and depend on the binary logic. Therefore
they can not be configured on the local HMI.
The RJ45 port has a yellow LED indicating that communication has been established
between the IED and a computer.
The Local/Remote key on the front panel has two LEDs indicating whether local or
remote control of the IED is active.
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Technical reference manual
Section 3 1MRK511250-UUS B
Local HMI
3.5.1 Introduction
The local HMI can be adapted to the application configuration and to user preferences.
3.5.3.1 Design
The function block LocalHMI controls and supplies information about the status of the
status indication LEDs. The input and output signals of local HMI are configured with
PCM600.
The function block can be used if any of the signals are required in a configuration logic.
See section "Status indication LEDs" for information about the LEDs.
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ANSI05000773-2-en.vsd
ANSI05000773 V2 EN
3.5.4.1 Introduction
The function block LEDGEN controls and supplies information about the status of the
indication LEDs. The input and output signals of LEDGEN are configured with
PCM600. The input signal for each LED is selected individually with the Signal
Matrix Tool in PCM600.
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Section 3 1MRK511250-UUS B
Local HMI
Each indication LED on the local HMI can be set individually to operate in six
different sequences
The light from the LEDs can be steady (-S) or flashing (-F). See the technical reference
manual for more information.
3.5.4.2 Design
The information on the LEDs is stored at loss of the auxiliary power to the IED in
some of the modes of LEDGEN. The latest LED picture appears immediately after the
IED is successfully restarted.
Operating modes
• Collecting mode
• LEDs which are used in collecting mode of operation are accumulated
continuously until the unit is acknowledged manually. This mode is suitable
when the LEDs are used as a simplified alarm system.
• Re-starting mode
• In the re-starting mode of operation each new pickup resets all previous
active LEDs and activates only those which appear during one disturbance.
Only LEDs defined for re-starting mode with the latched sequence type 6
(LatchedReset-S) will initiate a reset and a restart at a new disturbance. A
disturbance is defined to end a settable time after the reset of the activated
input signals or when the maximum time limit has elapsed.
Acknowledgment/reset
• From local HMI
• Active indications can be acknowledged or reset manually. Manual
acknowledgment and manual reset have the same meaning and is a common
signal for all the operating sequences and LEDs. The function is positive
edge triggered, not level triggered. The acknowledged or reset is performed
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Local HMI
via the reset button and menus on the local HMI. See the operator's manual
for more information.
• Automatic reset
• Automatic reset can only be performed for indications defined for re-starting
mode with the latched sequence type 6 (LatchedReset-S). When automatic
reset of the LEDs has been performed, still persisting indications will be
indicated with a steady light.
Operating sequences
The operating sequences can be of type Follow or Latched.
• For the Follow type the LED follows the input signal completely.
• For the Latched type each LED latches to the corresponding input signal until it is
reset.
Figure 10 show the function of available sequences that are selectable for each LED
separately.
The letters S and F in the sequence names have the meaning S = Steady and F = Flashing.
At the activation of the input signal, the indication operates according to the selected
sequence diagrams.
In the sequence diagrams the LEDs have the characteristics as shown in figure 10.
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Local HMI
en05000506.vsd
IEC05000506 V1 EN
Sequence 1 (Follow-S)
This sequence follows all the time, with a steady light, the corresponding input signals.
It does not react on acknowledgment or reset. Every LED is independent of the other
LEDs in its operation.
Activating
signal
LED
IEC01000228_2_en.vsd
IEC01000228 V2 EN
Sequence 2 (Follow-F)
This sequence is the same as sequence 1, Follow-S, but the LEDs are flashing instead
of showing steady light.
Sequence 3 (LatchedAck-F-S)
This sequence has a latched function and works in collecting mode. Every LED is
independent of the other LEDs in its operation. At the activation of the input signal, the
indication starts flashing. After acknowledgment the indication disappears if the signal
is not present any more. If the signal is still present after acknowledgment it gets a
steady light.
Activating
signal
LED
Acknow.
en01000231.vsd
IEC01000231 V1 EN
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Sequence 4 (LatchedAck-S-F)
This sequence has the same functionality as sequence 3, but steady and flashing light
have been alternated.
Sequence 5 (LatchedColl-S)
This sequence has a latched function and works in collecting mode. At the activation of
the input signal, the indication will light up with a steady light. The difference to
sequence 3 and 4 is that indications that are still activated will not be affected by the
reset that is, immediately after the positive edge of the reset has been executed a new
reading and storing of active signals is performed. Every LED is independent of the
other LEDs in its operation.
Activating
signal
LED
Reset
IEC01000235_2_en.vsd
IEC01000235 V2 EN
Sequence 6 (LatchedReset-S)
In this mode all activated LEDs, which are set to sequence 6 (LatchedReset-S), are
automatically reset at a new disturbance when activating any input signal for other
LEDs set to sequence 6 (LatchedReset-S). Also in this case indications that are still
activated will not be affected by manual reset, that is, immediately after the positive
edge of that the manual reset has been executed a new reading and storing of active
signals is performed. LEDs set for sequence 6 are completely independent in its
operation of LEDs set for other sequences.
Definition of a disturbance
A disturbance is defined to last from the first LED set as LatchedReset-S is activated
until a settable time, tRestart, has elapsed after that all activating signals for the LEDs
set as LatchedReset-S have reset. However if all activating signals have reset and some
signal again becomes active before tRestart has elapsed, the tRestart timer does not
restart the timing sequence. A new disturbance start will be issued first when all signals
have reset after tRestart has elapsed. A diagram of this functionality is shown in figure
14.
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Local HMI
From
disturbance
length control OR New
per LED OR disturbance
set to
sequence 6
tRestart
0
AND
0-100s
AND
OR
OR
AND
en01000237_ansi.vsd
ANSI01000237 V1 EN
In order not to have a lock-up of the indications in the case of a persisting signal each
LED is provided with a timer, tMax, after which time the influence on the definition of
a disturbance of that specific LED is inhibited. This functionality is shown i diagram in
figure 15.
Activating signal
To LED
To disturbance
AND
length control
0-tMax
0
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Disturbance
tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
IEC01000239_2-en.vsd
IEC01000239 V2 EN
Figure 17 shows the timing diagram for a new indication after tRestart time has elapsed.
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Local HMI
Disturbance Disturbance
tRestart tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
IEC01000240_2_en.vsd
IEC01000240 V2 EN
Figure 18 shows the timing diagram when a new indication appears after the first one
has reset but before tRestart has elapsed.
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Local HMI
Disturbance
tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
IEC01000241_2_en.vsd
IEC01000241 V2 EN
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Section 3 1MRK511250-UUS B
Local HMI
Disturbance
tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
IEC01000242_2_en.vsd
IEC01000242 V2 EN
IEC05000508_2_en.vsd
IEC05000508 V2 EN
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Local HMI
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Local HMI
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Local HMI
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1MRK511250-UUS B Section 4
Basic IED functions
4.1 Authorization
To safeguard the interests of our customers, both the IED and the tools that are
accessing the IED are protected, by means of authorization handling. The authorization
handling of the IED and the PCM600 is implemented at both access points to the IED:
Be sure that the user logged on to the IED has the access required when
writing particular data to the IED from PCM600.
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Basic IED functions
The IED users can be created, deleted and edited only with the IED User Management
within PCM600. The user can only LogOn or LogOff on the local HMI on the IED,
there are no users, groups or functions that can be defined on local HMI.
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At delivery the default user is the SuperUser. No Log on is required to operate the IED
until a user has been created with the IED User Management..
Once a user is created and downloaded to the IED, that user can perform a Log on,
introducing the password assigned in the tool.
If there is no user created, an attempt to log on will display a message box: “No user
defined!”
If one user leaves the IED without logging off, then after the timeout (set in Main
menu/Settings/General Settings/HMI/Screen/Display Timeout) elapses, the IED
returns to Guest state, when only reading is possible. The display time out is set to 60
minutes at delivery.
If there are one or more users created with the IED User Management and downloaded
into the IED, then, when a user intentionally attempts a Log on or when the user
attempts to perform an operation that is password protected, the Log on window will
appear.
The cursor is focused on the User identity field, so upon pressing the “E” key, the user
can change the user name, by browsing the list of users, with the “up” and “down”
arrows. After choosing the right user name, the user must press the “E” key again.
When it comes to password, upon pressing the “E” key, the following character will
show up: “$”. The user must scroll for every letter in the password. After all the letters
are introduced (passwords are case sensitive) choose OK and press the “E” key again.
If everything is alright at a voluntary Log on, the local HMI returns to the
Authorization screen. If the Log on is OK, when required to change for example a
password protected setting, the local HMI returns to the actual setting folder. If the Log
on has failed, then the Log on window opens again, until either the user makes it right
or presses “Cancel”.
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4.2.1 Introduction
Self supervision with internal event list function listens and reacts to internal system
events, generated by the different built-in self-supervision elements. The internal
events are saved in an internal event list.
The self-supervision function status can be monitored from the local HMI, from the
Event Viewer in PCM600 or from a SMS/SCS system.
Under the Diagnostics menu in the local HMI the present information from the self-
supervision function can be reviewed. The information can be found under Main
menu/Diagnostics/Internal events or Main menu/Diagnostics/IED status/General.
The information from the self-supervision function is also available in the Event
Viewer in PCM600.
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en04000520_ansi.vsd
ANSI04000520 V1 EN
IO fail
OR Set e.g. BIM 1 Error
IO stopped
Reset
IO started
e.g. IOM2 Error OR
e.g. IO (n) Error Internal
OR FAIL
LON ERROR
TIMESYNCHERROR
OR TIMESYNCHERROR
Time reset Set
SYNCH OK Reset
SETCHGD
Settings changed
1 second pulse
en04000519-1.vsd
IEC04000519 V2 EN
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Some signals are available from the INTERRSIG function block. The signals from this
function block are sent as events to the station level of the control system. The signals
from the INTERRSIG function block can also be connected to binary outputs for
signalization via output relays or they can be used as conditions for other functions if
required/desired.
Individual error signals from I/O modules can be obtained from respective module in
the Signal Matrix tool. Error signals from time synchronization can be obtained from
the time synchronization block TIMEINTERRSIG.
Self supervision provides several status signals, that tells about the condition of the
IED. As they provide information about the internal status of the IED, they are also
called internal signals. The internal signals can be divided into two groups.
• Standard signals are always presented in the IED, see Table 15.
• Hardware dependent internal signals are collected depending on the hardware
configuration, see Table 16.
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The analog signals to the A/D converter is internally distributed into two different
converters, one with low amplification and one with high amplification, see Figure 23.
ADx
ADx_Low
x1
u1
x2
ADx
ADx_High Controller
x1
u1
x2
IEC05000296-3-en.vsd
IEC05000296 V3 EN
The technique to split the analog input signal into two A/D converter(s) with different
amplification makes it possible to supervise the A/D converters under normal
conditions where the signals from the two A/D converters should be identical. An
alarm is given if the signals are out of the boundaries. Another benefit is that it
improves the dynamic performance of the A/D conversion.
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When the signal is within measurable limits on both channels, a direct comparison of
the two A/D converter channels can be performed. If the validation fails, the CPU will
be informed and an alarm will be given for A/D converter failure.
IEC09000787 V1 EN
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4.3.1 Introduction
The time synchronization source selector is used to select a common source of absolute
time for the IED when it is a part of a protection system. This makes it possible to
compare event and disturbance data between all IEDs in a station automation system.
Only GPS and IRIG-B time synchronization sources are acceptable for phasor
measurement from the accuracy point of view, and RES670 supports both.
Time definitions
The error of a clock is the difference between the actual time of the clock, and the time
the clock is intended to have. Clock accuracy indicates the increase in error, that is, the
time gained or lost by the clock. A disciplined clock knows its own faults and tries to
compensate for them.
External Protection
Synchronization Comm- Events
Time- unication and control
sources functions
Regulator
GPS
(Setting,
IRIG-B see
technical
SNTP
reference
manual) IEC11000403-1-en.vsd
GUID-88CF55E0-69C4-42CD-8BA6-172A41FD7811 V1 EN
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All time tagging is performed by the software clock. When for example a status signal
is changed in the protection system with the function based on free running hardware
clock, the event is time tagged by the software clock when it reaches the event
recorder. Thus the hardware clock can run independently.
The echo mode for the differential protection is based on the hardware clock. Thus,
there is no need to synchronize the hardware clock and the software clock.
The synchronization of the hardware clock and the software clock is necessary only
when GPS or IRIG B 00X with optical fibre, IEEE 1344 is used for differential
protection. The two clock systems are synchronized by a special clock synchronization
unit with two modes, fast and slow. A special feature, an automatic fast clock time
regulator is used. The automatic fast mode makes the synchronization time as short as
possible during start up or at interruptions/disturbances in the GPS timing. The setting
fast or slow is also available on the local HMI.
If a GPS clock is used for 670 series IEDs other than line differential RED670, the
hardware and software clocks are not synchronized
When the time difference is <16μs, the differential function is blocked and the time
regulator for the hardware clock automatically uses a fast mode to synchronize the
clock systems. The time adjustment is made with an exponential function, that is, big
time adjustment steps in the beginning, then smaller steps until a time deviation
between the GPS time and the differential time system of <16μs has been reached.
Then the differential function is enabled and the synchronization remains in fast mode
or switches to slow mode, depending on the setting.
Synchronization principle
From a general point of view synchronization can be seen as a hierarchical structure. A
function is synchronized from a higher level and provides synchronization to lower levels.
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Synchronization from
a higher level
Function
Optional synchronization of
modules at a lower level
IEC09000342-1-en.vsd
IEC09000342 V1 EN
The IED has a built-in real-time clock (RTC) with a resolution of one second. The
clock has a built-in calendar that handles leap years through 2038.
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Synchronization messages configured as coarse are only used for initial setting of the
time. After this has been done, the messages are checked against the internal time and
only an offset of more than 10 seconds resets the time.
Rate accuracy
In the IED, the rate accuracy at cold start is 100 ppm but if the IED is synchronized for
a while, the rate accuracy is approximately 1 ppm if the surrounding temperature is
constant. Normally, it takes 20 minutes to reach full accuracy.
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• via any of the communication ports of the IED as a telegram message including
date and time
• as a minute pulse connected to a binary input
• via GPS
The minute pulse is used to fine tune already existing time in the IEDs.
The minute pulse is connected to any channel on any Binary Input Module in the IED.
The electrical characteristic is thereby the same as for any other binary input.
The definition of a minute pulse is that it occurs one minute after the last pulse. As
only the flanks are detected, the flank of the minute pulse shall occur one minute after
the last flank.
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Pulse data:
en05000251.vsd
IEC05000251 V1 EN
The default time-out-time for a minute pulse is two minutes, and if no valid minute
pulse is received within two minutes a SYNCERR will be given.
If contact bounce occurs, only the first pulse will be detected as a minute pulse. The
next minute pulse will be registered first 60 s - 50 ms after the last contact bounce.
If the minute pulses are perfect, for example, it is exactly 60 seconds between the
pulses, contact bounces might occur 49 ms after the actual minute pulse without
effecting the system. If contact bounce occurs more than 50 ms, for example, it is less
than 59950 ms between the two most adjacent positive (or negative) flanks, the minute
pulse will not be accepted.
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still keeps the time since last up-time. If the minute pulse is removed for instance for
an hour, the internal time will drift by maximum the error rate in the internal clock. If
the minute pulse is returned, the first pulse automatically is rejected. The second pulse
will possibly be rejected due to the spike filter. The third pulse will either synchronize
the time, if the time offset is more than 100 ms, or adjust the time, if the time offset is
small enough. If the time is set, the application will be brought to a safe state before the
time is set. If the time is adjusted, the time will reach its destination within 1.7 minutes.
To receive IRIG-B there are two connectors in the IRIG-B module, one galvanic BNC
connector and one optical ST connector. IRIG-B 12x messages can be supplied via the
galvanic interface, and IRIG-B 00x messages can be supplied via either the galvanic
interface or the optical interface, where x (in 00x or 12x) means a number in the range
of 1-7.
“00” means that a base band is used, and the information can be fed into the IRIG-B
module via the BNC contact or an optical fiber. “12” means that a 1 kHz modulation is
used. In this case the information must go into the module via the BNC connector.
The IRIG-B module also takes care of IEEE1344 messages that are sent by IRIG-B
clocks, as IRIG-B previously did not have any year information. IEEE1344 is
compatible with IRIG-B and contains year information and information of the time-zone.
It is recommended to use IEEE 1344 for supplying time information to the IRIG-B
module. In this case, send also the local time in the messages, as this local time plus
the TZ Offset supplied in the message equals UTC at all times.
IEC05000425-2-en.vsd
IEC05000425 V2 EN
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4.4.1 Introduction
Use the six different groups of settings to optimize the IED operation for different
power system conditions. Creating and switching between fine-tuned setting sets,
either from the local HMI or configurable binary inputs, results in a highly adaptable
IED that can cope with a variety of power system scenarios.
A setting group is selected by using the local HMI, from a front connected personal
computer, remotely from the station control or station monitoring system or by
activating the corresponding input to the ActiveGroup function block.
Each input of the function block can be configured to connect to any of the binary
inputs in the IED. To do this PCM600 must be used.
The external control signals are used for activating a suitable setting group when
adaptive functionality is necessary. Input signals that should activate setting groups
must be either permanent or a pulse exceeding 400 ms.
More than one input may be activated at the same time. In such cases the lower order
setting group has priority. This means that if for example both group four and group
two are set to activate, group two will be the one activated.
Every time the active group is changed, the output signal GRP_CHGD is sending a pulse.
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The parameter MAXSETGR defines the maximum number of setting groups in use to
switch between.
ACTIVATE GROUP 6
ACTIVATE GROUP 5
ACTIVATE GROUP 4
ACTIVATE GROUP 3
ACTIVATE GROUP 2
+RL2 ACTIVATE GROUP 1
IOx-Bly1 ActiveGroup
Æ ACTGRP1 GRP1
IOx-Bly2
Æ ACTGRP2 GRP2
IOx-Bly3
Æ ACTGRP3 GRP3
IOx-Bly4
Æ ACTGRP4 GRP4
IOx-Bly5
Æ ACTGRP5 GRP5
IOx-Bly6 ACTGRP6
Æ GRP6
GRP_CHGD
ANSI05000119-2-en.vsd
ANSI05000119 V2 EN
The above example also includes seven output signals, for confirmation of which
group that is active.
SETGRPS function block has an input where the number of setting groups used is
defined. Switching can only be done within that number of groups. The number of
setting groups selected to be used will be filtered so only the setting groups used will
be shown on the Parameter Setting Tool.
ANSI05000433-2-en.vsd
ANSI05000433 V2 EN
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SETGRPS
MAXSETGR
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IEC05000716 V2 EN
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4.5.1 Introduction
Change lock function (CHNGLCK) is used to block further changes to the IED
configuration and settings once the commissioning is complete. The purpose is to
block inadvertent IED configuration changes beyond a certain point in time.
The function, when activated, will still allow the following changes of the IED state
that does not involve reconfiguring of the IED:
• Monitoring
• Reading events
• Resetting events
• Reading disturbance data
• Clear disturbances
• Reset LEDs
• Reset counters and other runtime component states
• Control operations
• Set system time
• Enter and exit from test mode
• Change of active setting group
The binary input signal LOCK controlling the function is defined in ACT or SMT:
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IEC09000946-1-en.vsd
IEC09000946 V1 EN
4.6.1 Introduction
When the Test mode functionality TESTMODE is activated, all the functions in the
IED are automatically blocked. It is then possible to unblock every function(s)
individually from the local HMI to perform required tests.
When leaving TESTMODE, all blockings are removed and the IED resumes normal
operation. However, if during TESTMODE operation, power is removed and later
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restored, the IED will remain in TESTMODE with the same protection functions
blocked or unblocked as before the power was removed. All testing will be done with
actually set and configured values within the IED. No settings will be changed, thus
mistakes are avoided.
While the IED is in test mode, the ACTIVE of the function block TESTMODE is
activated. The other outputs of the function block TESTMODE shows the cause of the
"Test mode: Enabled" state — input from configuration (OUTPUT output is activated)
or setting from local HMI (SETTING output is activated).
While the IED is in test mode, the yellow PICKUP LED will flash and all functions are
blocked. Any function can be unblocked individually regarding functionality and event
signalling.
Most of the functions in the IED can individually be blocked by means of settings from
the local HMI. To enable these blockings the IED must be set in test mode (output
ACTIVE is activated), see example in figure 33. When leaving the test mode, that is
entering normal mode, these blockings are disabled and everything is set to normal
operation. All testing will be done with actually set and configured values within the
IED. No settings will be changed, thus no mistakes are possible.
The blocked functions will still be blocked next time entering the test mode, if the
blockings were not reset.
The blocking of a function concerns all output signals from the actual function, so no
outputs will be activated.
When a binary input is used to set the IED in test mode and a
parameter, that requires restart of the application, is changed, the IED
will re-enter test mode and all functions will be blocked, also functions
that were unblocked before the change. During the re-entering to test
mode, all functions will be temporarily unblocked for a short time,
which might lead to unwanted operations. This is only valid if the IED
is put in TEST mode by a binary input, not by local HMI.
The TESTMODE function block might be used to automatically block functions when
a test handle is inserted in a test switch. A contact in the test switch (RTXP24 contact
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Basic IED functions
29-30) or an FT switch finger can supply a binary input which in turn is configured to
the TESTMODE function block.
Each of the functions includes the blocking from the TESTMODE function block. A
typical example from the undervoltage function is shown in figure 33.
The functions can also be blocked from sending events over IEC 61850 station bus to
prevent filling station and SCADA databases with test events, for example during a
maintenance test.
V Disconnection
Normal voltage
Pickup1
Pickup2
tBlkUV1 <
t1,t1Min
IntBlkStVal1
tBlkUV2 <
t2,t2Min
IntBlkStVal2
Time
Block step 1
Block step 2
en05000466_ansi.vsd
ANSI05000466 V1 EN
Figure 33: Example of blocking the time delayed undervoltage protection function.
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IEC09000219-1.vsd
IEC09000219 V1 EN
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4.7.1 Introduction
IED identifiers (TERMINALID) function allows the user to identify the individual IED
in the system, not only in the substation, but in a whole region or a country.
Use only characters A-Z, a-z and 0-9 in station, object and unit names.
4.8.1 Introduction
The Product identifiers function identifies the IED. The function has seven pre-set,
settings that are unchangeable but nevertheless very important:
• IEDProdType
• ProductDef
• FirmwareVer
• SerialNo
• OrderingNo
• ProductionDate
The settings are visible on the local HMI , under Main menu/Diagnostics/IED status/
Product identifiers
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Basic IED functions
They are very helpful in case of support process (such as repair or maintenance).
• IEDProdType
• Describes the type of the IED (like REL, REC or RET). Example: REL670
• FirmwareVer
• Describes the firmware version. Example: 1.4.51
• Firmware versions numbers are “running” independently from the release
production numbers. For every release numbers (like 1.5.0.17) there can be
one or more firmware versions, depending on the small issues corrected in
between releases.
• IEDMainFunType
• Main function type code according to IEC 60870-5-103. Example: 128
(meaning line protection).
• SerialNo
• OrderingNo
• ProductionDate
4.9.1 Introduction
The Signal matrix for binary inputs (SMBI) function is used within the Application
Configuration Tool (ACT) in direct relation with the Signal Matrix Tool (SMT), see
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Basic IED functions
the application manual to get information about how binary inputs are brought in for
one IED configuration.
IEC05000434-2-en.vsd
IEC05000434 V2 EN
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4.10.1 Introduction
The Signal matrix for binary outputs (SMBO) function is used within the Application
Configuration Tool (ACT) in direct relation with the Signal Matrix Tool (SMT), see
the application manual to get information about how binary inputs are sent from one
IED configuration.
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IEC05000439-2-en.vsd
IEC05000439 V2 EN
4.11.1 Introduction
The Signal matrix for mA inputs (SMMI) function is used within the Application
Configuration Tool (ACT) in direct relation with the Signal Matrix Tool (SMT), see
the application manual to get information about how milliamp (mA) inputs are brought
in for one IED configuration.
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Basic IED functions
IEC05000440-2-en.vsd
IEC05000440 V2 EN
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Basic IED functions
4.12.1 Introduction
Signal matrix for analog inputs function (SMAI), also known as the preprocessor
function, processes the analog signals connected to it and gives information about all
aspects of the analog signals connected, like the RMS value, phase angle, frequency,
harmonic content, sequence components and so on. This information is then used by
the respective functions in ACT (for example protection, measurement or monitoring).
The SMAI function is used within PCM600 in direct relation with the Signal Matrix
tool or the Application Configuration tool.
The output signal AI1 to AI4 are direct output of the, in SMT, connected input to
GRPx_A, GRPxB, GRPxC and GRPx_N, x=1-12. AIN is always the neutral current,
calculated residual sum or the signal connected to GRPx_N. Note that function block
will always calculate the residual sum of current/voltage if the input is not connected in
SMT. Applications with a few exceptions shall always be connected to AI3P.
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If SMAI setting ConnectionType is Ph-Ph at least two of the inputs GRPx_A, GRPx_B
and GRPx_C must be connected in order to calculate positive sequence voltage. If
SMAI setting ConnectionType is Ph-N, all three inputs GRPx_A, GRPx_B and
GRPx_C must be connected in order to calculate positive sequence voltage.
If only one phase-phase voltage is available and SMAI setting ConnectionType is Ph-
Ph the user is advised to connect two (not three) of the inputs GRPx_A, GRPx_B and
GRPx_C to the same voltage input as shown in figure 38 to make SMAI calculating a
positive sequence voltage (that is input voltage/√3).
IEC10000060-1-en.vsd
IEC10000060 V1 EN
The outputs from the above configured SMAI block shall only be used
for Overfrequency protection (SAPTOF, 81), Underfrequency
protection (SAPTUF, 81) and Rate-of-change frequency protection
(SAPFRC, 81) due to that all other information except frequency and
positive sequence voltage might be wrongly calculated.
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Basic IED functions
ANSI05000705-1-en.vsd
ANSI05000705 V1 EN
SMAI2
BLOCK AI3P
^GRP2_A AI1
^GRP2_B AI2
^GRP2_C AI3
^GRP2_N AI4
TYPE AIN
ANSI07000130-1-en.vsd
ANSI07000130 V1 EN
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Basic IED functions
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Section 4 1MRK511250-UUS B
Basic IED functions
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Basic IED functions
4.13.1 Introduction
Summation block 3 phase function 3PHSUM is used to get the sum of two sets of three-
phase analog signals (of the same type) for those IED functions that might need it.
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Basic IED functions
IEC05000441-2-en.vsd
IEC05000441 V2 EN
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Basic IED functions
4.14.1 Introduction
Authority status (ATHSTAT) function is an indication function block for user log-on
activity.
Whenever one of the two events occurs, the corresponding output (USRBLKED or
LOGGEDON) is activated. The output can for example, be connected on Event
(EVENT) function block for LON/SPA.The signals are also available on IEC 61850
station bus.
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Basic IED functions
IEC06000503-2-en.vsd
IEC06000503 V2 EN
4.15.1 Introduction
The Denial of service functions (DOSFRNT, DOSOEMAB and DOSOEMCD) are
designed to limit overload on the IED produced by heavy Ethernet network traffic. The
communication facilities must not be allowed to compromise the primary functionality
of the device. All inbound network traffic will be quota controlled so that too heavy
network loads can be controlled. Heavy network load might for instance be the result
of malfunctioning equipment connected to the network.
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IEC09000749-1-en.vsd
IEC09000749 V1 EN
DOSOEMAB
LINKUP
WARNING
ALARM
IEC09000750-1-en.vsd
IEC09000750 V1 EN
DOSOEMCD
LINKUP
WARNING
ALARM
IEC09000751-1-en.vsd
IEC09000751 V1 EN
4.15.4 Signals
Table 57: DOSFRNT Output signals
Name Type Description
LINKUP BOOLEAN Ethernet link status
WARNING BOOLEAN Frame rate is higher than normal state
ALARM BOOLEAN Frame rate is higher than throttle state
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Basic IED functions
4.15.5 Settings
The function does not have any parameters available in the local HMI or PCM600.
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Wide area measurement system
5.1.1 Introduction
The Configuration parameters for IEEE 1344 and C37.118 protocol PMUCONF
protocol contains:
• Data about the particular RES670 IED in the PMU synchrophasor streaming
network. For example, IP address, id, communication port.
• Format of the data streamed through the protocol. For example, polar, rectangular,
float or integer.
The UDP implementation in RES670 is a UDP multicast server. To get the data from
RES670, subscribe to multicast server which sends only data frames. The header and
the configuration frames are achieved using TCP/IP.
The data is sent either as C37.118 or as IEEE 1344 frames. The selection is made by
choosing the desired protocol on ProtocolOnUDP.
The multicast server sends data to a fixed port 8910. It is possible to turn off the
multicast data communication, if no response is received. The multicast data
communication is turned off either by setting the parameter SendUDP to Disabled or
by sending a C37.118 or IEEE1344 command frame containing RTDOFF/RTDON to
the terminal on port 4713 with TCP/IP protocol.
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Wide area measurement system
The settings are not saved if the RTDON/RTDOFF is changed from a remote place.
The next time a save or reboot command is issued, the values saved after the last
operation are used.
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5.2.1 Introduction
The phasor measurement reporting block moves the phasor calculations into a C37.118
frame which contains data about PMU configuration, analog values, binary signal
indications and information about time synchronization quality.
The message generated by the PMUREPORT function block is set in accordance with
the standard IEEE 1344 protocol for further process.
The phasor measurement reporting block has settings that allows the user to use one
phasor to report the voltage or a current phasor. There are also settings for positive or
negative sequence phasors, reporting rate and phasor representation (polar or
rectangular).
Phasor data can be reported to up to 8 phasor data concentrators over TCP. It is also
possible to use UDP for multicast transmission of phasor data.
The standard C37.118 protocol imposes requirements on the devices and describes the
communication message structure and data, The PMU complies with all the standard
requirements with a specific attention to the Total Vector Error (TVR) requirement.
The TVR is calculated using the equation.
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Wide area measurement system
2
( X r ( n ) - X r )2 + ( X i ( n ) - X i )
TVE =
X r2 + X i2
GUID-80D9B1EA-A770-4F50-9530-61644B4DEBBE V1 EN (Equation 1)
where,
This is achieved by calibrating the analog inputs. The RES 670 Technical Manual
describes the operation mode of the PMU. This implementation follows those
principles to a flexible extent for the new platform.
The C37.118 protocol settings are displayed in the LHMI as shown below:
GUID-52A8E0E9-B9F7-4AF7-B102-B652876DBCAB V1 EN
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Wide area measurement system
TRM
SMAI PMUREPORT
U
Freq
I dF/dT Messages
PHASOR1
PHASOR2 OEM
OC
TRM
U
OCTRIG
UV
UVTRIG
I
Commands TCP/IP, UDP/IP
BI1
BIM C37.118
BI2
protocol
OR
GTM
PPS Time data IEC11000408_1_en.vsd
GPS signal
GUID-9CC16FFC-4D4F-45BB-A4CD-F6A910A83BD3 V1 EN
The TRM modules are individually AC-calibrated. The calibration data is stored in the
prepared area of the TRM EE-Prom [1]. The pre-processor block is extended with
calibration compensation and a new angle reference method based on timestamps. The
positive sequence output from the pre-processor is used as synchrophasors.
The RES 670 also has trigger inputs, for example, overcurrent, undervoltage,
frequency and rate of change of frequency(df/dt) . The protection functions from the
670 series are used for these triggers.
The PMUREPORT function block implements the reporting filters designed to avoid
aliasing as the reporting frequency is lower than the sample/calculation frequency. As
ACT is used for configuration., the user can use glue logic to customize the configuration.
The RES 670 supports both the C37.118 and IEEE 1344-1995 protocol
implementations. The protocol supports TCP/IP, UDP/IP unicast, and UDP/IP multicast.
The channels that are to be included in the C37.118 synchrophasor streaming data
(phasors and frequency) are filtered in order to suppress aliasing effects, as the rate of
the C37.118 data is slower than the data rate for internal processing. For this purpose
there is one anti-aliasing filter for every reporting rate, named according to the
corresponding rate. The filters are designed to attenuate all aliasing frequencies to at
least -40 dB (a gain of 0.01).
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Wide area measurement system
Fs
f0 ±
2
IECEQUATION2418 V1 EN (Equation 2)
where,
The compliance with C37.118 is obtained by increasing the stopband of the anti-
aliasing filters with 10% of the Nyquist frequency (0.1*Fs/2), in order to allow for the
same amount of movement in the fundamental frequency and still suppress signals
outside the band as shown in equation 2.
Regular passband is not taken into consideration, since phasor measurement deals only
with fundamental frequency. Theoretically, only the fundamental frequency is captured
and all other frequencies are attenuated. This behavior requires filters with
unreasonably long delays. A set of filters with different characteristics is available
designed for anti-aliasing and is C37.118 standard compliant. One has to choose the
corresponding filter to be complaint with the standard. The knowledge of the frequency
content in the power system makes it possible to combine filter and reporting rate
freely. The objective for this is to reduce the response time of the synchrophasor.
Choose the right filter application from the filter characteristics shown in the below
figures.
These filters are relative to the frequency adaptive synchrophasor measurement so the
frequency scale in the figure 48, figure 49, figure 50 and figure 51 represents the
frequency deviation relative to the fundamental frequency (and not the nominal
frequency). The frequency scale applies in both positive and negative direction from
the fundamental frequency.
The curves in figure 48, figure 49, figure 50 and figure 51 represent the
filter values in table 61.
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Wide area measurement system
0.9
0.8
240/200 fr/s
0.7
120/100 fr/s
0.6
Gain [linear]
60/50 fr/s
0.5
30/25 fr/s
0.4
20/16.7 fr/s
0.3
15/12.5 fr/s
0.2
12/10 fr/s
0.1
10/8.3 fr/s
0
0 20 40 60 80 100 120
Freq. deviation from fundamental [Hz]
IEC11000314.en.vsd
IEC11000314 V1 EN
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Wide area measurement system
0.9
240/200 fr/s
0.8
120/100 fr/s
0.7
Gain [linear] 60/50 fr/s
0.6
30/25 fr/s
0.5
20/16.7 fr/s
0.4
15/12.5 fr/s
0.3
12/10 fr/s
0.2
10/8.3 fr/s
0.1
0
0 1 2 3 4 5 6 7 8 9 10
Freq. deviation from fundamental [Hz]
IEC11000315.en.vsd
IEC11000315 V1 EN
Figure 49: Reporting filter characteristics for 60 Hz nominal frequency (zoomed in)
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Wide area measurement system
240/200 fr/s
120/100 fr/s
60/50 fr/s
30/25 fr/s
20/16.7 fr/s
15/12.5 fr/s
12/10 fr/s
10/8.3 fr/s
30/25 fr/s
IEC11000316 V1 EN
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Wide area measurement system
0.9
240/200 fr/s
0.8
120/100 fr/s
0.7
60/50 fr/s
Gain [linear]
0.6
30/25 fr/s
0.5
20/16.7 fr/s
0.4
15/12.5 fr/s
0.3
12/10 fr/s
0.2
10/8.3 fr/
s
0.1
0
0 1 2 3 4 5 6 7 8 9 10
Freq. deviation from fundamental
[Hz]
IEC11000317 V1 EN
Figure 51: Reporting filter characteristics for 50 Hz nominal frequency (zoomed in)
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Wide area measurement system
ANSI12000163-2-en.vsd
ANSI12000163 V1 EN
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Signal magnitude:
Voltage phasor (0.1–1.2) x Vn
Current phasor (0.5–2.0) x In
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Current protection
6.1.1 Introduction
The four step phase overcurrent protection function OC4PTOC (51/67) has
independent inverse time delay settings for step 1 and 4. Step 2 and 3 are always
definite time delayed.
All IEC and ANSI inverse time characteristics are available together with an optional
user defined time characteristic.
The directional function is voltage polarized with memory. The function can be set to
be directional or non-directional independently for each of the steps.
Second harmonic blocking level can be set for the function and can be used to block
each step individually
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Current protection
V3P
TRIP
Harmonic harmRestrBlock
I3P Restraint
Element
enableDir
Mode Selection
enableStep1-4
DirectionalMode1-4
en05000740_ansi.vsd
ANSI05000740 V1 EN
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A common setting for all steps, NumPhSel, is used to specify the number of phase
currents to be high to enable operation. The settings can be chosen: 1 out of 3, 2 out of
3 or 3 out of 3.
The sampled analog phase currents are processed in a pre-processing function block.
Using a parameter setting MeasType within the general settings for the four step phase
overcurrent protection 3-phase output function OC4PTOC (51/67), it is possible to
select the type of the measurement used for all overcurrent stages. It is possible to
select either discrete Fourier filter (DFT) or true RMS filter (RMS).
If DFT option is selected then only the RMS value of the fundamental frequency
components of each phase current is derived. Influence of DC current component and
higher harmonic current components are almost completely suppressed. If RMS option
is selected then the true RMS values is used. The true RMS value in addition to the
fundamental frequency component includes the contribution from the current DC
component as well as from higher current harmonic. The selected current values are
fed to OC4PTOC (51/67).
In a comparator, for each phase current, the DFT or RMS values are compared to the
set operation current value of the function (Pickup1, Pickup2, Pickup3, Pickup4). If a
phase current is larger than the set operation current, outputs PICKUP, PU_STx,
PU_A, PU_B and PU_C are, without delay, activated. Output signals PU_A, PU_B
and PU_C are common for all steps. This means that the lowest set step will initiate the
activation. The PICKUP signal is common for all three phases and all steps. It shall be
noted that the selection of measured value (DFT or RMS) do not influence the
operation of directional part of OC4PTOC (51/67) .
Service value for individually measured phase currents are also available on the local
HMI for OC4PTOC (51/67) function, which simplifies testing, commissioning and in
service operational checking of the function.
A harmonic restrain of the function can be chosen. A set 2nd harmonic current in
relation to the fundamental current is used. The 2nd harmonic current is taken from the
pre-processing of the phase currents and the relation is compared to a set restrain
current level.
The function can be directional. The direction of the fault current is given as current
angle in relation to the voltage angle. The fault current and fault voltage for the
directional function is dependent of the fault type. To enable directional measurement
at close in faults, causing low measured voltage, the polarization voltage is a
combination of the apparent voltage (85%) and a memory voltage (15%). The
following combinations are used.
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Current protection
Vref _ AB = VA - VB I dir _ AB = I A - I B
GUID-4F361BC7-6D91-47B5-8119-A27009C0AD6A V1 EN (Equation 3)
Vref _ BC = VB - VC I dir _ BC = I B - I C
ANSIEQUATION1450 V1 EN (Equation 4)
Vref _ CA = VC - VA I dir _ CA = IC - I A
ANSIEQUATION1451 V1 EN (Equation 5)
Vref _ A = VA I dir _ A = I A
ANSIEQUATION1452 V1 EN (Equation 6)
Vref _ B = VB I dir _ B = I B
ANSIEQUATION1453 V1 EN (Equation 7)
Vref _ C = VC I dir _ C = I C
ANSIEQUATION1454 V1 EN (Equation 8)
For close-in three-phase faults, the V1AM memory voltage, based on the same positive
sequence voltage, ensures correct directional discrimination.
The memory voltage is used for 100 ms or until the positive sequence voltage is restored.
• If the current is still above the set value of the minimum operating current
(between 10 and 30% of the set terminal rated current IBase), the condition seals in.
• If the fault has caused tripping, the trip endures.
• If the fault was detected in the reverse direction, the measuring element in
the reverse direction remains in operation.
• If the current decreases below the minimum operating value, the memory resets
until the positive sequence voltage exceeds 10% of its rated value.
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The directional setting is given as a characteristic angle AngleRCA for the function and
an angle window AngleROA.
Reverse
Vref
RCA
ROA
ROA Forward
Idir
en05000745_ansi.vsd
ANSI05000745 V1 EN
The default value of AngleRCA is –65°. The parameters AngleROA gives the angle
sector from AngleRCA for directional borders.
A minimum current for directional phase pickup current signal can be set:
PUMinOpPhSel.
If no blockings are given the pickup signals will start the timers of the step. The time
characteristic for each step can be chosen as definite time delay or inverse time
characteristic. A wide range of standardized inverse time characteristics is available. It
is also possible to create a tailor made time characteristic. The possibilities for inverse
time characteristics are described in section "Inverse characteristics".
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Current protection
All four steps in OC4PTOC (51/67) can be blocked from the binary input BLOCK.
The binary input BLKx (x=1, 2, 3 or 4) blocks the operation of respective step.
Characteristx=DefTime
|IOP| AND TRx
a
a>b
OR 0-tx
Pickupx b
0
AND
STx
BLKSTx 0-txMin
0 AND
BLOCK
Inverse
Characteristx=Inverse
DirModeSelx=Disabled OR STAGEx_DIR_Int
DirModeSelx=Non-directional
DirModeSelx=Forward
AND OR
FORWARD_Int
DirModeSelx=Reverse
AND
REVERSE_Int
ANSI12000008-1-en.vsd
ANSI12000008-1-en.vsd
ANSI12000008 V1 EN
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BLOCK
a
a>b
0.07*IBase b
a
a>b
b
Extract second 2NDHARMD
IOP AND
harmonic current a
a>b
component b
2ndH_BLOCK_Int
Extract
fundamental
current component
X
2ndHarmStab
IEC13000014-1-en.vsd
IEC13000014 V1 EN
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Current protection
ANSI06000187-2-en.vsd
ANSI06000187 V2 EN
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Current protection
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6.2.1 Introduction
The four step residual overcurrent protection EF4PTOC (51N/67N) has an inverse or
definite time delay independent for each step separately.
All IEC and ANSI time-delayed characteristics are available together with an optional
user defined characteristic.
IDir, VPol and IPol can be independently selected to be either zero sequence or
negative sequence.
EF4PTOC (51N/67N) can also be used to provide a system back-up for example, in the
case of the primary protection being out of service due to communication or voltage
transformer circuit failure.
EF4PTOC (51N/67N) can be configured to measure the residual current from the three-
phase current inputs or the current from a separate current input.
These inputs are connected from the corresponding pre-processing function blocks in
the Configuration Tool within PCM600.
The function always uses Residual Current (3I0) for its operating quantity. The residual
current can be:
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Current protection
I op = 3 × Io = IA + IB + IC
EQUATION2011-ANSI V1 EN (Equation 9)
where:
IA, IB, IC are fundamental frequency phasors of three individual phase currents.
The residual current is pre-processed by a discrete Fourier filter. Thus the phasor of the
fundamental frequency component of the residual current is derived. The phasor
magnitude is used within the EF4PTOC (51N/67N) protection to compare it with the
set operation current value of the four steps (Pickup1, Pickup2, Pickup3 or Pickup4). If
the residual current is larger than the set operation current and the step is used in non-
directional mode a signal from the comparator for this step is set to true. This signal
will, without delay, activate the output signal PUSTx (x=step 1-4) for this step and a
common PICKUP signal.
A polarizing quantity is used within the protection in order to determine the direction
to the ground fault (Forward/Reverse).
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The function can be set to use voltage polarizing, current polarizing or dual polarizing.
Voltage polarizing
When voltage polarizing is selected the protection will use either the residual voltage
-3V0 or the negative sequence voltage -3V2 as polarizing quantity V3P.
where:
VA, VB, VC are fundamental frequency phasors of three individual phase voltages.
In order to use this, all three phase-to-ground voltages must be connected to three IED
VT inputs.
The residual voltage is pre-processed by a discrete fourier filter. Thus, the phasor of the
fundamental frequency component of the residual voltage is derived.
This phasor is used together with the phasor of the operating directional current, in
order to determine the direction to the ground fault (Forward/Reverse). In order to
enable voltage polarizing the magnitude of polarizing voltage shall be bigger than a
minimum level defined by setting parameter VpolMin.
It shall be noted that residual voltage (-3V0) or negative sequence voltage (-3V2) is
used to determine the location of the ground fault. This insures the required inversion
of the polarizing voltage within the ground-fault function.
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Current polarizing
When current polarizing is selected the function will use an external residual current
(3I0) as polarizing quantity IPol. This current can be:
I Pol = 3 × Io = IA + IB + IC
EQUATION2019-ANSI V1 EN (Equation 13)
where:
IA, IB and IC are fundamental frequency phasors of three individual phase currents.
The residual current is pre-processed by a discrete fourier filter. Thus the phasor of the
fundamental frequency component of the polarizing current is derived. This phasor is
then multiplied with pre-set equivalent zero-sequence source Impedance in order to
calculate equivalent polarizing voltage VIPol in accordance with the following formula:
which will be then used, together with the phasor of the operating current, in order to
determine the direction to the ground fault (Forward/Reverse).
In order to enable current polarizing the magnitude of polarizing current shall be bigger
than a minimum level defined by setting parameter IPolMin.
Dual polarizing
When dual polarizing is selected the function will use the vectorial sum of the voltage
based and current based polarizing in accordance with the following formula:
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Current protection
Vpol and Ipol can be either zero sequence component or negative sequence component
depending upon the user selection.
Then the phasor of the total polarizing voltage VTotPol will be used, together with the
phasor of the operating current, to determine the direction of the ground fault (Forward/
Reverse).
The individual steps within the protection can be set as non-directional. When this
setting is selected it is then possible via function binary input BLKx to provide external
directional control (that is, torque control) by for example using one of the following
functions if available in the IED:
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Section 6 1MRK511250-UUS B
Current protection
Each overcurrent step uses operating quantity Iop (residual current) as measuring
quantity. Each of the four residual overcurrent steps has the following built-in facilities:
Simplified logic diagram for one residual overcurrent step is shown in figure 58.
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Current protection
BLKTR
IMinx Characteristx=DefTime
X T b
a>b
F a
TRSTx
tx AND
|IOP|
a OR
a>b
b
PUSTx
MultPUx AND
X T
Pickupx F tMin
AND Inverse
BLKx
BLOCK Characteristx=Inverse
2ndHarm_BLOCK_Int
OR
HarmRestrainx=Disabled
DirModex=Off OR STEPx_DIR_Int
DirModex=Non-directional
DirModex=Forward
AND OR
FORWARD_Int
DirModex=Reverse
AND
REVERSE_Int
ANSI10000008-1-en.vsd
ANSI10000008 V1 EN
Figure 58: Simplified logic diagram for residual overcurrent step x, where x = step
1, 2, 3 or 4
The protection can be completely blocked from the binary input BLOCK. Output
signals for respective step, and PUSTx and TRSTx, can be blocked from the binary
input BLKx. The trip signals from the function can be blocked from the binary input
BLKTR.
It shall be noted that at least one of the four residual overcurrent steps
shall be set as directional in order to enable execution of the directional
supervision element and the integrated directional comparison function.
The protection has integrated directional feature. As the operating quantity current lop
is always used. The polarizinwcg method is determined by the parameter setting
polMethod. The polarizing quantity will be selected by the function in one of the
following three ways:
The operating and polarizing quantity are then used inside the directional element, as
shown in figure 59, in order to determine the direction of the ground fault.
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Current protection
Operating area
PUREV
0.6 * INDirPU
Characteristic for reverse
release of measuring steps
-RCA -85 deg
Characteristic
for PUREV 40% of
INDirPU RCA +85 deg
RCA
65° VPol = -3V0
PUFW
I op = 3I0
Operating area
Characteristic
for PUFW ANSI11000243-1-en.ai
ANSI11000243 V1 EN
Figure 59: Operating characteristic for ground-fault directional element using the
zero sequence components
Directional comparison step, built-in within directional supervision element, will set
EF4PTOC (51N/67N) function output binary signals:
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Simplified logic diagram for directional supervision element with integrated directional
comparison step is shown in figure 60:
|IopDir|
a
a>b PUREV
b AND
REVERSE_Int
0.6
X
a
a>b
AND PUFW
IDirPU b
FORWARD_Int
X
0.4
FWD
AND FORWARD_Int
AngleRCA
polMethod=Voltage
OR
VPolMin
Characteristic
Directional
polMethod=Dual IPolMin
VPol T
I3PDIR
polMethod=Current 0.0 F
OR
VTPol
IPol AND REVERSE_Int
T RVS
0.0 F
VIPol
RNPol X STAGE1_DIR_Int
Complex T
STAGE2_DIR_Int
XNPol Number 0.0 F STAGE3_DIR_Int OR
STAGE4_DIR_Int
BLOCK AND
ANSI07000067-4-en.vsd
ANSI07000067 V4 EN
Figure 60: Simplified logic diagram for directional supervision element with integrated directional comparison step
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Current protection
Blocking from 2nd harmonic element activates if all three criteria are satisfied:
If all the above three conditions are fulfilled then 2NDHARMD function output signal
is set to logical value one and harmonic restraining feature to the function block is
applicable.
In addition to the basic functionality explained above the 2nd harmonic blocking can be
set in such way to seal-in until residual current disappears. This feature might be
required to stabilize EF4PTOC (51N67N) during switching of parallel transformers in
the station. In case of parallel transformers there is a risk of sympathetic inrush current.
If one of the transformers is in operation, and the parallel transformer is switched in,
the asymmetric inrush current of the switched in transformer will cause partial
saturation of the transformer already in service. This is called transferred saturation.
The 2nd harmonic of the inrush currents of the two transformers is in phase opposition.
The summation of the two currents thus gives a small 2nd harmonic current. The
residual fundamental current is however significant. The inrush current of the
transformer in service before the parallel transformer energizing, is a little delayed
compared to the first transformer. Therefore we have high 2nd harmonic current
component initially. After a short period this current is however small and the normal
2nd harmonic blocking resets. If the BlkParTransf function is activated the 2nd
harmonic restrain signal is latched as long as the residual current measured by the relay
is larger than a selected step current level by using setting UseStartValue.
This feature has been called Block for Parallel Transformers. This 2nd harmonic seal-in
feature is activated when all of the following three conditions are simultaneously fulfilled:
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select which one of the four pickup values that will be used (Pickup1 or Pickup2
or Pickup3 or Pickup4).
Once Block for Parallel Transformers is activated the basic 2nd harmonic blocking
signal is sealed-in until the residual current magnitude falls below a value defined by
parameter setting Use_PUValue (see condition 3 above).
Simplified logic diagram for 2nd harmonic blocking feature is shown in figure 61.
BLOCK
a
a>b
0.07*IBase b
a
a>b
b
Extract second 2NDHARMD
IOP AND
harmonic current a
a>b
component b
Extract
fundamental
current component
X
2ndHarmStab
q-1
0-70ms OR
0 AND OR 2ndH_BLOCK_Int
BlkParTransf=On
|IOP|
a
a>b
b
Use_PUValue
Pickup1>
Pickup2>
Pickup3>
Pickup4>
ANSI13000015-1-en.vsd
ANSI13000015 V1 EN
Figure 61: Simplified logic diagram for 2nd harmonic blocking feature and Block for Parallel Transformers feature
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Current protection
Integrated in the four step residual overcurrent protection are Switch on to fault logic
(SOTF) and Under-Time logic. The setting parameter SOTF is set to activate either
SOTF or Under-Time logic or both. When the circuit breaker is closing there is a risk
to close it onto a permanent fault, for example during an autoreclosing sequence. The
SOTF logic will enable fast fault clearance during such situations. The time during
which SOTF and Under-Time logics will be active after activation is defined by the
setting parameter t4U.
The SOTF logic uses the pickup signal from step 2 or step 3 for its operation, selected
by setting parameter StepForSOTF. The SOTF logic can be activated either from
change in circuit breaker position or from circuit breaker close command pulse. The
setting parameter SOTFSel can be set for activation of CB position open change, CB
position closed change or CB close command. In case of a residual current pickup from
step 2 or 3 (dependent on setting) the function will give a trip after a set delay tSOTF.
This delay is normally set to a short time (default 200 ms).
The Under-Time logic always uses the pickup signal from the step 4. The Under-Time
logic will normally be set to operate for a lower current level than the SOTF function.
The Under-Time logic can also be blocked by the 2nd harmonic restraint feature. This
enables high sensitivity even if power transformer inrush currents can occur at breaker
closing. This logic is typically used to detect asymmetry of CB poles immediately after
switching of the circuit breaker. The Under-Time logic is activated either from change
in circuit breaker position or from circuit breaker close and open command pulses. This
selection is done by setting parameter ActUnderTime. In case of a pickup from step 4
this logic will give a trip after a set delay tUnderTime. This delay is normally set to a
relatively short time (default 300 ms). Practically the Under-Time logic acts as circuit
breaker pole-discrepancy protection, but it is only active immediately after breaker
switching. The Under-Time logic can only be used in solidly or low impedance
grounded systems.
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Current protection
SOTF
Open
t4U
Closed
SOTFSel
Close command
tSOTF
AND
AND t
PUST2
StepForSOTF
PUST3
OperationMode
BLOCK
Disabled
SOTF
UNDERTIME TRIP
Undertime
tUnderTime
2nd Harmonic AND Undertime
EnHarmRestSOTF t
OR
Open
Close OR
t4U
ActUndrTimeSel
Close command AND
PUST4
ANSI06000643-3.vsd
ANSI06000643 V3 EN
Figure 62: Simplified logic diagram for SOTF and Under-Time features
EF4PTOC (51N/67N) Logic Diagram Simplified logic diagram for the complete
EF4PTOC (51N/67N) function is shown in figure 63:
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Current protection
signal to
communication
scheme
Directional Check
Element
DirModeSel
enableDir
harmRestrBlock
3I0 Harmonic
Restraint or
Element
Blocking at parallel
transformers
SwitchOnToFault
TRIP
CB
DirModeSel pos
or cmd
enableDir
Mode
Selection enableStep1-4
DirectionalMode1-4
ANSI06000424-2-en.vsd
ANSI06000424 V2 EN
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Current protection
IEC10000053 V1 EN
6.3.1 Introduction
Four step negative sequence overcurrent protection (NS4PTOC, (4612) ) has an inverse
or definite time delay independent for each step separately.
All IEC and ANSI time delayed characteristics are available together with an optional
user defined characteristic.
NS4PTOC (4612) can be used as main protection for unsymmetrical fault; phase-phase
short circuits, phase-phase-ground short circuits and single phase ground faults.
NS4PTOC (4612) can also be used to provide a system back-up for example, in the
case of the primary protection being out of service due to communication or voltage
transformer circuit failure.
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Current protection
directional zero sequence current can be used. Current reversal and weak-end infeed
functionality are available.
These inputs are connected from the corresponding pre-processing function blocks in
the Configuration Tool within PCM600.
Four step negative sequence overcurrent protection NS4PTOC (46I2) function always
uses negative sequence current (I2) for its operating quantity. The negative sequence
current is calculated from three-phase current input within the IED. The pre-processing
block calculates I2 from the first three inputs into the pre-processing block by using the
following formula:
1
I2 = (
× IA + a × IB + a × IC
2
)
3
ANSIEQUATION2266 V1 EN (Equation 16)
where:
IA, IB, IC are fundamental frequency phasors of three individual phase currents.
a is so called operator which gives a phase shift of 120 deg, that is, a = 1∠120 deg
a2 similarly gives a phase shift of 240 deg, that is, a2 = 1∠240 deg
The negative sequence current is pre-processed by a discrete Fourier filter. Thus, the
phasor of the fundamental frequency component of the negative sequence current is
derived. The phasor magnitude is used within the NS4PTOC (4612) protection to
compare it with the set operation current value of the four steps (Pickup1, Pickup2,
Pickup3 or Pickup4). If the negative sequence current is larger than the set operation
current and the step is used in non-directional mode a signal from the comparator for
this step is set to true. This signal, without delay, activates the output signal PU_STx
(x=1 - 4) for this step and a common PICKUP signal.
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Current protection
A polarizing quantity is used within the protection to determine the direction to the
fault (Forward/Reverse).
Four step negative sequence overcurrent protection NS4PTOC (4612) function can be
set to use voltage polarizing or dual polarizing.
Voltage polarizing
When voltage polarizing is selected, NS4PTOC (4612) uses the negative sequence
voltage -V2 as polarizing quantity V3P. This voltage is calculated from three phase
voltage input within the IED. The pre-processing block calculates -V2 from the first
three inputs into the pre-processing block by using the following formula:
1
V2 = (
× VA + a × VB + a × VC
2
)
3
ANSIEQUATION00024 V1 EN
where:
VA, VB, VC are fundamental frequency phasors of three individual phase voltages.
To use this all three phase-to-ground voltages must be connected to three IED VT inputs.
The negative sequence voltage is pre-processed by a discrete fourier filter. Thus, the
phasor of the fundamental frequency component of the negative sequence voltage is
derived. This phasor is used together with the phasor of the operating current, in order
to determine the direction to the fault (Forward/Reverse).To enable voltage polarizing
the magnitude of polarizing voltage must be bigger than a minimum level defined by
setting VpolMin.
Note that –V2 is used to determine the location of the fault. This ensures the required
inversion of the polarizing voltage within the function.
Dual polarizing
When dual polarizing is selected, the function uses the vectorial sum of the voltage
based and current based polarizing in accordance with the following formula:
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Current protection
Then the phasor of the total polarizing voltage VTotPol is used, together with the
phasor of the operating current, to determine the direction to the fault (Forward/Reverse).
The individual steps within the protection can be set as non-directional. When this
setting is selected it is then possible via function binary input BLKx (where x indicates
the relevant step within the protection) to provide external directional control (that is,
torque control) by for example using one of the following functions if available in the
IED:
The base quantities must be entered as setting parameters for every function. Base
current (IBase) must be entered as rated phase current of the protected object in
primary amperes. In line protections the primary rated current of the CT is chosen.
Base voltage VBase must be entered as rated phase-to-phase voltage of the protected
object in primary kV. In line protections the primary rated voltage of the VT is chosen.
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Current protection
Simplified logic diagram for one negative sequence overcurrent stage is shown in the
following figure:
ANSI09000684 V1 EN
Figure 65: Simplified logic diagram for negative sequence overcurrent stage x , where x=1, 2, 3 or 4
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Current protection
NS4PTOC (4612) can be completely blocked from the binary input BLOCK. The
pickup signals from NS4PTOC (4612) for each stage can be blocked from the binary
input BLKx. The trip signals from NS4PTOC (4612) can be blocked from the binary
input BLKTR.
At least one of the four negative sequence overcurrent steps must be set
as directional in order to enable execution of the directional supervision
element and the integrated directional comparison function.
NS4PTOC (4612) has integrated directional feature. As the operating quantity current
Iop is always used. The polarizing method is determined by the setting polMethod. The
polarizing quantity can be selected by NS4PTOC (4612) in one of the following two
ways:
The operating and polarizing quantity are then used inside the directional element, as
shown in figure 59, to determine the direction of the fault.
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Current protection
Reverse
Area
AngleRCA Vpol=-V2
Forward
Area
Iop = I2
ANSI10000031-1-en.vsd
ANSI10000031 V1 EN
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Current protection
Simplified logic diagram for directional supervision element with integrated directional
comparison step is shown in figure 60:
|IopDir|
a
a>b PUREV
b AND
REVERSE_Int
0.6
X
a
a>b
AND PUFW
IDirPU b
FORWARD_Int
X
0.4
FWD
AND FORWARD_Int
AngleRCA
polMethod=Voltage
OR
VPolMin
Characteristic
Directional
polMethod=Dual IPolMin
VPol T
I3PDIR
polMethod=Current 0.0 F
OR
VTPol
IPol AND REVERSE_Int
T RVS
0.0 F
VIPol
RNPol X STAGE1_DIR_Int
Complex T
STAGE2_DIR_Int
XNPol Number 0.0 F STAGE3_DIR_Int OR
STAGE4_DIR_Int
BLOCK AND
ANSI07000067-4-en.vsd
ANSI07000067 V4 EN
Figure 67: Simplified logic diagram for directional supervision element with integrated directional comparison step
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Current protection
ANSI09000685-1-en.vsd
ANSI09000685 V1 EN
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Current protection
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6.4.1 Introduction
In networks with high impedance grounding, the phase-to-ground fault current is
significantly smaller than the short circuit currents. Another difficulty for ground-fault
protection is that the magnitude of the phase-to-ground fault current is almost
independent of the fault location in the network.
Directional residual current can be used to detect and give selective trip of phase-to-
ground faults in high impedance grounded networks. The protection uses the residual
current component 3I0 · cos φ, where φ is the angle between the residual current and
the residual voltage (-3V0), compensated with a characteristic angle. Alternatively, the
function can be set to strict 3I0 level with a check of angle 3I0 and cos φ.
Directional residual power can also be used to detect and give selective trip of phase-to-
ground faults in high impedance grounded networks. The protection uses the residual
power component 3I0 · 3V0 · cos φ, where φ is the angle between the residual current
and the reference residual voltage, compensated with a characteristic angle.
A normal non-directional residual current function can also be used with definite or
inverse time delay.
A back-up neutral point voltage function is also available for non-directional sensitive
back-up protection.
In an isolated network, that is, the network is only coupled to ground via the
capacitances between the phase conductors and ground, the residual current always has
-90º phase shift compared to the reference residual voltage. The characteristic angle is
chosen to -90º in such a network.
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Current protection
As the magnitude of the residual current is independent of the fault location the
selectivity of the ground-fault protection is achieved by time selectivity.
When should the sensitive directional residual overcurrent protection be used and when
should the sensitive directional residual power protection be used? Consider the
following facts:
Phase
currents
IN
Phase-
ground
voltages
UN
IEC13000013-1-en.vsd
IEC13000013 V1 EN
Over current functionality uses true 3I0, i.e. sum of GRPxL1, GRPxL2 and GRPxL3.
For 3I0 to be calculated, connection is needed to all three phase inputs.
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Current protection
The function is using phasors of the residual current and voltage. Group signals I3P
and V3P containing phasors of residual current and voltage is taken from pre-processor
blocks.
The sensitive directional ground fault protection has the following sub-functions
included:
3I0
= ang(3I0) - ang(3Vref)
-3V0=Vref
3I0 cos
en06000648_ansi.vsd
ANSI06000648 V1 EN
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Current protection
3I0
3I0 cos
= ang(3I0) – ang(Vref)
-3V0
en06000649_ansi.vsd
ANSI06000649 V1 EN
For trip, both the residual current 3I0·cos φ and the release voltage 3V0, must be larger
than the set levels: INCosPhiPU and VNRelPU.
Trip from this function can be blocked from the binary input BLKTRDIR.
When the function is activated binary output signals PICKUP and PUDIRIN are
activated. If the output signals are active after the set delay tDef the binary output
signals TRIP and TRDIRIN are activated. The trip from this sub-function has definite
time delay.
There is a possibility to increase the operate level for currents where the angle φ is
larger than a set value as shown in figure 72. This is equivalent to blocking of the
function if φ > ROADir. This option is used to handle angle error for the instrument
transformers.
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Current protection
Vref0=-
-3V =V3V
ref o
RCA = 0°
3I0 cos
ROA
ANSI06000650-2-
vsd
en06000650_ansi.vsd
ANSI06000650 V2 EN
It is also possible to tilt the characteristic to compensate for current transformer angle
error with a setting RCAComp as shown in the figure 73:
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Section 6 1MRK511250-UUS B
Current protection
Operate area
-3V0=Vref RCA = 0°
Instrument
transformer a
RCAcomp
angle error
Characteristic after
angle compensation
en06000651_ansi.vsd
ANSI06000651 V1 EN
For trip, both the residual power 3I0 · 3V0 · cos φ, the residual current 3I0 and the
release voltage 3V0, shall be larger than the set levels (SN_PU, INRelPU and VNRelPU).
Trip from this function can be blocked from the binary input BLKTRDIR.
When the function is activated binary output signals PICKUP and PUDIRIN are
activated. If the output signals are active after the set delay tDef or after the inverse
time delay (setting TDSN) the binary output signals TRIP and TRDIRIN are activated.
The function shall indicate forward/reverse direction to the fault. Reverse direction is
defined as 3I0 · 3V0·cos (φ + 180°) ³ the set value.
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Current protection
This variant has the possibility of choice between definite time delay and inverse time
delay.
RCA = 0º
ROA = 80º
Operate area
3I0
Vref=-3V0
ANSI06000652-2-en.vsd
ANSI06000652 V2 EN
For trip, both the residual current 3I0 and the release voltage 3V0, shall be larger than
the set levels INDirPU and VNRelPU and the angle φ shall be in the set sector ROADir
and RCADir.
Trip from this function can be blocked from the binary input BLKTRDIR.
When the function is activated binary output signals PICKUP and PUDIRIN are
activated. If the output signals are active after the set delay tDef the binary output
signals TRIP and TRDIRIN are activated.
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Current protection
Directional functions
For all the directional functions there are directional pickup signals PUFW: fault in the
forward direction, and PUREV: Pickup in the reverse direction. Even if the directional
function is set to operate for faults in the forward direction a fault in the reverse
direction will give the pickup signal PUREV. Also if the directional function is set to
operate for faults in the reverse direction a fault in the forward direction will give the
pickup signal PUFW.
The non-directional function is using the calculated residual current, derived as sum of
the phase currents. This will give a better ability to detect cross-country faults with
high residual current, also when dedicated core balance CT for the sensitive ground
fault protection will saturate.
This variant has the possibility of choice between definite time delay and inverse time
delay. The inverse time delay shall be according to IEC 60255-3.
For trip, the residual current 3I0 shall be larger than the set level (INNonDirPU).
Trip from this function can be blocked from the binary input BLKNDN.
When the function is activated binary output signal PUNDIN is activated. If the output
signal is active after the set delay tINNonDir or after the inverse time delay the binary
output signals TRIP and TRNDIN are activated.
There shall also be a separate trip, with its own definite time delay, from this level set
voltage level.
For trip, the residual voltage 3V0 shall be larger than the set level (UN_PU).
Trip from this function can be blocked from the binary input BLKVN.
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When the function is activated binary output signal PUVN is activated. If the output
signals are active after the set delay tVNNonDir TRIP and TRUN are activated. A
simplified logical diagram of the total function is shown in figure 75.
INNonDirPU PUNDIN
0-t TRNDIN
0
PUVN
UN_PU
0-t TRVN
0
OpMODE=INcosPhi
Pickup_N
AND
INCosPhiPU
OpMODE=INVNCosPhi
PUDIRIN
AND OR AND
INVNCosPhiPU t
SN
AND TRDIRIN
Phi in RCA +- ROA
TimeChar = InvTime
AND
OpMODE=IN and Phi
AND
TimeChar = DefTime
DirMode = Forw
AND OR
PUFW
Forw
DirMode = Rev
AND
Rev PUREV
en06000653_ansi.vsd
ANSI06000653 V1 EN
Figure 75: Simplified logical diagram of the sensitive ground-fault current protection
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Current protection
ANSI07000032-2-en.vsd
ANSI07000032 V2 EN
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Current protection
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Current protection
At low setting:
(0.25-1.00)% of In: ±0.05% of In
(1.00-5.00)% of In: ±0.1% of In
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At low setting:
(0.25-1.00)% of In: ±0.05% of In
(1.00-5.00)% of In: ±0.1% of In
SYMBOL-A V1 EN
6.5.1 Introduction
The increasing utilizing of the power system closer to the thermal limits has generated
a need of a thermal overload protection also for power lines.
A thermal overload will often not be detected by other protection functions and the
introduction of the thermal overload protection can allow the protected circuit to
operate closer to the thermal limits.
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Current protection
The three-phase current measuring protection has an I2t characteristic with settable
time constant and a thermal memory..
An alarm pickup gives early warning to allow operators to take action well before the
line is tripped.
From the largest of the three-phase currents a final temperature is calculated according
to the expression:
2
æ I ö
Q final =ç ÷÷ × Tref
ç I ref
è ø
EQUATION1167 V1 EN (Equation 19)
where:
I is the largest phase current,
Iref is a given reference current and
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Current protection
æ Dt
ö
Qn = Qn -1 + ( Q final - Q n-1 ) × ç1 - e t ÷
-
è ø
EQUATION1168 V1 EN (Equation 20)
where:
Qn is the calculated present temperature,
When the component temperature reaches the set alarm level AlarmTemp the output
signal ALARM is set. When the component temperature reaches the set trip level
TripTemp the output signal TRIP is set.
There is also a calculation of the present time to operate with the present current. This
calculation is only performed if the final temperature is calculated to be above the
operation temperature:
æQ - Qoperate ö
toperate = -t × ln ç final
ç Q final - Q n ÷÷
è ø
EQUATION1169 V1 EN (Equation 21)
After a trip, caused by the thermal overload protection, there can be a lockout to
reconnect the tripped circuit. The output lockout signal LOCKOUT is activated when
the device temperature is above the set lockout release temperature setting ReclTemp.
The time to lockout release is calculated that is, a calculation of the cooling time to a
set value. The thermal content of the function can be reset with input RESET.
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Current protection
æQ - Qlockout _ release ö
tlockout _ release = -t × ln ç final ÷÷
ç Q final - Q n
è ø
EQUATION1170 V1 EN (Equation 22)
Here the final temperature is equal to the set or measured ambient temperature. The
calculated time to reset of lockout is available as a real figure signal, TENRECL.
In some applications the measured current can involve a number of parallel lines. This
is often used for cable lines where one bay connects several parallel cables. By setting
the parameter IMult to the number of parallel lines (cables) the actual current on one
line is used in the protection algorithm. To activate this option the input MULTPU
must be activated.
The protection has a reset input: RESET. By activating this input the calculated
temperature is reset to its default initial value. This is useful during testing when
secondary injected current has given a calculated “false” temperature level.
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Current protection
actual temperature
Calculation
of actual
temperature
TRIP
Actual Temp
> TripTemp
Lock-
LOCKOUT
out
logic
Actual Temp
< Recl Temp
Calculation TTRIP
of time to
trip
Calculation
of time to TENRECL
reset of
lockout
ANSI09000637-2-en.vsd
ANSI09000637 V2 EN
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Current protection
ANSI04000396-2-en.vsd
ANSI04000396 V2 EN
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Section 6 1MRK511250-UUS B
Current protection
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1MRK511250-UUS B Section 6
Current protection
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1MRK511250-UUS B Section 7
Voltage protection
3U<
SYMBOL-R-2U-GREATER-THAN
V2 EN
7.1.1 Introduction
Undervoltages can occur in the power system during faults or abnormal conditions.
Two step undervoltage protection (UV2PTUV, 27) function can be used to open circuit
breakers to prepare for system restoration at power outages or as long-time delayed back-
up to primary protection.
UV2PTUV (27) has two voltage steps, each with inverse or definite time delay.
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Voltage protection
To avoid oscillations of the output PICKUP signal, a hysteresis has been included.
The time delay for the two steps can be either definite time delay (DT) or inverse time
undervoltage (TUV). For the inverse time delay three different modes are available:
• inverse curve A
• inverse curve B
• customer programmable inverse curve
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Voltage protection
TD
t=
Vpickup < -V
Vpickup <
ANSIEQUATION1431 V1 EN (Equation 26)
where:
Vpickup Set value for step 1 and step 2
<
V Measured voltage
TD × 480
t= 2.0
+ 0.055
æ Vpickup < -V ö
ç 32 × - 0.5 ÷
è Vpickup < ø
EQUATION1608 V1 EN (Equation 27)
é ù
ê ú
TD × A
t=ê ú+D
ê æ Vpickup < -V ö ú
P
êç B × -C÷ ú
ëè Vpickup ø û
EQUATION1609 V1 EN (Equation 28)
When the denominator in the expression is equal to zero the time delay will be infinity.
There will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set
to compensate for this phenomenon. In the voltage interval Vpickup< down to
Vpickup< · (1.0 – CrvSatn/100) the used voltage will be: Vpickup< · (1.0 – CrvSatn/
100). If the programmable curve is used this parameter must be calculated so that:
CrvSatn
B× -C > 0
100
EQUATION1435 V1 EN (Equation 29)
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Voltage protection
The lowest voltage is always used for the inverse time delay integration. The details of
the different inverse time characteristics are shown in section 19.3 "Inverse
characteristics".
Figure 79: Voltage used for the inverse time characteristic integration
Voltage
VL1
VL2
VL3
IDMT Voltage
Time
ANSI12000186-1-en.vsd
Trip signal issuing requires that the undervoltage condition continues for at least the
user set time delay. This time delay is set by the parameter t1 and t2 for definite time
mode (DT) and by some special voltage level dependent time curves for the inverse
time mode (TUV). If the pickup condition, with respect to the measured voltage ceases
during the delay time, and is not fulfilled again within a user defined reset time
(tReset1 and tReset2 for the definite time and tIReset1 and tIReset2pickup for the
inverse time) the corresponding pickup output is reset. Here it should be noted that
after leaving the hysteresis area, the pickup condition must be fulfilled again and it is
not sufficient for the signal to only return back to the hysteresis area. Note that for the
undervoltage function the TUV reset time is constant and does not depend on the
voltage fluctuations during the drop-off period. However, there are three ways to reset
the timer, either the timer is reset instantaneously, or the timer value is frozen during
the reset time, or the timer value is linearly decreased during the reset time. See
figure 80 and figure 81.
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Voltage protection
tIReset1
tIReset1
Voltage Measured
PICKUP Voltage
HystAbs1
TRIP
PICKUP1
Time
PICKUP t
TRIP
Time
Integrator Frozen Timer
Time
Linearly
Instantaneous
decreased ANSI05000010-3-en.vsd
ANSI05000010 V3 EN
Figure 80: Voltage profile not causing a reset of the pickup signal for step 1, and inverse time delay at different
reset types
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Section 7 1MRK511250-UUS B
Voltage protection
Voltage tIReset1
tIReset1
PICKUP
PICKUP
HystAbs1 Measured Voltage
TRIP
PICKUP 1
Time
PICKUP t
TRIP
Time
Integrator Frozen Timer
Time
Linearly
Instantaneous
decreased ANSI05000011-2-en.vsd
ANSI05000011 V2 EN
Figure 81: Voltage profile causing a reset of the pickup signal for step 1, and inverse time delay at different
reset types
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Voltage protection
When definite time delay is selected the function will operate as shown in figure 82.
Detailed information about individual stage reset/operation behavior is shown in figure
83 and figure 84 respectively. Note that by setting tResetn = 0.0s, instantaneous reset
of the definite time delayed stage is ensured.
PU_ST1
V
a
a<b 0 t1 TRST1
Pickup1
b R tReset1 0
AND
ANSI09000785-3-en.vsd
ANSI09000785 V3 EN
Pickup1
PU_ST1
TRST1
tReset1
t1
ANSI10000039-3-en.vsd
ANSI10000039 V3 EN
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Section 7 1MRK511250-UUS B
Voltage protection
Pickup1
PU_ST1
TRST1
tReset1
t1
ANSI10000040-3-en.vsd
ANSI10000040 V3 EN
7.1.2.3 Blocking
If the measured voltage level decreases below the setting of IntBlkStVal1, either the
trip output of step 1, or both the trip and the PICKUP outputs of step 1, are blocked.
The characteristic of the blocking is set by the IntBlkSel1 parameter. This internal
blocking can also be set to Disabled resulting in no voltage based blocking.
Corresponding settings and functionality are valid also for step 2.
In case of disconnection of the high voltage component the measured voltage will get
very low. The event will PICKUP both the under voltage function and the blocking
function, as seen in figure 85. The delay of the blocking function must be set less than
the time delay of under voltage function.
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Voltage protection
V Disconnection
Normal voltage
Pickup1
Pickup2
tBlkUV1 <
t1,t1Min
IntBlkStVal1
tBlkUV2 <
t2,t2Min
IntBlkStVal2
Time
Block step 1
Block step 2
en05000466_ansi.vsd
ANSI05000466 V1 EN
7.1.2.4 Design
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Section 7 1MRK511250-UUS B
Voltage protection
Step 1 TR1L2
Time integrator
tIReset1 TRIP
MinVoltSelector
ResetTypeCrv1 TR1L3
TR1
OR
Comparator ST2L1
VL1 < V2< Voltage Phase Phase 1
Selector
ST2L2
Comparator OpMode2 Phase 2
VL2 < V2< 1 out of 3 Pickup
2 out of 3 t2 ST2L3
3 out of 3 Phase 3 t2Reset
Comparator IntBlkStVal2 &
VL3 < V2< Trip ST2
Output OR
Logic
PICKUP TR2L1
Step 2
TR2L2
Time integrator
tIReset2 TRIP
MinVoltSelector
ResetTypeCrv2 TR2L3
TR2
OR
PICKUP
OR
TRIP
OR
ANSI05000012-2-en.vsd
ANSI05000012 V2 EN
Figure 86: Schematic design of Two step undervoltage protection UV2PTUV (27)
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Voltage protection
ANSI06000276-2-en.vsd
ANSI06000276 V2 EN
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Section 7 1MRK511250-UUS B
Voltage protection
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1MRK511250-UUS B Section 7
Voltage protection
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Section 7 1MRK511250-UUS B
Voltage protection
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1MRK511250-UUS B Section 7
Voltage protection
3U>
SYMBOL-C-2U-SMALLER-THAN
V2 EN
7.2.1 Introduction
Overvoltages may occur in the power system during abnormal conditions such as
sudden power loss, tap changer regulating failures, open line ends on long lines etc.
Two step overvoltage protection (OV2PTOV, 59) function can be used to detect open
line ends, normally then combined with a directional reactive over-power function to
supervise the system voltage. When triggered, the function will cause an alarm, switch
in reactors, or switch out capacitor banks.
OV2PTOV (59) has two voltage steps, each of them with inverse or definite time delayed.
OV2PTOV (59) has an extremely high reset ratio to allow settings close to system
service voltage.
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Section 7 1MRK511250-UUS B
Voltage protection
phase voltages increase above the set value, a corresponding PICKUP signal is issued.
OV2PTOV (59) can be set to PICKUP/TRIP, based on 1 out of 3, 2 out of 3 or 3 out of
3 of the measured voltages, being above the set point. If the voltage remains above the
set value for a time period corresponding to the chosen time delay, the corresponding
trip signal is issued.
The time delay characteristic is individually chosen for the two steps and can be either,
definite time delay or inverse time delay.
The voltage related settings are made in percent of the global set base voltage VBase,
which is set in kV, phase-to-phase.
The setting of the analog inputs are given as primary phase-to-ground or phase-to-
phase voltage. OV2PTOV (59) will operate if the voltage gets higher than the set
percentage of the set base voltage VBase. This means operation for phase-to-ground
voltage over:
All the three voltages are measured continuously, and compared with the set values,
Pickup1 and Pickup2. The parameters OpMode1 and OpMode2 influence the
requirements to activate the PICKUP outputs. Either 1 out of 3, 2 out of 3 or 3 out of 3
measured voltages have to be higher than the corresponding set point to issue the
corresponding PICKUP signal.
To avoid oscillations of the output PICKUP signal, a hysteresis has been included.
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1MRK511250-UUS B Section 7
Voltage protection
The time delay for the two steps can be either definite time delay (DT) or inverse time
delay (TOV). For the inverse time delay four different modes are available:
• inverse curve A
• inverse curve B
• inverse curve C
• customer programmable inverse curve
TD
t=
V − Vpickup >
Vpickup >
EQUATION1625 V2 EN (Equation 32)
TD ⋅ 480
t= − 0.035
V − Vpickup >
32 ⋅ − 0.5
Vpickup >
ANSIEQUATION2287 V2 EN (Equation 33)
TD ⋅ 480
t= + 0.035
V − Vpickup >
32 ⋅ − 0.5
Vpickup >
ANSIEQUATION2288 V2 EN (Equation 34)
TD × A
t= P
+D
æ V - Vpickup ö
çB× -C÷
è Vpickup ø
EQUATION1616 V1 EN (Equation 35)
When the denominator in the expression is equal to zero the time delay will be infinity.
There will be an undesired discontinuity. Therefore, a tuning parameter CrvSatn is set
to compensate for this phenomenon. In the voltage interval Vpickup down to Vpickup
· (1.0 – CrvSatn/100) the used voltage will be: Vpickup · (1.0 – CrvSatn/100). If the
programmable curve is used this parameter must be calculated so that:
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Section 7 1MRK511250-UUS B
Voltage protection
CrvSatn
B× -C > 0
100
EQUATION1435 V1 EN (Equation 36)
The highest phase (or phase-to-phase) voltage is always used for the inverse time delay
integration, see figure 88. The details of the different inverse time characteristics are
shown in section "Inverse characteristics"
Voltage
IDMT Voltage
VA
VB
VC
Time
ANSI05000016-2-en.vsd
ANSI05000016 V2 EN
Figure 88: Voltage used for the inverse time characteristic integration
Trip signal issuing requires that the overvoltage condition continues for at least the
user set time delay. This time delay is set by the parameter t1 and t2 for definite time
mode (DT) and by selected voltage level dependent time curves for the inverse time
mode (TOV). If the PICKUP condition, with respect to the measured voltage ceases
during the delay time, and is not fulfilled again within a user defined reset time
(tReset1 and tReset2 for the definite time and tIReset1 and tIReset2 for the inverse
time) the corresponding PICKUP output is reset, after that the defined reset time has
elapsed. Here it should be noted that after leaving the hysteresis area, the PICKUP
condition must be fulfilled again and it is not sufficient for the signal to only return
back to the hysteresis area. The hysteresis value for each step is settable (HystAbs2) to
allow an high and accurate reset of the function. It should be noted that for Two step
overvoltage protection OV2PTOV (59) the TOV reset time is constant and does not
depend on the voltage fluctuations during the drop-off period. However, there are three
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1MRK511250-UUS B Section 7
Voltage protection
ways to reset the timer, either the timer is reset instantaneously, or the timer value is
frozen during the reset time, or the timer value is linearly decreased during the reset time..
tIReset1
tIReset1
Voltage
PICKUP
TRIP
PU_Overvolt1
HystAbs1
Measured
Voltage
Time
PICKUP t
TRIP
Time
Linearly
Integrator
decreased
Frozen Timer
t
Time
Instantaneous
ANSI05000019-3-en.vsd
ANSI05000019 V3 EN
Figure 89: Voltage profile not causing a reset of the PICKUP signal for step 1, and inverse time delay
209
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Section 7 1MRK511250-UUS B
Voltage protection
tIReset1
Voltage tIReset1
PICKUP TRIP
PICKUP
HystAbs1
Pickup1
Measured Voltage
Time
PICKUP t
TRIP
Time
Integrator Frozen Timer
Time
ANSI05000020 V2 EN
Figure 90: Voltage profile causing a reset of the PICKUP signal for step 1, and inverse time delay
When definite time delay is selected the function will operate as shown in figure 91.
Detailed information about individual stage reset/operation behavior is shown in figure
83 and figure 84 receptively. Note that by setting tResetn = 0.0s instantaneous reset of
the definite time delayed stage is ensured
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1MRK511250-UUS B Section 7
Voltage protection
PU_ST1
V tReset1 t1
a
a>b t t
TRST1
Vpickup>
b AND
OFF ON
Delay Delay
ANSI10000100-2-en.vsd
ANSI10000100 V2 EN
Pickup1
PICKUP
TRIP
tReset1
t1
ANSI10000037-2-en.vsd
ANSI10000037 V2 EN
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Section 7 1MRK511250-UUS B
Voltage protection
Pickup1
PICKUP
TRIP
tReset1
t1
ANSI10000038-2-en.vsd
ANSI10000038 V2 EN
7.2.2.3 Blocking
7.2.2.4 Design
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1MRK511250-UUS B Section 7
Voltage protection
VA Comparator PU_ST1_A
VA > Phase A
Pickup 1 Voltage Phase
Selector PU_ST1_B
VB Comparator
OpMode1 Phase B
VB >
Pickup 1 1 out of 3 Pickup
2 out of 3 t1 PU_ ST1_C
3 out of 3 Phase C
VC Comparator t1Reset
VC > &
Pickup 1 Phase C Trip PU_ST1
OR
Output
Logic
PICKUP TRST1-A
Step1
TRST1_B
Time integrator TRIP
MaxVoltSelect
tIReset1
ResetTypeCrv1 TRST1_C
TRST1
OR
Comparator
VA > PU_ST2_A
Pickup 2 Voltage Phase Phase A
Selector
PU_ST2_B
Comparator OpMode2 Phase B
VB >
Pickup 2 1 out of 3
2 out of 3 PU_ST2_C
3 out of 3 Pickup
Phase C
Comparator t2
VC > t2Reset
Pickup 2 & PU_ST2
OR
Trip
Output
PICKUP Logic TRST2-A
Step 2 TRST2-B
Time integrator TRIP
MaxVoltSelect tIReset2
ResetTypeCrv2 TRST2-C
TRST2
OR
OR PICKUP
TRIP
OR
ANSI05000013-2-en.vsd
_ .
ANSI05000013 V2 EN
Figure 94: Schematic design of Two step overvoltage protection OV2PTOV (59)
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Section 7 1MRK511250-UUS B
Voltage protection
ANSI06000277-2-en.vsd
ANSI06000277 V2 EN
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Voltage protection
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Section 7 1MRK511250-UUS B
Voltage protection
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1MRK511250-UUS B Section 7
Voltage protection
217
Technical reference manual
218
1MRK511250-UUS B Section 8
Frequency protection
f<
SYMBOL-P V1 EN
8.1.1 Introduction
Underfrequency occurs as a result of a lack of generation in the network.
Underfrequency protection SAPTUF (81) is used for load shedding systems, remedial
action schemes, gas turbine startup and so on.
The operation is based on positive sequence voltage measurement and requires two phase-
phase or three phase-neutral voltages to be connected. For information about how to
connect analog inputs, refer to Application manual/IED application/Analog inputs/
Setting guidelines
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Section 8 1MRK511250-UUS B
Frequency protection
voltage is lower. If the frequency remains below the set value for a time period
corresponding to the chosen time delay, the corresponding trip signal is issued. To
avoid an unwanted trip due to uncertain frequency measurement at low voltage
magnitude, a voltage controlled blocking of the function is available, that is, if the
voltage is lower than the set blocking voltage IntBlockLevel the function is blocked and
no PICKUP or TRIP signal is issued.
To avoid oscillations of the output PICKUP signal, a hysteresis has been included.
The time delay for underfrequency protection SAPTUF (81) can be either a settable
definite time delay or a voltage magnitude dependent time delay, where the time delay
depends on the voltage level; a high voltage level gives a longer time delay and a low
voltage level causes a short time delay. For the definite time delay, the setting
TimeDlyOperate sets the time delay.
For the voltage dependent time delay the measured voltage level and the settings VNom,
VMin, Exponent, t_MaxTripDelay and t_MinTripDelay set the time delay according to
figure 96 and equation 37. The setting TimerOperation is used to decide what type of
time delay to apply.
Trip signal issuing requires that the underfrequency condition continues for at least the
user set time delay TimeDlyOperate. If the PICKUP condition, with respect to the
measured frequency ceases during this user set delay time, and is not fulfilled again
within a user defined reset time, TimeDlyReset, the PICKUP output is reset, after that
the defined reset time has elapsed. Here it should be noted that after leaving the
hysteresis area, the PICKUP condition must be fulfilled again and it is not sufficient
for the signal to only return back to the hysteresis area.
On the output of SAPTUF (81) a 100ms pulse is issued, after a time delay
corresponding to the setting of TimeDlyRestore, when the measured frequency returns
to the level corresponding to the setting RestoreFreq.
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1MRK511250-UUS B Section 8
Frequency protection
Since the fundamental frequency in a power system is the same all over the system,
except some deviations during power oscillations, another criterion is needed to decide,
where to take actions, based on low frequency. In many applications the voltage level
is very suitable, and in most cases is load shedding preferable in areas with low
voltage. Therefore, a voltage dependent time delay has been introduced, to make sure
that load shedding, or other actions, take place at the right location. At constant
voltage, V, the voltage dependent time delay is calculated according to equation 37. At
non-constant voltage, the actual time delay is integrated in a similar way as for the
inverse time characteristic for the undervoltage and overvoltage functions.
Exponent
é V - VMin ù
t=ê × ( t _ MaxTripDelay - t _ MinTripDelay ) + t _ MinTripDelay
ëVNom - VMin úû
EQUATION1559 V1 EN (Equation 37)
where:
t is the voltage dependent time delay (at constant voltage),
V is the measured voltage
Exponent is a setting,
VMin, VNom are voltage settings corresponding to
t_MaxTripDelay, t_MinTripDelay are time settings.
VMin = 90%
= 100%
t_MaxTrip = 1.0 s
Delay
t_MinTripD = 0.0 s
elay
Exponent = 0, 1, 2, 3 and 4
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Section 8 1MRK511250-UUS B
Frequency protection
1
0
1
Exponenent
TimeDlyOperate [s]
2
3
0.5 4
0
90 95 100
V [% of VBase]
en05000075_ansi.vsd
ANSI05000075 V1 EN
8.1.2.4 Blocking
If the measured voltage level decreases below the setting of IntBlockLevel, both the
PICKUP and the TRIP outputs, are blocked.
8.1.2.5 Design
The frequency measuring element continuously measures the frequency of the positive
sequence voltage and compares it to the setting PUFrequency. The frequency signal is
filtered to avoid transients due to switchings and faults. The time integrator can operate
either due to a definite delay time or to the special voltage dependent delay time. When
the frequency has returned back to the setting of RestoreFreq, the RESTORE output is
issued after the time delay TimeDlyRestore. The design of underfrequency protection
SAPTUF (81) is schematically described in figure 97.
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1MRK511250-UUS B Section 8
Frequency protection
Block
BLOCK BLKDMAGN
OR
Comparator
V < IntBlockLevel
TimeDlyReset TRIP
100 ms
Comparator RESTORE
TimeDlyRestore
f > RestoreFreq
en05000726_ansi.vsd
ANSI05000726 V1 EN
ANSI06000279-2-en.vsd
ANSI06000279 V2 EN
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Section 8 1MRK511250-UUS B
Frequency protection
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1MRK511250-UUS B Section 8
Frequency protection
VMin=(50-150)% of Vbase
Exponent=0.0-5.0
t_MaxTripDelay=(0.000-60.000
)s
t_MinTripDelay=(0.000-60.000)
s
Exponent
é V - VMin ù
ëVNom - VMin úû
t=ê
f>
SYMBOL-O V1 EN
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Section 8 1MRK511250-UUS B
Frequency protection
8.2.1 Introduction
Overfrequency protection function SAPTOF (81) is applicable in all situations, where
reliable detection of high fundamental power system frequency is needed.
Overfrequency occurs because of sudden load drops or shunt faults in the power
network. Close to the generating plant, generator governor problems can also cause
over frequency.
SAPTOF (81) is used mainly for generation shedding and remedial action schemes. It
is also used as a frequency stage initiating load restoring.
The operation is based on positive sequence voltage measurement and requires two phase-
phase or three phase-neutral voltages to be connected. For information about how to
connect analog inputs, refer to Application manual/IED application/Analog inputs/
Setting guidelines
The time delay for Overfrequency protection SAPTOF (81) is a settable definite time
delay, specified by the setting TimeDlyOperate.
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Frequency protection
TRIP signal issuing requires that the overfrequency condition continues for at least the
user set time delay, TimeDlyReset. If the PICKUP condition, with respect to the
measured frequency ceases during this user set delay time, and is not fulfilled again
within a user defined reset time, TimeDlyReset, the PICKUP output is reset, after that
the defined reset time has elapsed. It is to be noted that after leaving the hysteresis area,
the PICKUP condition must be fulfilled again and it is not sufficient for the signal to
only return back to the hysteresis area.
8.2.2.3 Blocking
If the measured voltage level decreases below the setting of IntBlockLevel, both the
PICKUP and the TRIP outputs, are blocked.
8.2.2.4 Design
The frequency measuring element continuously measures the frequency of the positive
sequence voltage and compares it to the setting PUFrequency. The frequency signal is
filtered to avoid transients due to switchings and faults in the power system. The time
integrator operates due to a definite delay time. The design of overfrequency protection
SAPTOF (81) is schematically described in figure 99.
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Frequency protection
BLOCK
BLKTRIP BLOCK
OR BLKDMAGN
Comparator
V < IntBlockLevel
Pickup
&
Trip
Voltage Time integrator Output
Logic
Definite Time Delay PICKUP PICKUP
Frequency Comparator
f > PuFrequency TimeDlyOperate
TRIP
TimeDlyReset
TRIP
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Frequency protection
df/dt >
<
SYMBOL-N V1 EN
8.3.1 Introduction
Rate-of-change frequency protection function (SAPFRC,81) gives an early indication
of a main disturbance in the system. SAPFRC (81) can be used for generation
shedding, load shedding and remedial action schemes. SAPFRC (81) can discriminate
between positive or negative change of frequency.
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issued on the RESTORE output, when the frequency recovers to a value higher than
the setting RestoreFreq. A positive setting of PUFreqGrad, sets SAPFRC (81) to
PICKUP and TRIP for frequency increases.
To avoid oscillations of the output PICKUP signal, a hysteresis has been included.
Rate-of-change frequency protection SAPFRC (81) has a settable definite time delay,
tTrip. .
Trip signal issuing requires that the rate-of-change of frequency condition continues
for at least the user set time delay, tTrip. If the PICKUP condition, with respect to the
measured frequency ceases during the delay time, and is not fulfilled again within a
user defined reset time, tReset, the PICKUP output is reset, after that the defined reset
time has elapsed. Here it should be noted that after leaving the hysteresis area, the
PICKUP condition must be fulfilled again and it is not sufficient for the signal to only
return back into the hysteresis area.
The RESTORE output of SAPFRC (81) is set, after a time delay equal to the setting of
tRestore, when the measured frequency has returned to the level corresponding to
RestoreFreq, after an issue of the TRIP output signal. If tRestore is set to 0.000 s the
restore functionality is disabled, and no output will be given. The restore functionality
is only active for lowering frequency conditions and the restore sequence is disabled if
a new negative frequency gradient is detected during the restore period, defined by the
settings RestoreFreq and tRestore.
8.3.2.3 Blocking
If the measured voltage level decreases below the setting of IntBlockLevel, both the
PICKUP and the TRIP outputs, are blocked.
8.3.2.4 Design
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PUFreqGrad. The frequency signal is filtered to avoid transients due to power system
switchings and faults. The time integrator operates with a definite delay time. When
the frequency has returned back to the setting of RestoreFreq, the RESTORE output is
issued after the time delay tRestore, if the TRIP signal has earlier been issued. The sign
of the setting PUFreqGrad is essential, and controls if the function is used for raising
or lowering frequency conditions. The design of SAPFRC (81) is schematically
described in figure 101.
BLOCK
BLKTRIP
BLKRESET BLOCK
OR
Pickup
Rate-of-Change Time integrator &
Comparator
of Frequency Trip
If
Definite Time Delay Output
[PickupFreqGrad<0 PICKUP Logic PICKUP
AND
TimeDlyOperate
df/dt < PickupFreqGrad]
OR
TimeDlyReset
[PickupFreqGrad>0
AND
TRIP
df/dt > PickupFreqGrad]
Then
PICKUP
100 ms
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Multipurpose protection
9.1.1 Introduction
General current and voltage protection (CVGAPC) function is always connected to three-
phase current and three-phase voltage input in the configuration tool, but it will always
measure only one current and one voltage quantity selected by the end user in the
setting tool.
The user can select to measure one of the current quantities shown in table 115.
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11 PhaseB-PhaseC CVGAPC function will measure the current phasor internally calculated as
the vector difference between the phase B current phasor and phase C
current phasor (IB-IC)
12 PhaseC-PhaseA CVGAPC function will measure the current phasor internally calculated as
the vector difference between the phase C current phasor and phase L1
current phasor ( IC-IA)
13 MaxPh-Ph CVGAPC function will measure ph-ph current phasor with the maximum
magnitude
14 MinPh-Ph CVGAPC function will measure ph-ph current phasor with the minimum
magnitude
15 UnbalancePh-Ph CVGAPC function will measure magnitude of unbalance current, which is
internally calculated as the algebraic magnitude difference between the ph-
ph current phasor with maximum magnitude and ph-ph current phasor with
minimum magnitude. Phase angle will be set to 0° all the time
The user can select to measure one of the voltage quantities shown in table 116:
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11 PhaseB-PhaseC CVGAPC function will measure the voltage phasor internally calculated as
the vector difference between the phase B voltage phasor and phase C
voltage phasor (VB-VC)
12 PhaseC-PhaseA CVGAPC function will measure the voltage phasor internally calculated as
the vector difference between the phase C voltage phasor and phase A
voltage phasor ( VC-VA)
13 MaxPh-Ph CVGAPC function will measure ph-ph voltage phasor with the maximum
magnitude
14 MinPh-Ph CVGAPC function will measure ph-ph voltage phasor with the minimum
magnitude
15 UnbalancePh-Ph CVGAPC function will measure magnitude of unbalance voltage, which is
internally calculated as the algebraic magnitude difference between the ph-
ph voltage phasor with maximum magnitude and ph-ph voltage phasor with
minimum magnitude. Phase angle will be set to 0° all the time
It is important to notice that the voltage selection from table 116 is always applicable
regardless the actual external VT connections. The three-phase VT inputs can be
connected to IED as either three phase-to-ground voltages VA, VB & VC or three phase-
to-phase voltages VAB, VBC & VCA). This information about actual VT connection is
entered as a setting parameter for the pre-processing block, which will then take
automatic care about it.
The user can select one of the current quantities shown in table 117 for built-in current
restraint feature:
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Multipurpose protection
The parameter settings for the base quantities, which represent the base (100%) for
pickup levels of all measuring stages, shall be entered as setting parameters for every
CVGAPC function.
1. rated phase current of the protected object in primary amperes, when the measured
Current Quantity is selected from 1 to 9, as shown in table 115.
2. rated phase current of the protected object in primary amperes multiplied by √3
(1.732 · Iphase), when the measured Current Quantity is selected from 10 to 15, as
shown in table 115.
1. rated phase-to-ground voltage of the protected object in primary kV, when the
measured Voltage Quantity is selected from 1 to 9, as shown in table 116.
2. rated phase-to-phase voltage of the protected object in primary kV, when the
measured Voltage Quantity is selected from 10 to 15, as shown in table 116.
Two overcurrent protection steps are available. They are absolutely identical and
therefore only one will be explained here.
Overcurrent step simply compares the magnitude of the measured current quantity (see
table 115) with the set pickup level. Non-directional overcurrent step will pickup if the
magnitude of the measured current quantity is bigger than this set level. Reset ratio is
settable, with default value of 0.96. However depending on other enabled built-in
features this overcurrent pickup might not cause the overcurrent step pickup signal.
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Pickup signal will only come if all of the enabled built-in features in the overcurrent
step are fulfilled at the same time.
This feature will simple prevent overcurrent step pickup if the second-to-first harmonic
ratio in the measured current exceeds the set level.
Directional feature
The overcurrent protection step operation can be can be made dependent on the
relevant phase angle between measured current phasor (see table 115) and measured
voltage phasor (see table 116). In protection terminology it means that the General
currrent and voltage protection (CVGAPC) function can be made directional by
enabling this built-in feature. In that case overcurrent protection step will only operate
if the current flow is in accordance with the set direction (Forward, which means
towards the protected object, or Reverse, which means from the protected object). For
this feature it is of the outmost importance to understand that the measured voltage
phasor (see table 116) and measured current phasor (see table 115) will be used for
directional decision. Therefore it is the sole responsibility of the end user to select the
appropriate current and voltage signals in order to get a proper directional decision.
CVGAPC function will NOT do this automatically. It will just simply use the current
and voltage phasors selected by the end user to check for the directional criteria.
Table 118 gives an overview of the typical choices (but not the only possible ones) for
these two quantities for traditional directional relays.
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Multipurpose protection
Table 118: Typical current and voltage choices for directional feature
Set value for the Set value for the
parameter parameter Comment
CurrentInput VoltageInput
PosSeq PosSeq Directional positive sequence overcurrent function is
obtained. Typical setting for RCADir is from -45° to -90°
depending on the power
NegSeq -NegSeq Directional negative sequence overcurrent function is
obtained. Typical setting for RCADir is from -45° to -90°
depending on the power system voltage level (X/R ratio)
3ZeroSeq -3ZeroSeq Directional zero sequence overcurrent function is
obtained. Typical setting for RCADir is from 0° to -90°
depending on the power system grounding (that is, solidly
grounding, grounding via resistor)
Phase1 Phase2-Phase3 Directional overcurrent function for the first phase is
obtained. Typical setting for RCADir is +30° or +45°
Phase2 Phase3-Phase1 Directional overcurrent function for the second phase is
obtained. Typical setting for RCADir is +30° or +45°
Phase3 Phase1-Phase2 Directional overcurrent function for the third phase is
obtained. Typical setting for RCADir is +30° or +45°
Unbalance current or voltage measurement shall not be used when the directional
feature is enabled.
Two types of directional measurement principles are available, I & V and IcosPhi&V.
The first principle, referred to as "I & V" in the parameter setting tool, checks that:
• the magnitude of the measured current is bigger than the set pick-up level
• the phasor of the measured current is within the operating region (defined by the
relay operate angle, ROADir parameter setting; see figure 103).
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V=-3V0
RCADir
Operate region
mta line
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where:
RCADir is -75°
ROADir is 50°
The second principle, referred to as "IcosPhi&V" in the parameter setting tool, checks
that:
• that the product I·cos(Φ) is bigger than the set pick-up level, where Φ is angle
between the current phasor and the mta line
• that the phasor of the measured current is within the operating region (defined by
the I·cos(Φ) straight line and the relay operate angle, ROADir parameter setting;
see figure 103).
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Multipurpose protection
V=-3V0
RCADir
Operate region
mta line
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ANSI05000253 V1 EN
where:
RCADir is -75°
ROADir is 50°
Note that it is possible to decide by a parameter setting how the directional feature
shall behave when the magnitude of the measured voltage phasor falls below the pre-
set value. User can select one of the following three options:
It shall also be noted that the memory duration is limited in the algorithm to 100 ms.
After that time the current direction will be locked to the one determined during
memory time and it will re-set only if the current fails below set pickup level or voltage
goes above set voltage memory limit.
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PickupCurr_OC1
VDepFact_OC1 * PickupCurr_OC1
VLowLimit_OC1 VHighLimit_OC1
Selected Voltage
Magnitude
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Figure 105: Example for OC1 step current pickup level variation as function of
measured voltage magnitude in Slope mode of operation
PickupCurr_OC1
VDepFact_OC1 *
PickupCurr_OC1
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Figure 106: Example for OC1 step current pickup level variation as function of
measured voltage magnitude in Step mode of operation
This feature will simply change the set overcurrent pickup level in accordance with
magnitude variations of the measured voltage. It shall be noted that this feature will as
well affect the pickup current value for calculation of operate times for IDMT curves
(overcurrent with IDMT curve will operate faster during low voltage conditions).
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Multipurpose protection
IMeasured
ea ain
ar tr
te es
ra ff *I r
pe oe
O trC
es
I>R
IsetHigh
IsetLow
atan(RestrCoeff)
Restraint
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This feature will simply prevent overcurrent step to pickup if the magnitude of the
measured current quantity is smaller than the set percentage of the restrain current
magnitude. However this feature will not affect the pickup current value for calculation
of operate times for IDMT curves. This means that the IDMT curve operate time will
not be influenced by the restrain current magnitude.
When set, the pickup signal will start definite time delay or inverse (IDMT) time delay
in accordance with the end user setting. If the pickup signal has value one for longer
time than the set time delay, the overcurrent step will set its trip signal to one. Reset of
the pickup and trip signal can be instantaneous or time delay in accordance with the
end user setting.
Two undercurrent protection steps are available. They are absolutely identical and
therefore only one will be explained here. Undercurrent step simply compares the
magnitude of the measured current quantity (see table 115) with the set pickup level.
The undercurrent step will pickup and set its pickup signal to one if the magnitude of
the measured current quantity is smaller than this set level. The pickup signal will start
definite time delay with set time delay. If the pickup signal has value one for longer
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Multipurpose protection
time than the set time delay the undercurrent step will set its trip signal to one. Reset of
the pickup and trip signal can be instantaneous or time delay in accordance with the
setting.
Two overvoltage protection steps are available. They are absolutely identical and
therefore only one will be explained here.
Overvoltage step simply compares the magnitude of the measured voltage quantity (see
table 116) with the set pickup level. The overvoltage step will pickup if the magnitude
of the measured voltage quantity is bigger than this set level. Reset ratio is settable,
with default value of 0.99.
The pickup signal will start definite time delay or inverse (IDMT) time delay in
accordance with the end user setting. If the pickup signal has value one for longer time
than the set time delay, the overvoltage step will set its trip signal to one. Reset of the
pickup and trip signal can be instantaneous or time delay in accordance with the end
user setting.
Two undervoltage protection steps are available. They are absolutely identical and
therefore only one will be explained here.
Undervoltage step simply compares the magnitude of the measured voltage quantity
(see table 116) with the set pickup level. The undervoltage step will pickup if the
magnitude of the measured voltage quantity is smaller than this set level. Reset ratio is
settable, with default value of 1.01.
The pickup signal will start definite time delay or inverse (IDMT) time delay in
accordance with the end user setting. If the pickup signal has value one for longer time
than the set time delay, the undervoltage step will set its trip signal to one. Reset of the
pickup and trip signal can be instantaneous or time delay in accordance with the end
user setting.
The simplified internal logics, for CVGAPC function are shown in the following figures.
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Multipurpose protection
IED
ADM CVGAPC function
Phasor calculation of
scaling with CT ratio
individual currents
52
A/D conversion
Selection of which current Selected current
and voltage shall be given to
Phasors &
samples
the built-in protection Selected voltage
elements
Phasors &
samples
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Figure 108: Treatment of measured currents within IED for CVGAPC function
Figure 108 shows how internal treatment of measured currents is done for
multipurpose protection function
The following currents and voltages are inputs to the multipurpose protection function.
They must all be expressed in true power system (primary) Amperes and kilovolts.
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1. Selects one current from the three-phase input system (see table 115) for internally
measured current.
2. Selects one voltage from the three-phase input system (see table 116) for internally
measured voltage.
3. Selects one current from the three-phase input system (see table 117) for internally
measured restraint current.
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Multipurpose protection
CURRENT
UC1
nd TRUC1
2 Harmonic
Selected current restraint
PU_UC2
UC2
nd TRUC2
2 Harmonic
restraint
PU_OC1
OC1 TROC1
PU_OC2
OC2 TROC2
2nd Harmonic
restraint
Current restraint OR
VDIRLOW
Directionality DIROC2
Voltage control /
restraint
PU_OV1
OV1 TROV1
PU_OV2
OV2 TROV2
PU_UV1
Selected voltage
UV1 TRUV1
PU_UV2
UV2 TRUV2
VOLTAGE
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Figure 109: CVGAPC function main logic diagram for built-in protection elements
1. The selected currents and voltage are given to built-in protection elements. Each
protection element and step makes independent decision about status of its
PICKUP and TRIP output signals.
2. More detailed internal logic for every protection element is given in the following
four figures
3. Common PICKUP and TRIP signals from all built-in protection elements & steps
(internal OR logic) are available from multipurpose function as well.
Enable
second
harmonic Second
NOT
harmonic check DEF time BLKTROC1
selected 0-DEF TROC1
AND
0 OR
Selected current a
a>b
b
OC1=On PU_OC1
AND
PickupCurr_OC1 BLKOC1
X
Inverse
Selected voltage
Current
Restraint
Feature
Selected restrain current Imeasured > k Irestraint
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Figure 110: Simplified internal logic diagram for built-in first overcurrent step that is, OC1 (step OC2 has the
same internal logic)
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Multipurpose protection
Operation_UC1=On
PU_UC1
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Figure 111: Simplified internal logic diagram for built-in first undercurrent step that is, UC1 (step UC2 has the
same internal logic)
Inverse
Operation_OV1=On
Inverse time
BLKOV1 selected
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Figure 112: Simplified internal logic diagram for built-in first overvoltage step OV1 (step OV2 has the same
internal logic)
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Inverse
Operation_UV1=On
Inverse time
BLKUV1 selected
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Figure 113: Simplified internal logic diagram for built-in first undervoltage step UV1 (step UV2 has the same
internal logic)
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1MRK511250-UUS B Section 10
Secondary system supervision
10.1.1 Introduction
Open or short circuited current transformer cores can cause unwanted operation of
many protection functions such as differential, ground-fault current and negative-
sequence current functions.
Current circuit supervision (CCSRDIF, 87) compares the residual current from a three
phase set of current transformer cores with the neutral point current on a separate input
taken from another set of cores on the current transformer.
The FAIL output will be set to a logical one when the following criteria are fulfilled:
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Secondary system supervision
• The numerical value of the difference |ΣIphase| – |Iref| is higher than 80% of the
numerical value of the sum |ΣIphase| + |Iref|.
• The numerical value of the current |ΣIphase| – |Iref| is equal to or higher than the
set operate value IMinOp.
• No phase current has exceeded Pickup_Block during the last 10 ms.
• CCSRDIF (87) is enabled by setting Operation = Enabled.
The FAIL output remains activated 100 ms after the AND-gate resets when being
activated for more than 20 ms. If the FAIL lasts for more than 150 ms an ALARM will
be issued. In this case the FAIL and ALARM will remain activated 1 s after the AND-
gate resets. This prevents unwanted resetting of the blocking function when phase
current supervision element(s) operate, for example, during a fault.
I>Pickup_Block
BLOCK
IA IA I>IMinOp
IB IB +å
IC IC å -
+å +å
I ref I ref x
+ -
0,8
1,5 x Ir
AND OR FAIL
OR 10 ms
20 ms 100 ms
150 ms 1s ALARM
OPERATION
BLOCK
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Figure 115: Simplified logic diagram for Current circuit supervision CCSRDIF (87)
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Secondary system supervision
| åI phase | - | I ref |
Slope = 1
Operation
Slope = 0.8
area
I MinOp
| åI phase | + | I ref |
99000068.vsd
IEC99000068 V1 EN
Due to the formulas for the axis compared, |SIphase | - |I ref | and |S I
phase | + | I ref | respectively, the slope can not be above 2.
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Secondary system supervision
10.2.1 Introduction
The aim of the fuse failure supervision function (SDDRFUF) is to block voltage
measuring functions at failures in the secondary circuits between the voltage
transformer and the IED in order to avoid unwanted operations that otherwise might
occur.
The fuse failure supervision function basically has three different algorithms, negative
sequence and zero sequence based algorithms and an additional delta voltage and delta
current algorithm.
The negative sequence detection algorithm is recommended for IEDs used in isolated
or high-impedance grounded networks. It is based on the negative-sequence measuring
quantities, a high value of voltage without the presence of the negative-sequence
current 3I2.
The zero sequence detection algorithm is recommended for IEDs used in directly or
low impedance grounded networks. It is based on the zero sequence measuring
quantities, a high value of voltage 3V0 without the presence of the residual current 3I0.
For better adaptation to system requirements, an operation mode setting has been
introduced which makes it possible to select the operating conditions for negative
sequence and zero sequence based function. The selection of different operation modes
makes it possible to choose different interaction possibilities between the negative
sequence and zero sequence based algorithm.
A criterion based on delta current and delta voltage measurements can be added to the
fuse failure supervision function in order to detect a three phase fuse failure, which in
practice is more associated with voltage transformer switching during station operations.
The zero and negative sequence function continuously measures the currents and
voltages in all three phases and calculates, see figure 118:
The measured signals are compared with their respective set values 3V0PU and 3I0PU,
3V2PU and 3I2PU.
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The function enable the internal signal FuseFailDetZeroSeq if the measured zero-
sequence voltage is higher than the set value 3V0PU and the measured zero-sequence
current is below the set value 3I0PU.
The function enable the internal signal FuseFailDetNegSeq if the measured negative
sequence voltage is higher than the set value 3V2PU and the measured negative
sequence current is below the set value 3I2PU.
A drop out delay of 100 ms for the measured zero-sequence and negative sequence
current will prevent a false fuse failure detection at un-equal breaker opening at the two
line ends.
Sequence Detection
3I0PU CurrZeroSeq
IA
Zero 3I0
sequence
filter CurrNegSeq
a
IB a>b 100 ms
b 0
Negative 3I2
sequence
IC filter FuseFailDetZeroSeq
AND
a
a>b 100 ms
3I2PU b 0
FuseFailDetNegSeq
AND
3V0PU
VoltZeroSeq
VA
Zero
sequence
a 3V0
a>b
b
filter
VB VoltNegSeq
Negative
sequence a 3V2
a>b
VC filter b
3V2PU
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The calculated values 3V0, 3I0, 3I2 and 3V2 are available as service values on local
HMI and monitoring tool in PCM600.
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The input BLOCK signal is a general purpose blocking signal of the fuse failure
supervision function. It can be connected to a binary input of the IED in order to
receive a block command from external devices or can be software connected to other
internal functions of the IED itself in order to receive a block command from internal
functions. Through OR gate it can be connected to both binary inputs and internal
function outputs.
The input BLKSP is intended to be connected to the trip output at any of the protection
functions included in the IED. When activated for more than 20 ms, the operation of
the fuse failure is blocked during a fixed time of 100 ms. The aim is to increase the
security against unwanted operations during the opening of the breaker, which might
cause unbalance conditions for which the fuse failure might operate.
The output signal BLKZ will also be blocked if the internal dead line detection is
activated. The block signal has a 200 ms drop-out time delay.
The input signal MCBOP is supposed to be connected via a terminal binary input to the
N.C. auxiliary contact of the miniature circuit breaker protecting the VT secondary
circuit. The MCBOP signal sets the output signals BLKU and BLKZ in order to block
all the voltage related functions when the MCB is open independent of the setting of
OpModeSel selector. The additional drop-out timer of 150 ms prolongs the presence of
MCBOP signal to prevent the unwanted operation of voltage dependent function due to
non simultaneous closing of the main contacts of the miniature circuit breaker.
The input signal 89b is supposed to be connected via a terminal binary input to the
N.C. auxiliary contact of the line disconnector. The 89b signal sets the output signal
BLKU in order to block the voltage related functions when the line disconnector is
open. The impedance protection function is not affected by the position of the line
disconnector since there will be no line currents that can cause malfunction of the
distance protection. If DISCPOS=0 it signifies that the line is connected to the system
and when the DISCPOS=1 it signifies that the line is disconnected from the system and
the block signal BLKU is generated.
The output BLKU can be used for blocking the voltage related measuring functions
(undervoltage protection, synchro-check and so on) except for the impedance protection.
The function output BLKZ shall be used for blocking the impedance protection function.
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TEST ACTIVE
AND
BlocFuse = Yes
BLOCK intBlock
OR
BLKTRIP 20 ms 100 ms
AND t t
FusefailStarted
AND
Any UL < UsealIn<
FuseFailDetDUDI
AND 5s
OpDUDI = On
OR t
FuseFailDetZeroSeq
AND
AND
FuseFailDetNegSeq
AND
UNsINs OR
UZsIZs OR
UZsIZs OR UNsINs
OpMode
UZsIZs AND UNsINs
OptimZsNs
OR
CurrZeroSeq
a AND
CurrNegSeq a>b
b
AND
DeadLineDet1Ph 200 ms
AND BLKZ
t OR AND
150 ms
MCBOP t
AND BLKU
60 s
t OR OR
All UL > UsealIn<
AND
VoltZeroSeq 5s
VoltNegSeq OR t
AllCurrLow
CBCLOSED
DISCPOS IEC10000033-2-en.vsd
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Figure 119: Simplified logic diagram for main logic of Fuse failure function
A simplified diagram for the functionality is found in figure 120. The calculation of the
change is based on vector change which means that it detects both amplitude and phase
angle changes. The calculated delta quantities are compared with their respective set
values DI< and DU> and the algorithm, detects a fuse failure if a sufficient change in
voltage without a sufficient change in current is detected in each phase separately. The
following quantities are calculated in all three phases:
• The magnitude of the phase-ground voltage has been above UPh> for more than
1.5 cycle
• The magnitude of DU is higher than the corresponding setting DU>
• The magnitude of DI is below the setting DI>
• The magnitude of the phase current in the same phase is higher than the setting IPh>
• The circuit breaker is closed (CBCLOSED = True)
The first criterion means that detection of failure in one phase together with high
current for the same phase will set the output. The measured phase current is used to
reduce the risk of false fuse failure detection. If the current on the protected line is low,
a voltage drop in the system (not caused by fuse failure) is not by certain followed by
current change and a false fuse failure might occur
The second criterion requires that the delta condition shall be fulfilled in any phase at
the same time as circuit breaker is closed. Opening circuit breaker at one end and
energizing the line from other end onto a fault could lead to wrong start of the fuse
failure function at the end with the open breaker. If this is considering to be an
important disadvantage, connect the CBCLOSED input to FALSE. In this way only the
first criterion can activate the delta function.
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DUDI Detection
DUDI detection Phase 1
IL1 One cycle
delay
|DI|
a
a>b
DI< b
20 ms 1.5 cycle
a
a>b t t
UPh> b
UL1
a
a<b
b
IL1
a
a>b
IPh> b AND
OR AND
CBCLOSED AND OR
UL2
a
a<b
b
IL2
a
a>b
b AND
OR AND
AND OR
UL3
a
a<b
b
IL3
a
a>b
b AND
OR AND FuseFailDetDUDI
AND OR
OR
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A simplified diagram for the functionality is found in figure 121. A dead phase
condition is indicated if both the voltage and the current in one phase is below their
respective setting values VDLDPU and IDLDPU. If at least one phase is considered to
be dead the output DLD1PH and the internal signal DeadLineDet1Ph is activated. If all
three phases are considered to be dead the output DLD3PH is activated
IC
a
a<b
b
IDLDPU
DeadLineDet1Ph
VA
a AND
a<b
b OR DLD1PH
AND
VB
a AND
a<b
b
AND DLD3PH
VC AND
a AND
a<b
b
VDLDPU
intBlock
ANSI0000035-1-en.vsd
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Figure 121: Simplified logic diagram for Dead Line detection part
A simplified diagram for the functionality is found in figure 122. The fuse failure
supervision function (SDDRFUF) can be switched on or off by the setting parameter
Operation to Enabled or Disabled.
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• V0I0 OR V2I2; Both negative and zero sequence is activated and working in
parallel in an OR-condition
• V0I0 AND V2I2; Both negative and zero sequence is activated and working in
series (AND-condition for operation)
• OptimZsNs; Optimum of negative and zero sequence (the function that has the
highest magnitude of measured negative and zero sequence current will be activated)
The delta function can be activated by setting the parameter OpDVDI to Enabled.
When selected it operates in parallel with the sequence based algorithms.
If the fuse failure situation is present for more than 5 seconds and the setting parameter
SealIn is set to Enabled it will be sealed in as long as at least one phase voltages is
below the set value VSealInPU. This will keep the BLKV and BLKZ signals activated
as long as any phase voltage is below the set value VSealInPU. If all three phase
voltages drop below the set value VSealInPU and the setting parameter SealIn is set to
Enabled the output signal 3PH will also be activated. The signals 3PH, BLKV and
BLKZ signals will now be active as long as any phase voltage is below the set value
VSealInPU.
If SealIn is set to Enabled the fuse failure condition is stored in the non volatile
memory in the IED. At start-up of the IED (due to auxiliary power interruption or re-
start due to configuration change) it checks the stored value in its non volatile memory
and re-establishes the conditions that were present before the shut down. All phase
voltages must be greater than VSealInPU before fuse failure is de-activated and
removes the block of different protection functions.
The output signal BLKV will also be active if all phase voltages have been above the
setting VSealInPU for more than 60 seconds, the zero or negative sequence voltage has
been above the set value 3V0PU and 3V2PU for more than 5 seconds, all phase
currents are below the setting IDLDPU (operate level for dead line detection) and the
circuit breaker is closed (input 52a is activated).
If a MCB is used then the input signal MCBOP is to be connected via a terminal binary
input to the N.C. auxiliary contact of the miniature circuit breaker protecting the VT
secondary circuit. The MCBOP signal sets the output signals BLKV and BLKZ in
order to block all the voltage related functions when the MCB is open independent of
the setting of OpModeSel or OpDVDI. An additional drop-out timer of 150 ms
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prolongs the presence of MCBOP signal to prevent the unwanted operation of voltage
dependent function due to non simultaneous closing of the main contacts of the
miniature circuit breaker.
The input signal 89b is supposed to be connected via a terminal binary input to the
N.C. auxiliary contact of the line disconnector. The 89b signal sets the output signal
BLKV in order to block the voltage related functions when the line disconnector is
open. The impedance protection function does not have to be affected since there will
be no line currents that can cause malfunction of the distance protection.
The output signals 3PH, BLKV and BLKZ as well as the signals DLD1PH and
DLD3PH from dead line detections are blocked if any of the following conditions occur:
The input BLOCK is a general purpose blocking signal of the fuse failure supervision
function. It can be connected to a binary input of the IED in order to receive a block
command from external devices or can be software connected to other internal
functions of the IED. Through OR gate it can be connected to both binary inputs and
internal function outputs.
The input BLKTRIP is intended to be connected to the trip output of any of the
protection functions included in the IED and/or trip from external equipments via
binary inputs. When activated for more than 20 ms without any fuse fail detected, the
operation of the fuse failure is blocked during a fixed time of 100 ms. The aim is to
increase the security against unwanted operations during the opening of the breaker,
which might cause unbalance conditions for which the fuse failure might operate.
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TEST ACTIVE
AND
BlocFuse = Yes
BLOCK intBlock
OR
BLKTRIP 20 ms 100 ms
AND t t
FusefailStarted
AND
Any VL < VSealInPU
FuseFailDetDUDI
AND 5s
OpDVDI = Enabled
OR t
FuseFailDetZeroSeq
AND
AND
FuseFailDetNegSeq
AND
UNsINs OR
UZsIZs OR
UZsIZs OR UNsINs
OpModeSel
UZsIZs AND UNsINs
OptimZsNs
OR
CurrZeroSeq
a AND
CurrNegSeq a>b
b
AND
200 ms
DeadLineDet1Ph AND BLKZ
t OR AND
150 ms
MCBOP t
AND BLKV
60 s
t OR OR
All VL > VSealInPU
AND
VoltZeroSeq 5s
VoltNegSeq OR t
AllCurrLow
52a
89b
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Figure 122: Simplified logic diagram for fuse failure supervision function, Main logic
ANSI05000700-2-en.vsd
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Control
Section 11 Control
11.1.1 Introduction
The apparatus control functions are used for control and supervision of circuit
breakers, disconnectors and grounding switches within a bay. Permission to operate is
given after evaluation of conditions from other functions such as interlocking,
synchronism check, operator place selection and external or internal blockings.
In normal security, the command is processed and the resulting position is not
supervised. However with enhanced security, the command is processed and the
resulting position is supervised.
Primary apparatuses such as breakers and disconnectors are controlled and supervised
by one software module (SCSWI) each. Because the number and type of signals
connected to a breaker and a disconnector are almost the same, the same software is
used to handle these two types of apparatuses.
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The software module is connected to the physical process in the switchyard via an
interface module by means of a number of digital inputs and outputs. One type of
interface module is intended for a circuit breaker (SXCBR) and another type is
intended for a disconnector or grounding switch (SXSWI). Four types of function
blocks are available to cover most of the control and supervision within the bay. These
function blocks are interconnected to form a control function reflecting the switchyard
configuration. The total number used depends on the switchyard configuration. These
four types are:
The three latter functions are logical nodes according to IEC 61850. The functions
Local Remote (LOCREM) and Local Remote Control (LOCREMCTRL), to handle the
local/remote switch, and the functions Bay reserve (QCRSV) and Reservation input
(RESIN), for the reservation function, also belong to the apparatus control function.
The principles of operation, function block, input and output signals and setting
parameters for all these functions are described below.
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11.1.4.1 Introduction
The Bay control QCBAY function is used together with Local remote and local remote
control functions to handle the selection of the operator place per bay. QCBAY also
provides blocking functions that can be distributed to different apparatuses within the
bay.
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11.1.5.1 Introduction
The signals from the local HMI or from an external local/remote switch are applied via
the function blocks LOCREM and LOCREMCTRL to the Bay control (QCBAY)
function block. A parameter in function block LOCREM is set to choose if the switch
signals are coming from the local HMI or from an external hardware switch connected
via binary inputs.
The function block Local remote (LOCREM) handles the signals coming from the local/
remote switch. The connections are seen in figure 125, where the inputs on function
block LOCREM are connected to binary inputs if an external switch is used. When the
local HMI is used, the inputs are not used and are set to FALSE in the configuration.
The outputs from the LOCREM function block control the output PSTO (Permitted
Source To Operate) on Bay control (QCBAY).
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LOCREM QCBAY
CTRLOFF OFF LR_ OFF PSTO
LOCCTRL LOCAL LR_ LOC UPD_ BLKD
REMCTRL REMOTE LR_ REM CMD_ BLKD
LHMICTRL VALID LR_ VALID LOC
BL_ UPD REM
BL_ CMD
LOCREM QCBAY
CTRLOFF OFF LR_ OFF PSTO
LOCCTRL LOCAL LR_ LOC UPD_ BLKD
REMCTRL REMOTE LR_ REM CMD_ BLKD
LHMICTRL VALID LR_ VALID LOC
BL_ UPD REM
BL_ CMD
LOCREMCTRL
PSTO1 HMICTR1
PSTO2 HMICTR2
PSTO3 HMICTR3
PSTO4 HMICTR4
PSTO5 HMICTR5
PSTO6 HMICTR6
PSTO7 HMICTR7
PSTO8 HMICTR8
PSTO9 HMICTR9
PSTO 10 HMICTR 10
PSTO 11 HMICTR 11
PSTO 12 HMICTR 12
IEC10000052-1-en.vsd
IEC10000052 V1 EN
Figure 125: Configuration for the local/remote handling for a local HMI with two
bays and two screen pages
If the IED contains control functions for several bays, the local/remote position can be
different for the included bays. When the local HMI is used the position of the local/
remote switch can be different depending on which single line diagram screen page
that is presented on the local HMI. The function block Local remote control
(LOCREMCTRL) controls the presentation of the LEDs for the local/remote position
to applicable bay and screen page.
The switching of the local/remote switch requires at least system operator level. The
password will be requested at an attempt to operate if authority levels have been
defined in the IED. Otherwise the default authority level, SuperUser, can handle the
control without LogOn. The users and passwords are defined in PCM600.
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LOCREMCTRL
PSTO1 HMICTR1
PSTO2 HMICTR2
PSTO3 HMICTR3
PSTO4 HMICTR4
PSTO5 HMICTR5
PSTO6 HMICTR6
PSTO7 HMICTR7
PSTO8 HMICTR8
PSTO9 HMICTR9
PSTO10 HMICTR10
PSTO11 HMICTR11
PSTO12 HMICTR12
IEC05000361-2-en.vsd
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11.2.1 Introduction
The logic rotating switch for function selection and LHMI presentation (SLGGIO) (or
the selector switch function block) is used to get a selector switch functionality similar
to the one provided by a hardware selector switch. Hardware selector switches are used
extensively by utilities, in order to have different functions operating on pre-set values.
Hardware switches are however sources for maintenance issues, lower system
reliability and an extended purchase portfolio. The logic selector switches eliminate all
these problems.
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integer value output, that generates the actual position number. The positions and the
block names are fully settable by the user. These names will appear in the menu, so the
user can see the position names instead of a number.
Control
Control Single Line Diagram Ctrl/Com
Measurements Commands Single Command
Events Selector Switch (GGIO)
Disturbance records
Settings
Diagnostics
Test
Reset
Authorization
Language
1 2 3
../Com/Sel Sw/ ../Com/Sel Sw/
../Ctrl/Com/Sel Sw SLGGIO3
SLGGIO1 SLGGIO3
Damage ctrl 4 Damage ctrl 4
SLGGIO2
..
..
SLGGIO15
OK Cancel
4
5
The dialog window that appears
../Com/Sel Sw/ shows the present position (P:)
DmgCtrl 7
and the new position (N:), both
Damage ctrl: in clear names, given by the
user (max. 13 characters).
E
Modify the position with arrows.
The pos will not be modified (outputs
will not be activated) until you press
the E-button for O.K. IEC06000420-2-en.vsd
IEC06000420 V2 EN
Figure 128: Example 1 on handling the switch from the local HMI.
From the local HMI:
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• if it is used just for the monitoring, the switches will be listed with their actual
position names, as defined by the user (max. 13 characters).
• if it is used for control, the switches will be listed with their actual positions, but
only the first three letters of the name will be used.
In both cases, the switch full name will be shown, but the user has to redefine it when
building the Graphical Display Editor, under the "Caption". If used for the control, the
following sequence of commands will ensure:
Control
Control Single Line Diagram
Measurements Commands
Events
Disturbance records
Settings
Diagnostics
Test
Change to the "Switches" page Reset
of the SLD by left-right arrows. Authorization
Select switch by up-down Language
arrows
../Control/SLD/Switch
SMBRREC control
WFM
Pilot setup
OFF
Damage control
DFW
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Figure 129: Example 2 on handling the switch from the local HMI.
From the single line diagram on local HMI.
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11.3.1 Introduction
The Selector mini switch VSGGIO function block is a multipurpose function used for a
variety of applications, as a general purpose switch.
VSGGIO can be controlled from the menu or from a symbol on the single line diagram
(SLD) on the local HMI.
• for indication on the single line diagram (SLD). Position is received through the
IPOS1 and IPOS2 inputs and distributed in the configuration through the POS1
and POS2 outputs, or to IEC 61850 through reporting, or GOOSE.
• for commands that are received via the local HMI or IEC 61850 and distributed in
the configuration through outputs CMDPOS12 and CMDPOS21.
The output CMDPOS12 is set when the function receives a CLOSE command
from the local HMI when the SLD is displayed and the object is chosen.
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The output CMDPOS21 is set when the function receives an OPEN command
from the local HMI when the SLD is displayed and the object is chosen.
The PSTO input is connected to the Local remote switch to have a selection of
operators place, operation from local HMI (Local) or through IEC 61850 (Remote). An
INTONE connection from Fixed signal function block (FXDSIGN) will allow
operation from local HMI.
The following table shows the relationship between IPOS1/IPOS2 inputs and the name
of the string that is shown on the SLD. The value of the strings are set in PST.
IPOS1 IPOS2 Name of displayed string Default string value
0 0 PosUndefined P00
1 0 Position1 P01
0 1 Position2 P10
1 1 PosBadState P11
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11.4.1 Introduction
The IEC 61850 generic communication I/O functions (DPGGIO) function block is
used to send double indications to other systems or equipment in the substation. It is
especially used in the interlocking and reservation station-wide logics.
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11.4.5 Settings
The function does not have any parameters available in the local HMI or PCM600.
11.5.1 Introduction
The Single point generic control 8 signals (SPC8GGIO) function block is a collection
of 8 single point commands, designed to bring in commands from REMOTE (SCADA)
to those parts of the logic configuration that do not need extensive command receiving
functionality (for example, SCSWI). In this way, simple commands can be sent
directly to the IED outputs, without confirmation. Confirmation (status) of the result of
the commands is supposed to be achieved by other means, such as binary inputs and
SPGGIO function blocks. The commands can be pulsed or steady.
PSTO is the universal operator place selector for all control functions.
Although, PSTO can be configured to use LOCAL or ALL operator
places only, REMOTE operator place is used in SPC8GGIO function.
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11.6.1 Introduction
AutomationBits function for DNP3 (AUTOBITS) is used within PCM600 to get into
the configuration of the commands coming through the DNP3 protocol. The
AUTOBITS function plays the same role as functions GOOSEBINRCV (for IEC
61850) and MULTICMDRCV (for LON).
There is a BLOCK input signal, which will disable the operation of the function, in the
same way the setting Operation: Enabled/Disabled does. That means that, upon
activation of the BLOCK input, all 32 CMDBITxx outputs will be set to 0. The
BLOCK acts like an overriding, the function still receives data from the DNP3 master.
Upon deactivation of BLOCK, all the 32 CMDBITxx outputs will be set by the DNP3
master again, momentarily. For AUTOBITS , the PSTO input determines the operator
place. The command can be written to the block while in “Remote”. If PSTO is in
“Local” then no change is applied to the outputs.
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11.7.1 Introduction
The IEDs can receive commands either from a substation automation system or from
the local HMI. The command function block has outputs that can be used, for example,
to control high voltage apparatuses or for other user defined functionality.
The output signals can be of the types Disabled, Steady, or Pulse. This configuration
setting is done via the local HMI or PCM600 and is common for the whole function
block. The length of the output pulses are 100 ms. In steady mode, SINGLECMD
function has a memory to remember the output values at power interruption of the IED.
Also a BLOCK input is available used to block the updating of the outputs.
The output signals, OUT1 to OUT16, are available for configuration to built-in
functions or via the configuration logic circuits to the binary outputs of the IED.
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Section 12 Logic
12.1.1 Introduction
A number of logic blocks and timers are available for the user to adapt the
configuration to the specific application needs.
• OR function block.
• PULSETIMER function block can be used, for example, for pulse extensions or
limiting of operation of outputs, settable pulse time.
• GATE function block is used for whether or not a signal should be able to pass
from the input to the output.
• LOOPDELAY function block used to delay the output signal one execution cycle.
• TIMERSET function has pick-up and drop-out delayed outputs related to the
input signal. The timer has a settable time delay.
• SRMEMORY function block is a flip-flop that can set or reset an output from two
inputs respectively. Each block has two outputs where one is inverted. The
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memory setting controls if the block's output should reset or return to the state it
was, after a power interruption.
• RSMEMORY function block is a flip-flop that can reset or set an output from two
inputs respectively. Each block has two outputs where one is inverted. The
memory setting controls if the block's output should reset or return to the state it
was, after a power interruption. RESET input has priority.
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LOOPDELAY
INPUT OUT
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SRMEMORY
SET OUT
RESET NOUT
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The Reset-set with memory function block (RSMEMORY) is a flip-flop with memory
that can reset or set an output from two inputs respectively. Each RSMEMORY
function block has two outputs, where one is inverted. The memory setting controls if
the flip-flop after a power interruption will return the state it had before or if it will be
reset. For a Reset-Set flip-flop, RESET input has higher priority over SET input.
RSMEMORY
SET OUT
RESET NOUT
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The Fixed signals function (FXDSIGN) generates a number of pre-set (fixed) signals
that can be used in the configuration of an IED, either for forcing the unused inputs in
other function blocks to a certain level/value, or for creating certain logic.
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12.3.1 Introduction
Boolean 16 to integer conversion function (B16I) is used to transform a set of 16
binary (logical) signals into an integer.
Values of each of the different OUTx from function block B16I for 1≤x≤16.
The sum of the value on each INx corresponds to the integer presented on the output
OUT on the function block B16I
Name of input Type Default Description Value when Value when
activated deactivated
IN1 BOOLEAN 0 Input 1 1 0
IN2 BOOLEAN 0 Input 2 2 0
IN3 BOOLEAN 0 Input 3 4 0
IN4 BOOLEAN 0 Input 4 8 0
IN5 BOOLEAN 0 Input 5 16 0
IN6 BOOLEAN 0 Input 6 32 0
IN7 BOOLEAN 0 Input 7 64 0
IN8 BOOLEAN 0 Input 8 128 0
IN9 BOOLEAN 0 Input 9 256 0
IN10 BOOLEAN 0 Input 10 512 0
IN11 BOOLEAN 0 Input 11 1024 0
IN12 BOOLEAN 0 Input 12 2048 0
IN13 BOOLEAN 0 Input 13 4096 0
IN14 BOOLEAN 0 Input 14 8192 0
IN15 BOOLEAN 0 Input 15 16384 0
IN16 BOOLEAN 0 Input 16 32768 0
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The sum of the numbers in column “Value when activated” when all INx (where
1≤x≤16) are active that is=1; is 65535. 65535 is the highest boolean value that can be
converted to an integer by the B16I function block.
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12.4.1 Introduction
Boolean 16 to integer conversion with logic node representation function (B16IFCVI)
is used to transform a set of 16 binary (logical) signals into an integer.
B16IFCVI can receive remote values via IEC 61850 depending on the operator
position input (PSTO).
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output OUT. The BTIGAPC function is designed for receiving the integer input from a
station computer - for example, over IEC 61850. If the BLOCK input is activated, it
will freeze the logical outputs at the last value.
Values of each of the different OUTx from function block BTIGAPC for 1≤x≤16.
The sum of the value on each INx corresponds to the integer presented on the output
OUT on the function block BTIGAPC.
Name of input Type Default Description Value when Value when
activated deactivated
IN1 BOOLEAN 0 Input 1 1 0
IN2 BOOLEAN 0 Input 2 2 0
IN3 BOOLEAN 0 Input 3 4 0
IN4 BOOLEAN 0 Input 4 8 0
IN5 BOOLEAN 0 Input 5 16 0
IN6 BOOLEAN 0 Input 6 32 0
IN7 BOOLEAN 0 Input 7 64 0
IN8 BOOLEAN 0 Input 8 128 0
IN9 BOOLEAN 0 Input 9 256 0
IN10 BOOLEAN 0 Input 10 512 0
IN11 BOOLEAN 0 Input 11 1024 0
IN12 BOOLEAN 0 Input 12 2048 0
IN13 BOOLEAN 0 Input 13 4096 0
IN14 BOOLEAN 0 Input 14 8192 0
IN15 BOOLEAN 0 Input 15 16384 0
IN16 BOOLEAN 0 Input 16 32768 0
The sum of the numbers in column “Value when activated” when all INx (where
1≤x≤16) are active that is=1; is 65535. 65535 is the highest boolean value that can be
converted to an integer by the BTIGAPC function block.
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12.5.1 Introduction
Integer to boolean 16 conversion function (IB16) is used to transform an integer into a
set of 16 binary (logical) signals.
OUTx represents a value when activated. The value of each of the OUTx is in
accordance with the table IB16_1. When not activated the OUTx has the value 0.
In the above example when integer 15 is on the input INP the OUT1 has a value =1,
OUT2 has a value =2, OUT3 has a value =4 and OUT4 has a value =8. The sum of
these OUTx is equal to 1 + 2 + 4 + 8 = 15.
This follows the general formulae: The sum of the values of all OUTx = 2x-1 where
1≤x≤16 will be equal to the integer value on the input INP.
The Integer to Boolean 16 conversion function (IB16) will transfer an integer with a
value between 0 to 65535 connected to the input INP to a combination of activated
outputs OUTx where 1≤x≤16. The sum of the values of all OUTx will then be equal to
the integer on input INP. The values of the different OUTx are according to the table
below. When an OUTx is not activated, its value is 0.
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When all OUTx where 1≤x≤16 are activated that is = Boolean 1 it corresponds to that
integer 65535 is connected to input INP. The IB16 function is designed for receiving
the integer input locally. If the BLOCK input is activated, it will freeze the logical
outputs at the last value.
Values of each of the different OUTx from function block IB16 for 1≤x≤16.
The sum of the value on each INx corresponds to the integer presented on the output
OUT on the function block IB16.
Name of OUTx Type Description Value when Value when
activated deactivated
OUT1 BOOLEAN Output 1 1 0
OUT2 BOOLEAN Output 2 2 0
OUT3 BOOLEAN Output 3 4 0
OUT4 BOOLEAN Output 4 8 0
OUT5 BOOLEAN Output 5 16 0
OUT6 BOOLEAN Output 6 32 0
OUT7 BOOLEAN Output 7 64 0
OUT8 BOOLEAN Output 8 128 0
OUT9 BOOLEAN Output 9 256 0
OUT10 BOOLEAN Output 10 512 0
OUT11 BOOLEAN Output 11 1024 0
OUT12 BOOLEAN Output 12 2048 0
OUT13 BOOLEAN Output 13 4096 0
OUT14 BOOLEAN Output 14 8192 0
OUT15 BOOLEAN Output 15 16384 0
OUT16 BOOLEAN Output 16 32768 0
The sum of the numbers in column “Value when activated” when all OUTx (where x =
1 to 16) are active that is=1; is 65535. 65535 is the highest integer that can be
converted by the IB16 function block.
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12.6.1 Introduction
Integer to boolean conversion with logic node representation function (IB16FCVB) is
used to transform an integer to 16 binary (logic) signals.
IB16FCVB function can receive remote values over IEC61850 depending on the
operator position input (PSTO).
OUTx represents a value when activated. The value of each of the OUTx is in
accordance with the table ITBGAPC_1. When not activated the OUTx has the value 0.
In the above example when integer 15 is on the input INP the OUT1 has a value =1,
OUT2 has a value =2, OUT3 has a value =4 and OUT4 has a value =8. The sum of
these OUTx is equal to 1 + 2 + 4 + 8 = 15.
This follows the general formulae: The sum of the values of all OUTx = 2x-1 where
1≤x≤16 will be equal to the integer value on the input INP.
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When all OUTx where 1≤x≤16 are activated that is = Boolean 1 it corresponds to that
integer 65535 is connected to input INP. The ITBGAPC function is designed for
receiving the integer input from a station computer - for example, over IEC 61850. If
the BLOCK input is activated, it will freeze the logical outputs at the last value.
Values of each of the different OUTx from function block ITBGAPC for 1≤x≤16.
The sum of the value on each INx corresponds to the integer presented on the output
OUT on the function block ITBGAPC.
The sum of the numbers in column “Value when activated” when all OUTx (where x =
1 to 16) are active that is=1; is 65535. 65535 is the highest integer that can be
converted by the ITBGAPC function block.
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The operator position input (PSTO) determines the operator place. The integer number
can be written to the block while in “Remote”. If PSTO is in ”Off” or ”Local”, then no
change is applied to the outputs.
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Section 13 Monitoring
13.1 Measurements
SYMBOL-RR V1 EN
SYMBOL-SS V1 EN
SYMBOL-UU V1 EN
SYMBOL-VV V1 EN
SYMBOL-TT V1 EN
SYMBOL-UU V1 EN
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13.1.1 Introduction
Measurement functions is used for power system measurement, supervision and
reporting to the local HMI, monitoring tool within PCM600 or to station level for
example, via IEC 61850. The possibility to continuously monitor measured values of
active power, reactive power, currents, voltages, frequency, power factor etc. is vital
for efficient production, transmission and distribution of electrical energy. It provides
to the system operator fast and easy overview of the present status of the power system.
Additionally, it can be used during testing and commissioning of protection and control
IEDs in order to verify proper operation and connection of instrument transformers
(CTs and VTs). During normal service by periodic comparison of the measured value
from the IED with other independent meters the proper operation of the IED analog
measurement chain can be verified. Finally, it can be used to verify proper direction
orientation for distance or directional overcurrent protection function.
All measured values can be supervised with four settable limits that is, low-low limit,
low limit, high limit and high-high limit. A zero clamping reduction is also supported,
that is, the measured value below a settable limit is forced to zero which reduces the
impact of noise in the inputs.
Dead-band supervision can be used to report measured signal value to station level
when change in measured value is above set threshold limit or time integral of all
changes since the last time value updating exceeds the threshold limit. Measure value
can also be based on periodic reporting.
The measurement function, CVMMXN, provides the following power system quantities:
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It is possible to calibrate the measuring function above to get better then class 0.5
presentation. This is accomplished by angle and magnitude compensation at 5, 30 and
100% of rated current and at 100% of rated voltage.
The measuring functions CMSQI and VMSQI provide sequence component quantities:
The protection, control, and monitoring IEDs have functionality to measure and further
process information for currents and voltages obtained from the pre-processing blocks.
The number of processed alternate measuring quantities depends on the type of IED
and built-in options.
The information on measured quantities is available for the user at different locations:
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zero point clamping might be overridden by the zero point clamping used for the
measurement values within CVMMXU.
• Overfunction, when the measured current exceeds the High limit (XHiLim) or High-
high limit (XHiHiLim) pre-set values
• Underfunction, when the measured current decreases under the Low limit
(XLowLim) or Low-low limit (XLowLowLim) pre-set values.
X_RANGE = 3
High-high limit
X_RANGE= 1 Hysteresis
High limit
X_RANGE=0
X_RANGE=0 t
Low limit
X_RANGE=2
Low-low limit
X_RANGE=4
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Each analog output has one corresponding supervision level output (X_RANGE). The
output signal is an integer in the interval 0-4 (0: Normal, 1: High limit exceeded, 3: High-
high limit exceeded, 2: below Low limit and 4: below Low-low limit). The output may
be connected to a measurement expander block (XP (RANGE_XP)) to get
measurement supervision as binary signals.
The logical value of the functional output signals changes according to figure 152.
The user can set the hysteresis (XLimHyst), which determines the difference between
the operating and reset value at each operating point, in wide range for each measuring
channel separately. The hysteresis is common for all operating values within one channel.
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Cyclic reporting
The cyclic reporting of measured value is performed according to chosen setting
(XRepTyp). The measuring channel reports the value independent of magnitude or
integral dead-band reporting.
In addition to the normal cyclic reporting the IED also report spontaneously when
measured value passes any of the defined threshold limits.
Y
Value Reported Value Reported
Value Reported Value Reported
(1st)
Y3 Value Reported
Y2 Y4
Y1 Y5
t
Value 1
Value 2
Value 3
Value 4
Value 5
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Value Reported
Y
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After the new value is reported, the ±ΔY limits for dead-band are automatically set
around it. The new value is reported only if the measured quantity changes more than
defined by the ±ΔY set limits.
The last value reported, Y1 in figure 155 serves as a basic value for further
measurement. A difference is calculated between the last reported and the newly
measured value and is multiplied by the time increment (discrete integral). The
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absolute values of these integral values are added until the pre-set value is exceeded.
This occurs with the value Y2 that is reported and set as a new base for the following
measurements (as well as for the values Y3, Y4 and Y5).
The integral dead-band supervision is particularly suitable for monitoring signals with
small variations that can last for relatively long periods.
Y A1 >=
A >= pre-set value
A2 >=
pre-set value pre-set value
Y3 A3 + A4 + A5 + A6 + A7 >=
pre-set value
Y2 A1 A2
A4 A6
Value Reported Y4 A3 A5 A7
(1st) Value
Value Reported Y5
A Reported Value
Reported Value
Y1 Reported
t
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Mode of operation
The measurement function must be connected to three-phase current and three-phase
voltage input in the configuration tool (group signals), but it is capable to measure and
calculate above mentioned quantities in nine different ways depending on the available
VT inputs connected to the IED. The end user can freely select by a parameter setting,
which one of the nine available measuring modes shall be used within the function.
Available options are summarized in the following table:
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Set value for Formula used for complex, three- Formula used for voltage and Comment
parameter phase power calculation current magnitude calculation
“Mode”
1 A, B, C Used when three
S = VA × I A* + VB × I B* + VC × I C* (
V = VA + VB + VC )/ 3 phase-to-ground
voltages are
I =( I )/3
EQUATION1561 V1 EN
+ IB + IC available
A
EQUATION1562 V1 EN
( )
2 Arone Used when three
S = VAB × I A - VBC × I C
* *
V = VAB + VBC / 2 two phase-to-
phase voltages
I =( I ) are available
(Equation 39)
EQUATION1563 V1 EN
A
+ IC / 2
EQUATION1564 V1 EN (Equation 40)
3 PosSeq Used when only
S = 3 × VPosSeq × I PosSeq
*
V = 3 × VPosSeq symmetrical three
phase power shall
(Equation 41) be measured
EQUATION1565 V1 EN
I = I PosSeq
EQUATION1566 V1 EN (Equation 42)
( )
4 AB Used when only
S = VAB × I A - I B
* *
V = VAB VAB phase-to-
phase voltage is
EQUATION1567 V1 EN (Equation 43) (
I = IA + IB / 2 ) available
( )
5 BC Used when only
S = VBC × I B - I C
* *
V = VBC VBC phase-to-
phase voltage is
EQUATION1569 V1 EN (Equation 45) (
I = I B + IC / 2 ) available
( )
6 CA Used when only
S = VCA × I C - I A
* *
V = VCA VCA phase-to-
phase voltage is
EQUATION1571 V1 EN (Equation 47) (
I = IC + I A / 2 ) available
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Set value for Formula used for complex, three- Formula used for voltage and Comment
parameter phase power calculation current magnitude calculation
“Mode”
8 B Used when only
S = 3 × VB × I B
*
V = 3 × VB VB phase-to-
ground voltage is
(Equation 51) available
I = IB
EQUATION1575 V1 EN
It shall be noted that only in the first two operating modes that is, 1 & 2 the
measurement function calculates exact three-phase power. In other operating modes
that is, from 3 to 9 it calculates the three-phase power under assumption that the power
system is fully symmetrical. Once the complex apparent power is calculated then the P,
Q, S, & PF are calculated in accordance with the following formulas:
P = Re( S )
EQUATION1403 V1 EN (Equation 55)
Q = Im( S )
EQUATION1404 V1 EN (Equation 56)
S = S = P +Q
2 2
PF = cosj = P
S
EQUATION1406 V1 EN (Equation 58)
Additionally to the power factor value the two binary output signals from the function
are provided which indicates the angular relationship between current and voltage
phasors. Binary output signal ILAG is set to one when current phasor is lagging behind
voltage phasor. Binary output signal ILEAD is set to one when current phasor is
leading the voltage phasor.
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Each analog output has a corresponding supervision level output (X_RANGE). The
output signal is an integer in the interval 0-4, see section "Measurement supervision".
Magnitude
% of In compensation
+10
IMagComp5 Measured
IMagComp30 current
IMagComp100
5 30 100 % of In
0-5%: Constant
-10 5-30-100%: Linear
>100%: Constant
Degrees Angle
compensation
+10
IAngComp30 Measured
current
IAngComp5
IAngComp100
5 30 100 % of In
-10
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The first current and voltage phase in the group signals will be used as reference and
the magnitude and angle compensation will be used for related input signals.
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X = k × X Old + (1 - k ) × X Calculated
EQUATION1407 V1 EN (Equation 59)
where:
X is a new measured value (that is P, Q, S, V, I or PF) to be given out from the function
XOld is the measured value given from the measurement function in previous execution cycle
k is settable parameter by the end user which influence the filter properties
Default value for parameter k is 0.00. With this value the new calculated value is
immediately given out without any filtering (that is, without any additional delay).
When k is set to value bigger than 0, the filtering is enabled. Appropriate value of k
shall be determined separately for every application. Some typical value for k =0.14.
Compensation facility
In order to compensate for small magnitude and angular errors in the complete
measurement chain (CT error, VT error, IED input transformer errors and so on.) it is
possible to perform on site calibration of the power measurement. This is achieved by
setting the complex constant which is then internally used within the function to
multiply the calculated complex apparent power S. This constant is set as magnitude
(setting parameter PowMagFact, default value 1.000) and angle (setting parameter
PowAngComp, default value 0.0 degrees). Default values for these two parameters are
done in such way that they do not influence internally calculated value (complex
constant has default value 1). In this way calibration, for specific operating range (for
example, around rated power) can be done at site. However, to perform this calibration
it is necessary to have an external power meter with high accuracy class available.
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Directionality
If CT grounding parameter is set as described in section "Analog inputs", active and
reactive power will be measured always towards the protected object. This is shown in
the following figure 157.
Busbar
52
IED
P Q
Protected
Object
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Practically, it means that active and reactive power will have positive values when they
flow from the busbar towards the protected object and they will have negative values
when they flow from the protected object towards the busbar.
In some application, for example, when power is measured on the secondary side of the
power transformer it might be desirable, from the end client point of view, to have
actually opposite directional convention for active and reactive power measurements.
This can be easily achieved by setting parameter PowAngComp to value of 180.0
degrees. With such setting the active and reactive power will have positive values
when they flow from the protected object towards the busbar.
Frequency
Frequency is actually not calculated within measurement block. It is simply obtained
from the pre-processing block and then just given out from the measurement block as
an output.
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outputs and IEC 61850. This is achieved by magnitude and angle compensation at 5,
30 and 100% of rated current. The compensation below 5% and above 100% is
constant and linear in between, see figure 156.
Phase currents (magnitude and angle) are available on the outputs and each magnitude
output has a corresponding supervision level output (Ix_RANGE). The supervision
output signal is an integer in the interval 0-4, see section "Measurement supervision".
The voltages (phase or phase-phase voltage, magnitude and angle) are available on the
outputs and each magnitude output has a corresponding supervision level output
(Vxy_RANG). The supervision output signal is an integer in the interval 0-4, see
section "Measurement supervision".
Positive, negative and three times zero sequence quantities are available on the outputs
(voltage and current, magnitude and angle). Each magnitude output has a
corresponding supervision level output (X_RANGE). The output signal is an integer in
the interval 0-4, see section "Measurement supervision".
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CVMMXN
I3P* S
U3P* S_RANGE
P_INST
P
P_RANGE
Q_INST
Q
Q_RANGE
PF
PF_RANGE
ILAG
ILEAD
U
U_RANGE
I
I_RANGE
F
F_RANGE
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CMMXU
I3P* I_A
IA_RANGE
IA_ANGL
I_B
IB_RANGE
IB_ANGL
I_C
IC_RANGE
IC_ANGL
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VNMMXU
V3P* V_A
VA_RANGE
VA_ANGL
V_B
VB_RANGE
VB_ANGL
V_C
VC_RANGE
VC_ANGL
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VMMXU
V3P* V_AB
VAB_RANG
VAB_ANGL
V_BC
VBC_RANG
VBC_ANGL
V_CA
VCA_RANG
VCA_ANGL
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CMSQI
I3P* 3I0
3I0RANG
3I0ANGL
I1
I1RANG
I1ANGL
I2
I2RANG
I2ANGL
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VMSQI
V3P* 3V0
3V0RANG
3V0ANGL
V1
V1RANG
V1ANGL
V2
V2RANG
V2ANGL
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13.2.1 Identification
Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2
identification identification device number
Event counter CNTGGIO -
S00946 V1 EN
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13.2.2 Introduction
Event counter (CNTGGIO) has six counters which are used for storing the number of
times each counter input has been activated.
To not risk that the flash memory is worn out due to too many writings, a mechanism
for limiting the number of writings per time period is included in the product. This
however gives as a result that it can take long time, up to several minutes, before a new
value is stored in the flash memory. And if a new CNTGGIO value is not stored before
auxiliary power interruption, it will be lost. CNTGGIO stored values in flash memory
will however not be lost at an auxiliary power interruption.
The function block also has an input BLOCK. At activation of this input all six
counters are blocked. The input can for example, be used for blocking the counters at
testing.The function block has an input RESET. At activation of this input all six
counters are set to 0.
13.2.3.1 Reporting
Reset of counters can be performed in the local HMI and a binary input.
Reading of content can also be performed remotely, for example from a IEC 61850
client. The value can also be presented as a measuring value on the local HMI
graphical display.
13.2.3.2 Design
The function block has six inputs for increasing the counter values for each of the six
counters respectively. The content of the counters are stepped one step for each
positive edge of the input respectively.
The function block also has an input BLOCK. At activation of this input all six
counters are blocked and are not updated. Valid number is held.
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The function block has an input RESET. At activation of this input all six counters are
set to 0.
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13.3.1 Introduction
When using a Substation Automation system with LON or SPA communication, time-
tagged events can be sent at change or cyclically from the IED to the station level.
These events are created from any available signal in the IED that is connected to the
Event function (EVENT). The event function block is used for remote communication.
Analog and double indication values are also transferred through EVENT function.
Each EVENT function has 16 inputs INPUT1 - INPUT16. Each input can be given a
name from the Application Configuration tool. The inputs are normally used to create
single events, but are also intended for double indication events.
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EVENT function also has an input BLOCK to block the generation of events.
The events that are sent from the IED can originate from both internal logical signals
and binary input channels. The internal signals are time-tagged in the main processing
module, while the binary input channels are time-tagged directly on the input module.
The time-tagging of the events that are originated from internal logical signals have a
resolution corresponding to the execution cyclicity of EVENT function. The time-
tagging of the events that are originated from binary input signals have a resolution of
1 ms.
The outputs from EVENT function are formed by the reading of status, events and
alarms by the station level on every single input. The user-defined name for each input
is intended to be used by the station level.
All events according to the event mask are stored in a buffer, which contains up to
1000 events. If new events appear before the oldest event in the buffer is read, the
oldest event is overwritten and an overflow alarm appears.
The events are produced according to the set-event masks. The event masks are treated
commonly for both the LON and SPA communication. The EventMask can be set
individually for each input channel. These settings are available:
• NoEvents
• OnSet
• OnReset
• OnChange
• AutoDetect
It is possible to define which part of EVENT function generates the events. This can be
performed individually for the SPAChannelMask and LONChannelMask respectively.
For each communication type these settings are available:
• Disabled
• Channel 1-8
• Channel 9-16
• Channel 1-16
For LON communication the events normally are sent to station level at change. It is
possibly also to set a time for cyclic sending of the events individually for each input
channel.
To protect the SA system from signals with a high change rate that can easily saturate
the event system or the communication subsystems behind it, a quota limiter is
implemented. If an input creates events at a rate that completely consume the granted
quota then further events from the channel will be blocked. This block will be removed
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when the input calms down and the accumulated quota reach 66% of the maximum
burst quota. The maximum burst quota per input channel is 45 events per second.
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13.4.1 Introduction
The Logical signal status report (BINSTATREP) function makes it possible for a SPA
master to poll signals from various other functions.
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When an input is set, the respective output is set for a user defined time. If the input
signal remains set for a longer period, the output will remain set until the input signal
resets.
INPUTn
OUTPUTn
t t
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13.5.1 Introduction
The current and voltage measurements functions (CVMMXN, CMMXU, VMMXU
and VNMMXU), current and voltage sequence measurement functions (CMSQI and
VMSQI) and IEC 61850 generic communication I/O functions (MVGGIO) are
provided with measurement supervision functionality. All measured values can be
supervised with four settable limits: low-low limit, low limit, high limit and high-high
limit. The measure value expander block (RANGE_XP) has been introduced to enable
translating the integer output signal from the measuring functions to 5 binary signals:
below low-low limit, below low limit, normal, above high-high limit or above high
limit. The output signals can be used as conditions in the configurable logic or for
alarming purpose.
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13.6.1 Introduction
Complete and reliable information about disturbances in the primary and/or in the
secondary system together with continuous event-logging is accomplished by the
disturbance report functionality.
Disturbance report DRPRDRE, always included in the IED, acquires sampled data of
all selected analog input and binary signals connected to the function block with a,
maximum of 40 analog and 96 binary signals.
• Sequential of events
• Indications
• Event recorder
• Trip value recorder
• Disturbance recorder
Every disturbance report recording is saved in the IED in the standard Comtrade
format. The same applies to all events, which are continuously saved in a ring-buffer.
The local HMI is used to get information about the recordings. The disturbance report
files may be uploaded to PCM600 for further analysis using the disturbance handling
tool.
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Figure 169 shows the relations between Disturbance Report, included functions and
function blocks. Sequential of events (SOE), Event recorder (ER) and Indications
(IND) uses information from the binary input function blocks (BxRBDR). Trip value
recorder (TVR) uses analog information from the analog input function blocks
(AxRADR). Disturbance recorder DRPRDRE acquires information from both
AxRADR and BxRBDR.
A4RADR DRPRDRE
Analog signals
Trip value rec
B1-6RBDR Disturbance
recorder
Indications
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The whole disturbance report can contain information for a number of recordings, each
with the data coming from all the parts mentioned above. The sequential of events
function is working continuously, independent of disturbance triggering, recording
time, and so on. All information in the disturbance report is stored in non-volatile flash
memories. This implies that no information is lost in case of loss of auxiliary power.
Each report will get an identification number in the interval from 0-999.
Number of recordings
100
3.4s
80 3.4s 20 analog
96 binary
40 analog
96 binary
60 6.3s
6.3s
6.3s 50 Hz
40
60 Hz
Total recording time
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Figure 170: Example of number of recordings versus the total recording time
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The IED flash disk should NOT be used to store any user files. This
might cause disturbance recordings to be deleted due to lack of disk space.
Disturbance information
Date and time of the disturbance, the indications, events, fault location and the trip
values are available on the local HMI. To acquire a complete disturbance report the
user must use a PC and - either the PCM600 Disturbance handling tool - or a FTP or
MMS (over 61850) client. The PC can be connected to the IED front, rear or remotely
via the station bus (Ethernet ports).
Indications (IND)
Indications is a list of signals that were activated during the total recording time of the
disturbance (not time-tagged), see section "Indications" for more detailed information.
Time tagging
The IED has a built-in real-time calendar and clock. This function is used for all time
tagging within the disturbance report
Recording times
Disturbance report DRPRDRE records information about a disturbance during a
settable time frame. The recording times are valid for the whole disturbance report.
Disturbance recorder (DR), event recorder (ER) and indication function register
disturbance data and events during tRecording, the total recording time.
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Trig point
TimeLimit
PreFaultRecT PostFaultRecT
1 2 3
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PreFaultRecT, 1 Pre-fault or pre-trigger recording time. The time before the fault including the operate
time of the trigger. Use the setting PreFaultRecT to set this time.
tFault, 2 Fault time of the recording. The fault time cannot be set. It continues as long as any
valid trigger condition, binary or analog, persists (unless limited by TimeLimit the limit
time).
PostFaultRecT, 3 Post fault recording time. The time the disturbance recording continues after all
activated triggers are reset. Use the setting PostFaultRecT to set this time.
TimeLimit Limit time. The maximum allowed recording time after the disturbance recording was
triggered. The limit time is used to eliminate the consequences of a trigger that does
not reset within a reasonable time interval. It limits the maximum recording time of a
recording and prevents subsequent overwriting of already stored disturbances. Use the
setting TimeLimit to set this time.
Analog signals
Up to 40 analog signals can be selected for recording by the Disturbance recorder and
triggering of the Disturbance report function. Out of these 40, 30 are reserved for
external analog signals from analog input modules (TRM) and line data
communication module (LDCM) via preprocessing function blocks (SMAI) and
summation block (3PHSUM). The last 10 channels may be connected to internally
calculated analog signals available as function block output signals (mA input signals,
phase differential currents, bias currents and so on).
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SMAI A1RADR
Block AI3P A2RADR
^GRP2_A AI1 INPUT1 A3RADR
External analog
^GRP2_B AI2 INPUT2
signals
^GRP2_C AI3 INPUT3
^GRP2_N AI4 INPUT4
Type AIN INPUT5
INPUT6
...
A4RADR
INPUT31
INPUT32
INPUT33
Internal analog signals INPUT34
INPUT35
INPUT36
...
INPUT40
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The external input signals will be acquired, filtered and skewed and (after
configuration) available as an input signal on the AxRADR function block via the
SMAI function block. The information is saved at the Disturbance report base
sampling rate (1000 or 1200 Hz). Internally calculated signals are updated according to
the cycle time of the specific function. If a function is running at lower speed than the
base sampling rate, Disturbance recorder will use the latest updated sample until a new
updated sample is available.
If the IED is preconfigured the only tool needed for analog configuration of the
Disturbance report is the Signal Matrix Tool (SMT, external signal configuration). In
case of modification of a preconfigured IED or general internal configuration the
Application Configuration tool within PCM600 is used.
The preprocessor function block (SMAI) calculates the residual quantities in cases
where only the three phases are connected (AI4-input not used). SMAI makes the
information available as a group signal output, phase outputs and calculated residual
output (AIN-output). In situations where AI4-input is used as an input signal the
corresponding information is available on the non-calculated output (AI4) on the
SMAI function block. Connect the signals to the AxRADR accordingly.
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For each of the analog signals, Operation = Enabled means that it is recorded by the
disturbance recorder. The trigger is independent of the setting of Operation, and
triggers even if operation is set to Disabled. Both undervoltage and overvoltage can be
used as trigger conditions. The same applies for the current signals.
If Operation = Enabled, waveform (samples) will also be recorded and reported in graph.
The analog signals are presented only in the disturbance recording, but they affect the
entire disturbance report when being used as triggers.
Binary signals
Up to 96 binary signals can be selected to be handled by disturbance report. The
signals can be selected from internal logical and binary input signals. A binary signal is
selected to be recorded when:
Each of the 96 signals can be selected as a trigger of the disturbance report (Operation
= Operation—>TrigDR =Disabled). A binary signal can be selected to activate the red
LED on the local HMI (SetLED = Enabled/Disabled).
The selected signals are presented in the event recorder, sequential of events and the
disturbance recording. But they affect the whole disturbance report when they are used
as triggers. The indications are also selected from these 96 signals with local HMI
IndicationMask=Show/Hide.
Trigger signals
The trigger conditions affect the entire disturbance report, except the sequential of
events, which runs continuously. As soon as at least one trigger condition is fulfilled, a
complete disturbance report is recorded. On the other hand, if no trigger condition is
fulfilled, there is no disturbance report, no indications, and so on. This implies the
importance of choosing the right signals as trigger conditions.
• Manual trigger
• Binary-signal trigger
• Analog-signal trigger (over/under function)
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Manual trigger
A disturbance report can be manually triggered from the local HMI, PCM600 or via
station bus (IEC 61850). When the trigger is activated, the manual trigger signal is
generated. This feature is especially useful for testing. Refer to the operator's manual
for procedure.
Binary-signal trigger
Any binary signal state (logic one or a logic zero) can be selected to generate a trigger
(Triglevel = Trig on 0/Trig on 1). When a binary signal is selected to generate a trigger
from a logic zero, the selected signal will not be listed in the indications list of the
disturbance report.
Analog-signal trigger
All analog signals are available for trigger purposes, no matter if they are recorded in
the disturbance recorder or not. The settings are OverTrigOp, UnderTrigOp,
OverTrigLe and UnderTrigLe.
The check of the trigger condition is based on peak-to-peak values. When this is found,
the absolute average value of these two peak values is calculated. If the average value
is above the threshold level for an overvoltage or overcurrent trigger, this trigger is
indicated with a greater than (>) sign with the user-defined name.
If the average value is below the set threshold level for an undervoltage or undercurrent
trigger, this trigger is indicated with a less than (<) sign with its name. The procedure
is separately performed for each channel.
This method of checking the analog trigger conditions gives a function which is
insensitive to DC offset in the signal. The operate time for this initiation is typically in
the range of one cycle, 16 2/3 ms for a 60 Hz network.
All under/over trig signal information is available on the local HMI and PCM600.
Post Retrigger
Disturbance report function does not automatically respond to any new trig condition
during a recording, after all signals set as trigger signals have been reset. However,
under certain circumstances the fault condition may reoccur during the post-fault
recording, for instance by automatic reclosing to a still faulty power line.
When the retrig parameter is disabled (PostRetrig = Disabled), a new recording will
not start until the post-fault (PostFaultrecT or TimeLimit) period is terminated. If a
new trig occurs during the post-fault period and lasts longer than the proceeding
recording a new complete recording will be started.
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A1RADR
^INPUT1
^INPUT2
^INPUT3
^INPUT4
^INPUT5
^INPUT6
^INPUT7
^INPUT8
^INPUT9
^INPUT10
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A4RADR
^INPUT31
^INPUT32
^INPUT33
^INPUT34
^INPUT35
^INPUT36
^INPUT37
^INPUT38
^INPUT39
^INPUT40
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B1RBDR
^INPUT1
^INPUT2
^INPUT3
^INPUT4
^INPUT5
^INPUT6
^INPUT7
^INPUT8
^INPUT9
^INPUT10
^INPUT11
^INPUT12
^INPUT13
^INPUT14
^INPUT15
^INPUT16
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Figure 176: B1RBDR function block, binary inputs, example for B1RBDR - B6RBDR
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13.7.1 Introduction
Continuous event-logging is useful for monitoring the system from an overview
perspective and is a complement to specific disturbance recorder functions.
The sequential of events logs all binary input signals connected to the Disturbance
report function. The list may contain up to 1000 time-tagged events stored in a ring-buffer.
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events in chronological order. The list can contain up to 1000 events from both internal
logic signals and binary input channels. If the list is full, the oldest event is overwritten
when a new event arrives.
The list can be configured to show oldest or newest events first with a setting on the
local HMI.
The sequential of events function runs continuously, in contrast to the event recorder
function, which is only active during a disturbance, and each event record is an integral
part of its associated DR.
The name of the binary signal that appears in the event recording is the user-defined
name assigned when the IED is configured. The same name is used in the disturbance
recorder function (DR), indications (IND) and the event recorder function (ER).
The sequential of events is stored and managed separate from the disturbance report
information(ER, DR, IND, TVR and FL).
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13.8 Indications
13.8.1 Introduction
To get fast, condensed and reliable information about disturbances in the primary and/
or in the secondary system it is important to know, for example binary signals that
have changed status during a disturbance. This information is used in the short
perspective to get information via the local HMI in a straightforward way.
There are three LEDs on the local HMI (green, yellow and red), which will display
status information about the IED and the Disturbance report function (triggered).
The Indication list function shows all selected binary input signals connected to the
Disturbance report function that have changed status during a disturbance.
Green LED:
Yellow LED:
Red LED:
Indication list:
The possible indication signals are the same as the ones chosen for the disturbance
report function and disturbance recorder.
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The indication function tracks 0 to 1 changes of binary signals during the recording
period of the collection window. This means that constant logic zero, constant logic
one or state changes from logic one to logic zero will not be visible in the list of
indications. Signals are not time tagged. In order to be recorded in the list of
indications the:
Indications are selected with the indication mask (IndicationMask) when setting the
binary inputs.
The name of the binary signal that appears in the Indication function is the user-defined
name assigned at configuration of the IED. The same name is used in disturbance
recorder function (DR), indications (IND) and event recorder function (ER).
13.9.1 Introduction
Quick, complete and reliable information about disturbances in the primary and/or in
the secondary system is vital, for example, time-tagged events logged during
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disturbances. This information is used for different purposes in the short term (for
example corrective actions) and in the long term (for example functional analysis).
The event recorder logs all selected binary input signals connected to the Disturbance
report function. Each recording can contain up to 150 time-tagged events.
The event recorder information is available for the disturbances locally in the IED.
In case of overlapping recordings, due to PostRetrig = Enabled and a new trig signal
appears during post-fault time, events will be saved in both recording files.
The name of the binary input signal that appears in the event recording is the user-
defined name assigned when configuring the IED. The same name is used in the
disturbance recorder function (DR), indications (IND) and event recorder function(ER).
The event record is stored as a part of the disturbance report information (ER, DR,
IND, TVR and FL) and managed via the local HMI or PCM600.
Events can not be read from the IED if more than one user is accessing
the IED simultaneously.
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13.10.1 Introduction
Information about the pre-fault and fault values for currents and voltages are vital for
the disturbance evaluation.
The Trip value recorder calculates the values of all selected analog input signals
connected to the Disturbance report function. The result is magnitude and phase angle
before and during the fault for each analog input signal.
The trip value recorder information is available for the disturbances locally in the IED.
The trip value recorder information is an integrated part of the disturbance record
(Comtrade file).
When the disturbance report function is triggered the sample for the fault interception
is searched for, by checking the non-periodic changes in the analog input signals. The
channel search order is consecutive, starting with the analog input with the lowest number.
When a fault interception point is found, the Fourier estimation of the pre-fault values
of the complex values of the analog signals starts 1.5 cycle before the fault sample. The
estimation uses samples during one period. The post-fault values are calculated using
the Recursive Least Squares (RLS) method. The calculation starts a few samples after
the fault sample and uses samples during 1/2 - 2 cycles depending on the shape of the
signals.
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If no starting point is found in the recording, the disturbance report trig sample is used
as the start sample for the Fourier estimation. The estimation uses samples during one
cycle before the trig sample. In this case the calculated values are used both as pre-fault
and fault values.
The name of the analog signal that appears in the Trip value recorder function is the user-
defined name assigned when the IED is configured. The same name is used in the
Disturbance recorder function (DR).
The trip value record is stored as a part of the disturbance report information (ER, DR,
IND, TVR and fault locator) and managed in PCM600 or via the local HMI.
13.11.1 Introduction
The Disturbance recorder function supplies fast, complete and reliable information
about disturbances in the power system. It facilitates understanding system behavior
and related primary and secondary equipment during and after a disturbance. Recorded
information is used for different purposes in the short perspective (for example
corrective actions) and long perspective (for example functional analysis).
The Disturbance recorder acquires sampled data from selected analog- and binary
signals connected to the Disturbance report function (maximum 40 analog and 96
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binary signals). The binary signals available are the same as for the event recorder
function.
The function is characterized by great flexibility and is not dependent on the operation
of protection functions. It can record disturbances not detected by protection functions.
Up to ten seconds of data before the trigger instant can be saved in the disturbance file.
The disturbance recorder information for up to 100 disturbances are saved in the IED
and the local HMI is used to view the list of recordings.
Disturbance recorder collects analog values and binary signals continuously, in a cyclic
buffer. The pre-fault buffer operates according to the FIFO principle; old data will
continuously be overwritten as new data arrives when the buffer is full. The size of this
buffer is determined by the set pre-fault recording time.
Upon detection of a fault condition (triggering), the disturbance is time tagged and the
data storage continues in a post-fault buffer. The storage process continues as long as
the fault condition prevails - plus a certain additional time. This is called the post-fault
time and it can be set in the disturbance report.
The above mentioned two parts form a disturbance recording. The whole memory,
intended for disturbance recordings, acts as a cyclic buffer and when it is full, the
oldest recording is overwritten. Up to the last 100 recordings are stored in the IED.
The time tagging refers to the activation of the trigger that starts the disturbance
recording. A recording can be trigged by, manual start, binary input and/or from analog
inputs (over-/underlevel trig).
A user-defined name for each of the signals can be set. These names are common for
all functions within the disturbance report functionality.
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The IED flash disk should NOT be used to store any user files. This
might cause disturbance recordings to be deleted due to lack of disk space.
• Saving the data for analog channels with corresponding data for binary signals
• Add relevant data to be used by the Disturbance handling tool (part of PCM 600)
• Compression of the data, which is performed without losing any data accuracy
• Storing the compressed data in a non-volatile memory (flash memory)
The recording files comply with the Comtrade standard IEC 60255-24 and are divided
into three files; a header file (HDR), a configuration file (CFG) and a data file (DAT).
The header file (optional in the standard) contains basic information about the
disturbance, that is, information from the Disturbance report sub-functions(ER, TVR).
The Disturbance handling tool use this information and present the recording in a user-
friendly way.
General:
Analog:
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Binary:
• Signal names
• Status of binary input signals
The data file, which also is mandatory, containing values for each input channel for
each sample in the record (scaled value). The data file also contains a sequence number
and time stamp for each set of samples.
The last 8 recordings, out of maximum 100, are available for transfer to the master.
When the last one is transferred and acknowledged new recordings in the IED will
appear, in the master points of view (even if they already where stored in the IED).
To be able to report 40 analog channels from the IED using IEC 60870-5-103 the first
8 channels are placed in the public range and the next 32 are placed in the private
range. To comply the standard the first 8 must be configured according to table 276.
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The binary signals connected to BxRBDR are reported by polling. The function blocks
include function type and information number.
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14.1.1 Introduction
Pulse counter (PCGGIO) function counts externally generated binary pulses, for
instance pulses coming from an external energy meter, for calculation of energy
consumption values. The pulses are captured by the binary input module and then read
by the function. A scaled service value is available over the station bus. The special
Binary input module with enhanced pulse counting capabilities must be ordered to
achieve this functionality.
The reporting time period can be set in the range from 1 second to 60 minutes and is
synchronized with absolute system time. Interrogation of additional pulse counter
values can be done with a command (intermediate reading) for a single counter. All
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Metering
active counters can also be read by the LON General Interrogation command (GI) or
IEC 61850.
The reported value to station HMI over the station bus contains Identity, Scaled Value
(pulse count x scale), Time, and Pulse Counter Quality. The Pulse Counter Quality
consists of:
The transmission of the counter value by SPA can be done as a service value, that is,
the value frozen in the last integration cycle is read by the station HMI from the
database. PCGGIO updates the value in the database when an integration cycle is
finished and activates the NEW_VAL signal in the function block. This signal can be
connected to an Event function block, be time tagged, and transmitted to the station
HMI. This time corresponds to the time when the value was frozen by the function.
The pulse counter function requires a binary input card, BIMp, that is
specially adapted to the pulse counter function.
Figure 177 shows the pulse counter function block with connections of the inputs and
outputs.
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The BLOCK and READ_VAL inputs can be connected to Single Command blocks,
which are intended to be controlled either from the station HMI or/and the local HMI.
As long as the BLOCK signal is set, the pulse counter is blocked. The signal connected
to READ_VAL performs one additional reading per positive flank. The signal must be
a pulse with a length >1 second.
The BI_PULSE input is connected to the used input of the function block for the
Binary Input Module (BIM).
Each pulse counter function block has four binary output signals that can be connected
to an Event function block for event recording: INVALID, RESTART, BLOCKED
and NEW_VAL. The SCAL_VAL signal can be connected to the IEC Event function
block.
The INVALID signal is a steady signal and is set if the Binary Input Module, where
the pulse counter input is located, fails or has wrong configuration.
The RESTART signal is a steady signal and is set when the reported value does not
comprise a complete integration cycle. That is, in the first message after IED start-up,
in the first message after deblocking, and after the counter has wrapped around during
last integration cycle.
The BLOCKED signal is a steady signal and is set when the counter is blocked. There
are two reasons why the counter is blocked:
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Metering
The NEW_VAL signal is a pulse signal. The signal is set if the counter value was
updated since last report.
The SCAL_VAL signal consists of scaled value (according to parameter Scale), time
and status information.
IEC05000709-2-en.vsd
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14.2.1 Introduction
Outputs from the Measurements (CVMMXN) function can be used to calculate energy
consumption. Active as well as reactive values are calculated in import and export
direction. Values can be read or generated as pulses. Maximum demand power values
are also calculated by the function.
The maximum demand values for active and reactive power are calculated for the set
time tEnergy and the maximum value is stored in a register available over
communication and from outputs MAXPAFD, MAXPARD, MAXPRFD, MAXPRRD
for the active and reactive power forward and reverse direction until reset with input
signal RSTDMD or from the local HMI reset menu.
CVMMXN ETPMMTR
P_INST P
Q_INST Q
STACC
TRUE
RSTACC
FALSE
RSTDMD
FALSE
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IEC09000106 V1 EN
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1MRK511250-UUS B Section 15
Station communication
15.1.1 Introduction
The IED is equipped with double optical Ethernet rear ports for IEC 61850-8-1 station
bus communication. The IEC 61850-8-1 communication is also possible from the
optical Ethernet front port. IEC 61850-8-1 protocol allows intelligent electrical devices
(IEDs) from different vendors to exchange information and simplifies system
engineering. Peer-to-peer communication according to GOOSE is part of the standard.
Disturbance files uploading is provided.
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Station communication
IEC07000124-2-en.vsd
IEC07000124 V2 EN
SP16GGIO
BLOCK
^IN1
^IN2
^IN3
^IN4
^IN5
^IN6
^IN7
^IN8
^IN9
^IN10
^IN11
^IN12
^IN13
^IN14
^IN15
^IN16
IEC07000125-2-en.vsd
IEC07000125 V2 EN
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The function does not have any parameters available in the local HMI or PCM600.
Upon receiving an analog signal at its input, IEC61850 generic communication I/O
functions (MVGGIO) will give the instantaneous value of the signal and the range, as
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Station communication
output values. In the same time, it will send over IEC 61850-8-1 the value, to other
IEC 61850 clients in the substation.
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15.1.6.1 Introduction
Redundant station bus communication according to IEC 62439-3 Edition 1 and IEC
62439-3 Edition 2 are available as options in 670 series IEDs. IEC 62439-3 parallel
redundant protocol is an optional quantity and the selection is made at ordering.
Redundant station bus communication according to IEC 62439-3 uses both port AB
and port CD on the OEM module.
The redundant station bus communication (DUODRV) is configured using the local
HMI. The settings for DUODRV are also visible in PST in PCM600.
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Station communication
Redundancy
Supervision
Duo
Data Data
Switch A Switch B
1 2 1 2
Data
Data
AB CD IED
Configuration OEM
DUODRV PRPSTATUS
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IEC09000757 V1 EN
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Station communication
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IEC07000047 V2 EN
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Station communication
15.3.1 Introduction
The IED can be provided with a function to send and receive signals to and from other
IEDs via the interbay bus. The send and receive function blocks has 16 outputs/inputs
that can be used, together with the configuration logic circuits, for control purposes
within the IED or via binary outputs. When it is used to communicate with other IEDs,
these IEDs have a corresponding Multiple transmit function block with 16 outputs to
send the information received by the command block.
Sixteen signals can be connected and they will then be sent to the multiple command
block in the other IED. The connections are set with the LON Network Tool (LNT).
The output signals, here OUTPUT1 to OUTPUT16, are then available for
configuration to built-in functions or via the configuration logic circuits to the binary
outputs of the IED.
MULTICMDRCV also has a supervision function, which sets the output VALID to 0
if the block does not receive data within set maximum time.
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15.3.3 Design
15.3.3.1 General
The output signals can be of the types Disabled, Steady, or Pulse. The setting is done
on the MODE settings, common for the whole block, from PCM600.
• 0 = Disabled sets all outputs to 0, independent of the values sent from the station
level, that is, the operator station or remote-control gateway.
• 1 = Steady sets the outputs to a steady signal 0 or 1, depending on the values sent
from the station level.
• 2 = Pulse gives a pulse with one execution cycle duration, if a value sent from the
station level is changed from 0 to 1. That means that the configured logic
connected to the command function blocks may not have a cycle time longer than
the execution cycle time for the command function block.
IEC06000007-2-en.vsd
IEC06000007 V2 EN
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Station communication
MULTICMDSND
BLOCK ERROR
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
IEC06000008-2-en.vsd
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Station communication
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1MRK511250-UUS B Section 16
IED hardware
16.1 Overview
Close
Open
xx04000460_ansi.e
ANSI04000460 V1 EN
Figure 189: 1/1 19” case with medium local HMI display.
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1MRK002801-AC-6-670-1.2-PG V1 EN
16.2.1 Overview
Table 303: Basic modules
Module Description
Combined backplane module (CBM) A backplane PCB that carries all internal signals
between modules in an IED. Only the TRM (when
included) is not connected directly to this board.
Universal backplane module (UBM) A backplane PCB that forms part of the IED backplane
with connectors for TRM (when included), ADM etc.
Power supply module (PSM) Including a regulated DC/DC converter that supplies
auxiliary voltage to all static circuits.
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Module Description
Numerical module (NUM) Module for overall application control. All information is
processed or passed through this module, such as
configuration, settings and communication.
Local Human machine interface (LHMI) The module consists of LED:s, an LCD, a push button
keyboard and an ethernet connector used to connect
a PC to the IED.
Transformer input module (TRM) Transformer module that galvanically separates the
internal circuits from the VT and CT circuits. It has 12
analog inputs.
Analog digital conversion module (ADM) Slot mounted PCB with A/D conversion.
16.2.2.1 Introduction
The combined backplane module (CBM) carries signals between modules in an IED.
16.2.2.2 Functionality
The Compact PCI makes 3.3V or 5V signaling in the backplane possible. The CBM
backplane and connected modules are 5V PCI-compatible.
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Some pins on the Compact PCI connector are connected to the CAN bus, to be able to
communicate with CAN based modules.
If a modules self test discovers an error it informs other modules using the Internal Fail
signal IRF.
16.2.2.3 Design
Each PCI connector consists of 2 compact PCI receptacles. The euro connectors are
connected to the CAN bus and used for I/O modules and power supply.
1 2
en05000755.vsd
IEC05000755 V1 EN
Pos Description
1 CAN slots
2 CPCI slots
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en05000756.vsd
IEC05000756 V1 EN
Pos Description
1 CBM
16.2.3.1 Introduction
The Universal Backplane Module (UBM) is part of the IED backplane and is mounted
above the CBM. It connects the Transformer input module (TRM) to the Analog
digital conversion module (ADM) and the Numerical module (NUM).
16.2.3.2 Functionality
The Universal Backplane Module connects the CT and VT analog signals from the
transformer input module to the analog digital converter module. The Numerical
processing module (NUM) is also connected to the UBM. The ethernet contact on the
front panel as well as the internal ethernet contacts are connected to the UBM which
provides the signal path to the NUM board.
16.2.3.3 Design
It connects the Transformer input module (TRM) to the Analog digital conversion
module (ADM) and the Numerical module (NUM).
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• for IEDs with two TRM and two ADM. It has four 48 pin euro connectors and one
96 pin euro connector, see figure ""
The 96 pin euro connector is used to connect the NUM board to the backplane. The 48
pin connectors are used to connect the TRM and ADM.
TRM ADM
NUM
AD Data
X1 X2
X3 X4
RS485
X10 X10
Front Ethernet
LHMI connection
port
Ethernet X5
en05000489.vsd
IEC05000489 V1 EN
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IEC05000758 V1 EN
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en05000759.vsd
IEC05000759 V1 EN
Pos Description
1 UBM
16.2.4.1 Introduction
The Numeric processing module (NUM), is a CPU-module that handles all protection
functions and logic.
For communication with high speed modules, e.g. analog input modules and high
speed serial interfaces, the NUM is equipped with a Compact PCI bus. The NUM is the
compact PCI system card i.e. it controls bus mastering, clock distribution and receives
interrupts.
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16.2.4.2 Functionality
The NUM has one PMC slot (32-bit IEEE P1386.1 compliant) and two PC-MIP slots
onto which mezzanine cards such as SLM or LDCM can be mounted.
To reduce bus loading of the compact PCI bus in the backplane the NUM has one
internal PCI bus for internal resources and the PMC/PC-MIP slots and external PCI
accesses through the backplane are buffered in a PCI/PCI bridge.
The application code and configuration data are stored in flash memory using a flash
file system.
The NUM is equipped with a real time clock. It uses a capacitor for power backup of
the real time clock.
No forced cooling is used on this standard module because of the low power dissipation.
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Compact
Flash Logic
PMC
connector
PC-MIP
connector
UBM
Memory Ethernet
North
bridge
Backplane
PCI-PCI-
connector
bridge
CPU
en04000473.vsd
IEC04000473 V1 EN
16.2.5.1 Introduction
The power supply module is used to provide the correct internal voltages and full
isolation between the terminal and the battery system. An internal fail alarm output is
available.
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IED hardware
16.2.5.2 Design
There are two types of the power supply module. They are designed for different DC
input voltage ranges see table 305. The power supply module contains a built-in, self-
regulated DC/DC converter that provides full isolation between the terminal and the
external battery system.
Block diagram
Input connector
Power
Filter supply
Backplane connector
Supervision
99000516.vsd
IEC99000516 V1 EN
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16.2.7.1 Introduction
The transformer input module is used to galvanically separate and transform the
secondary currents and voltages generated by the measuring transformers. The module
has twelve inputs in different combinations of currents and voltage inputs.
16.2.7.2 Design
The transformer module has 12 input transformers. There are several versions of the
module, each with a different combination of voltage and current input transformers.
Basic versions:
The rated values and channel type, measurement or protection, of the current inputs are
selected at order.
The TRM is connected to the ADM and NUM via the UBM.
For configuration of the input and output signals, refer to section "Signal matrix for
analog inputs SMAI".
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Table 307: TRM - Energizing quantities, rated values and limits for measuring transformer modules
Quantity Rated value Nominal range
Current In = 1 or 5 A (0-1.8) × In at In = 1 A
(0-1.6) × In at In = 5 A
16.2.8.1 Introduction
The Analog/Digital module has twelve analog inputs, 2 PC-MIP slots and 1 PMC slot.
The PC-MIP slot is used for PC-MIP cards and the PMC slot for PMC cards according
to table 308. The OEM card should always be mounted on the ADM board. The UBM
connects the ADM to the transformer input module (TRM).
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16.2.8.2 Design
The Analog digital conversion module input signals are voltage and current from the
transformer module. Shunts are used to adapt the current signals to the electronic
voltage level. To gain dynamic range for the current inputs, two shunts with separate A
\D channels are used for each input current. In this way a 20 bit dynamic range is
obtained with a 16 bit A\D converter.
The A\D converted signals goes through a filter with a cut off frequency of 500 Hz and
are reported to the numerical module (NUM) with 1 kHz at 50 Hz system frequency
and 1,2 kHz at 60 Hz system frequency.
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Channel 1
AD1 Channel 2
Channel 3
Channel 4
AD2
Channel 5
1.2v Channel 6
AD3 Channel 7
Channel 8
Channel 9
AD4 Channel 10
Channel 11
Channel 12
PMC
level shift
PC-MIP
2.5v
PCI to PCI
PC-MIP
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16.2.9.1 Introduction
The binary input module has 16 optically isolated inputs and is available in two
versions, one standard and one with enhanced pulse counting capabilities on the inputs
to be used with the pulse counter function. The binary inputs are freely programmable
and can be used for the input of logical signals to any of the functions. They can also
be included in the disturbance recording and event-recording functions. This enables
extensive monitoring and evaluation of operation of the IED and for all associated
electrical circuits.
16.2.9.2 Design
The Binary input module contains 16 optical isolated binary inputs. The voltage level
of the binary input is selected at order.
For configuration of the input signals, refer to section "Signal matrix for binary inputs
SMBI".
Well defined input high and input low voltages ensure normal operation at battery
supply earth faults, see figure 198 The figure shows the typical operating
characteristics of the binary inputs of the four voltage levels.
I/O events are time stamped locally on each module for minimum time deviance and
stored by the event recorder if present.
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[V]
300
176
144
88
72
38
32
19
17
xx99000517-2_ansi.vsd
ANSI99000517 V2 EN
Operation
Operation uncertain
No operation
IEC99000517-ABC V1 EN
This binary input module communicates with the Numerical module (NUM) via the
CAN-bus on the backplane.
The design of all binary inputs enables the burn off of the oxide of the relay contact
connected to the input, despite the low, steady-state power consumption, which is
shown in figure 199 and 200.
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[mA]
50
55 [ms]
en07000104-3.vsd
IEC07000104 V3 EN
Figure 199: Approximate binary input inrush current for the standard version of BIM.
[mA]
50
5.5 [ms]
en07000105-1.vsd
IEC07000105 V2 EN
Figure 200: Approximate binary input inrush current for the BIM version with
enhanced pulse counting capabilities.
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Backplane connector
Opto isolated input
Process connector
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IEC99000503 V2 EN
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Table 310: BIM - Binary input module with enhanced pulse counting capabilities
Quantity Rated value Nominal range
Binary inputs 16 -
DC voltage, RL 24/30 V RL ± 20%
48/60 V RL ± 20%
125 V RL ± 20%
220/250 V RL ± 20%
Power consumption
24/30 V max. 0.05 W/input -
48/60 V max. 0.1 W/input
125 V max. 0.2 W/input
220/250 V max. 0.4 W/input
Counter input frequency 10 pulses/s max -
Balanced counter input frequency 40 pulses/s max -
Oscillating signal discriminator Blocking settable 1–40 Hz
Release settable 1–30 Hz
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16.2.10.1 Introduction
The binary output module has 24 independent output relays and is used for trip output
or any signaling purpose.
16.2.10.2 Design
The binary output module (BOM) has 24 software supervised output relays. Each pair
of relays have a common power source input to the contacts, see figure 202. This
should be considered when connecting the wiring to the connection terminal on the
back of the IED.
The high closing and carrying current capability allows connection directly to breaker
trip and closing coils. If breaking capability is required to manage fail of the breaker
auxiliary contacts normally breaking the trip coil current, a parallel reinforcement is
required.
For configuration of the output signals, refer to section "Signal matrix for binary
outputs SMBO".
Output module
ANSI_xx00000299.vsd
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Relay
Relay
Relay
Relay
Relay
Process connector
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Relay
Backplane connector
Process connector
Relay Micro-
controller
Relay
Relay
CAN
Relay
Relay
Relay
Relay
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16.2.11.1 Introduction
The static binary output module has six fast static outputs and six change over output
relays for use in applications with high speed requirements.
16.2.11.2 Design
The Static output module (SOM) have 6 normally open (NO) static outputs and 6
electromechanical relay outputs with change over contacts.
• An MCU
• A CAN-driver
• 6 static relays outputs
• 6 electromechanical relay outputs
• A DC/DC converter
• Connectors interfacing
• CAN-bus to backplane CBM
• IO-connectors to binary outputs (2 pcs.)
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Drive &
Read back
Drive &
Read back
Process connector
Drive &
Read back
Drive &
Read back
Drive &
Read back
MCU
CAN-
driver
Drive &
Read back
Drive &
Read back
Process connector
Backplane connector
DC/DC
Drive &
Read back
Internal_fail_n
Drive & AC_fail_n
Read back RCAN_ID
Sync
Drive &
Read back
Reset
Drive &
Read back
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IEC07000115 V1 EN
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IEC09000974-1-en.vsd
IEC09000974 V1 EN
1MRK002802-AB-13-670-1.2-PG-ANSI V1 EN
Table 312: SOM - Static Output Module (reference standard: IEC 61810-2): Static binary outputs
Function of quantity Static binary output trip
Rated voltage 48 - 60 VDC 110 - 250 VDC
Number of outputs 6 6
Impedance open state ~300 kΩ ~810 kΩ
Test voltage across open contact, 1 No galvanic separation No galvanic separation
min
Current carrying capacity:
Continuous 5A 5A
1.0s 10A 10A
Making capacity at capacitive load
with the maximum capacitance of
0.2 μF :
0.2s 30A 30A
1.0s 10A 10A
Table continues on next page
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Table 313: SOM - Static Output module data (reference standard: IEC 61810-2): Electromechanical
relay outputs
Function of quantity Trip and signal relays
Max system voltage 250V AC/DC
Number of outputs 6
Test voltage across open contact, 1 min 1000V rms
Current carrying capacity:
Continuous 8A
1.0s 10A
Making capacity at capacitive load with the
maximum capacitance of 0.2 μF:
0.2s 30A
1.0s 10A
Breaking capacity for DC with L/R ≤ 40ms 48V / 1A
110V / 0.4A
125V / 0.35A
220V / 0.2A
250V / 0.15A
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16.2.12.1 Introduction
The milli-ampere input module is used to interface transducer signals in the –20 to +20
mA range from for example OLTC position, temperature or pressure transducers. The
module has six independent, galvanically separated channels.
16.2.12.2 Design
The Milliampere Input Module has six independent analog channels with separated
protection, filtering, reference, A/D-conversion and optical isolation for each input
making them galvanically isolated from each other and from the rest of the module.
For configuration of the input signals, refer to section "Signal matrix for mA inputs
SMMI".
The analog inputs measure DC current in the range of +/- 20 mA. The A/D converter
has a digital filter with selectable filter frequency. All inputs are calibrated separately
The filter parameters and the calibration factors are stored in a non-volatile memory on
the module.
The calibration circuitry monitors the module temperature and starts an automatical
calibration procedure if the temperature drift is outside the allowed range. The module
communicates, like the other I/O-modules on the serial CAN-bus.
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Process connector
A/D Converter Opto-
Protection isolation
& filter
Volt-ref DC/DC
Backplane connector
A/D Converter Opto-
Protection isolation
& filter
Volt-ref DC/DC
CAN
Memory Micro-
controller
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IEC99000504 V1 EN
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16.2.13.1 Introduction
The optical fast-ethernet module is used to connect an IED to the communication buses
(like the station bus) that use the IEC 61850-8-1 protocol (port A, B). The module has
two optical ports with ST connectors.
16.2.13.2 Functionality
The Optical Ethernet module (OEM) is used when communication systems according
to IEC61850–8–1 or phasor data over IEEE C37.118 have been implemented.
16.2.13.3 Design
The Optical Ethernet module (OEM) is a PMC card and mounted as a mezzanine card
on the ADM. The OEM is a 100base Fx module and available as a single channel or
double channel unit.
PCI - bus Connector
100Base-FX
EEPROM
Transmitter ST fiber optic
Ethernet Controller connectors
100Base-FX
Receiver
100Base-FX
Transmitter
ID chip ST fiber optic
Ethernet Controller
connectors
100Base-FX
EEPROM
IO - bus Connector Receiver
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ID chip
Receiver
IO bus
LED
Ethernet cont.
25MHz oscillator
Transmitter
Receiver
LED
PCI bus
Ethernet cont. PCI to PCI
bridge
25MHz oscillator
Transmitter
en05000472.vsd
IEC05000472 V1 EN
16.2.14.1 Introduction
In order to receive GPS signals from the satellites orbiting the earth a GPS antenna
with applicable cable must be used.
16.2.14.2 Design
The antenna with a console for mounting on a horizontal or vertical flat surface or on
an antenna mast. See figure 210
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Technical reference manual
Section 16 1MRK511250-UUS B
IED hardware
1 6
4 7
xx04000155.vsd
IEC04000155 V2 EN
where:
1 GPS antenna
2 TNC connector
3 Console, (2'6.7"x4'11')
4 Mounting holes about 1/5"
5 Tab for securing of antenna cable
6 Vertical mounting position
7 Horizontal mounting position
Antenna cable
Use a 50 ohm coaxial cable with a male TNC connector in the antenna end and a male
SMA connector in the receiver end to connect the antenna to GTM. Choose cable type
and length so that the total attenuation is max. 26 dB at 1.6 GHz.
Make sure that the antenna cable is not charged when connected to the
antenna or to the receiver. Short-circuit the end of the antenna cable
with some metal device, when first connected to the antenna. When the
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1MRK511250-UUS B Section 16
IED hardware
16.2.15.1 Introduction
The IRIG-B time synchronizing module is used for accurate time synchronizing of the
IED from a station clock.
Electrical (BNC) and optical connection (ST) for 0XX and 12X IRIG-B support.
16.2.15.2 Design
The IRIG-B module have two inputs. One input is for the IRIG-B that can handle both
a pulse-width modulated signal (also called unmodulated) and an amplitude modulated
signal (also called sine wave modulated). The other is an optical input type ST for PPS
to synchronize the time between several protections.
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Section 16 1MRK511250-UUS B
IED hardware
32 MHz FPGA
connector
PCI-con
OPTO_INPUT
ST-
PCI-bus
Registers
PCI-Controller
PCI-con
4 mm barrier
IRIG- IRIG_INPUT
connector
Amplitude
ID-chip Decoder
BNC-
modulator
Capture1 Isolated
ZXING
receiver
Zero-cross
Capture2 detector
MPPS
IO-con
PPS
TSU Isolated
DC/DC
CMPPS 5 to +- 12V
en06000303.vsd
IEC06000303 V1 EN
A1
DC//DC
ST
C
Y2
C
C
A1
C
O
T
3
2
O
en06000304.vsd
IEC06000304 V1 EN
Figure 212: IRIG-B PC-MIP board with top left ST connector for PPS 820 nm
multimode fibre optic signal input and lower left BNC connector for IRIG-
B signal input
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IED hardware
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Section 16 1MRK511250-UUS B
IED hardware
16.3 Dimensions
A
D
B C
xx08000164.vsd
IEC08000164 V1 EN
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1MRK511250-UUS B Section 16
IED hardware
K
F
G
H J
xx08000166.vsd
IEC08000166 V1 EN
Figure 214: Case without rear cover with 19” rack mounting kit
Case size A B C D E F G H J K
(inches)
6U, 1/1 x 19” 10.47 17.65 7.92 9.96 16.94 7.50 16.86 18.31 7.39 19.00
The H and K dimensions are defined by the 19” rack mounting kit
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Section 16 1MRK511250-UUS B
IED hardware
A
D
B
C
xx08000163.vsd
IEC08000163 V1 EN
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Technical reference manual
1MRK511250-UUS B Section 16
IED hardware
K
F
G
J
H
xx08000165.vsd
IEC08000165 V1 EN
Figure 216: Case with rear cover and 19” rack mounting kit
xx05000503.vsd
IEC05000503 V1 EN
Case size A B C D E F G H J K
(inches)
6U, 1/1 x 19” 10.47 17.65 9.53 10.07 16.86 7.50 16.86 18.31 9.00 19.00
The H and K dimensions are defined by the 19” rack mounting kit.
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Technical reference manual
Section 16 1MRK511250-UUS B
IED hardware
A C
B
E
D
xx08000162.vsd
IEC08000162 V1 EN
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Technical reference manual
1MRK511250-UUS B Section 16
IED hardware
B
E
C
D
en04000471.vsd
IEC04000471 V1 EN
16.4.1.1 Overview
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Technical reference manual
Section 16 1MRK511250-UUS B
IED hardware
• 1/1 x 19”
Only a single case can be mounted in each cut-out on the cubicle panel, for class IP54
protection.
490
Technical reference manual
1MRK511250-UUS B Section 16
IED hardware
xx08000161.vsd
IEC08000161 V1 EN
491
Technical reference manual
Section 16 1MRK511250-UUS B
IED hardware
16.4.2.1 Overview
All IED sizes can be mounted in a standard 19” cubicle rack by using the for each size
suited mounting kit which consists of two mounting angles and fastening screws for
the angles.
Please note that the separately ordered rack mounting kit for side-by-
side mounted IEDs, or IEDs together with RHGS cases, is to be
selected so that the total size equals 19”.
When mounting the mounting angles, be sure to use screws that follows
the recommended dimensions. Using screws with other dimensions
than the original may damage the PCBs inside the IED.
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1MRK511250-UUS B Section 16
IED hardware
1a
1b
xx08000160.vsd
IEC08000160 V1 EN
493
Technical reference manual
Section 16 1MRK511250-UUS B
IED hardware
16.4.3.1 Overview
All case sizes, 1/1 x 19”, can be wall mounted. It is also possible to mount the IED on
a panel or in a cubicle.
When mounting the side plates, be sure to use screws that follows the
recommended dimensions. Using screws with other dimensions than
the original may damage the PCBs inside the IED.
If fiber cables are bent too much, the signal can be weakened. Wall
mounting is therefore not recommended for communication modules
with fiber connection; Optical Ethernet module (OEM).
3
4
2
6
xx04000453.vs d
DOCUMENT127716-IMG2265 V1 EN
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Technical reference manual
1MRK511250-UUS B Section 16
IED hardware
The IED can be equipped with a rear protection cover, which is recommended to use
with this type of mounting. See figure 223.
To reach the rear side of the IED, a free space of 3.2 inches is required on the unhinged
side.
3
1
3.2" 2
(80 mm)
ANSI_en06000135.vsd
ANSI06000135 V1 EN
Figure 223: How to reach the connectors on the rear side of the IED.
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Technical reference manual
Section 16 1MRK511250-UUS B
IED hardware
16.5.1 Enclosure
Table 318: Case
Material Steel sheet
Front plate Steel sheet profile with cut-out for HMI
Surface treatment Aluzink preplated steel
Finish Light grey (RAL 7035)
Table 319: Water and dust protection level according to IEC 60529
496
Technical reference manual
1MRK511250-UUS B Section 16
IED hardware
90-250 V DC ± 20%
Interruption
interval
0–50 ms No restart
0–∞ s Correct behaviour
at power down
Restart time <300 s
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Section 16 1MRK511250-UUS B
IED hardware
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1MRK511250-UUS B Section 16
IED hardware
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500
1MRK511250-UUS B Section 17
Labels
Section 17 Labels
2
3
6
6 5
7
xx06000574.ep
IEC06000574 V1 EN
501
Technical reference manual
Section 17 1MRK511250-UUS B
Labels
IEC06000577-CUSTOMER-SPECIFIC V1 EN
IEC06000576-POS-NO V1 EN
502
Technical reference manual
1MRK511250-UUS B Section 17
Labels
4
en06000573.ep
IEC06000573 V1 EN
1 Warning label
2 Caution label
3 Class 1 laser product label
IEC06000575 V1 EN
4 Warning label
503
Technical reference manual
504
1MRK511250-UUS B Section 18
Connection diagrams
This chapter includes diagrams of the IED with all slot, terminal block and optical
connector designations. It is a necessary guide when making electrical and optical
connections to the IED.
505
Technical reference manual
Section 18 1MRK511250-UUS B
Connection diagrams
1MRK002802-AB-1-670-1.2-PG-ANSI V1 EN
506
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1MRK511250-UUS B Section 18
Connection diagrams
1MRK002802-AB-2-670-1.2-PG-ANSI V1 EN
507
Technical reference manual
Section 18 1MRK511250-UUS B
Connection diagrams
1MRK002802-AB-3-670-1.2-PG-ANSI V1 EN
508
Technical reference manual
1MRK511250-UUS B Section 18
Connection diagrams
1MRK002802-AB-4-670-1.2-PG-ANSI V1 EN
509
Technical reference manual
Section 18 1MRK511250-UUS B
Connection diagrams
1MRK002802-AB-5-670-1.2-ANSI V1 EN
510
Technical reference manual
1MRK511250-UUS B Section 18
Connection diagrams
1MRK002802-AB-6-670-1.2-ANSI V1 EN
511
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Section 18 1MRK511250-UUS B
Connection diagrams
1MRK002802-AB-7-670-1.2-ANSI V1 EN
512
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1MRK511250-UUS B Section 18
Connection diagrams
1MRK002802-AB-8-670-1.2-ANSI V1 EN
513
Technical reference manual
Section 18 1MRK511250-UUS B
Connection diagrams
1MRK002802-AB-9-670-1.2-ANSI V1 EN
514
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1MRK511250-UUS B Section 18
Connection diagrams
1MRK002802-AB-10-670-1.2-ANSI V1 EN
515
Technical reference manual
Section 18 1MRK511250-UUS B
Connection diagrams
1MRK002802-AB-11-670-1.2-ANSI V1 EN
516
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1MRK511250-UUS B Section 18
Connection diagrams
1MRK002802-AB-12-670-1.2-ANSI V1 EN
517
Technical reference manual
Section 18 1MRK511250-UUS B
Connection diagrams
1MRK002802-AB-13-670-1.2-ANSI V1 EN
518
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1MRK511250-UUS B Section 18
Connection diagrams
1MRK002802-AB-14-670-1.2-ANSI V1 EN
519
Technical reference manual
Section 18 1MRK511250-UUS B
Connection diagrams
1MRK002802-AB-15-670-1.2-ANSI V1 EN
520
Technical reference manual
1MRK511250-UUS B Section 19
Inverse time characteristics
19.1 Application
xx05000129_ansi.vsd
ANSI05000129 V1 EN
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Section 19 1MRK511250-UUS B
Inverse time characteristics
Stage 3
Time
Stage 2 Stage 2
Fault point
position
en05000130.vsd
IEC05000130 V1 EN
Time
Fault point
position
en05000131.vsd
IEC05000131 V1 EN
The inverse time characteristic makes it possible to minimize the fault clearance time
and still assure the selectivity between protections.
To assure selectivity between protections there must be a time margin between the
operation time of the protections. This required time margin is dependent of following
factors, in a simple case with two protections in series:
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1MRK511250-UUS B Section 19
Inverse time characteristics
A1 B1
Feeder
51 51
Time axis
en05000132_ansi.vsd
ANSI05000132 V1 EN
where:
t=0 is The fault occurs
t=t1 is Protection B1 trips
In the case protection B1 shall operate without any intentional delay (instantaneous).
When the fault occurs the protections pickup to detect the fault current. After the time
t1 the protection B1 send a trip signal to the circuit breaker. The protection A1 starts its
delay timer at the same time, with some deviation in time due to differences between
the two protections. There is a possibility that A1 will start before the trip is sent to the
B1 circuit breaker. At the time t2 the circuit breaker B1 has opened its primary contacts
and thus the fault current is interrupted. The breaker time (t2 - t1) can differ between
different faults. The maximum opening time can be given from manuals and test
protocols. Still at t2 the timer of protection A1 is active. At time t3 the protection A1 is
reset, that is the timer is stopped.
In most applications it is required that the times shall reset as fast as possible when the
current fed to the protection drops below the set current level, the reset time shall be
minimized. In some applications it is however beneficial to have some type of delayed
reset time of the overcurrent function. This can be the case in the following applications:
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Technical reference manual
Section 19 1MRK511250-UUS B
Inverse time characteristics
• If there is a risk of intermittent faults. If the current IED, close to the faults, picks
up and resets there is a risk of unselective trip from other protections in the system.
• Delayed resetting could give accelerated fault clearance in case of automatic
reclosing to a permanent fault.
• Overcurrent protection functions are sometimes used as release criterion for other
protection functions. It can often be valuable to have a reset delay to assure the
release function.
If current in any phase exceeds the set pickup current value (here internal signal
pickupValue), a timer, according to the selected operating mode, is started. The
component always uses the maximum of the three phase current values as the current
level used in timing calculations.
In case of definite time-lag mode the timer will run constantly until the time is reached
or until the current drops below the reset value (pickup value minus the hysteresis) and
the reset time has elapsed.
For definite time delay curve ANSI/IEEE Definite time or IEC Definite time are chosen.
The general expression for inverse time curves is according to equation 60.
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Inverse time characteristics
æ ö
ç ÷
t [s ] = ç + B ÷ × td
A
ç P ÷
çç æç ö
i
÷ -C ÷÷
è è Pickupn ø ø
EQUATION1640 V1 EN (Equation 60)
where:
p, A, B, C are constants defined for each curve type,
Pickupn is the set pickup current for step n,
td is set time multiplier for step n and
i is the measured current.
For inverse time characteristics a time will be initiated when the current reaches the set
pickup level. From the general expression of the characteristic the following can be seen:
æ P
ö
( top - B × td ) × çç æçè Pickupn
i ö
÷
ø
-C÷
÷
= A × td
è ø
EQUATION1642 V1 EN (Equation 61)
where:
top is the operating time of the protection
The time elapsed to the moment of trip is reached when the integral fulfils according to
equation 62, in addition to the constant time delay:
t
ææ i ö
P
ö
òçç ÷
ç è Pickupn ø
0è
- C ÷ × dt ³ A × td
÷
ø
EQUATION1643 V1 EN (Equation 62)
For the numerical protection the sum below must fulfil the equation for trip.
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Technical reference manual
Section 19 1MRK511250-UUS B
Inverse time characteristics
n æ æ i ( j ) öP ö
Dt × å çç
ç Pickupn ø
j =1 è è
÷ - C ÷ ³ A × td
÷
ø
EQUATION1644 V1 EN (Equation 63)
where:
j=1 is the first protection execution cycle when a fault has been
detected, that is, when
i
>1
Pickupn
EQUATION1646 V1 EN
For inverse time operation, the inverse time characteristic is selectable. Both the IEC
and ANSI/IEEE standardized inverse time characteristics are supported.
For the IEC curves there is also a setting of the minimum time-lag of operation, see
figure 228.
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1MRK511250-UUS B Section 19
Inverse time characteristics
Operate
time
tMin
Current
IMin
IEC05000133-3-en.vsd
IEC05000133 V2 EN
In order to fully comply with IEC curves definition setting parameter tMin shall be set
to the value which is equal to the operating time of the selected IEC inverse time curve
for measured current of twenty times the set current pickup value. Note that the
operating time value is dependent on the selected setting value for time multiplier k.
In addition to the ANSI and IEC standardized characteristics, there are also two
additional inverse curves available; the RI curve and the RD curve.
The RI inverse time curve emulates the characteristic of the electromechanical ASEA
relay RI. The curve is described by equation 65:
æ ö
ç td ÷
t [s ] = ç ÷
çç 0.339 - 0.235 × Pickupn ÷÷
è i ø
EQUATION1647 V1 EN (Equation 65)
where:
Pickupn is the set pickup current for step n
td is set time multiplier for step n
i is the measured current
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Technical reference manual
Section 19 1MRK511250-UUS B
Inverse time characteristics
The RD inverse curve gives a logarithmic delay, as used in the Combiflex protection
RXIDG. The curve enables a high degree of selectivity required for sensitive residual
ground-fault current protection, with ability to detect high-resistive ground faults. The
curve is described by equation 66:
æ i ö
[ ]
t s = 5.8 - 1.35 × ln ç ÷
è td × Pickupn ø
EQUATION1648 V1 EN (Equation 66)
where:
Pickupn is the set pickup current for step n,
td is set time multiplier for step n and
i is the measured current
If the curve type programmable is chosen, the user can make a tailor made inverse time
curve according to the general equation 67.
æ ö
ç ÷
t [s ] = ç + B ÷ × td
A
ç P ÷
çç æç ö
i
÷ -C ÷÷
è è Pickupn ø ø
EQUATION1640 V1 EN (Equation 67)
Also the reset time of the delayed function can be controlled. There is the possibility to
choose between three different reset time-lags.
• Instantaneous Reset
• IEC Reset
• ANSI Reset.
If instantaneous reset is chosen the timer will be reset directly when the current drops
below the set pickup current level minus the hysteresis.
If IEC reset is chosen the timer will be reset after a set constant time when the current
drops below the set pickup current level minus the hysteresis.
If ANSI reset time is chosen the reset time will be dependent of the current after fault
clearance (when the current drops below the pickup current level minus the hysteresis).
The timer will reset according to equation 68.
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1MRK511250-UUS B Section 19
Inverse time characteristics
æ ö
ç tr
÷
t [s] = ç ÷ × td
ç æ i ö2 ÷
çç ÷ -1 ÷
è è pickupn ø ø
ANSIEQUATION1197 V1 EN (Equation 68)
where:
The set value tr is the reset time in case of zero current after fault clearance.
For the definite time delay characteristics the possible reset time settings are
instantaneous and IEC constant time reset.
For ANSI inverse time delay characteristics all three types of reset time characteristics
are available; instantaneous, IEC constant time reset and ANSI current dependent reset
time.
For IEC inverse time delay characteristics the possible delay time settings are
instantaneous and IEC set constant time reset).
For the programmable inverse time delay characteristics all three types of reset time
characteristics are available; instantaneous, IEC constant time reset and ANSI current
dependent reset time. If the current dependent type is used settings pr, tr and cr must be
given, see equation 69:
æ ö
ç tr
÷
t [s] = ç ÷ × td
ç æ i ö pr ÷
çç ÷ - cr ÷
è è pickupn ø ø
ANSIEQUATION1198 V1 EN (Equation 69)
For RI and RD inverse time delay characteristics the possible delay time settings are
instantaneous and IEC constant time reset.
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Technical reference manual
Section 19 1MRK511250-UUS B
Inverse time characteristics
definite time delay. Thus, if only the inverse time delay is required, it is
of utmost importance to set the definite time delay for that stage to zero.
æ A ö
t = ç P + B ÷ × td
ç ( I - 1) ÷
è ø
EQUATION1651 V1 EN
Reset characteristic:
tr
t = × td
(I 2
-1 )
EQUATION1652 V1 EN
I = Imeasured/Iset
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Technical reference manual
1MRK511250-UUS B Section 19
Inverse time characteristics
æ A ö
t = ç P ÷ × td
ç ( I - 1) ÷
è ø
EQUATION1653 V1 EN
I = Imeasured/Iset
Time delay to reset, IEC inverse time (0.000-60.000) s ± 0.5% of set time ± 10
ms
IEC Normal Inverse A=0.14, P=0.02 IEC 60255-151, 5% + 40
ms
IEC Very inverse A=13.5, P=1.0
IEC Inverse A=0.14, P=0.02
IEC Extremely inverse A=80.0, P=2.0
IEC Short time inverse A=0.05, P=0.04
IEC Long time inverse A=120, P=1.0
Programmable characteristic td = (0.05-999) in steps of 0.01
Operate characteristic: A=(0.005-200.000) in steps of
0.001
æ A ö B=(0.00-20.00) in steps of 0.01
t = ç P + B ÷ × td C=(0.1-10.0) in steps of 0.1
ç (I - C ) ÷ P=(0.005-3.000) in steps of 0.001
è ø
TR=(0.005-100.000) in steps of
EQUATION1654 V1 EN
0.001
Reset characteristic: CR=(0.1-10.0) in steps of 0.1
PR=(0.005-3.000) in steps of
TR 0.001
t = × td
(I PR
- CR )
EQUATION1655 V1 EN
I = Imeasured/Iset
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Technical reference manual
Section 19 1MRK511250-UUS B
Inverse time characteristics
I = Imeasured/Iset
æ I ö
t = 5.8 - ç 1.35 × In ÷
è td ø
EQUATION1657 V1 EN
I = Imeasured/Iset
532
Technical reference manual
1MRK511250-UUS B Section 19
Inverse time characteristics
V = Vmeasured
533
Technical reference manual
Section 19 1MRK511250-UUS B
Inverse time characteristics
V = Vmeasured
V = Vmeasured
534
Technical reference manual
1MRK511250-UUS B Section 19
Inverse time characteristics
A070750 V2 EN
535
Technical reference manual
Section 19 1MRK511250-UUS B
Inverse time characteristics
A070751 V2 EN
536
Technical reference manual
1MRK511250-UUS B Section 19
Inverse time characteristics
A070752 V2 EN
537
Technical reference manual
Section 19 1MRK511250-UUS B
Inverse time characteristics
A070753 V2 EN
538
Technical reference manual
1MRK511250-UUS B Section 19
Inverse time characteristics
A070817 V2 EN
539
Technical reference manual
Section 19 1MRK511250-UUS B
Inverse time characteristics
A070818 V2 EN
540
Technical reference manual
1MRK511250-UUS B Section 19
Inverse time characteristics
A070819 V2 EN
541
Technical reference manual
Section 19 1MRK511250-UUS B
Inverse time characteristics
A070820 V2 EN
542
Technical reference manual
1MRK511250-UUS B Section 19
Inverse time characteristics
A070821 V2 EN
543
Technical reference manual
Section 19 1MRK511250-UUS B
Inverse time characteristics
A070822 V2 EN
544
Technical reference manual
1MRK511250-UUS B Section 19
Inverse time characteristics
A070823 V2 EN
545
Technical reference manual
Section 19 1MRK511250-UUS B
Inverse time characteristics
A070824 V2 EN
546
Technical reference manual
1MRK511250-UUS B Section 19
Inverse time characteristics
A070825 V2 EN
547
Technical reference manual
Section 19 1MRK511250-UUS B
Inverse time characteristics
A070826 V2 EN
548
Technical reference manual
1MRK511250-UUS B Section 19
Inverse time characteristics
A070827 V2 EN
549
Technical reference manual
Section 19 1MRK511250-UUS B
Inverse time characteristics
GUID-ACF4044C-052E-4CBD-8247-C6ABE3796FA6 V1 EN
550
Technical reference manual
1MRK511250-UUS B Section 19
Inverse time characteristics
GUID-F5E0E1C2-48C8-4DC7-A84B-174544C09142 V1 EN
551
Technical reference manual
Section 19 1MRK511250-UUS B
Inverse time characteristics
GUID-A9898DB7-90A3-47F2-AEF9-45FF148CB679 V1 EN
552
Technical reference manual
1MRK511250-UUS B Section 19
Inverse time characteristics
GUID-35F40C3B-B483-40E6-9767-69C1536E3CBC V1 EN
553
Technical reference manual
Section 19 1MRK511250-UUS B
Inverse time characteristics
GUID-B55D0F5F-9265-4D9A-A7C0-E274AA3A6BB1 V1 EN
554
Technical reference manual
1MRK511250-UUS B Section 20
Glossary
Section 20 Glossary
AC Alternating current
ACT Application configuration tool within PCM600
A/D converter Analog-to-digital converter
ADBS Amplitude deadband supervision
ADM Analog digital conversion module, with time synchronization
AI Analog input
ANSI American National Standards Institute
AR Autoreclosing
AngNegRes Setting parameter/ZD/
ArgDirAngDir Setting parameter/ZD/
ASCT Auxiliary summation current transformer
ASD Adaptive signal detection
AWG American Wire Gauge standard
BBP Busbar protection
BFP Breaker failure protection
BI Binary input
BIM Binary input module
BOM Binary output module
BOS Binary outputs status
BR External bistable relay
BS British Standards
BSR Binary signal transfer function, receiver blocks
BST Binary signal transfer function, transmit blocks
C37.94 IEEE/ANSI protocol used when sending binary signals
between IEDs
555
Technical reference manual
Section 20 1MRK511250-UUS B
Glossary
CAN Controller Area Network. ISO standard (ISO 11898) for serial
communication
CB Circuit breaker
CBM Combined backplane module
CCITT Consultative Committee for International Telegraph and
Telephony. A United Nations-sponsored standards body
within the International Telecommunications Union.
CCM CAN carrier module
CCVT Capacitive Coupled Voltage Transformer
Class C Protection Current Transformer class as per IEEE/ ANSI
CMPPS Combined megapulses per second
CMT Communication Management tool in PCM600
CO cycle Close-open cycle
Codirectional Way of transmitting G.703 over a balanced line. Involves two
twisted pairs making it possible to transmit information in
both directions
COMTRADE Standard Common Format for Transient Data Exchange
format for Disturbance recorder according to IEEE/ANSI
C37.111, 1999 / IEC60255-24
Contra-directional Way of transmitting G.703 over a balanced line. Involves four
twisted pairs, two of which are used for transmitting data in
both directions and two for transmitting clock signals
CPU Central processor unit
CR Carrier receive
CRC Cyclic redundancy check
CROB Control relay output block
CS Carrier send
CT Current transformer
CVT or CCVT Capacitive voltage transformer
DAR Delayed autoreclosing
DARPA Defense Advanced Research Projects Agency (The US
developer of the TCP/IP protocol etc.)
DBDL Dead bus dead line
DBLL Dead bus live line
DC Direct current
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Technical reference manual
1MRK511250-UUS B Section 20
Glossary
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Technical reference manual
Section 20 1MRK511250-UUS B
Glossary
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Technical reference manual
1MRK511250-UUS B Section 20
Glossary
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Technical reference manual
Section 20 1MRK511250-UUS B
Glossary
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Technical reference manual
1MRK511250-UUS B Section 20
Glossary
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Technical reference manual
Section 20 1MRK511250-UUS B
Glossary
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Technical reference manual
1MRK511250-UUS B Section 20
Glossary
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Contact us
ABB Inc.
3450 Harvester Road
Burlington, ON L7N 3W5, Canada
Phone Toll Free: 1-800-HELP-365,
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