Simulation of a Dual-Mode

EDGE /W-CDMA Receiver

with Digital IF Down Conversion

In this paper a dual-mode receiver, emphasizing the digital IF portion, is

simulated. The simulation includes 3GPP and EDGE signal sources and the
front end of the receiver including the digital down conversion. The dual-mode
receiver, implements an efficient IF stage using a near zero IF methodology,
leveraging a novel design [1]. Using an integrated design platform the Agilent
Technologies Advance Design System (ADS), which includes 3G design
libraries, communication system transceiver blocks and digital filter design
tool, the complex 3G sources and analyzers (measurement sinks) are used to
test the digital IF.
The results from the inclusion of a digital IF stage is analyzed in frequency and
time domain and is quantified by the error vector magnitude (EVM)
measurement.

[1] M. Jian, W. H. Yung, B. Songrong “An Efficient IF Architecture for Dual-Mode GSM/W-CDMA
Receiver of a Software Radio”, IEEE International Workshop on Mobile Multimedia Communications,
San Diego, USA, November 1999.
 Agenda
• Motivation
• Down-conversion alternatives
• Mixed-signal simulations
• 3G signal generation
• Digital IF architecture
• Measurement
• Setups
• Simulation results
• Conclusion

This paper shows the feasibility of simulating a digital IF architecture useful

for both W-CDMA (3GPP) and GSM/EDGE receivers in the PCS band (1.9
GHz).
The paper begins with a review of the growing demand for multi-mode, multi-
standard phones, and presents the case for a wideband front end and digital IF
as an efficient, economical, and technical incentive for multi-mode receiver
design.
Agilent Advanced Design System (ADS) software is used as a platform for
simulation of mixed-signal formats involved in simulation of the digital IF
portion. The mixed-signal formats include:
- RF representation of 3GPP and EDGE signals
- analog representation of a sampled IF signal
- fixed and floating point representation of baseband signals
A baseline simulation setup is used to investigate the effect of the digital IF
portion. This setup, after it is verified, is used in a blocking error simulation.
The EVM measurement helps gauge the impact of quantization errors in the IF
portion and the overall signal quality.
 Motivation
• Many existing worldwide air interface standards
• Wide range of future proposals
• Multi-band, multi-mode, multi-standards for mobile
phones and wireless LAN
INTEGRATION IS THE TREND!

The first generation (1G) cellular systems were introduced in the early to mid
1980s, and were based around analog radio interfaces. As subscriber growth
increased, the need for more capacity grew. This resulted in the need for
second generation cellular systems that could provide additional capacity.
GSM, IS-136, and IS95 are examples of 2G, or second generation systems.
The need to provide higher data rates over wireless systems is the driving
factor behind 3G. As an interim step to 3G , 2.5G provides GSM and IS-136
with a path to support the basic 3G data rate of 384 Kbps.
Today, most of the 1G, 2G, 2.5G, and 3G technologies have a share of the
market and there is a strong market need for integration. In addition, there is a
trend to integrate other wireless technologies such as GPS and WLAN with the
wireless handsets.
The transceiver equipment of base stations and mobiles should at least support
portions of these evolving standards as well as existing ones for backward
compatibility. Furthermore, realization of small size components and low
power consumption is driving design components toward multi-mode
compatibility.
 Existing and Emerging Multi-Format Phones
Wireless Wireless Multi-Format Multi-Format Multi-Format Phones
Technologies Technologies Phones Today Phones Likely in Possible in Future
in Use Today Possible in Future
Future
PDC § W-CDMA § PDC / PHS § PDC / W-CDMA § IS-95 / IS-2000 SR1 / IS-2000 SR3
Japan PHS § IS-2000 SR1 § IS-95 / IS-2000 SR1 § W-CDMA / IS-2000 SR1 /
- 800 MHz
- 1.5 GHz (PDC) IS-95 § 1XEV § IS-95 / IS-2000 SR1 / 1XEV IS-2000 SR3
- 1.9 GHz (PHS) § W-CDMA / IS-2000 SR1 § IS-2000 SR1 / IS-2000 SR3 / 1XEV

GSM/EGPRS/W-CDMA
- 2.1 GHz

Korea GSM/EGPRS/W-CDMA
IS-95 § IS-2000 SR1
1XEV
§ IS-95 / IS-2000 SR1
IS-95 / IS-2000 SR1 / 1XEV
§ IS-95 / IS-2000 SR1 / IS-2000 SR3
IS-2000 SR1 / IS-2000 SR3 /

GSM/W-CDMA/TDD
- 800 MHz § § §

GSM/W-CDMA/TDD
- 1.7 GHz § W-CDMA § IS-2000 SR1 / W-CDMA W-CDMA
- 2.1 GHz § IS-2000 SR1 / IS-2000 SR3 / 1XEV

GSM/EGPRS/TDD
GSM/EGPRS/TDD
GSM § W-CDMA § GSM / GPRS § GSM / EGPRS § GSM / EGPRS / W-CDMA
Europe GPRS § TDD W-CDMA § GSM / W-CDMA § GSM / W-CDMA / TDD W-CDMA
- 450 MHz
§ EGPRS § W-CDMA / TDD W-CDMA § GSM / EGPRS / TDD W-CDMA

IS2000/SR2/1XEV
- 900 MHz
§ GSM / TDD W-CDMA § GSM / EGPRS / W-CDMA / TDD

IS2000/SR2/1XEV
- 1.8 GHz
- 2.1 GHz W-CDMA
GSM § W-CDMA § GSM / IS-95 § GSM / W-CDMA / TDD*
China IS-95 § TDD* § GSM / W-CDMA § GSM / IS-95 / IS-2000 SR1
- 800 MHz
- 900 MHz (LAS, TD- § GSM / TDD*
- 1.8 GHz SCDMA)
- 2.1 GHz § GPRS
§ IS-2000 SR1
IS-136 § GPRS § GSM / IDEN § GSM / IS-136 § GSM / IDEN / W-CDMA
U.S. GSM § EGPRS / IS-136 § IS-95 / AMPS § GSM / GPRS § IS-136 / GSM / EGPRS
- 800 MHz
- 1.9 GHz IS-95 § IS-2000 SR1 § IS-136 / AMPS § IS-136 / EGPRS § IS-2000 SR1 / W-CDMA
- 700 MHz AMPS § 1XEV § GSM / AMPS § IS-95 / IS2-000 SR1 § IS-2000 SR1 / 1Xtreme /
(future) IDEN § W-CDMA § IS-95 / IS-2000 SR1 / 1XEV W-CDMA
§ IS-2000 SR1 / 1XEV / W-CDMA
§ IS-136 / EGPRS / W-CDMA

A look at the evolutionary path from 2G to 3G shows the likely migration path for
service providers of each major format. The global 3G direct spread seems to have the
most potential for attracting the most subscribers as the GSM and personal digital
cellular (PDC) operators transition. The SR3 (spread rate 3) multi-carrier standard
should receive the subscribers from operators that are looking for backward
compatibility to their CDMA2000 SR1 or IS2000 systems.
These migrations combined with the need for backward compatibility has spawned the
emergence of multi-standard radios.
Multi-mode/universal air interfaces imply different data rates, and requirements:
FDD/W-CDMA -- spectral efficiency and multi-service flexibility
TDD/W-CDMA -- asymmetrical service for internet, video conference
GSM/EDGE -- compatibility with existing 2G service and higher rates via the
General Packet Radio Service (GPRS)
W-CDMA/EDGE/GSM & IS2000/SR2/1xEV -- global roaming
The future growth of wireless communications will be driven by the cost-effectiveness
of infrastructure equipment and the desirability of end-user services and functions.
Carriers compete for the same customer base and their success will be directly related
to their ability to provide cost effective, value-added features and benefits. Multi-mode
capability allows providers to service legacy customers as well as offer new advanced
services.
Agenda
• Motivation
• Down-conversion alternatives
• Mixed-signal simulations
• 3G signal generation
• Digital IF architecture
• Measurement
• Setups
• Simulation results
• Conclusion
 Down Conversion Options
• Classic IQ Superheterodyne SW
RF IF Analog
LPF A/D
DSP
LPF
AGC I
• IF filter size and power
MIX
sin/cos Baseband
SAW LNA Q
• Difficult to reconfigure LO One+ stages
LPF A/D LPF
IF to Baseband,
• Direct Conversion/Zero-IF
SW
RF Analog DSP
• No IF
A/D
I LPF Decimate
sin/cos Decoding
• Spurious leakage/DC offset SAW LNA AGC LPF
A/D
Decimate
No IF, Q Decimate to data rate,
• Digital IF Wideband signal Baseband filtering

• Little analog IF, single A/D SW RF IF DSP

MIX AGC Decimate I
• Superior wideband A/D sin/cos Baseband
SAW LNA Decimate Q
performance LO
Less mixing/ Quad IF to Baseband,
filtering Baseband filtering and detection

The trend for flexible design is effectively synonymous with the increase in the digital
portion of the design since DSP increases flexibility. This implies moving the DSP
closer and closer to the antenna and thereby making the down conversion more
efficient.
This slide outlines the three most common architectures for receiver down conversion:
1) The classic superheterodyne is the most commonly used architecture. The out-of-
band blocking signals are reduced by an RF bandpass filter placed immediately after
the antenna followed by a low-noise amplifier (LNA) and a mixer with a first IF in the
range of 100-200 MHz. After the mixer, one or more stages of filters and amplifiers
can be used for channel filtering. The signal is then boosted to a high level and down-
converted to baseband for demodulation.
2) The direct conversion architecture, in spite of its simplicity, is not so simple in
practice. It includes an RF bandpass filter, LNA, and mixer. The mixer, however, now
converts directly to baseband, which implies a good quadrature at RF (LO) frequency.
The main issues are the DC signals that are generated by imbalances in the mixer and
are very difficult to filter.
3) In the digital IF option, after the first mixer the full band of the signal may still
exist. This full range needs to be captured by the A/D converter, which commonly
employs a bandpass sigma-delta converter. The final filtering channel can be
programmable in the DSP filter in a single radio architecture that will adapt to a multi-
mode system. This paper’s focus is in the digital IF multi-mode option for 3GPP and
GSM/EDGE.
 Dual-Mode Receiver Architecture
nFixed RF front-end architecture

nBandwidth equals the widest incoming bandwidth

nIF stage requires additional digital filtering to

isolate narrow band signal

MIX
BPF BPF BPF

LNA
Band Image Channel Quad I Filter I Demod
Select LO Select
Reject + A/D
Q Q
Filter Filter MIX Filter
BPF BPF BPF

LNA

LO

A primitive approach to the implementation of multi-mode radios is the use of

distinct transceiver chains. However, such a “stacked-radio” approach is
inefficient, especially as the number of “modes” increases beyond two.
A more advanced approach is a wideband transceiver. In this approach, an
analog front end can be designed to have “coarse” selective bandwidth based
on the received signal format, followed by fine digital selection filtering.
In this paper, we follow the wideband approach where the fixed bandwidth of
the RF front end equals the widest bandwidth associated with the incoming
signal formats, i.e., that of the 3GPP signal. This option is used in some of the
more advanced base stations.
Selection of the widest bandwidth for the RF front end of the receiver implies
that the IF stage and the A/D converter can be exposed to a large number of
carriers when the incoming signal is in the narrowband mode. For example,
the large bandwidth would include multiple channels of EDGE and GSM.
This would require further digital filtering to isolate the desired spectrum.
Agenda
• Motivation
• Down-conversion alternatives
• Mixed-signal simulations
• 3G signal generation
• Digital IF architecture
• Measurement
• Setups
• Simulation results
• Conclusion
 ADS Mixed-Signal Environment for IF Processing
RF/Analog Signal Mixed Signal Baseband Signal
Quad
H(z) Measurement

Detection
A/D I EVM
2G/3G
900 BER
IF Q Eye
RF signal
signal
H(z) Spectrum
Decimation Filters
Complex Envelope A/D Symbol Rate
Bandpass Sampling IF Sampling Sampling

Every design engineer requires tools on his or her desktop to test ideas and make
trade-off analyses. Modern design processes include integrated tools capable of design,
simulation, and measurements in the most efficient way.
The simulation of a receiver involves seamlessly integrating RF, analog, and baseband
signals. If the application involves 2G and 3G technologies, sources for complex
formats and measurements based on the up-to-date specifications are needed.
Furthermore, the simulation tools and test and measurement instruments should
complement each other, allowing for design, prototyping, and verification.
The mixed-signal simulation requires variable sampling based on the nature of RF,
analog, and baseband signals. The sampling requirements of A/D converters and the IF
portion are particularly challenging. The modern converters cope with signals with
large bandwidth and high dynamic range exceeding nearly 100 million samples per
second. Capturing the signals that result from these rates in the simulation domain is of
interest. The sampled analog signal after A/D conversion is likely to be processed
with fixed-point and synthesizable blocks where the effect of bit precision on the
overall quality measures such as error vector magnitude (EVM) and bit error rate
(BER) is of interest.
An environment for digital IF design and verification can be created with the ADS
platform coupled with an Agilent Technologies ESG signal generator and an Agilent
89600 VSA for broadband signal formats. Of particular interest are the VXI form
factors, which provide very efficient A/D capability for prototyping the digital IF
section.
 3G Signal Generation
• ADS 3GPP and EDGE transmitter
• Pre-configured sources for EDGE and 3GPP
• Raw and coded signals and channel configurations
• IF and RF up-converter chain

Efficient use of design time implies that the designer should spend the least
amount of time on generation of signal formats and focus on actual design
work. The Agilent ADS platform includes wireless design libraries with pre-
configured sources.
In the case of this paper, there are various sources for generation of uplink and
downlink signal formats for EDGE and 3GPP signals. These sources include
raw as well as coded signals for various channels and IF and RF up-conversion
blocks that can be replaced or modified per user needs. These sources can be
placed and used to model the transmitter waveforms.
Agenda
• Motivation
• Down-conversion alternatives
• Mixed-signal simulations
• 3G signal generation
• Digital IF architecture
• Measurement
• Setups
• Simulation results
• Conclusion
 EDGE and 3GPP Specifications
EDGE 3GPP

• Channel spacing 200 kHz • Channel spacing 5 MHz

• Symbol rate 270.83 Kb/s • Transmission chip rate 3.84 Mc/s
• Receiver sensitivity -102 dBm • Receiver sensitivity -121 dBm
• Required CNR for • CW blocker above
• demodulation 9 dB desired signal 100
dB
• CW blocker above
desired signal 76 dB • Adjacent channel selectivity
@ 5 MHz ≥ 63 dB

This slides summarize the relevant signal specifications for both EDGE and
3GPP signals. These include channel spacing, bit rate, and receiver sensitivity
as well as the receiver’s carrier to noise ratio (CNR) (for EDGE), continuous
wave (CW) blocking and adjacent channel selectivity (for 3GPP).
The receiver sensitivity for 3GPP is for base station at 0.001 BER for
12.2 kbps. For the same data rate the adjacent channel selectivity for a CW
signal 5 MHz apart is 63 dB (115-52=63) above the desired signal.
 Digital IF Baseband Sections

I I

RF or IF signal Quadrature Filter Demodulator

Q Q

Quadrature Splitter/Down-Converter • Digital I/Q Filtering

Hilbert transformer filter • Pulse shaping

Standard numeric approaches (NCO) • Digital down-conversion

• Image rejection

This slide shows the three main blocks that follow the A/D conversion for
digital or zero IF architectures. The digital IF receiver can be simplified into
three sections: a down-converter, a filter, and a demodulator. The design
challenge lies in the seemingly simple quadrature and filter operations.
IF processing should extract the signal belonging to any of the incoming
formats from a wide-band signal. In our example, the narrow band signal is
GSM or EDGE and the wideband signal is 3GPP.
The input bandwidth of the IF signal covers 5 MHz in 3GPP. The sampling
rate should be chosen such that it satisfies the baseband processing for the
wideband signal. The challenge for multi-mode digital IF processing is the
extraction of narrow band (GSM/EDGE) from the wideband signal. This
extraction process becomes difficult in the presence of spurious, image, and
blocker signals.
 IF Architecture for 3GPP [0 1 0 -1 ...]
I
2 H1(z)

nInput signal
30.72 MHz
IF Frequency =69.12 MHz 15.36 MHz

Fs = 8*3.84 = 30.72 MHz

2 H1(z)
Q
[1 0 -1 0 ...] 15.36 MHz
BW = 5 MHz
WaveForm
W1
Value="0 1 0 -1"

nDigital mixer
ControlSimulation=NO
Periodic=YES
Period=0

nDecimation by 2
Mpy2 DownSample FIR
M2 D1 F1
Factor=2 Taps="<../synthesis/RC_3GPPideal.txt"
Phase=0 Decimation=1
DecimationPhase=0
Interpolation=1

nRC pulse shaping filter with

Port
P1 Port
TimedToFloat
Num=1 RectToCx P2
T3 WaveForm
R1 Num=2

-40 dB attenuation
W2
Value="1 0 -1 0"
ControlSimulation=NO
Periodic=YES
Period=0

Mpy2 DownSample FIR

M3 D2 F2
Factor=2 Taps="<../synthesis/RC_3GPPideal.txt"
Phase=1 Decimation=1
DecimationPhase=0
Interpolation=1

As in the analog case, down-conversion to baseband is realized by

multiplication of the input signal with a complex rotating phasor. A special
case is when IF center frequency is equal to a quarter of the sample rate. In this
case, considerable simplification is achieved since the sine and cosine signals
representing the complex phasor degenerate to two simple sequences
[1 0 -1 0 …] and [0 1 0 -1…].
Using this approach, the sampled A/D signal is mixed with a digital mixer
utilizing the above sequences. Note that these sequences are effectively like
cos() and sin() multipliers. This reduces the computation requirements. A
down-sample decimator by two would effectively remove the zero multipliers
and bring the sampling rate Fs down to 15.36 MHz. The last filter is a simple
raised cosine (RC) filter for pulse shaping based on the 3GPP standard. This
filter has a roll-off rate of 0.22 and attenuation starting at -40 dBc.
The schematic capture shows the implementation of the digital down
conversion (using a periodic waveform source to generate the two sequences),
down sampling, and an RC pulse-shaping filter.
 IF Architecture for EDGE
[0 1 0 -1 ...] CIC Compensation

I
2 H1(z) 32 576/325 H2(z)
IF
signal
30.72 270.88
MHz kHz
2 H1(z) 32 576/325 H2(z)
Q
[1 0 -1 0 ...] 15.36 0.48
IF Frequency = 69.12 MHz MHz MHz

Fs = 8*3.84 = 30.72 MHz

WaveForm
W1
Value="0 1 0 -1"
ControlSimulation=NO
Periodic=YES
Period=0

BW = 5 MHz Mpy2
M2
DownSample
D1
Factor=2
CIC
X1

Phase=0

Port Port
P1 USampleRF TimedToFloat RectToCx P2
Num=1 U1 T3 WaveForm R1 Num=2
Type=PolyPhaseFilter W2
Ratio=IFRatio Value="1 0 -1 0"
InsertionPhase=0 ControlSimulation=NO
ExcessBW=0.5 Periodic=YES
Period=0

CIC
Mpy2 DownSample
X2
M3 D2
Factor=2
Phase=1

The purpose of the IF stage for EDGE (or equivalently, GSM) is to extract the
200 kHz bandwidth from the 5 MHz received signal. Similar to 3GPP
implementation, this starts with multiplication of a periodic sequence of 1s and
0s and down-sampling by two. The result is then followed by a cascade integer
comb (CIC) filter and finally by a compensation filter. The up- and down-
sampling is adjusted in the compensation filter stage, such that the output is at
one sample per symbol or at 270.88 kHz.
 CIC and Compensation Filters I
H1 H2

H1 H2
Delay
D3
Delay
D4
Delay
D5
Delay
D6
Delay
D7
Q
N=1 N=1 N=1 N=1 N=1

Port
P1 Add2 Add2 Add2 Add2 Add2 DownSample
Num=1 A1 A2 A3 A4 A5 D8
Factor=32
Phase=0

Delay Delay Delay Delay Delay

D9 D10 D11 D12 D13
N=1 N=1 N=1 N=1 N=1

Port
Sub Sub Sub Sub Sub FIR P2
S1 S2 S3 S4 S5 F1 Num=2
Taps="<../synthesis/Compfilterideal.txt"
Decimation=576

nCIC (Cascade Integer Comb) filter for attenuating blockers

DecimationPhase=0
Interpolation=325

nFractional conversion for making sampling rate integer

nCompensation filter to remove components > 200 kHz

This slides shows the filters used in the digital IF stage. These include a CIC
filter, a fractional filter for making the sampling rate integer, and finally a
compensation filter for extraction of a signal falling within the 200 kHz
bandwidth. The last two filters are combined as a finite impulse response
(FIR) filter with interpolation and decimation capability. A filter design tool is
used to compute the coefficients of this filter.
The CIC filter is a highly-efficient multiplier-free filter for increasing and
decreasing the sample rate by integer factors. The net effect of the CIC filter is
the attenuation of aliasing components. Note that the up- and down-sampling
makes these filters time variant.
The schematic in the slide shows the architecture of the CIC filter. Note that
there are no multipliers present, which is the most attractive characteristic for
implementation. CIC is a recursive FIR filter with very high attenuation in the
stop band, which is very useful for reducing the effect of blockers. The level of
attenuation depends on the number of stages used. In the above schematic
capture, we have shown a five-stage CIC with a decimation factor equal to 32.
Out-of-band attenuation increases with the number of stages.
 Digital Filter Design
n Design accurate FIR or IIR filters
n Choose floating or fixed-point
implementation
n Import coefficients or
n Generate synthesizable
schematics

Digital filter design is a key part in the characterization of the digital IF stage.
As an integrated part of the Agilent ADS, Digital Filter Designer is a
specifications-based software tool for designing, simulating, analyzing, and
generating coefficients for high-quality digital filters including FIR and IIR
filters. Digital Filter Designer can generate both a schematic and a table of
coefficients for the designed filter.
The results of an analysis are automatically displayed in a separate Data
Display window that can be configured to plot the frequency response, unit
pulse response, unit step response, group delay, poles/zeros, and eye diagram.
Coefficients generated by Digital Filter Designer can be used to implement
filters and they can be imported into Ptolemy filter components. Schematics
generated by Digital Filter Designer also can be added to Advanced Design
System schematics.
 EDGE Compensating Filter Response

FIR
Frequency Response F2
Taps="<../synthesis/CompfilterShortideal.txt"
Decimation=9
DecimationPhase=0
Interpolation=5

Fixed point, 8 bits

Fixed point, 10 bits
Fixed point, 12 bits
Fixed point, 14 bits
Fixed point, 16 bits
Fixed point, 32 bits

For the EDGE/GSM case, the compensating filter for out-of-band rejection and
integer fractional conversion are combined into an FIR filter with interpolation
and decimation parameters. The digital filter tool is used to generate the
coefficients of this filter. The FIR is a low-pass windowed (Hamming) filter
whose frequency response is shown above. The different traces correspond to
fixed point implementation of this filter. Note that the out-of-band attenuation
degrades as fewer bits are deployed to represent the filter coefficients. As a
result, the overall performance of the digital IF section is tied with the number
of bits chosen to represent this filter.
 3GPP Filter Response

RegSyn RegSyn RegSyn RegSyn RegSyn RegSyn

……. …….
R11 R12 R13 R14 R15 R16

GainSyn GainSyn GainSyn GainSyn GainSyn GainSyn GainSyn

G11 G12 G13 G14 G15 G16 G17

AddSyn AddSyn AddSyn AddSyn AddSyn AddSyn AddSyn

A10 A11 A12 A13 A14 A15 A16

Frequency Response

Fixed point, 8 bits

Fixed point, 10 bits
Fixed point, 12 bits
Fixed point, 14 bits
Fixed point, 16 bits
Fixed point, 32 bits

It was previously mentioned that the digital IF section in the 3GPP case
included a digital down conversion, down sampling, and an RC pulse-shaping
filter. This filter has a roll-off rate of 0.22 and attenuation starting at -40 dBc.
This slide shows the response of this RC filter for different word lengths. Also,
a section of the synthesizable implementation of this filter, generated by the
Digital Filter, is also shown. The general observation is that the out of band
attenuation of the filter as well as its droop degrades as fewer bits are used to
represent the filter.
Agenda
• Motivation
• Down-conversion alternatives
• Mixed-signal simulations
• 3G signal generation
• Digital IF architecture
• Measurement
• Setups
• Simulation results
• Conclusion
 Error Vector Magnitude (EVM) Definition

• EVM is the distance between

measured and expected signal
Q
• EVM provides insight Error Vector
Magnitude(t)
• EVM is fast Error
(
t)
• Standards provide allowable levels

(t) tual
Magnitude

Ac
• RMS, peak and 95 percentile Error(t)
Ideal(
flavors t)
Phase
Error(t) I

The error vector magnitude (EVM) represents the distance between the
measured and expected carrier magnitude and phase at some point in time after
it has been compensated in timing, amplitude, frequency, phase and DC offset.
EVM is a valid measure as long as the reference waveform has the same
expected inter-symbol interference (ISI) as the measured waveform, which it
will if it is generated using the same transmit and receive filters or equivalent
delays.
Note that there are root mean square (RMS) EVM, peak EVM, and 95th
percentile EVM measurements. Also, the requirements for acceptable EVM
measurement are different for the handset and the base station.
EVM is typically used to detect errors in signal transmission. However, its use
as a front-end receiver measurement is also common. In this paper, we will use
EVM to gauge the impact of finite word length on the quality of the digital IF
signal.
 EVM as a Receiver Metric
• Identical mechanisms contribute to
EVM as BER EDGE
Ref
EDGE
2

test EVM 1
Ref BLER

• BER limitations: EDGE_EVM_WithRef EDGE_BLER

E1 PDTCH_BLER
StartSym=142 Start=2
• Long measurements SymBurstLen=142 Stop=301
SampPerSym=16 BlockLength=594
(computationally intensive) SymDelayBound=3 RecordType=From Start
NumBursts=5
MeasType=EVM_rms
• No diagnosis capability SymbolRate=270833Hz

3GPP
• EVM may replace BER when: 3GPP
Ref
D

test EVM PhyCHBER

Ref

• Measuring Tx or front-end Rx WCDMA3G_EVM_WithRef

WCDMA3G_PhyCHBERWithDelay
W2
W1
signal quality StartSym=2560
FrameLength=420
BERWindow=100
SymBurstLen=2560 RefDelay=0
SampPerSym=16
• Signal is deterministic SymDelayBound=-1
NumBursts=1
MeasType=EVM_rms
• There is a “test” and “reference” SymbolRate=3840000 Hz

BER is loosely defined as the fractional number of errors. It is used as the most
important digital system quality measure. However, BER suffers from some
limitations, which include:
-Considerable (simulation) time to measure with confidence, especially for
systems that require high transmission accuracy. For receiver sensitivity of
-102 dBm (EDGE) and -121 dBM (3GPP), sometimes several days are
required for simulation time.
-BER provides limited diagnosis value. When the value exceeds the threshold
it does not give any clues regarding the probable cause.
EVM can be used as an alternative to BER in certain cases. EVM is typically a
transmitter measurement; however, its use as a receiver metric, especially for
the receiver front end, can be justified provided that the front end does not
include equalizers or decoders. In this paper, we limit the use of EVM as a
replacement for BER only for the deterministic channels and as a measure to
quantify quantization errors.
Agenda
• Motivation
• Down-conversion alternatives
• Mixed-signal simulations
• 3G signal generation
• Digital IF architecture
• Measurement
• Setups
• Simulation results
• Conclusion
 Blocker: Definition and Effect Desired Signal
• The receiver’s ability to detect the
desired signal in the presence of the
interfering signal
• Adds a rotating vector to the measured
signal, impacting EVM
Rotating CW Blocker
• Offset: 10 MHz (3GPP) and >600 kHz
(EDGE)
Error Vector (t)
• 3GPP CW blocker @-15 dBm; Desired
signal @-115 dBm
Desired Vector

• EDGE: 200 kHz harmonics within

various frequency ranges Measured Vector

The interfering signal could come from many sources.

When using a wideband 5 MHz bandwidth signal to accommodate both 3GPP
and EDGE formats, the EDGE signal experiences more dynamic range than
3GPP. This is because a 5 MHz bandwidth supports 25 EDGE channels. Hence
any specific EDGE channel experiences distortion from 24 adjacent and
interfering channels. This trade-off between bandwidth and the dynamic range
suggests that the IF processing and the isolation of the signal of interest in
narrow band systems like EDGE is more difficult.
In our blocking simulation, we use just one CW interferer in the presence of a
single channel. This slide summarizes the location and strength of the blocker
signal compared to the desired one. In the 3GPP case, the center frequency of
the CW blocker is at 1930 MHz, with the interfering signal level at -15 and
desired signal at -115 dBm. The net effect of such a blocker on the EVM can
be visualized as adding a rotating vector to the measured signal vector. The net
effect depends on the magnitude of the CW blocker vector. If filtering is good
this would be close to zero, minimally impacting EVM. If there is leakage of
the CW blocker, then the EVM would be negatively impacted.
 3GPP Baseline Setup
Var VAR

Blocker
Eqn
VAR1 3GPP
Ref

Blocker Delay
test EVM
Ref

EVM
DF
D1 WCDMA3G_EVM_WithRef
W1 EVM
DF1 N_Tones
N_Tones N1
N8

UpSample DownSample
U1 D2

3GPP Down
DownConverter
3GPPSource
Source Converter
NumericSink
3GPP

Up Digital
DigitalIF
Test_Waveform

0100101
1110001
0000101
UE
UpConverter
Converter IF
Reference
Source

WCDMA3G_UE_FixedRateSrc 3GPP_IF
SummerRF MixerRF X2 CxToTimed TimedSink
FixedRateSrc CxToRect WCDMA3G_RF_Mod
S5 M1 C2 DigitalIF_Waveform
C1 IF_Mod

SpectrumAnalyzer SpectrumAnalyzer SpectrumAnalyzer

RF_RcvdSpec
BlockerSpec IFSpec

0 TimedSink SpectrumAnalyzer
..._RcvdSpec)

RF_RcvdWaveform DigitalIF_Spec
TimedSink TimedSink
-50 BlockerWaveform IFWaveform

-100 4

real(IFWaveform)
2
-150
0
1.880 1.885 1.890 1.895 1.900 1.905 1.910 1.915 1.920
-2
freq, GHz -4

-6
20 0 7 14 21 28 35
0 time, usec
dBm(BlockerSpec)

-20
3
-40

real(DigitalIF_Waveform)
-60 2
-80
1
-100

-120 0
1.880 1.885 1.890 1.895 1.900 1.905 1.910 1.915 1.920
-1
freq, GHz
-2

-3
0 7 14 21 28 35

time, usec

This slide shows the baseline schematic setup for a 3GPP simulation in the
Agilent ADS. This setup includes a 3GPP fixed rate uplink source with a
12.2 kbps data traffic channel and long scrambling code. The control channels
are made inactive for this source. The source data is then pulse-shaped using a
raised cosine filter, modulated and up-converted to RF frequency.
The RF signal is then split in two. One signal is used as the reference for the
EVM measurement and the other is combined with the CW blocker, down-
converted to an IF frequency of 69.12 MHz and used as the input into the
digital IF section. At different points, the signal is tapped out to be measured
either in frequency or time using the appropriate sinks. In this slide, the
spectrum of the 3GPP RF signal before and after adding the blocker, as well as
the time waveform before and after the digital IF signal, are also captured.
 EDGE Baseline Setup
Delay Delay Delay Delay Delay
D
3 D
4 D
5 D 6 D 7
N=1 N=1 N=1 N=1 N=1

CIC
CICfilter
filter
Port
P
1
Num=1
Add2
A
1
Add2
A
2
Add2
A
3
Add2
A 4
Add2
A
5
DownSample
D 8
Factor=32
Phase=0

Delay Delay Dea

ly Delay Delay
D
9 D10 D11 D12 D13
N=1 N=1 N=1 N=1 N=1

Port
Sub Sub Sub Sub Sub R
F
I P
2
S 1 S
2 S 3 S 4 S
5 F
1 Num=2
Taps="<../synthesis/Compfilterideal.txt"
Decimation=576
DecimationPhase=0
Interpolation=325

Down
DownConverter
Converter TimedSink
T4 FloatToTimed SpectrumAnalyzer

WaveForm
Digital
DigitalIF
IF
F3 S2

N_Tones W1
N1

SpectrumAnalyzer
S1

3G A/D
3GRF
RFsource
source A/D Mpy2
M2
DownSample
D1
CRC
X2
NumericSink
N2
Measurement
EDGE
Measurement
Mod

Bits EDGE_8PSKMod CxToTimed MixerRF TimedToFloat

B1 E1 C1 M1 T3 WaveForm
W2
RectToCx CxToTimed SpectrumAnalyzer
R1 C2 S5

DF TimedSink
DF NumericSink
N4 T5
CRC
Mpy2 DownSample NumericSink
X3
Var
Eqn
VAR M3 D2 N3
VAR1

Var
Eqn
VAR
VAR2

FloatToTimed SpectrumAnalyzer
FloatToTimed SpectrumAnalyzer F4 S3
F5 S4

This slide shows a schematic capture of a narrow band case (EDGE). The
setup includes a random bit generator driving the EDGE modulator, which
includes 8PSK mapping, 3P/8 rotation, and pulse shaping with a linearized
Gaussian filter. This signal is then up-converted to a 1.9 GHz RF carrier whose
spectrum is also shown. This signal is used as the transmitter waveform.
After it is down-converted and the time reference is removed, it is used to
derive the digital IF section. At different points, the signal is tapped out and its
spectrum and waveform are measured. The input and output node waveforms
of the digital IF section indicate similar waveforms, while the output spectrum
shows the aliased spectrum of the EDGE signal within the wideband
representation.
Agenda
• Motivation
• Down-conversion alternatives
• Mixed-signal simulations
• 3G signal generation
• Digital IF architecture
• Measurement
• Setups
• Simulation results
• Conclusion
 EDGE Spectrum Results
RF IF
IFSpectrum
-100 RFSpectrum
Spectrum -100 Spectrum

dBm(IF_Signal)
-120
dBm(RF_Signal)

-120

-140 -140

-160 -160

-180 -180
68.2 68.4 68.6 68.8 69.0 69.2 69.4 69.6 69.8 70.0
1.8992

1.8994

1.8996

1.8998

1.9000

1.9002

1.9004

1.9006

1.9008
freq, MHz
freq, GHz
m1
m2 freq=7.680MHz
freq=7.680MHz dBm(Sampled_IF)=-105.173
dBm(Sampled_IF)=-105.173 m1
m2 -100
-100

dBm(Sampled_IF)
-120
dBm(Sampled_IF)

-120
-140
-140
-160
-160
-180
-180 Sampled
SampledIF
IFSpectrum
Spectrum
Sampled
SampledIF
IFSpectrum
Spectrum -200
-200
7.5 7.6 7.7 7.8 7.9 8.0
0 2 4 6 8 10 12 14 16
freq, MHz
freq, MHz

In a narrowband system (EDGE signal), after a high-rate A/D conversion, the

ratio of sampling to signal bandwidth is quite high. In our case, this ratio is
30.72M/200 kHz, which is greater than 345. This means that the sampled
signal could include 345 channels. The challenge is then the extraction of any
channel signal by a series of high decimations without allowing for aliasing
with adjacent channels or blocker signals.
This slide depicts the effect of down conversion, digital mixing, and
decimation by two on the incoming signal spectrum. The RF spectrum in the
slide’s upper left is at 1.9 GHz. The down-conversion brings this signal to an
IF frequency of 69.12 MHz (upper right spectrum). After A/D conversion,
what is obtained is a wide-band signal (lower left).The resulting spectrum now
contains a single EDGE channel at 69.12 MHz. After this signal is decimated
by a factor of two, the desired spectral component is translated to:
69.12-2x30.72=7.68 MHz (shown in the lower right spectrum).
 EDGE Spectrum Results

-40

dBm(EVM_EDGE_Digital_IF5..IF_Signal_CICx)
-60

Signal + Blocker

dBm(IF_Signal_CICx)
-80

Filtered CIC Response

dBm(IF_Signal)
-100

-120

-140

-160

CW
CWblocker
blockeris
is
-180
68.2 68.4 68.6 68.8 69.0 69.2 69.4 69.6 69.8 70.0

filtered
filteredby
byCIC
CIC freq, MHz

After digital demodulation, the CIC filter will attenuate the effect of blockers
and out-of-band interference. The frequency response of the CIC filter can be
expressed in closed form as
2N
 
 sin πf 
S( f ) =  
πf
 sin 
 R 
where N is the order and R is the down-sampling rate for the CIC filter. We
have used N=5 and R=32 for the EDGE IF stage. Note that for high values of
R, this expression approximates the multiplication of 2N sinc() functions,
resulting in very low sidebands and deep nulls. The spectrum in the slide is the
superposition of the signal plus blocker and the filtered CIC response. S(f)
results after the out-of-band part of the spectrum has been filtered by the
compensation filter. Note that CW blocker is attenuated significantly.
 EVM
EVMWithout
EVM With and Without CIC Without
Digital
DigitalIF
IF

To gauge the effect of digital 4.0 450

IF (CIC): 3.5
400
350
Sweep Blocker power ±50 3.0
EVM
EVMWith
With 300
dB with respect to carrier Digital
DigitalIF

%EVM, rms

%EVM, rms
IF 250
Measure EVM 2.5
200

Repeat without digital IF 2.0 150

100
1.5
50
1.0 0
-50 -40 -30 -20 -10 0 10 20 30 40 50

Delta Power Over Carrier (dB)

Blocker
BlockerPower
Power

Digital IF section removes blocker (1-4% EVM)

Without digital IF EVM starts low and grows to 400%!!

To verify that the CIC filter in the EDGE case filters the CW blocker, a
simulation sweep of the CW power is performed. The CW power is swept
from -50 to +50dB of the desired signal in 10 dB steps. The rms EVM (shown
on the left Y-axis) varies from about 1% to a maximum of 4% for CW blocker
at 50 dB above desired signal. This proves the effectiveness of the CIC filter.
Conversely if we remove the digital IF section and sweep the CW power in the
same manner, the rms EVM begins at 1%, but grows to very high values as the
CW power becomes close to signal. This trend continues to an rms EVM of
400% for CW at 50 dB above desired signal. This latter result indicates that
digital IF (CIC) is critical in removing the blocker interference.
 EDGE EVM Results
EVM simulation in a few minutes!
EVM without Blocker
7 4.5
4.0
6

Freq Error (Hz)

3.5
EVM with Blocker
% EVM, rms

5 3.0
2.5
4 2.0 9.5
3 1.5
1.0 9.0
2

% EVM, rms
0.5
1 0.0 8.5
8 9 10 11 12 13 14 15 16
8.0
Number Of Bits
7.5
7.0

5
9
13
17
21
25
29
33
35
Number Of Bits

This slide shows the EVM results for nine different word lengths (number of
bits) representing the compensation filter design in the EDGE case. In the left
graph, the simulations were done without the blocker. The left Y-axis is
associated with %EVM, rms while the right Y-axis depicts the corresponding
frequency error. This result shows the degradation of EVM for finite word
lengths less than 12 bits.
This is a significant result since it defines the lowest word length required for
implementation in the digital IF section. Furthermore, the frequency error
correlates well with the %EVM, rms indicating the frequency error (as
opposed to IQ offset or droop) as the main cause of EVM. With the blocker
present, the nominal value of EVM increases, but the breakpoint remains the
same where the lowest word length before the EVM degrades significantly.
Note that the point here is not the absolute value of EVM, but the break point
where it begins to degrade significantly.
 3GPP EVM Results
EVM without Blocker
20
18
16
14
EVM with Blocker

% EVM, rms
12
10
8
100 400 6
4
350
80 2

Frequency Error (Hz)

300 0
4 5 6 7 8 9 10 11 12 1 3 1 4 1 5 16
%EVM, rms

60 250
Number of Bits
200
40 150
100
20
50
0 0
8 10 12 14 16 18 20 22 24 26 28 30 32
Number Of Bits

In the case of 3GPP, the EVM simulations are longer since the number of bits
(chips) to be processed is much higher. The absolute value of EVM in the case
of 3GPP turns out to be higher than EDGE. However, the results remain
essentially the same as in the narrowband case. Here again, with the blocker
present we observe higher EVM values compared to the case where there is
none, as expected. The number of bits where the breakpoint begins is about
12 bits in the case of 3GPP signal plus the blocker, correlating well with the
frequency error results. Without the blocker, the results are a little better.
 Effect of the Number of CIC Stages
0.000006

0.000004

Reducing blocker interference requires 0.000002

real(N7)
real(N8)
a high out-of-band attenuation CIC 0.000000

filter
-0.000002

-0.000004

A 4-stage CIC filter does not do a good -0.000006

0 200 400 600 800 1000
job (EVMrms = 39%) -100 Index

A 5-stage CIC filter performs best

dBm(EVM_EDGE_Digital_IF5..IF_Signal_CICx)
-110

(EVMrms = 7.48%) -120

dBm(IF_Signal_CICx)
A 6-stage CIC increases EVM due to -130

the droop in the CIC response -140

-150

-160

-170

-180
68.2 68.4 68.6 68.8 69.0 69.2 69.4 69.6 69.8 70.0

freq, MHz

In previous simulations, the number of CIC stages was fixed at five. It is

interesting to observe the effect of using varying numbers of stages of CIC
filters. This slide compares the output waveform of the digital IF section for
four and five stages of CIC filter. With four stages, the waveform contains
more high-frequency content, indicating that CIC does not filter the blocker as
well as five-stage, resulting in a high EVM (39%). The lower spectrum is a
comparison of the six-stage CIC with the five-stage. In this case, the six-stage
has a faster droop on the main lobe of the filter, introducing some bias on the
amplitude of the frequency response. This effect will cause the EVM to
increase more than the five-stage case.
Conclusion

• Multi-mode phones with digital IF or zero IF are becoming a trend

• Digital IF design requires simulation of RF, analog, and baseband signals as
well as trade-off study of different digital filtering schemes
• The Agilent Technologies ADS platform provides the mixed-signal
capability, digital filter design and 3GPP and EDGE signal formats
• A digital IF section compatible were both 3GPP and EDGE was verified
• Fast EVM simulations were utilized as an alternative to BER for receiver
front-end measurement
• The minimum number of bits for representation of filters in digital IF section
was identified in a receiver simulation with a CW blocker
References

M. Jian, W. H. Yung, B. Songrong “An Efficient IF Architecture for Dual-Mode

GSM/W-CDMA Receiver of a Software Radio”, IEEE International Workshop
on Mobile Multimedia Communications, San Diego, USA, November 1999.