Professional Documents
Culture Documents
Parallelism on Multi-FPGAs
Ramon Nepomuceno
ramon.nepomuceno@ic.unicamp.br
Guido Araujo
guido@unicamp.br
GPU
FPGA x GPUs 3
GPU FPGA
FPGA x GPUs 4
GPU FPGA
Multi-FPGAs Pipeline
How to program such systems? 6
..
.
Enabling OpenMP Task Parallelism on Multi-FPGAs 12
..
.
Enabling OpenMP Task Parallelism on Multi-FPGAs 13
..
.
Enabling OpenMP Task Parallelism on Multi-FPGAs 14
..
.
Example 15
Example 16
Example 17
Example 18
Example 19
Example 20
Example 21
Example 22
Example 23
t1 t2 t3 t4
Software Stack 24
Software Stack 25
Software Stack 26
Software Stack 27
Multi-node 28
● A-SWT
○ Communication
among the
IP-cores
● MAC Frame Handler
(MFH)
○ Mount and
unmount a MAC
frame.
Multi-node 29
● A-SWT
○ Communication
among the
IP-cores
● MAC Frame Handler
(MFH)
○ Mount and
unmount a MAC
frame.
Multi-node 30
● A-SWT
○ Communication
among the
IP-cores
● MAC Frame Handler
(MFH)
○ Mount and
unmount a MAC
frame.
Multi-node 31
● A-SWT
○ Communication
among the
IP-cores
● MAC Frame Handler
(MFH)
○ Mount and
unmount a MAC
frame.
FPGA Scalability 32
FPGA Scalability 33
FPGA Scalability 34
Iteration and IP Scalability 35
Iteration and IP Scalability 36
Iteration and IP Scalability 37
Resource Utilization 38
39