JiT, ECE Final year thesis, Three phase fault analysis with auto reset

2016

Declaration
This is to certify that the thesis entitled ‘‘Three Phase Fault Analysis with Auto Reset’’ has
been carried out by students listed below. No portion of the work presented in this project has
been previously and concurrently submitted in support of another award or qualification either at
this institution or elsewhere.

Name ID

FANOS DADI 01744/04 ……………..

Signature

HABTAMU KEDIR 02037/04 ……………..

Signature

DAWIT ENDALEW 01994/04 ……………...

Signature

ESKENDER ALEMU 01695/04 ……………...

Signature

FAYERA ASFAW 01752/04 ……………...

Signature

Jimma,Ethiopia Page i
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

Approval for Submission

This thesis entitled with ‘‘Three Phase Fault Analysis With Auto Reset’’ was prepared by
the above listed students, and approved by the following examiners in partial fulfillment of the
requirements for the degree of Bachelor of Science in Electrical And Computer Engineering, in
Jimma University

Approved by,

Advisor name

Mr.k.Saravanan ……......... ………….

Signature Date

Co-advisor

Miss.Lidet A. ……......... …….

Signature Date

Jimma,Ethiopia Page ii
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

Acknowledgement

First of all, we would like to thank God for his blessing, granting us with wisdom, the
opportunity of an education and for letting me to finish this project.

Secondly, we would like to thank Jimma university institute of technology especially electrical
and computer engineering department who gave us many needed support, encouragement and
help throughout our project. Our sincere appreciation and gratitude goes to our advisors Mr.
K.Saravanan and co-advisor Miss.Lidet A. for their advice, assistance and valuable guidance by
sparing valuable time in giving information in the preparation and successful completion of this
work.

Finally, thank you all those involved directly or in directly helping us out during our design and
simulation which we cannot state out every one of them. Mostly, special thanks also to our
family and friends for their external support throughout our academic career.

Jimma,Ethiopia Page iii

JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

Abstract

Faults in a power system from generation up to distribution are common from day to day. Thus,
the analysis of these faults in the power system is the most important for optimum power flow.
Since now a day‟s power demand is increasing rapidly. So, the studies and detection of faults is
necessary to ensure the reliability and stability of power system. Because of this, the intention is
to design and automate tripping mechanism for three phase supply to safe the system. This
project presents auto resetting of system if a fault is temporary while it remains tripped in case
of permanent fault. In any electrical systems mostly substations that supply the power to the
consumers lead to failures due to faults like line to ground , line to line, line- line to line and
line-line line-ground faults. These faults lead to damage of the power system equipment‟s and
forms power flow discontinuity. This work, to overcome the problem of the fault, by designing
the fault analysis with auto reset. The 555 timer is used to identify weather the fault is temporary
or permanent and the push button or faulty switch is used to create the fault. During the push
button across the relay is being pressed, it disconnects the relay and in the process, common
contacts moves to the NC position to provide a logic low to trigger the 555 timer pin. This is to
develop an output that brings the U1 555 timer which is used in astable mode to reset the pin to
high. This resetting mechanism resets the supply to the load immediately after the small
interruption in the occurrence of temporary fault or it remains in a tripped condition in case of
permanent fault.

Jimma,Ethiopia Page iv
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

Contents
Approval for Submission ................................................................................................................ ii

Acknowledgement ......................................................................................................................... iii

Abstract .......................................................................................................................................... iv

List of figure ................................................................................................................................ viii

List of table .................................................................................................................................... ix

List of Acronyms ........................................................................................................................... ix

Chapter One .................................................................................................................................... 1

1 Introduction .................................................................................................................................. 1

1.1 Background ........................................................................................................................... 1

1.2 Statement of the problem ...................................................................................................... 3

1.3 Objective of the study ........................................................................................................... 3

1.3.1 General objective ........................................................................................................... 3

1.3.2 Specific objective ........................................................................................................... 3

1.4 Motivation of the study ......................................................................................................... 4

1.5 Significance of the study....................................................................................................... 4

1.6 Methodology ......................................................................................................................... 5

1.7 Material required ................................................................................................................... 6

1.8 Organization of the thesis ..................................................................................................... 6

Chapter two ..................................................................................................................................... 7

2 Theory and Literature Review ..................................................................................................... 7

2.1Type of Faults ........................................................................................................................ 8

2.1.1 Series Faults ................................................................................................................... 8

2.1.2. Shunt Faults .................................................................................................................. 9

Chapter Three................................................................................................................................ 10

Jimma,Ethiopia Page v
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

3 Block diagram descriptions........................................................................................................ 10

3.1 General block diagram of the system.................................................................................. 10

3.2Each Block description ........................................................................................................ 11

3.2.1 Power Supply ............................................................................................................... 11

3.3 Transformer......................................................................................................................... 12

3.4 Bridge Rectifier ............................................................................................................... 13

3.4.1 Full-wave rectifier ........................................................................................................ 14

3.5 Voltage Regulator ............................................................................................................... 16

3.6 Relay ................................................................................................................................... 16

3.6.1 Relay operation ............................................................................................................ 17

3.7 Comparator ......................................................................................................................... 17

3.8 The 555 IC Timer................................................................................................................ 18

3.8.1 The 555 timer operating modes ................................................................................... 21

3.9 Switch ................................................................................................................................. 24

3.10 Transistor .......................................................................................................................... 24

3.10.1 BJT transistor ............................................................................................................. 24

4 System design and simulation result .......................................................................................... 25

4.1 Mathematical Analysis........................................................................................................ 25

4.2 Types of faults..................................................................................................................... 25

4.2.1 Single line to ground fault............................................................................................ 25

4.2.2 Line to line fault ........................................................................................................... 26

4.2.3 Double line to ground fault .......................................................................................... 27

4.3 Fualt calculation .................................................................................................................. 29

4.4 Turns and Current Ratios of Transformer ........................................................................... 31

4.5 Working principle ............................................................................................................... 33

Jimma,Ethiopia Page vi
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

4.6 Operating Procedure ........................................................................................................... 34

4.7 Simulation result of power supply circuit ........................................................................... 34

4.8 Simulation result of fault analysis trip circuit (L-G) .......................................................... 35

4.9 Limitation ............................................................................................................................ 38

4.10 Simulation result of fault analysis trip circuit (L-L) ......................................................... 39

4.11 Simulation result of fault analysis trip circuit (3LG) ........................................................ 40

4.12 Result and Discussion ....................................................................................................... 41

4.13 Further improvements and Future scope........................................................................... 42

4.14 Applications ...................................................................................................................... 42

Chapter five ................................................................................................................................... 43

5 Conclusions and Recommendations .......................................................................................... 43

5.1 Conclusion .......................................................................................................................... 43

5.2 Recommendations ............................................................................................................... 44

Reference ...................................................................................................................................... 45

Jimma,Ethiopia Page vii

JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

List of figure
Fig 1. 1 Methodology flow chart ...............................................................................5

Fig 3. 1 System block diagram ................................................................................10

Fig 3. 2 Power supply ..............................................................................................11
Fig 3. 3 Transformer ................................................................................................12
Fig 3. 4 Bridge rectifier ............................................................................................14
Fig 3. 5 Full-Bridge rectification and operation ......................................................15
Fig 3. 6 LM7805 Voltage regulator .........................................................................16
Fig 3. 7 Relay and Relay Contact ............................................................................16
Fig 3. 8 The Comparator ..........................................................................................17
Fig 3. 9 Schematic diagram of 555 timer .................................................................19
Fig 3. 10 The 555 timer as a Monostable ................................................................21
Fig 3. 11 The 555 timer as Astable .......................................................................22
Fig 3. 12 BC548 NPN transistor ..............................................................................24
Fig 4. 1 Single line to ground fault ..........................................................................25
Fig 4. 2 Line to Phase fault ......................................................................................27
Fig 4. 3 Double line to ground fault.........................................................................28
Fig 4. 4 Schematic Diagram.....................................................................................33
Fig 4. 5 Design power supply result ........................................................................34
Fig 4. 6 Simulated wave form for power supply .....................................................35
Fig 4. 7 Overall trip circuit diagram ........................................................................35
Fig 4. 8 Simulated overall trip circuit diagram ........................................................36
Fig 4. 9 Simulation result of L-G fault is occur (after fault push Button OFF) ....36
Fig 4. 10 Simulation result of L-G fault is occur (after fault push button ON).......37
Fig 4. 11 The result of temporary fault for L-L .......................................................39
Fig 4. 12 The result of temporary fault 3 L-G .........................................................40

Jimma,Ethiopia Page viii

JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

List of table
Table3. 1 Ordering information ...............................................................................19

List of Acronyms
3L-G =Three Line to Ground Fault

AC= Alternate Current

C = Capacitor

COM= Common point of relay

CT= Current Transformer

DC= Direct Current

EMF=Electromotive Force

LED= Light Emitting Diode

L-G =Line to Ground Fault

L-L =Line to Line Fault

NC= Normally Closed Relay

NO= Normally Open Relay

NP = Number of turns on primary Coil

NS = Number of turns on Secondary Coil

R = Resistor
V = Voltage

Jimma,Ethiopia Page ix
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

VCC = Voltage control circuit

VP = Primary Voltage
VS = Secondary Voltage
VT =Voltage Transformer

Jimma,Ethiopia Page x
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

Chapter One

1 Introduction

Electricity produced by a power plant is delivered to load centers and electricity consumers
through transmission lines held by huge transmission towers. During normal operation, a power
system is in a balanced or normal situation but, it can be under Abnormal situations due to faults.
Faults in a power system can be created by natural events such as falling of a tree, wind, and an
ice storm damaging a transmission line, and sometimes by mechanical failure of transformers
and other equipment in the system. A power system can be analyzed by calculating system
voltages and currents under normal and abnormal situations. A fault is defined as flow of a large
current which could cause equipment damage. If the current is very large, it might lead to
interruption of power in the network. Moreover,voltage level will change, which can affect
equipment insulation.Voltage below its minimum level could sometimes cause failure to
equipment. It is important to study a power system under fault conditions in order to provide
system protection. [4]

1.1 Background

Faults can be defined as the flow of a massive current through an improper path which could
cause enormous equipment damage which will lead to interruption of power, personal injury, or
death. As a result, the electrical potential difference of the system will increase. Hence, People
and equipment will be exposed to the danger of electricity which is not accepted.Not only this,
but also faults has effect on the reliability of power system. In order to supports today‟s reliable
operation of power system.Asystem can be considered as, no breakdown of wire in transmission
line and no short circuit of phases. Due to variable loading operation of power system, also by
lightning contact with foreign object the short circuit as well as breakdown of wire occurs.These
faults are temporary or same cases act as permanent fault based on time of situation.The
equipment under operating state can have failure due to such faults which can be temporary or
permanent damage. This faults lead to substantial damage to the power system equipment. Faults

Jimma,Ethiopia Page 1
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

which are transient,can be cleared by momentarily de-energizing the line, in order to allow the
fault to clear. Auto reclosing can then restore service to the line. The remaining 10 - 30% of
faults is semi-permanent or permanent in nature[6]. A small branch of tree falling onto the line
can cause a semi-permanent fault. Also due to some cases a very high transients occurs in
transmission line, and then it is not possible to operate circuit breaker in short time period. It
will take some time delay which may be harmful or effect on stability of system. It may affect
the heavy and relatively costly equipment to which 3 phase supply is connected. Hence, the
instant isolation of this equipment is important. This proposed paper is used as to immediately
disconnect supply of line and protect the three phase load. The output is reset automatically
after a brief interruption in event temporary fault while it remains in tripped condition in case of
permanent fault. A broken wire causing a phase to open, or a broken pole causing the phases to
short together is output is continuously high, which permanently ON the load relay,until
capacitor discharge through to reset the push button. The voltage at inverting terminal is fixing
by using potential divider.A Push button is used to create fault and it is placed at secondaries of
transformers. In order to prevent such an event, power system fault analysis was introduced.
The process of evaluating the system voltages and currents under various types of short
circuits is called fault analysis which can determine the necessary safety measures & the required
protection system[6]. It is essential to guarantee the safety of public[1].

The analysis of faults leads to appropriate protection settings which can be computed in order to
select suitable fuse, circuit breaker size and type of relay. The severity of the fault depends on
the short-circuit location, the path taken by fault current, the system impedance and its voltage
level. In order to maintain the continuation of power supply to all customers which is the core
purpose of the power system existence, all faulted parts must be isolated from the system
temporary by the protection schemes. When a fault exists within the relay protection zone at any
transmission line, a signal will trip or open the circuit breaker isolating the faulted line. To
complete this task successfully, fault analysis has to be conducted in every location assuming
several fault conditions. The goal is to determine the optimum protection scheme by
determining the fault currents & voltages. The combination of increased renewable energy
sources, simultaneous operation of different type of generating units (conventional, non-
conventional, renewables etc.), power transmission over longer distances under limit load

Jimma,Ethiopia Page 2
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

conditions and the influence of electricity markets have presented new challenges in maintaining
and improving the quality operation and security. It cannot be assumed that the transmission
system will develop and expand at the same rate and there is a need to maximize the capacity of
existing apparatus with reliability and safety, depending upon limit conditions. Increased power
flow requires advanced and secure methods of protecting transmission systems. In addition, the
change in system dynamics due to introduction of electronic converters in new generation
technology can lead to a more stressed system. These new systems may cause difficulties
or even incorrect operations under the new complex conditions. Main specifications of the
protection schemes are described in the national grid codes or in approved technical documents
and standards.This thesis project describes the best practices for protection schemes considering
security of supply and safety of persons and equipment.The focus is on the protection of
equipment, mainly extra high voltage or high voltage and in special cases even other voltage
levels.

1.2 Statement of the problem

In the power system there are different fault like L-G, L-L, DLG, 3LG.Which affects the
equipment and power system stability and there are also effect of three phase faults on power
quality, stability and reliability. This leads the systems to reduce its performance characteristics
during three phase faults on power systems at all.In order to overcome this problem we use the
three phase fault analysis with auto reset in power system and any area which are needed.

1.3 Objective of the study

1.3.1 General objective

The main objective of this project to protect three phase load from different three phase fault
which is created on the system and take immediate action in order to protect the load from the
damage.

1.3.2 Specific objective

 To Study method for faults detection in three phase power.

Jimma,Ethiopia Page 3
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

 To analysis and investigate the effect of fault on system.

 To understand the characteristics faults on the transmission line.
 To study the performance of three phase power system and fault identification
technique.
 To design and simulate the fault analysis by using proteus and MATLAB softwares.

1.4 Motivation of the study

The intension of making to detect fault type to protect the three phase load from any fault occurs
on the power system brought to the development of this project.

1.5 Significance of the study

This project is to indicate the order of succession in time off the different voltage peaks of a
multiphase supply. In addition the knop sequence indicator enables one to make continuity tests.
It is valuable instrument in diverse fields involving poly phase power apparatus (three phase),
being employed by line and installations crews for public utility systems and industrial plant
electrical departments. Furthermore, it is helpful in the testing department of public utility
systems for laboratory and field testing. Various studies have shown that anywhere from 70%
to as high as 90% of faults on most overhead lines are transient. A transient fault such as an
insulator flashover, is a fault which is cleared by the immediate tripping of one or more circuit
breakers to isolate the fault and which does not recur when the line is re-energized. Faults tend to
be less transient or near 80% range at lower distribution voltages and more transient or near 90%
range at higher,sub transmission and transmission voltages.Lightning is the most common cause
of transient faults, partially resulting from insulator flashover from the high transient voltages
induced by the lightning.In general significance study of this project is to study three phase fault
analysis specifically in transmission line and by solving this problem improving the quality of
power for transmission line.

Jimma,Ethiopia Page 4
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

1.6 Methodology

The methodology of this project involves a number of different tasks that are performed to lead
towards completion.The first task is to describe the statement of the problem and define the
objectives of the project.This is followed by the literature review where all the theoretical
information regarding the component of the three phase fault analysis with auto reset for
temporary fault other ways trip permanently is gathered.Acomparison of previous similar
project is also presented.Abrief description on the on 555 timer and comparator is then presented.
Simulation studies are carried out for tripping circuits and Power supply circuits to show the
results matches with calculation and project object. In addition to this the simulation studies are
carried out at final circuit. The final stage is the conclusion based on our project

Start

Stage 1: Literature Review

Stage 2: Identify the problem

Stage 3: Method to model and Solve

Stage 4: Testing and validate Results with proteus/MATLAB

software

End

Figure 1. 1 Methodology flow chart

Jimma,Ethiopia Page 5
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

1.7 Material required

The completion of this project requires important equipment in order to safeguard successfully.
The equipment/components that were used during the construction of this project are:

 STEP-DOWN TRANSFORMER(220V-12V)
 DIODE
 VOLTAGE REGULATOR
 RELAY
 COMPARATOR
 THE 555 TIMER
 TRANSISTOR
 CAPACITOR
 RESISTOR
 PUSH BUTTON

1.8 Organization of the thesis

The thesis is organized into five chapters.

Chapter One describes the background of the system, statement of the problem, the objectives of
the project, motivation of the project and significance of the project.

Chapter Two review about some theory and literature review of the information found on all the
material or data used in the Development of the system.

Chapter Three explains the block diagram of the overall system briefly.

Chapter Four also explains the design details and discussion of all the system simulation results
designed by using proteus and MATLAB software..

Chapter Five show the summary after all and come up with some recommendations and
Conclusion.

Jimma,Ethiopia Page 6
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

Chapter two

2 Theory and Literature Review

( Hyo-SanByung-Ik- jung, g-choi, Doung- chul chung 2012) Analyses of the unbalanced faults
such as single and double line to ground in three phase transmission line are discussed using
symmetrical co-ordinate method. This unbalanced current of three phases was indicated by three
balanced symmetrical components using this symmetrical coordinate method comparing the
component sizes. Controls unbalanced fault by changing primary secondary coil turn, it can even
reduce the current value of symmetrical component.

(Mladen Kezunovic,2014) The transmission line fault analysis is analyzed using synchronized
sampling with an automated analysis approach which can automatically characterized fault and
subsequently relay operation is performed this is achieved by changing the instantaneous power
on all three phase connected at two end of transmission line using synchronized voltage &
current sample fault classification and location of power transmission line using artificial neural
network is discussed based on ANN and this method is not dependent on fault inception angle
and the process of ANN is achieved by MATLAB/Neural network tool box.

(Anamika Yadav, 2015) Improved fault location algorithm for multiple fault location in
compressed transmission line by combining discrete WT & A-NN based fault location algorithm
in this method unlike other fault location scheme this method does not require fault classification
i.e. fault type and faulty phase information. The main significant contribution is it not only pin
point the location of shunt fault occurring at single location but also find the location of multi-
location and transforming fault that to using single terminal data).

In the world today electric power is generated, transmitted and distributed in large interconnected
power systems. The generation of the power takes place in a power plant and the power
generated is transmitted by transmission lines in a many areas. In this system, the voltage is
raised by the transformer before the transmit ion takes place. Under normal operating conditions,
current will flow through all elements of the electrical power system within pre-designed values

Jimma,Ethiopia Page 7
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

which are appropriate to that electrical equipment. However, due to many causes electrical fault
can be created. Such causes are:-

a. Bad weather – when bad weather, lightning may cause fault by striking the bus bar.

b. Tree – when the branch of the tree fall out and touch the line may cause fault to occur. It
depends on how much the branch touch the line to determine the type of fault.

c. Animal – short circuit may cause by the animal like monkey, when it touched between one or
more line short circuit will occur.

d. Human error – human mistake are also the main causes.

Thus, those faults created in a power system leads to electrical equipment mal functioning and
damage. Such event created during this undesirable situations and connection between the phase
conductors of a transmission lines or the phase conductors to ground is called faults. They can be
symmetrical like short circuit formation across all three phases or asymmetrical like line to
ground, line to line and three phases to line. Fault may cause equipment fails to operate in
normal condition. This unwanted condition or abnormal situations may involve failure and
damage equipment‟s like generator, transmission line, bus bars and others.

2.1Type of Faults
There are two types of faults which can occur on any transmission lines; balanced faults and
unbalanced fault also known as symmetrical and asymmetrical faults respectively. Most of the
faults that occur on power systems are not the balanced three-phase faults, but the unbalances
faults. In addition, faults can be categorized as the shunt faults, series faults and simultaneous
faults [1]. In the analysis of power system under fault conditions, it is necessary to make a
division between the types of fault to ensure the best results, possible in the analysis. However,
for this project mostly shunt faults are to be analyzed.

2.1.1 Series Faults

Series faults represent open conductor and take place when unbalanced series impedance
conditions of the lines are present. Two examples of series fault are when the system holds one
or two broken lines, or impedance inserted in one or two lines. In the real world a series faults

Jimma,Ethiopia Page 8
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

takes place, for example, when circuit breakers controls the lines and do not open all three
phases, in this case, one or two phases of the line may be open while the other is closed[6].
Series faults are characterized by increase of voltage and frequency and fall in current in the
faulted phases.

2.1.2. Shunt Faults

The shunt faults are the most common type of fault taking place in the field. They involve power
conductors or conductor-to-ground or short circuits between conductors.One of the most
important characteristics of shunt faults is the increment the current suffers and fall in voltage
and frequency. Shunt faults cab be classified into four categories[7].
Line-to-ground fault:-This type of fault exists when one phase of any transmission lines
establishes a connection with the ground either by ice, wind, falling tree or any other incident.Up
to 70% of transmission line faults are classified under this category [8].

Line-to-line fault:-As a result of high winds, one phase could touch anther phase & line-to-line
fault takes place.The 15% of all transmission lines faults are considered to be line-to-line
faults[8].

Double line-to-ground:-Falling tree where two phases become in contact with the ground could
lead to this type of fault.In addition; two phases will be involved instead of one at the line-to-
ground faults situations.The 10% of all transmission lines faults are under this type of faults [8].

Three phase fault:-In this case, falling tower, failure of equipment or even a line breaking and
touching the remaining phases can cause three phase faults. In reality, this type of fault not often
exists which can be seen up to 5% of all transmission lines faults[8].

Jimma,Ethiopia Page 9
 JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

Chapter Three

3 Block diagram descriptions

In this project the design system is built using step down transformer having input 220 volt and
output 12 volt. Here the voltage is reduced because; this concept follows the low voltage testing
of fault condition. The 555 timers are used for handling short duration and long duration fault
conditions. A set of switches are used to create the LL, LG and 3L fault in low voltage side, for
activating the tripping mechanism. Short duration fault returns the supply to the load
immediately and is called as temporary trip while long duration results in permanent trip.

3.1 General block diagram of the system

Monostabl
e 555 timer
Bridge
Relay

Transfor
mer Astable
Voltage Fault
555 timer
regulator switch

Comparator
BJT
3-phase
supply

3-phase
load relay
Fig 3. 1 System block diagram

Jimma,Ethiopia Page 10
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

3.2Each Block description

3.2.1 Power Supply

To start up trip circuit for fault analysis 555 timers, push button, voltage regulator, relay and
Power supply is needed. The ideal voltage for comparator is 5V. It should not be higher than
5.5V because it going to blow up. It also should not be less than 2V because it does not going to
be operate. For the circuit LM 7805 is used, which gives the required output of 5V. The voltage
regulator regulates above its required output voltage. The output voltage below required output
would be passed without being regulated. For LM7805, if the unregulated input voltage is greater
than 5V, it will be regulated to 5V. If it is less than 5V, output would be passed without being
regulated. Power supply section can be broken down into a series of blocks, each of which
performs a Particular function.

Step-down Rectifier Capacitor Voltage

transforme diode
AC 220V regulator
r

Fig 3. 2 power supply

Each of the blocks is described below with detail explanation:

 Transformer- steps down high voltage AC ( main supply) to low voltage AC.
 Rectifier- converts AC to DC, but the DC output is varying.
 Smoothing- smoothes the DC by varying greatly to a small ripple.
 Regulator- eliminates ripple by setting DC output to a fixed voltage

A 220/12volts transformer was used to step down voltage from the main supply and given to the
power section of the project prototype. A unidirectional (DC) bridge circuit received the 12V AC
from the power section and rectified it into 12V DC. The 12V DC signal then filtered by the
capacitor and given to 7805 voltage regulator. The 7805 voltage regulator had a constant output
of 5V DC, which was the required voltage to power comparator.

Jimma,Ethiopia Page 11
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

3.3 Transformer

A transformer is an electrical apparatus used to convert high voltage to low voltage or low
voltage to high voltage. That means it is designed to "step up" or "step down" voltages. The input
coil of the transformer is called the primary and the output coil is called the secondary. There is
no electrical connection between the two coils instead they are linked by an alternating magnetic
field created in the soft-iron core of the transformer. The two lines in the middle of the circuit
symbol represent the core.

Transformer works on the magnetic induction principle. A varying current in the primary
winding creates a varying magnetic flux in the transformer's core and thus a varying magnetic
flux through the secondary winding. This varying magnetic flux induces a varying electromotive
force or voltage in the secondary winding. A transformer has no moving parts and is a
completely static solid device which insures under normal operating conditions along. The
arrangement of primary and secondary windings on the transformer core including voltage,
current and flux in the windings are shown in Fig 3.3.

Fig 3. 3 Transformer

Jimma,Ethiopia Page 12
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

The transformers consists incoming energy which is transformed from the primary circuit to the
magnetic field and into the ratio of the number of turns on each coil called the turn‟s ratio which
determines the ratio of the voltages. A step-down transformer has a large number of turns on its
primary coil which is connected to the high voltage main supply. A small number of turns on its
secondary coil will give a low output voltage. The equation below shows the relation of voltage
and number of turns in a transformer.

V1 / V2 = N1 / N2 =I2 / I1…………………………………………………….. (3.1)

Where

V1 = primary or input voltage.

V2 = secondary or output voltage

N1 = number of turns on primary coil

N2= number of turns on secondary coil

I1 = primary or input current

I2= secondary or output current

Or V1/V2 is called the voltage ratio and N1/N2 is the turn‟s ratio of the transformer. If N2 is less
than N1 then V2 is less than V1 and the transformer is Saied to be step-down transformer. If N2
is greater than N1 then V2 is greater than V1 and the transformer is said to be Step-up
transformer. When the secondary coil is attached to the load that allows current to flow electrical
power is transmitted from the primary circuit to the secondary circuit. The transformers are range
in size from small-sized units to units weighing hundreds of tons interconnecting the power grid.
A wide range of transformer depending on their size and weight are designed commonly used in
a electric power applications which require the conversion of AC voltage from one voltage level
to another.

3.4 Bridge Rectifier

A rectifier is an electrical device that converts alternating current to direct current or it can also
be defined as an electronic device used to convert ac voltage or current into unidirectional

Jimma,Ethiopia Page 13
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

voltage or current. Essentially, rectification needs unidirectional device. So, diode is preferred
due to its unidirectional property.

A diode bridge or bridge rectifier is an arrangement of some diodes connected in a bridge circuit
that provides the same polarity of output voltage for any polarity of the input voltage. As result,
using number of diodes in a specific arrangement for more efficient converting of AC to DC is
possible rather than using only one diode.

Rectifier can be divided into two categories: - Half wave rectifier and Full wave rectifier. But,
this project uses full wave or bridge rectifier.

3.4.1 Full-wave rectifier

Full-wave rectification converts both polarities of the input waveform to DC (direct current) and
is more efficient. That means, a full-wave rectifier converts the whole of the input waveform to
one of constant polarity (positive or negative) at its output by reversing the negative (or positive)
portions of the alternating current waveform. The positive (or negative) portions thus combine
with the reversed negative (or positive) portions to produce an entirely positive (or negative)
voltage/current waveform [3].

Fig 3. 4 Bridge rectifier

Full wave rectifier for each complete cycle of the input voltage, the full wave rectifier produces
two cycles at the output that are both in the same direction [3].

The frequency of the output doubles compared to the input, i.e. 𝑓𝑜𝑢𝑡=2𝑓𝑖𝑛.

Jimma,Ethiopia Page 14
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

3.4.2 The Rectification Mechanism

The rectification mechanism of the bridge rectifier can be described as follows:-

In the positive input cycle, D1 and D2 are forward biased and conduct current in the direction
Shown in Fig 3.5 (a). This produces a positive output at the resistance load RL.

During the negative input cycle, D3 and D4 are forward biased and conduct current in
the direction shown in Fig 3.5 (b). As this direction is also the same as in the positive cycle, it
produces positive output at RL.

Fig 3. 5 Full-Bridge rectification and operation

Fig 3.5 a, Full-Bridge rectifier with positive half cycle of the input,D1and D2 forward
biased(conducts current) and reverse biased with D3 and D4(not conduct current)

Fig 3.5 b, Full-Bridge rectifier with negative half –cycle of the input,D3andD4 forward
biased(conducts current) and reverse biased with D1 and D2(not conduct current)

Jimma,Ethiopia Page 15
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

3.5 Voltage Regulator

A voltage regulator is designed to automatically maintain a constant voltage level. It may use an
electromechanical mechanism, or electronics components. Depending on the design, Voltage
regulator may be used to regulate one or more ac or dc voltages. But, we use series of three
terminal positive regulator LM7805 type, which is specially available and used because the
voltage from the voltage source is not fixed it alters. Since, fixed supply voltage to the circuit is
needed. And with several fixed output voltages( 5,6,8,10,12,15,18,24v), making them useful in a
wide range of applications. Each type employs internal current limiting, thermal shutdown and
safe operating area protection, making it essentially indestructible. If adequate heat sinking is
provided, they can deliver over 1A output Current. Although designed primarily as fixed voltage
regulators, these devices can be used with external components to obtain adjustable voltages and
currents as shown in the Fig 3.6 below. It has 3 pin, two is input and the other is ground 7805
voltage regulator gives +5v supply.

Fig 3. 6 LM7805 Voltage Regulator

3.6 Relay

A relay is an electrically operated switch that detects the abnormal conditions in the electrical
circuits by constantly measuring the electrical quantities which are different under normal and
fault conditions. The electrical quantities which may change under fault conditions are voltage,
current, frequency and phase angle. Through the changes in one or more of these quantities, the
faults signal their presence, type and location to the relays. Having detected the fault, the relay
operates to trip the circuit this results in the isolating of pure circuit from the faulty circuit [2].

Jimma,Ethiopia Page 16
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

Therefore, it is designed to withstand heavy power surges and severe environment conditions.
The Fig 3.7 shown below the relay and its contact. There are three terminal of the relay
contact one is common for the supply and the remaining two are normally opened and
normally Closed.

Fig 3. 7 Relay and Relay Contact

3.6.1 Relay operation

A relay contains sensing unit, the electric coil which is powered by AC or DC current. When
applied current or voltage exceeds a desired value the coil activates the armature, which operates
either to close the contacts or to open the closed contacts. That is, power is supplied to the coil
and it generates magnetic force in the coil that actuates the switching mechanism to separate the
supply circuit from the load circuit.

3.7 Comparator

A comparator is a device that accepts two analog in puts, compares the inputs and produces
output that is a function of which input is higher. That is comparator compares the voltages at the
+ and – inputs. If the + input is at a higher voltage than the – input the comparator output will be
high. If the – input is at a higher voltage than the + input the comparator output will be low. To
use operational amplifiers in open loop as comparators is quite common. This especially applies
when an op amp is already used in the application, giving the user the opportunity to use a dual
channel op amp which can save space in the application. This is possible even if a better
alternative is to use comparators that are optimized for this purpose. A Voltage Comparator is
equivalent to an Operational Amplifier, Such as the LM358 with two NPN transistors added to
the output of each amplifier and each output can withstand voltages of up to 50 Volts. It has two
inputs, inverting and non-inverting and an output (see Fig 3.8). But it is specifically designed to

Jimma,Ethiopia Page 17
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

compare the voltages between its two inputs. The comparator operates open-loop, providing a
two-state logic output voltage. These two states represent the sign of the net difference between
the two inputs (including the effects of the comparator input offset voltage). Therefore, the
comparator's output will be logic "1" if the input signal on the non-inverting input exceeds the
signal on the inverting input (offset voltage, Vos) and logic "0" for the opposite case.

Fig 3. 8 The Comparator

Potential dividers are connected to the inverting and non-inverting inputs of the op-amp to give
some voltage at these terminals. Supply voltage is given to +Vss and –Vss and it is connected to
the ground. The output of this comparator will be logic high (i.e., supply voltage) if the non-
inverting terminal input is greater than the inverting terminal input of the comparator.
i.e., Non inverting input (+) > inverting input (-) = output is logic high
If the inverting terminal input is greater than the non-inverting terminal input then the output of
the comparator will be logic low.
i.e., inverting input (-) > Non inverting input (+) = output is logic low

3.8 The 555 IC Timer

The 555 Timer IC is an integrated timing circuit highly stable controller capable of producing
accurate time delays, or oscillation. In the time delay mode of operation, the time is precisely
controlled by one external resistor and capacitor. For a stable operation as an oscillator, the free
running frequency and the duty cycle are both accurately controlled with external resistors and
capacitors.

The 555 timer is reliable, easy to use, and economical. IC 555 has been used to implement
number of applications, such as monostable and astable multivibrators, precision timing, pulse
generation, sequential timing, time delay generation, DC-DC converters, digital logic probes,

Jimma,Ethiopia Page 18
 JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

waveform generators, analog frequency meters and tachometers, temperature measurement and
control, toxic gas alarms, voltage regulators, etc. The 555 timer IC has the following features:

 High-current drive capability: 200mA

 Adjustable duty cycle200 mA
 Temperature stability of 0.005%/°c
 Timing from micro second to hours
 Turn of time less than 2 micro second
 Operates in both astable and monostable mode
 Maximum operating frequency greater than 500 kHz
 Reliable, ease to use, and low cost.

Table 3. 1 Ordering information

Description Temperature Order code

range

8-pin plastic small outline (SO) package 0 to +700C N555D

8-pin plastic dual in-line package (DIP) 0 to +70°C NE555N

8-pin plastic dual in-line package (DIP) 0 to +70°C LM555CM

8-pin plastic dual in line package (DIP) -40 to +85°C SA555N8

8-pin plastic small outline (SO) package -40 to +85°C SA555D

8-pin hermetic ceramic (CERDIP) -55 to +125°C SE555CFE

8-pin plastic dual in line package (DIP) -55 to +125°C SE555CN

14-pin plastic dual in line package (DIP) -55 to +125°C SE555N

14-pin ceramic D.I.P.(CERDIP) 0 to +70°C NE555F

14-pin ceramic D.I.P.(CERDIP) -55 to +125°C SE555F

14-piin ceramic D.I.P.(CERDIP) -55 to +125°c SE555CF

Jimma,Ethiopia Page 19
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

8 pin Dual In -Line Package (DIP) IC555 Timer Fig 3.9 shown below with its pin description.

Fig 3. 9 Schematic diagram of 555 timer

Pin 1 (Ground):- The ground (or common) pin is the most-negative supply potential of the
device, which is normally connected to circuit common (ground) when operated from positive
supply voltages.

Pin 2 (Trigger):- The output of the timer depends on the amplitude of the external trigger pulse
applied to this pin. The output is low if the voltage at this pin is greater than 2/3VCC. However,
when a negative going pulse of amplitude greater than 1/3VCC is applied to this pin, the
comparator 2 outputs goes low, which in turn switches the output to the timer high. The output
remains high as long as the trigger terminal is held at a low voltage.

Pin 3 (Output):-There are two ways a load can be connected to the output terminal - either
between pin 3 and ground (pin 1) called as normally off load or between pin 3 and supply
voltage +VCC(pin 8) called as normally on load.

Pin 4 (Reset):- This pin is also used to reset the latch and return the output to a low state. The
reset pin will force the output to go low, no matter what state the other inputs to the flip-flop are
in. When not used, it is recommended that the reset input be tied to V+ to avoid any possibility
of false resetting.

Pin 5 (Control Voltage Terminal):-The function of this terminal is to control the threshold and
trigger levels. Thus either the external voltage or a pot connected to this pin determines the pulse
width of the output waveform.

Jimma,Ethiopia Page 20
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

Pin 6 (Threshold Terminal):- This is the non-inverting input terminal of comparator 1, which
compares the voltage applied to the terminal with a reference voltage of 2/3Vcc. The amplitude
of voltage applied to this terminal is responsible for the set state of flip-flop.

Pin 7(Discharge Terminal):- This pin is connected internally to the collector of transistor and
mostly a capacitor is connected between this terminal and ground.

Pin 8( Supply Terminal):- A supply voltage of + 5 V to + 18 V is applied to this terminal with

respect to ground.

3.8.1 The 555 timer operating modes

The 555 timer is operating as Monostable mode, and Astable mode. The description of each
mode is discussed below:

As a monostable mode:-In this mode, the 555 timer functions as a one-shot pulse generator.
Applications include timers, missing pulse detection, bounce free switches, touch switches,
frequency divider, capacitance measurement, and so on. The 555 timer can be used as a
monostable using the circuit shown in Fig 3.10 below.

Fig 3. 10 The 555 timer as a Monostable

Jimma,Ethiopia Page 21
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

The operation of the 555 timer as monostable mode is described as:-

 The output is normally low but will go high for a short length of time depending on the
values of the other components.
 R and C determine the time period of the output pulse.
 The input is normally high and goes low to trigger the output (falling edge triggered).
 The length of the input pulse must be less than the length of the output pulse.
 The 47Uf capacitor „decouples‟ the supply to avoid affecting other parts of the circuit.
 It is standard to add a 10Nf capacitor from pin5 to ground.

The minimum value of R should be about 1 kΩ to avoid too much current flowing into the 555
timer. The maximum value of R should be about 1Mohm so that enough current can flow into
the input of the 555 timer, and there is also current needed to allow the electrolytic capacitors
leakage current. The minimum value of capacitor is 100 pf which will avoid the timing equation
being too far off. The maximum value of capacitor should be about 1000µF as any bigger
capacitors will discharge too much current through the chip. These maximum and minimum
values give a minimum period of 0.1 µs and a maximum period of 1000s.
As astable mode:-The 555 timer can operate as an oscillator. Astable modes also called as free
running mode. The 555 timer can be used as an astable with the circuit shown in Fig 3.11
below.

Fig 3. 11 The 555 timer as Astable

Jimma,Ethiopia Page 22
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

The operation of 555 timer as astable mode is described below:

The output will oscillate between high and low continuously – the circuit is not
stable in any state
Ra, Rb and C determine the time period of the output
The reset, pin 4, must be held high for the circuit to oscillate. If pin 4 is held low
then the output remains low. Pin 4 can be used to turn the astable „on‟ and „off‟ in
effect
The 47uf capacitor „decouples‟ the supply to avoid affecting other parts of the
circuit
It is standard to add a 0.01uf capacitor from pin5 to ground.
As with the monostable, the minimum value of Ra should be about 1k ohm to avoid too much
current flowing into the 555 timer.The maximum value of Ra or Rb should be about 1M ohm so
that enough current can flow into the input of the 555 timer and there is also current to allow for
the electrolytic capacitors leakage current.

The minimum value of capacitor is 100Pf in order to avoid the timing equation being too far off.
The maximum value of capacitor should be about 1000µF as any bigger capacitors will
discharge too much current through the chip. These maximum and minimum values give a
minimum frequency of 0.001 Hz and a maximum frequency of 4.8 MHz.

Considering the oscillations in more detail:

 The output is controlled by the charging and discharging of the capacitor.
 The capacitor charges through Ra and Rb.
 The Capacitor discharges through the discharge pin (pin 7) and thus only through
Rb.
 The time that the capacitor takes to charge or discharge is given as T = 0.7 R C.
 Thus the charge time is 0.7 (Ra + Rb) C.
 The discharge time is 0.7 Rb C.
 Giving a total time of (0.7 (Ra + Rb) C) + (0.7 Rb C) = 0.7 (Ra + 2Rb) C.
 The 555 astable cannot produce a square wave.

Jimma,Ethiopia Page 23
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

3.9 Switch

A switch is an electrical component that can break an electrical circuit, interrupting the current
or diverting it from one conductor to another. Switches are made to handle a wide range of
voltages and currents; very large switches may be used to isolate high-voltage circuits in
electrical substations. But, switch in this project is used to create fault condition.

3.10 Transistor

Transistor is a solid state semi-conductor device that is capable to amplify current in a circuit
based on voltage or current delivered to the terminals. It consists bipolar junction transistor or
BJT.

3.10.1 BJT transistor

A bipolar junction transistor (BJT) has three layers, 2-junction device with emitter (E), base (S)
and collector (C) regions. The two junctions are emitter-to-base junction collector-to-base
junction. Further the BJT may be either npn type or pnp type. In npn BJT, a p-region is
sandwiched between two regions while in pnp BJT, n region is sandwiched between two p-
regions. The word bipolar implies that current flow in the device results from the movements of
both types of charge carriers namely holes and electrons. In npn BJT, the arrowhead points away
from the base line while in pnp transistor, the arrow head points towards the base. In both cases,
the arrowhead indicates the direction of flow of conventional current. For high power operation,
BC548 npn BJTs are more popularly used because they are easier to construct and are cheaper.
In this project it is used for switching purpose of relay driver connected with load.

Fig 3. 12 BC548 NPN BJT

Jimma,Ethiopia Page 24
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

Chapter four

4 System design and simulation result

4.1 Mathematical Analysis

4.2 Types of faults

There are two types of faults which can occur on any transmission lines; balanced fault and
unbalanced fault also known as symmetrical and asymmetrical fault respectively. Most of the
faults that occur on the power systems are unbalanced faults. In addition,faults can be
categorized as shunt faults and series faults. Series faults are those type of faults which occur
in impedance of the line and does not involve neutral or ground, nor does it involves any
interconnection between the phases. In this type of faults there is increase of voltage and
frequency and decrease of current level in the faulted phases. Example: opening of one or two
lines by circuit breakers. Shunt faults are the unbalance between phases or between ground
and phases. This project only considers asymmetrical fault. In this type of faults there is increase
of current and decrease of frequency and voltage level in the faulted phases. The asymmetrical
faults can be categorized into four types:-

4.2.1 Single line to ground fault

In this type of fault, any one phase makes connection with the ground.
a

b
c
Ia
Va Vb Vc Zf

Fig 4. 1 Single line to ground fault

Jimma,Ethiopia Page 25
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

Assuming that fault current ( If) occurred on the phase a with fault impedance (Zf). The

voltages and currents at the point of fault are Va=Zf*Ia ,Ib = Ic = 0

…………………………………………….. (4.1)

Since fault current in the phase b and the phase c is zero.

……………………………………………….. (4.2)

It implies that the sequence current are equal and sequence network must be connected in
series. The sequence voltage add to 3ZfIa+

………………………………………..(4.3)

Where, Zo, Z 1 , Z2 are a zero, a positive and a negative sequence impedance respectively.

4.2.2 Line to line fault

In this fault, the connection or contact between the two phases occurs.

Assume fault current (If) occur when the phase b and the phase c make connection with each
other and taking(Zf) as the fault impedance.

………………………………….…………….. (4.4)

Jimma,Ethiopia Page 26
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

Fig 4. 2 Line to line fault

Since fault current is present in the phase b and the phase c only,

…………………………………………….. (4.5)

……………………………………….. (4.6)

4.2.3 Double line to ground fault

In this type of fault, two phases established the connection with the ground.

Assuming the phase b and the phase c are connected to the ground through the fault
Impedance (Zf). So, fault current on phase a, Ia= 0 Since the phase b and the phase c make
connection, fault voltages at phase b and phase c are

………………………………………….. (4.7)

Jimma,Ethiopia Page 27
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

Fig 4. 3 Double line to ground fault

Fault currents is present in the phase b and the phase c,

…………………………….. (4.8)
We get,

……………………………………….. (4.9)
Fault current,

If = Ib + Ic = 2Ia0 – (Ia+ + Ia-………………………………………….. (4.10)

Jimma,Ethiopia Page 28
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

4.3 Fualt calculation

Let data from gilgel - gibe to jimma

L = 71.32km

Vn = 132kv

I = 0.49kA

Positive and negative sequence value

r= 0.1905ohm/km

x= 0.4373ohm/km

z= √ …………………………………………………….. (4.11)

=√

= 34 ohm

Zero sequence value

Ro= 0.4155ohm/km

Xo= 1.248ohm/km

z= √ ……………………………………..………………….. (4.12)

= 93.81ohm

Zf = 5ohm

3- Phase fault

If = …………………………………………………….………….. (4.13)

= = 3.38KA

Jimma,Ethiopia Page 29
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

Single line to ground (SL-G) fault

……………………………………….. (4.14)

= = 0.746kA

So, If =3Ia1 = 2.238kA

Line to line (LL) fault

Under this fault there is no zero sequence

Ia1 = -Ia2 = ……………………………………………….. (4.15)

= = 1.808 KA

So, If = - j√ Ia1 = j√ * 1.808kA

= 3.13KA

Double line to ground fault

…………………..…………………….. (4.16)

= 2.2kA

……………………………………….. (4.17)

Jimma,Ethiopia Page 30
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

=- *2.2

= -0.524KA

……………………………………….. (4.18)

= * 2.2

= -1.522KA

So, If = Ib + Ic = 2Ia0 – (Ia1 + Ia2) …………………..……………….. (4.19)

= -1.048 + 0.678 = -1.726KA

4.4 Turns and Current Ratios of Transformer

The number of flux lines developed in a core is proportional to the magnetizing force (in ampere-
turns) of the primary and secondary windings. The ampere-turn (I ×N) is a measure of magneto
motive force; it is defined as the magneto motive force developed by one ampere of current
flowing in a coil of one turn. The flux which exists in the core of a transformer surrounds both
the primary and secondary windings. Since the flux is the same for both windings, the ampere-
turns in both the primary and secondary windings shuld be the same.

= = ………………………………………….. (4.20)

Where:

= the number of turn ratio at the secondary side

= the number of turn ratio at the primary side

Jimma,Ethiopia Page 31
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

= Voltage across the secondary in volts

= Voltage applied at the primary in volts

= current in the primary in ampere

= current in the secondary in ampere

Therefore, for this project the primary voltage 220V providing the turn ratio at the primary side
100 and the voltages across the secondary side 12V.Calculating the number of turn of the
secondary side. Means by using above equation 4.20.

Given NP =100

VP =220V

Required

NS =?

VS =5V

Solution

From the relation Ns = * Np

= (12/220)*100

=6

Jimma,Ethiopia Page 32
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

4.5 Working principle

The project uses step-down transformers for handling the entire circuit under low voltage
conditions of 12v to test the three phase fault analysis. The output of the transformer is rectified
and filtered individually and is given to relay coils. A push button, connected across the relay
coil is meant to create a fault condition. i.e. LL Fault or LG Fault. The NC contacts of the relays
are grounded. The other point of NC are given to pin2 through a resistor R2 to a 555 timer
i.e. wired in monostable mode. The output of the same timer is connected to the reset pin 4 of
another 555 timer wired in astable mode. LED‟S are connected at their output to indicate their
status. The output of the U1 555 timer from pin3 is given to an comparator LM358 then to the
non-inverting input pin3, while the inverting input is kept at a fixed voltage by a potential divider
RV1. The voltage at pin2 coming from the potential divider is so held that it is higher than the
pin3 of the Op-amp used as a comparator so that pin1 develops zero logic that fails to operate
the relay through the driver transistor Q1. This relay Q1 is coil relay i.e. is meant for
disconnecting the load to indicate fault conditions.

Fig 4. 4 Schematic Diagram

Jimma,Ethiopia Page 33
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

4.6 Operating Procedure

The relay coils will obtain DC voltage while the board is powered from a three phase supply and
their common point disconnects from the NC and moves on to the Normally Open (NO) points
by providing logic high at pin 2 of 555 timer U2 i.e. that is kept on monostable mode. During the
push button across the relay is pressed, it disconnects the relay. During the process, in common
contacts moves to the NC position to provide a logic low at trigger pin of 555 timer in order to
develop an output that brings the U3 555 timer where it is used in astable mode for its reset pin
to high. The astable operation takes place at its output which is also indicated by flashing D2
LED. The astable timer of the output of which the charges capacitor C6 through R9 will cause
the output of the comparator goes high and drives the relay to switch off three phase load.

The output of Op-amp remains high indefinitely through a positive feedback that was provided
for its pin 1 to pin 3 through a forward biased diode and a resistor in series. This will cause the
relay to be permanently switched on in order to disconnect the load connected as the NC contacts
permanently off.

4.7 Simulation result of power supply circuit

Fig 4. 5 Design power supply result

Jimma,Ethiopia Page 34
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

Fig 4. 6 Simulated wave form for power supply

4.8 Simulation result of fault analysis trip circuit (L-G)

Fig 4. 7 overall trip circuit diagram

Jimma,Ethiopia Page 35
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

Fig 4. 8 Simulated overall trip circuit diagram

In the above Fig 4.8 we analysis that before the interruption of the system i.e. at fault free time.
During this time the system show that the normal wave form.

Fig 4. 9 Simulation result of L-G fault is occur (after fault push Button OFF)

Jimma,Ethiopia Page 36
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

Three phase fault analysis trip circuit diagram after L-G fault is remove from the system i.e.
when fault push button is OFF. During this condition normal operating current will flow through
all elements of the electrical power system within pre-designed values which are appropriate to
these element ratings. This indicates that when short circuit is cleared in power system the
voltage is getting come to normal and the current of the system become decreasing called fault
current. This fault current clear than the wave form of the system come to normal as analyzed
above Fig 4.9.

Fig 4. 10 Simulation result of L-G fault is occur (after fault push button ON)
Three phase fault analysis trip circuit diagram after L-G fault is getting clear i.e. when fault push
button is ON. This indicates that when short circuit raised in power system the voltage is getting
zero and the current of the system become increasing called fault current in the power system.
This fault current disturbs the wave form the circuit as it analyzed in above the Fig 4.10.

Jimma,Ethiopia Page 37
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

4.9 Limitation
In case of this project in protues software there is a problem of components that means some
components are not found in this software. For example CT, VT, contactor and also there is lack
of knowledge about the microcontroller based program and the circuit is very complicated to
show all the type of fault.so due to above reasons/limitation not possible to simulate the trip
circuit for L-L-G and 3LG fault for this project by using the protues software. In this project the
result from this software only the result to gate is the L-G fault. So, searching the other option to
overcome the above limitation by using the MATLAB software to simulate the L-L and 3LG
faults.

Jimma,Ethiopia Page 38
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

4.10 Simulation result of fault analysis trip circuit (L-L)

Voltage

Current

Fig 4. 11 The result of temporary fault for L-L

Jimma,Ethiopia Page 39
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

In the Fig 4.11 above it is shown that fault occurs on line to line (L-L) at a time 0.05 second and
it is cleared at 0.15 second. It is a Temporary fault which is cleared by auto reset.

4.11 Simulation result of fault analysis trip circuit (3LG)

Voltage

Current

Fig 4. 12 The result of temporary fault 3 L-G

Jimma,Ethiopia Page 40
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

In the Fig 4.12 above it is shown that fault occurs on 3LG at a time 0.05 second and it is cleared
at 0.15 second. It is a temporary fault which is cleared by auto reset.

4.12 Result and Discussion

After the simulation, the development of an auto reset has been done and completely functioned
as the simulation. The prototype of Auto-reset that can detect the temporary and permanent fault
also can automatically re-closed the circuit breaker if the temporary fault happens and different
voltage unbalance such as LL(Line to Line), LG(Line to Ground), 3L(Three Lines) has been
observed. These faults are carried out by closing the fault switch in Simulink model. The board
of Auto reset is powered from the three phase supply and the relay coils obtained DC voltage and
their common point was disconnected from the NC and later moves on to the NO points by
providing logic high at pin 2 of 555 timer U2. During the push button across the relay is been
pressed, it disconnects the relay and in the process, in common contacts moves to the NC
position to provide a logic low to trigger the 555 timer pin. This is to develop an output that
brings the U1 555 timer which is used in astable mode to reset the pin to high.

If the push button pressed is released immediately a temporary fault is created. The 555 Timer
detect low voltage in a short period of time so that the monostable mode could be set and the
astable mode could be disabled. The current would deactivate the relay coil to cut the current
from supply to the lamp when the button is pressed. However, after a few second the 555 timer
will restart and reactivate the relay coil so that the lamp started to operate once again.

Jimma,Ethiopia Page 41
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

4.13 Further improvements and Future scope

GSM based protections system is a reliable technique for monitoring and controlling the electric
power transmission line system, the microcontroller works up to 100 ⁰C temperature. For long
distance data transmission, GSM technology is a reliable and robust one. Any kind of fault
occurring in the transmission system results the GSM modules to send instant messages
automatically to the base station. Frequent fault occurrence can be a problem; in this case the
cost of sending SMS will increase resulting in account recharge in the GSM SIM number.
Nonetheless, GSM based microcontroller protection system will serve as a reliable, easy and cost
effective solution for monitoring and controlling the electric power system.

4.14 Applications

The auto reset and tripping technique for temporary and permanent fault analysis has further
application rather than transmission line such as in generation, distribution system, substation, in
the industries etc.

Jimma,Ethiopia Page 42
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

Chapter five

5 Conclusions and Recommendations

5.1 Conclusion

This project purpose is to develop an automatic tripping mechanism for the three phase supply
system during the occurrence of fault. Due to some cases a very high transient are occurs in
transmission line, and then it is not possible to operate circuit breaker in short time period. It will
take some time delay which may be harmful or effect on stability of system.

Faults on the power system must be restored effectively and immediately as much as possible.
This project deals with automatic tripping mechanism, and finds or gives effective technique
suitable for three phase fault analysis with auto reset in temporary fault and other wise remains
tripped. This design and simulated is done by using Proteus and MATLAB software for three
phase transformer 220v to 12 V output to develop an automatic tripping mechanism for the three
phase supply system based on fault duration. Here, the 555 timer with relay is used to identify or
analyze the fault both it is temporary or permanent and the switches are used to create fault
condition. During the fault is happen on the system their common point of the relay was
disconnected from the NC and later moves on to the NO points by providing logic high at pin 2
of 555 timer.

Jimma,Ethiopia Page 43
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

5.2 Recommendations

Fault analyzing is the difficult in the power system, because it needs a significant concern to
every system including generation, transmission and distribution of power in order to reduce the
opportunity of electrical equipment damage and failures. Hence it is necessary for everyone to
give a great attention to utilize the power system stability properly by using this automatic trip
circuit for three fault analysis with auto reset in temporary fault and otherwise trip permanently
in every area of power system.

The concept further in the future can be also advanced and extended to develop a mechanism to
send message to the operator as soon as fault is created in the system by interfacing a GSM
modem technology which tells exact location where fault occurs by giving latitude and longitude
of the place.

Jimma,Ethiopia Page 44
JiT, ECE Final year thesis, Three phase fault analysis with auto reset
2016

Reference

[1] http://en.wikipedia.org/wiki/Earth_leakage_circuit_breaker “Elektron”,

[2] S. Bakanagari1, A. M. Kumar2, M. Cheenya, Three Phase Fault Analysis with Auto Reset
for Temporary Fault and Trip for Permanent Fault, November 2013.
[3] http://www.juliantrubin.com/encyclopedia/electronics/rectifier.
[4] Turan Gonen, “Electric Power Transmission System Engineering, Analysis and Design”, Crc
Press Taylor and Francis Group.
[5] http://www.electronicsclub.cjb.net
[6] Jun Zhu. “Analysis of Transmission System Faults the Phase Domain”.
[7] C.L. Wadhwa, “Electrical Power Systems”, pp 306, New Age International, 2006
[8] Hadi Saadat. Power System Analysis. Milwaukee Scholl of Engineering. WBC McGraw-
Hill.

Jimma,Ethiopia Page 45