EEE 1201: Electrical Circuits - 1 (DC)

Series - Parallel Circuit

Course Teacher: Nafiz Ahmed Chisty

Head, Department of EEE

Associate Professor, Department of EEE & CoE
Faculty of Engineering
Room# D0105, D Building
Email: chisty@aiub.edu
Website: http://engg.aiub.edu/faculties/nafiz
Website: www.nachisty.com
 Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE| chisty@aiub.edu

Objectives
Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE

❑ Learn about the unique characteristics of series-parallel

configurations and how to solve for the voltage, current, or power to
any individual element or combination of elements.

❑ Become familiar with the voltage divider supply and the conditions
needed to use it effectively.

❑ Learn how to use a potentiometer to control the voltage across any

given load
 Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE| chisty@aiub.edu

Introduction
Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE

❑ A series-parallel configuration is one that is formed by a combination of series and parallel

elements.

❑ General approach to circuit analysis:

❑ Study the problem in total and make a brief mental sketch of the overall approach you plan
to use.

❑ Examine each region of the network independently before tying them together in series-
parallel combinations.

❑ Redraw the network as often as possible with reduced branches and undisturbed
unknown quantities to maintain clarity.

❑ When you have a solution, check to see that it is reasonable by considering the
magnitudes of the energy source and the elements in the network. If it does not seem
reasonable, either solve using another approach or check over your work very carefully
 Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE| chisty@aiub.edu

Reduce and Return Approach

Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE

❑ Reduce:
❑Reduce the circuit to its simplest form across the source and
then determine the source current (Is).

❑ Return:
❑Using the resulting source current (Is) to work back to the
desired unknown.
REDUCE

RETURN
 Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE| chisty@aiub.edu

R1=5Ω R3=5Ω R5=5Ω Example: For the series-parallel

Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE

Is
Ic Ia + ladder network, find the voltage, V6,
V6
E=20V R2=10Ω R4=10Ω R6=5Ω
- across the resistor R6.
Fig. 1
R1=5Ω R3=5Ω
Is
Ic Ia
From Fig. 6=>
Ra
E=20V R2=10Ω R4=10Ω =5+5
20
Fig. 2
=10Ω
IS = = 2A
10
R1=5Ω R3=5Ω
Is
Ic Rb From Fig. 4=>
(R 2 || Rc )IS
E=20V R2=10Ω =10||10
=5Ω

Fig. 3 Ic =
R1=5Ω Rc
= 1A
Is
Ic
Rc
E=20V R2=10Ω =5+5
=10Ω

Fig.4 From Fig. 2=>

R1=5Ω
Is
Rd
E=20V =10||10
=5Ω

Fig.5
Is
RT
E=20V =5+5 From Fig. 1=>
=10Ω

Fig.6
V 6 = IaR 6 = 2.5V
 Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE| chisty@aiub.edu

Ex. 7-3 Find IA, IB, IC, I1, I2

Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE
Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE| chisty@aiub.edu

𝐴𝑝𝑝𝑙𝑦𝑖𝑛𝑔 𝑡ℎ𝑒 𝑐𝑢𝑟𝑟𝑒𝑛𝑡 𝑑𝑖𝑣𝑖𝑑𝑒𝑟 𝑟𝑢𝑙𝑒 𝑦𝑖𝑒𝑙𝑑𝑠

𝑅𝐵 ||𝑅𝐶 𝐼𝐴 𝑅1 ||𝑅2 𝐼𝐴
𝐼𝐵 = =1𝐴 𝐼1 =
𝑅𝐵 𝑅1
𝐵𝑦 𝐾𝑖𝑟𝑐ℎℎ𝑜𝑓𝑓′𝑠 𝑐𝑢𝑟𝑟𝑒𝑛𝑡 𝑙𝑎𝑤, = 1.2 𝐴
𝐼𝐶 = 𝐼𝐴 − 𝐼𝐵 = 3𝐴 − 1𝐴 = 2 𝐴 𝐼2 = 𝐼𝐴 − 𝐼1
𝐵𝑦 𝑂ℎ𝑚′𝑠 𝑙𝑎𝑤, = 3𝐴 − 1.2𝐴
𝑉𝐴 = 𝐼𝐴 𝑅𝐴 = 3𝐴 3.6Ω = 10.8 𝑉 = 1.8 𝐴
𝑉𝐵 = 𝐼𝐵 𝑅𝐵 = 𝑉𝐶 = 𝐼𝐶 𝑅𝐶 = 2𝐴 3Ω
=6𝑉
 Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE| chisty@aiub.edu

Ex. 7-4 Find the current I4 and the voltage V2

Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE

Method 1
RT= [(R2||R3)+R1] || R4

Method 2
E
Is=
RT
{[(R2||R3)+R1] || R4 } Is
I4 = = 1.5 A
R4
{[(R2||R3)+R1] || R4 } Is
I1 =
R1 𝑅2 ||𝑅3 𝐸
R 2 ||R 3 I1 𝑉2 =
I2 =
R2
𝑅1 + 𝑅2 ||𝑅3
V2= I2R2= 4V
= 4𝑉
 Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE| chisty@aiub.edu

Ex. 7-5 Find the indicated currents and the voltages.

Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE

R A = R1// 2 // 3 = 1.2  V1 = I s RA = (4 A)(1.2  ) = 4.8V

RB = R4 // 5 = 4.8  V5 = I s RB = (4 A)(4.8  ) = 19.2V

RT = R1// 2 // 3 + R4 // 5 = 6  I4 =
V5 19.2 V
= = 2.4 A
E 24V R4 8
Is = = =4A V2 V1 4.8V
RT 6 I2 = = = = 0.8 A
R2 R2 6
 Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE| chisty@aiub.edu

Ex. 7-6 a. Find the voltages V1, V3, and Vab for the following network.
Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE

b. Calculate the source current Is.

Applying the voltage divider rule yields Using KVL in clockwise

V1 =
R1 E
=
(5)(12V )
= 7.5 V
direction:
R1 + R2 5 + 3 V1-V3+Vab= 0
R3 E (6)(12V ) = 9 V Vab = 1.5V
V3 = = By Ohm' s law,
R3 + R4 6 + 2
V 7.5V
I1 = 1 = = 15
. A
Applying Kirchhoff’s current law, R1 5
Is = I1 + I3 = 1.5A + 1.5A = 3A V
I3 = 3 =
9V
= 15
. A
R3 6
 Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE| chisty@aiub.edu

Ex. 7-7 For the following network, determine V1 and V2 and I.

Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE

Applying KCL to node a yields

I = I1 + I 2 + I 3
V2 = -E1 = -6V Using KVL in clockwise V1 E1 E1
direction: = + +
𝐸1
I2 = = 1A R1 R4 R2 + R3
𝑅4 -E1+V1-E2= 0 24V 6V 6V
𝐸1 V = 24V = + +
I3 = = 0.5A 1 6  6  12 
𝑅2+𝑅3
𝑉1 = 4 A + 1 A + 0.5 A = 55
. A
I1 = = 4A
𝑅1
Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE| chisty@aiub.edu

Ex. 7-10 This example demonstrates the power of Kirchhoff’s voltage law by
determining the voltages V1, V2, and V3 for the following network.

For the path 1: For the path 2: For the path 3:

E1-V1-E3=0 E2-V1-V2=0 V3+V2-E3=0
V1= 12V V2= -7V V3= 15V
Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE Nafiz A. Chisty| Head, Dept of EEE; Associate Professor, Dept. of EEE & CoE, FE| chisty@aiub.edu

Reference

[1] Robert L. Boylestad, “Introductory Circuit Analysis”, 12th Edition, Prentice Hall Inc
Thanks