Shantilal Shah Engineering College, Bhavnagar Department of Information Technology

3140707 – Computer Organization and architecture| 2020-21 | ENROLLMENT NO:190430116013
SHANTILAL SHAH ENGINEERING COLLEGE, BHAVNAGAR

DEPARTMENT OF INFORMATION TECHNOLOGY
3140707 – COMPUTER ORGANIZATION &

ARCHITECTURE
VISION
 The department aims to develop highly skilled IT professionals
with moral ethics to fulfil the needs of IT industry, society and
nation.
MISSION
 To attain excellence in teaching-learning process by providing
better infrastructure facilities.
 To collaborate with IT industry to bridge the knowledge gap
between academics and industry needs.
 To impart value-based IT education for building cutting edge and
innovative IT.
COURSE OUTCOME
CO1 Identify and explain the basic structure and functional units of a digital
computer.
CO2 Write assembly language programs and identify the role and
working of various functional units of a computer for executing
an instructions.
CO3 Design processing unit using the concepts of ALU and control
logic design.
CO4 Design circuits for interfacing memory and I/O with processor.
CO5 Comprehend the features and performance parameters of
different types of computer architectures.
Shantilal Shah Engineering College, Bhavnagar 1

INDEX
SHANTILAL SHAH ENGINEERING COLLEGE,

BHAVNAGAR
Name: -Chhatbar Deep Bharatbhai

Enrolment No.: - 190430116013
Subject: - 3140707 – Computer Organization and Architecture
Branch: - Information Technology
Semester: - 4 IT-A
Batch: - B1
Sr. Aim of The Page Date of Date of CO

No Experiment Fro To Start Completion
. m
1 Implement Booth’s 3 15 14/12/2020 28/12/2020 CO-1
Algorithm
2 Write the working 16 21 28/12/2020 11/01/2021 CO-2
of 8085 simulator
GNUsim8085 and
basic architecture of
8085 along with
small introduction.
3 Write an assembly 22 22 11/01/2021 25/01/2021 CO-5
language code in
GNUsim8085 to
store numbers in
reverse order in
memory location.
language code in
GNUsim8085 to
implement
arithmetic
instruction.
language code in 1
GNUsim8085 to

find the factorial of

a number.
language code in
GNUsim8085 to
implement logical
instructions.
7 Design ALU using 27 35 05/04/2021 19/04/2021 CO-3
Logisim.

Practical 1: Implement Booth’s Algorithm
Aim:- To implement Booth’s algorithm
Theory: -
Booth's Multipliers:
 Booth’s multiplication algorithm is an algorithm which
multiplies 2 signed integers in 2’s complement. The
algorithm is depicted in the following figure with a brief
description. This approach uses fewer additions and
subtractions than more straightforward algorithms.
 The multiplicand and multiplier are placed in the m and Q

registers respectively. A 1 bit register is placed logically to
the right of the LSB (least significant bit) Q0 of Q register.
This is denoted by Q-1. A and Q-1 are initially set to 0.
Control logic checks the two bits Q0 and Q-1. If the twi bits
are same (00 or 11) then all of the bits of A, Q, Q-1 are
shifted 1 bit to the right. If they are not the same and if the
combination is 10 then the multiplicand is subtracted from
A and if the combination is 01 then the multiplicand is
added with A. In both the cases results are stored in A, and
after the addition or subtraction operation, A, Q, Q-1 are
right shifted. The shifting is the arithmetic right shift
operation where the left most bit namely, An-1 is not only
shifted into An-2 but also remains in An-1. This is to
preserve the sign of the number in A and Q. The result of
the multiplication will appear in the A and Q.

Design Issues :
 Booth’s algorithm can be implemented in many ways. This
experiment is designed using a controller and a datapath.
The operations on the data in the datapath is controlled by
the control signal received from the controller. The
datapath contains registers to hold multiplier,
multiplicand, intermediate results, data processing units
like ALU, adder/subtractor etc., counter and other
combinational units. Following is the schemetic diagram
of the Booth’s multiplier which multiplies two 4-bit
numbers in 2’s complement of this experiment. Here the
adder/subtractor unit is used as data processing unit.M,

Q, A are 4-bit and Q-1 is a 1-bit rigister. M holds the

multiplicand, Q holds the multiplier, A holds the results of
adder/subtractor unit. The counter is a down counter
which counts the number of operations needed for the
multiplication. The data flow in the data path is controlled
by the five control signals generated from the controller.
These signals are load (to load data in registers), add (to
initiate addition operation), sub (to initiate subtraction
operation), shift (to initiate arithmetis right shift
operation), dc (this is to decrement counter). The
controller generates the control signals according to the
input received from the datapath. Here the inputs are the
least significant Q0 bit of Q register, Q-1 bit and count bit
from the down counter.

Objective:-
Objective of 4 bit Booth's Multiplier:
1. Understanding behaviour of Booth's multiplication
algorithm from working module and the module
designed by the student as part of the experiment
2. Designing Booth's multiplier with a controller and a
datapath. This will also help in the learning of control
unit design as a finite state machine
3. Understanding the advantages of Booth's multiplier
o It can handle signed integers in 2's
complement notion
o It decreases the number of addition and
subtraction
o It requires less hardware than combinational
multiplier
o It is faster than straightforward sequential
multiplier
Examining behaviour of 4 bit Booth's multiplier for the
working module and module designed by the student as part
of the experiment (refer to the circuit diagram):
Set M as 0111 which is 7 and Q as 0101 which is 5. Now start the
multiplication operation and observe the results including the
intermediate results. The Booth's algorithm on those inputs
works as the following diagram, so the circuit must behave
according to it.

Recommended learning activities for the

experiment: Leaning activities are designed in two stages, a
basic stage and an advanced stage. Accomplishment of each
stage can be self-evaluated through the given set of quiz
questions consisting of multiple type and subjective type
questions. In the basic stage, it is recommended to perform the
experiment firstly, on the given encapsulated working module,
secondly, on the module designed by the student, having gone
through the theory, objective and procuder. By performing the
experiment on the working module, students can only observe
the input-output behavior. Where as, performing experiments
on the designed module, students can do circuit analysis, error
analysis in addition with the input-output behavior. It is
recommended to perform the experiments following the given
guideline to check behavior and test plans along with their own
circuit analysis. Then students are recommended to move on to
the advanced stage. The advanced stage includes the
accomplishment of the given assignments which will provide
deeper understanding of the topic with innovative circuit design
experience. At any time, students can mature their knowledge
base by further reading the references provided for the
experiment.
 Color configuration of wire for 5 valued logic supported by
the simulator:
 if value is UNKNOWN, wire color= maroon
 if value is TRUE, wire color= blue
 if value is FALSE, wire color= black
 if value is HI IMPEDENCE, wire color= green
 if value is INVALID, wire color= orange
Procedure:-
Booth's Multipliers:
Procedure to perform the experiment on the given
working module which multiplies two 4-bit numbers

1. Start the simulator as directed.This simulator supports 5-

valued logic.
2. To perform the experiment on the given modules, we need
the datapath specified for booth's multiplication, a
controller with a specified state chart, a clock input, bit
switch (to give input, which will toggle its value with a
double click), bit displays (for seeing output), wires.
3. Instantiating the controller: A control unit can be seen as a
finite state machine, so its behavior can be represented in
a state table. The controller of the simulator accepts the
Moore type state chart and must contain an end state.
State names will automatically be generated in the form of
S<sub<n< sub="">. In the left pane of the simulator, click
on the ASM chart button in the controller subsection. Give
the required informations in the appeared form as follows:
o Number of states: 7
o Number of inputs: 3
o Number of outputs: 5
The controller will generate 5 output control signals. After
entering these informations, the second form will appear
where you can set the names of the inputs and outputs.
Here inputs are the Q0, Q-1, count. Outputs control
signals are load, add, sub, shift, dc. The order of given
input/outputs are maintained while creating terminals of
the controller. for example, the first output signal will
appear in the left most output terminal (lower terminals),
second output will appear in the second left most bit and
so on. In case of input terminals, the left most bit is for
clock input, so the first input appears in the second
terminal, and then the order is maintained. Then the third
form will appear where you actually specify the state chart
i.e. state, outputs of that state and transition conditions .
The fields of the chart will be generated dynamically
according to previously given information on states, inputs
and outputs.After entering the following state chart, click
on the controller component in the palette of the simulator
then click on the position of the design editor where you

want to put the component (no drag and drop, simple click
will serve the purpose).
</sub<n<>
4. Instantiate the Booth's multiplier datapath from the
sequential ckt drawer in the palette (by clicking as
mentioned previously).
5. The pin configuration of the component is shown
whenever the mouse is hovered on any canned component
of the palette or pressing the show pin
configuration button on the toolbar will show it constantly
in the left pane. Pin numbering starts from 1 and from the
bottom left corner(indicating with the circle) and increases
anticlockwise.
6. Pin configuration of the datapath module:
o M : Multiplicand (4 bit), Q : Multiplier (4 bit)
o Initialization : Inl:1, preset:1, set M, Q, start clock
o Starting multiplication: Inl:0, preset:0, start clock
o Result: FQ0 to FA3, at end state (here it is S6). These
are the content of A(4bit) and Q(4bit) register, total 8
bit (FQ0 is LSB, FA3 is MSB)
o I/P:
 Clk:32, Inl:31, preset:30
 Control pins: load:29, add:28, sub:27, shift:26, dc:25
 Multiplicand: M3 : 24, M2 : 23, M1 : 22, M0 : 21
 Multiplier: Q3 : 20, Q2 : 19, Q1 : 18, Q0 : 17

o O/P: FQ-1 is output of Q-1 bit register, similarly FQ0

to FQ3 are for Q register and FA0 to FA3 are for A
register.
 Datapath to controller input: Count, clkToController,
FQ-1, FQ0
 Count : 16, clkToController : 15, FQ-1 : 14, FQ0 : 13
 FQ1 : 12, FQ2 : 11, FQ3 : 10
 FA0 : 9, FA1 : 8, FA2 : 7, FA3 : 6
7. To connect any two components select the Connection
menu of Palette, and then click on the Source terminal and
click on the target terminal. According to the following
diagram connect all the components. Connect the
controller outputs to the specified control input terminals
of the datapath, specified datapath outputs to the inputs of
the controller, the clock input, Bit switches with the inputs
and Bit displays component with the outputs (from
Display and Input drawer of the pallet,if it is not seen
scroll down in the drawer). After the connection is over
click the selection tool in the pallete.

8. At first initialize the multiplier by giving the specified

inputs specified earlier, this will load the multiplier and
multiplicand, then start the multiplication operation by
giving the specified inputs specified earlier. At the end
state (S6), the multiplication result will be seen through
ports FQ0 to FA3 (FQ0 is LSB, FA3 is MSB). The current
state of the controller is shown in the left pane as it
transits from one state to another. The controller can be
reset by clicking the reset controller button in the top
toolbar, to start with a new input.

Circuit diagram of 4 bit Booth's Multiplier:

The combinational logic between the control signals of the
controller and the control pins of the registers are to satisfy
different operational conditions of individual components. In
this design, the controller controls only the multiplication
process, the initialization has been seperated, so a multiplexer
is used to the clock port of the controller to deactivate ot during
initialization. Except M, A, Q, Q-1 registers one more 4-bit
register has been used which works as temporary storage. With
the preset, the down counter is set to all one which is then
decremented. The controller state chart is designed in such a
way that at each state it activates only one control signal. The
controller of this circuit behaves according to the state chart
shown in the procedure section of this experiment. A and Q will
hold the final multiplication result.

Implementation :-
Conclusion :-
1)Booth's multiplication algorithm is a multiplication
algorithm that multiplies two signed binary numbers in
two's complement notation.booth algorithm requires
examination of the multiplier bits and shifting of the
partial product.It handles both positive and negative
multiplier uniformly.
2) It achieves efficiency in the number of additions
required when the multiplier has a few large blocks of
1's.
3) The speed gained by skipping 1's depends on the data.
Booth Multiplier performs fewer additions than a serial
multiplier. Two main drawbacks of Booth Algorithm are
the inefficiency of the circuit when isolated 1's are
encountered and difficulty in designing parallel
multipliers as number of shift-and-add operations vary

Practical 2 : Write the working of 8085 simulator

GNUsim8085 and basic architecture of 8085 along with
small introduction.
1. Write the working of 8085 simulator

GNUsim8085 and basic architecture of
8085 along with small introduction.
 Generally, the 8085 is an 8-bit microprocessor,

and it was launched by the Intel team in the
year of 1976 with the help of NMOS technology.
 This processor is the updated version of the
microprocessor.
 The configurations of 8085 microprocessor
mainly include data bus-8-bit, address bus-16
bit, program counter-16-bit, stack pointer-16
bit, registers 8-bit, +5V voltage supply, and
operates at 3.2 MHz single segment CLK.
 The applications of 8085 microprocessor are
involved in microwave ovens, washing
machines, gadgets, etc.
 The features of the 8085 microprocessor are as

below:
 This microprocessor is an 8-bit device that

receives, operates, or outputs 8-bit
information in a simultaneous approach.
 The processor consists of 16-bit and 8-bit
address and data lines and so the capacity

of the device is 216 which is 64KB of

memory.
 This is constructed of a single NMOS chip
device and has 6200 transistors
 A total of 246 operational codes and 80
instructions are present
 As the 8085 microprocessor has 8-bit
input/output address lines, it has the
ability to address 28 = 256 input and
output ports.
 This microprocessor is available in a DIP
package of 40 pins
 In order to transfer huge information from
I/O to memory and from memory to I/O,
the processor shares its bus with the DMA
controller.
 It has an approach where it can enhance
the interrupt handling mechanism
 An 8085 processor can even be operated as
a three-chip microcomputer using the
support of IC 8355 and IC 8155 circuits.
 It has an internal clock generator
 It functions on a clock cycle having a duty
cycle of 50%
The 8085 Microprocessor

Architecture :

 The architecture of the 8085 microprocessor mainly

includes the timing & control unit, Arithmetic and
logic unit, decoder, instruction register, interrupt

control, a register array, serial input/output control.
The most important part of the microprocessor is
the central processing unit.
8085 ARCHITECTURE

Operations of the 8085

Microprocessor
 The main operation of ALU is arithmetic as well as

logical which includes addition, increment,
subtraction, decrement, logical operations like
AND, OR, Ex-OR, complement, evaluation, left shift
or right shift. Both the temporary registers as well
as accumulators are utilized for holding the
information throughout the operations then the
outcome will be stored within the accumulator. The
different flags are arranged or rearrange based on
the outcome of the operation.
8085 Microprocessor –
Functional Units
 Accumulator:
 It is an 8-bit register used to perform
arithmetic, logical, I/O & LOAD/STORE
operations. It is connected to internal data bus
& ALU.
 Arithmetic and logic unit:
 As the name suggests, it performs arithmetic
and logical operations like Addition,
Subtraction, AND, OR, etc. on 8-bit data.
 General purpose register:
 here are 6 general purpose registers in 8085
processor, i.e. B, C, D, E, H & L. Each register
can hold 8-bit data.

 These registers can work in pair to hold 16-bit

data and their pairing combination is like B-C,
D-E & H-L.
 Program counter:
 It is a 16-bit register used to store the memory
address location of the next instruction to be
executed. Microprocessor increments the
program whenever an instruction is being
executed, so that the program counter points to
the memory address of the next instruction that
is going to be executed.
 Stack pointer:
 It is also a 16-bit register works like stack,
which is always incremented/decremented by 2
during push & pop operations.
 Temporary register:
 It is an 8-bit register, which holds the
temporary data of arithmetic and logical
operations.
 Flag register:
 It is an 8-bit register having five 1-bit flip-flops,
which holds either 0 or 1 depending upon the
result stored in the accumulator.
These are the set of 5 flip-flops −
 Sign (S)
 Zero (Z)
 Auxiliary Carry (AC)
 Parity (P)
 Carry (C)
Its bit position is shown in the following table –

D7 D6 D5 D4 D3 D2 D1 D0
S Z AC P CY
 Instruction register and decoder:

 It is an 8-bit register. When an instruction is
fetched from memory then it is stored in the
Instruction register. Instruction decoder
decodes the information present in the
Instruction register.
 Timing and control unit
 It provides timing and control signal to the
microprocessor to perform operations.
Following are the timing and control signals,
which control external and internal circuits –
 Control Signals: READY, RD’, WR’, ALE
 Status Signals: S0, S1, IO/M’
 DMA Signals: HOLD, HLDA
 RESET Signals: RESET IN, RESET OUT
 Interrupt control
 As the name suggests it controls the interrupts
during a process. When a microprocessor is
executing a main program and whenever an
interrupt occurs, the microprocessor shifts the
control from the main program to process the
incoming request. After the request is
completed, the control goes back to the main
program.

 There are 5 interrupt signals in 8085

microprocessor: INTR, RST 7.5, RST 6.5, RST
5.5, TRAP.
 Serial Input/output control:
 It controls the serial data communication by
using these two instructions: SID (Serial input
data) and SOD (Serial output data).
 Address buffer and address-data buffer:
 The content stored in the stack pointer and
program counter is loaded into the address buffer
and address-data buffer to communicate with the
CPU. The memory and I/O chips are connected to
these buses; the CPU can exchange the desired
data with the memory and I/O chips.
 Address bus and data bus:
 Data bus carries the data to be stored. It is
bidirectional, whereas address bus carries the
location to where it should be stored and it is
unidirectional. It is used to transfer the data &
Address I/O devices.

Practical 3: Write an assembly language code in

GNUsim8085 to store numbers in reverse order in
memory location.
Solution :


Practical 4: Write an assembly language code in

GNUsim8085 to implement arithmetic instruction
AIM :
Write an assembly language code in GNUsim8085 to
implement below mentioned arithmetic instructions:
a. ANA
b. LXI
c. ORA
a. ANA
b. LXI

c. ORA

Practical 5 : Write an assembly language code in

GNUsim8085 to find the factorial of a number.

Practical 6 : Write an assembly language code in

GNUsim8085 to implement logical instructions.
Logical instructions are the instructions which perform basic logical

operations such as AND, OR, etc. In 8085 microprocessor, the
destination operand is always the accumulator. Here logical operation
works on a bitwise level.
Following is the table showing the list of logical instructions:
OPCODE OPERAND DESTINATION EXAMPLE

ANA R A = A AND R ANA B
ANA M A = A AND Mc ANA 2050
ANI 8-bit data A = A AND 8-bit data ANI 50
ORA R A = A OR R ORA B
ORA M A = A OR Mc ORA 2050
ORI 8-bit data A = A OR 8-bit data ORI 50
XRA R A = A XOR R XRA B
XRA M A = A XOR Mc XRA 2050
XRI 8-bit data A = A XOR 8-bit data XRI 50
CMA none A = 1’s compliment of A CMA
Compares R with A and triggers
CMP R CMP B
the flag register
Compares Mc with A and triggers
CMP M CMP 2050
the flag register
Compares 8-bit data with A and
CPI 8-bit data CPI 50
triggers the flag register
Rotate accumulator right without
RRC none RRC
carry
Rotate accumulator left without
RLC none RLC
carry
Rotate accumulator right with
RAR none RAR
carry
RAL none Rotate accumulator left with carry RAR
CMC none Compliments the carry flag CMC
STC none Sets the carry flag STC
In the table,
R stands for register

M stands for memory

Mc stands for memory contents

Practical 7 : Design ALU using Logisim.
1-bit Design ALU using Logisim.
1-bit ALU
Truth table for above 1-bit ALU :

Selection line Operations

S2 S1 S0
0 0 0 AND
0 0 1 NOT
0 1 0 OR
0 1 1 X-OR
1 0 0 ADDER/SUB
1 0 1 X-NOR
1 1 0 NAND
1 1 1 NOR
Truth table for AND Gate:

A B RESULT
0 0 0
0 1 0
1 0 0
1 1 1
Truth table for NOT Gate:

A RESULT
0 1
1 0
Truth table for OR Gate:

A B RESULT
0 0 0
0 1 1
1 0 1
1 1 1
Truth table for X-OR Gate:

A B RESULT
0 0 0
0 1 1
1 0 1
1 1 0
Truth table for adder/subtractor:

B X- A Cin Cout RESULT
OR
SUB
0 0 0 0 0
0 0 1 0 1

0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
Truth table for X-NOR Gate:

A B RESULT
0 0 1
0 1 0
1 0 0
1 1 1
Truth table for NAND Gate:

A B RESULT
0 0 1
0 1 1
1 0 1

1 1 0
Truth table for NOR Gate:

A B RESULT
0 0 1
0 1 0
1 0 0
1 1 0
8-bit Design ALU using Logisim.
8-bit ALU

Truth table for above 8-bit ALU :

Selection Operations
line
S2 S1 S0
0 0 0 OR
0 0 1 X-NOR
0 1 0 X-OR
0 1 1 AND
1 0 0 INCREMENT
1 0 1 ADDITION
1 1 0 DECREMENT
1 1 1 SUBTRACTION
Truth table for AND Gate:

A B RESULT
0 0 0

0 1 0
1 0 0
1 1 1
Truth table for NOT Gate:

A RESUL
T
0 1
1 0
Truth table for OR Gate:

A B RESULT
0 0 0
0 1 1
1 0 1
1 1 1
Truth table for X-OR Gate:

A B RESULT

0 0 0
0 1 1
1 0 1
1 1 0
Truth table for adder/subtractor:

B X- A Cin Cout RESULT
OR
SUB
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
Truth table for X-NOR Gate:

A B RESULT

0 0 1
0 1 0
1 0 0
1 1 1
Truth table for NAND Gate:

A B RESULT
0 0 1
0 1 1
1 0 1
1 1 0
Truth table for NOR Gate:

A B RESULT
0 0 1
0 1 0
1 0 0

1 1 0

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3140707 – Computer Organization and architecture| 2020-21 | ENROLLMENT NO:190430116013

SHANTILAL SHAH ENGINEERING COLLEGE, BHAVNAGAR

3140707 – COMPUTER ORGANIZATION &

Shantilal Shah Engineering College, Bhavnagar 1

SHANTILAL SHAH ENGINEERING COLLEGE,

Name: -Chhatbar Deep Bharatbhai

Sr. Aim of The Page Date of Date of CO

Shantilal Shah Engineering College, Bhavnagar 2

find the factorial of

Shantilal Shah Engineering College, Bhavnagar 3

Practical 1: Implement Booth’s Algorithm

Aim:- To implement Booth’s algorithm

 The multiplicand and multiplier are placed in the m and Q

Shantilal Shah Engineering College, Bhavnagar 4

Shantilal Shah Engineering College, Bhavnagar 5

Q, A are 4-bit and Q-1 is a 1-bit rigister. M holds the

Shantilal Shah Engineering College, Bhavnagar 6

Shantilal Shah Engineering College, Bhavnagar 7

Recommended learning activities for the

Shantilal Shah Engineering College, Bhavnagar 8

1. Start the simulator as directed.This simulator supports 5-

Shantilal Shah Engineering College, Bhavnagar 9

Shantilal Shah Engineering College, Bhavnagar 10

o O/P: FQ-1 is output of Q-1 bit register, similarly FQ0

Shantilal Shah Engineering College, Bhavnagar 11

8. At first initialize the multiplier by giving the specified

Shantilal Shah Engineering College, Bhavnagar 12

Circuit diagram of 4 bit Booth's Multiplier:

Shantilal Shah Engineering College, Bhavnagar 13

Shantilal Shah Engineering College, Bhavnagar 14

Practical 2 : Write the working of 8085 simulator

1. Write the working of 8085 simulator

 Generally, the 8085 is an 8-bit microprocessor,

 The features of the 8085 microprocessor are as

 This microprocessor is an 8-bit device that

Shantilal Shah Engineering College, Bhavnagar 15

of the device is 216 which is 64KB of

The 8085 Microprocessor

Shantilal Shah Engineering College, Bhavnagar 16

 The architecture of the 8085 microprocessor mainly

logic unit, decoder, instruction register, interrupt

Shantilal Shah Engineering College, Bhavnagar 17

Operations of the 8085

 The main operation of ALU is arithmetic as well as

Shantilal Shah Engineering College, Bhavnagar 18

 These registers can work in pair to hold 16-bit

Shantilal Shah Engineering College, Bhavnagar 19

 Instruction register and decoder:

Shantilal Shah Engineering College, Bhavnagar 20

 There are 5 interrupt signals in 8085

Shantilal Shah Engineering College, Bhavnagar 21

Practical 3: Write an assembly language code in

Shantilal Shah Engineering College, Bhavnagar 22

Shantilal Shah Engineering College, Bhavnagar 23

Practical 4: Write an assembly language code in

Shantilal Shah Engineering College, Bhavnagar 24

Shantilal Shah Engineering College, Bhavnagar 25

Practical 5 : Write an assembly language code in

Shantilal Shah Engineering College, Bhavnagar 26

Practical 6 : Write an assembly language code in

Logical instructions are the instructions which perform basic logical

OPCODE OPERAND DESTINATION EXAMPLE

Shantilal Shah Engineering College, Bhavnagar 27