EXPERIMENT NO 6

Name: Godithi Sri Venkat Roll No.: U18EC073

AIM: To perform phase difference measurement using S-R latch.

The input is sinusoidal having 3 V peak-to-peak amplitude and frequency 2 kHz, the all pass filter
capacitance value is 0.1 μF, select the value of variable resistance to produce phase value 60˚, other
resistance assumed to be equal

APPARATUS: IC LM 741 or LM 324, DC voltage supply, Resistors, Capacitor, Oscilloscope,

Breadboard, Connecting wires etc.
THEORY: A phase detector or phase comparator is a frequency mixer, analog multiplier or logic
circuit that generates a voltage signal which represents the difference in phase between two signal
inputs. It is an essential element of the phase-locked loop (PLL). Detecting phase difference is
very important in many applications, such as motor control, radar and telecommunication systems,
servo mechanisms, and demodulators. All pass filter is used in order to provide the phase
difference. An RC filter is used in order to provide spikes so as to avoid the S=1 and R=1 (invalid
state) for the SR Latch.
CIRCUIT DIAGRAM:

CALCULATIONS:
RESULTS:

SR latch output with input signal:

θprac= (t/T)x 360o= (62.284/500)x360o= 59.79o θprac=

59.79o
Phi(theoretical) R (calculated) Phi(practical) R(taken) Absolute Absolute
error error %
30 213.5 24.8 215 0.1733 17.33
45 329.6 44.84 330 0.00356 0.356
60 459.44 59.79 450 0.0035 0.35
90 795.6 92.18 800 0.0242 2.422

CONCLUSION: In this experiment, we have successfully implemented a SR Latch with the help of
NOR gates. We calculated the phase difference with the help of SR Latch based on the inputs from
operational amplifiers and observed the output at various stages.