A 28 GHz Digital-Controlled 4-bit Vector Modulator

Based Phase Shifter Design

Xuanhe Liu12, Kaijie Ding1, Hao Gao13
1
Eindhoven University of Technology, The Netherlands
2
Spreadtrum Communications, Shanghai, China
3
Silicon Austria Labs, Linz, Austria

h.gao@tue.nl

Abstract —This paper presents a 4-bit digital-controlled active
phase shifter implemented in a 0.25 µm SiGe:C BiCMOS process
for the fifth-generation (5G) communication. It is designed to
cover 27.5 GHz to 28.35 GHz spectrum and to achieve balance
among power gain, phase accuracy, power consumption and size.
The input signal is first divided into two paths by a transformer-
based quadrature generator and then weighted summed by a
Gilbert typed variable gain amplifier (VGA). Based on the
simulation, the proposed phase shifter achieves average 5.4 dB
power gain with 17.5mW power consumption, while obtaining less
2020 IEEE MTT-S International Wireless Symposium (IWS) | 978-1-7281-6703-9/20/$31.00 ©2020 IEEE | DOI: 10.1109/IWS49314.2020.9359922
the input signal is divided by a quadrature (I/Q) generator,
weight by VGAs and finally combined again by a power
combiner. This paper is organized as follows. In Section II, the
design considerations of this work is given. Next, the co-
simulation results of the post-layout with EM are discussed and
shown in Section III. Finally the conclusions are drawn in
Section IV.
II. DESIGN CONSIDERATIONS

than 1.5 dB rms gain error from 27 to 28.5 GHz. Both input and
output reflection coefficients are lower than -10 dB in the whole
designed frequency range. A. Quadrature Generator
Keywords — Path loss phased arrays, vector modulator based
phase shifter, quadrature generation, circular inductor 0101 Q,0100 0011

0110 0010
I. INTRODUCTION
With the increased demands on data rate for Virtual Reality 0111
0001
(VR), Implanted Reality (IR) and Vehicle-to-everything (V2X),
the wireless technology is aiming to the direction of higher data 1000 I,0000
rates, lower latency and improved robustness. This trend gives
birth to the next generation 5G technology [1]. 28 GHz band is 1001 1111
one of the spectrums of 5G, where 27.5 to 28.35 GHz is the
licensed access frequency range in North America.
To take the advantage of this millimeter wave spectrums, 1010 1110
phased array architecture might be used because of its capability
1011 1100 1101
of supporting a large number of precisely controlled beams [2].
Phase shifter is a crucial component inside, which needs to meet
Fig. 1: typical phase shifting process for a 4-bit active phase shifter
the challenges of full bandwidth, high phase resolution and low
rms phase errors. It could be classified into the passive topology
and the active topology[3]. While the passive phase shifter I+
VGA
usually made up of large-size transmission lines and filter brings
LNA
integration cost, as well as imprecise beam steering problems[2], +
Quadrature
I-
Σ
+

the active topology [4-8], which obtains phase variations by -

generator Q+ -
vector modulator instead, offers a decent gain and accurate phase
Q- VGA
resolution with a higher integration level.
In this work, a vector modulator based differential active
phase shifter in the receiver’s radio frequency (RF) path is Fig. 2: topology of a vector modulator based phase shifter
designed in order to achieve a compact size and a low power
consumption. The vector modulator based phase shifter achieves
different phase shifting states by adding the quadrature signals
whose amplitude weightings are different and are set by VGA.
A typical phase shifting process for a 4-bit active phase shifter
is illustrated in Fig. 1. The topology is shown in Fig. 1, where

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 TABLE I. CONTROL BITS AND PHASE SHIFTING

Polarity
Output+ Output- 4 bit Output
Switches IC,I (mA) IC,Q (mA)
Control Phase (°)
SI SQ
0000 0° ON ON/OFF 7 0
0001 22.5° ON ON 5 2
I+ Q+ 0010 45° ON ON 3.5 3.5
0011 67.5° ON ON 2 5
I- Q-
Bias Bias
0100 90° ON/OFF ON 0 7
sI sI sQ sQ 0101 112.5° OFF ON 2 5
sI sI sQ sQ 0110 135° OFF ON 3.5 3.5
0111 157.5° OFF ON 5 2
Q current
1000 180° OFF ON/OFF 7 0
I current
from
IC,I QC,I from 1001 202.5° OFF OFF 5 2
DAC
DAC 1010 225° OFF OFF 3.5 3.5
1011 247.5° OFF OFF 2 5
1100 270° ON/OFF OFF 0 7
1101 292.5° ON OFF 2 5
Fig. 3: simplified schematic of the VGA 1110 315° ON OFF 3.5 3.5
1111 337.5° ON OFF 5 2

The quadrature generator is an essential part of a vector
modulator based phase shifter since it dominates the quality of
in-phase and I/Q signal in the aspects of magnitude imbalance,
phase imprecision, loss and bandwidth, which decides the
quantization level of the VGA.
RC-CR pairs and poly-phase filters are two common ways
for accurate I/Q signal generation. However, those two
topologies suffer from inherent signal loss and the narrow
bandwidth. A multi-turn transformer based quadrature generator
is proposed for its compact structure, wide bandwidth and low
signal loss.
B. Variable Gain Amplifier and Power Combiner
A Gilbert cell structure with current steering is used to be the
VGA in this work for its compact size, concise structure and less
current consumption, which keeps the sum of current in I and Q
paths constant and changes the biasing current density of I and
Q paths. A simplified schematic of it is shown in Fig. 1. The
required 4-bit-phase generation can then be achieved by
controlling the switch in it and by tuning the biasing current,
controlled by the digital to analog converter (DAC).The power
combining process is also achieved by this structure.

(a) (b) (c)

(e) (f)
(d)

Fig. 4: Simulation Results in all phase shifting states : (a) Simulated input return loss, S11. (b) Simulated output return loss, S11. (c) Simulated gain, S21. (d) Simulated
insertion phase. (e) Simulated gain rms error. (f) Simulated insertion phase rms error.

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 TABLE II. PERFORMANCE OF THIS WORK AND THE OTHER STATE-OF-THE-ART DESIGNS
Freq Max. Min. rms
Reso Average Min. rms Max. rms DC power Area
. rms Gain
Ref Technology Topology lutio Gain Phase Gain consumpti (mm2
(GH Phase Error
n (°) (dB) Error (°) Error (dB) on (mW) )
z) Error (°) (dB)
0.12µm SiGe Differential 28- -10 dB
[9] 22.5 15 3** 1 N/A 0 0.18
BiCMOS switched LC 40 @35GHz
0.18µm SiGe 11.1 19.5
[10] Vector Mod 6-18 5.6 N/A 1.1 N/A 10.56 0.16
BiCMOS 25 @12GHz
15-
[8] 0.13µm CMOS Vector Mod 22.5 -4.6 - -3 13 6.5 2.1 1.1 11.7 0.14
26
-1@
IBM9HP SiGe 20.5- 11.1
[11] Vector Mod 23.5GHz 2 0.6 N/A N/A 10 0.12
BiCMOS 26.5 25
**
This 0.25µm SiGe:C 26.5-
Vector Mod 22.5 5.4 16 5.8 1.7 0.58 17.5 0.25*
Work BiCMOS 29.5
* phase shifter core including the I/Q generator, the Gilbert cell VGA and the output matching transformer
** estimated value from the graph

III. SIMULATION RESULTS
The whole design is measured by the momentum
simulation in most of the passive areas, combined with the RCX
simulation in the VGA’s active areas. The phase shifter core
including the I/Q generator, the Gilbert cell VGA and the output
matching transformer occupies an area of 0.588x0.422 mm2.
The overall chip size including all pads and grounding is
1.14x0.69 mm2
In order to achieve different phase shifting states, the
current of the Gilbert cell is tuned and the polarity switches is
controlled. The overall controlled scheme is summarized in
TABLE I, where IC,I and IC,Q are the collector currents of the
bottom transistors in the Gilbert cell. The simulation of post-
layout with EM results are shown in Fig.4. For all phase shifting
states, S11 and S22 are less than -10 dB in the frequency range
from 26 to 30 GHz. The average power gain at 28 GHz is 5.4dB
with minimum rms gain error 0.58dB at 27 GHz. The minimum
rms phase error is 5.8°at 27.5 GHz and the frequency range
that the rms phase error is less than 11.125° is about 27 to 28.5
GHz.
TABLE II summarizes and compares the performance in this
work with other published results.
IV. CONCLUSIONS
A 4-bit digital-controlled active phase shifter implemented
in a 0.25 µm SiGe:C BiCMOS process for the 28GHz 5G band
is designed in this project. A vector modulator based topology is
chosen in order to achieve a compact size and low power
consumption. The input signal is divided by a transformer based
quadrature generator, weight by VGAs and finally combined
again. S11 and S22 is less than -10 dB from 26.5 to 29.5 GHz, and
the power consumption is 17.5mW. The power gain is about 5.4
dB with the rms error less than 1.5dB in the frequency range of
27 to 28.5 GHz. The rms phase error in that range is less than
11.125° .
ACKNOWLEDGMENT
The author would like to thank ir. Zhe Chen and other IC
group members for providing this thesis project, and always
willing to help with great patience.
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