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It operates in PFM mode for high power conversion ■ Excellent OPP Compensation
efficiency at light load condition. When the loading is ■ 20KHz Minimum Frequency Limit at QR Mode
very small, the IC operates in ‘Extended Burst Mode’ ■ 130KHz Maximum Frequency Limit
to minimize the switching loss. As a result, lower Internal Minimum T_off for Ringing Suppression
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■
standby power consumption and higher conversion ■ 35us Maximum On Time Limit
efficiency can be achieved. ■ 50us Maximum Off Time Limit
OB2202 offers comprehensive protection coverage ■ Internal Leading Edge Blanking
including Cycle-by-Cycle Current Limiting, VCC Programmable Soft-start
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■
Under Voltage Lockout(UVLO), Programmable ■ Cycle-by-cycle Current Limiting
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Output Over Voltage Protection(OVP), VCC Clamp, ■ External Latch Triggering
Gate Clamp, Over Load Protection(OLP), On-chip ■ Internal Thermal Shutdown
Thermal Shutdown, Programmable Soft Start,
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■ 1A Peak Current Sink/Source Capability
Programmable Brownout Protection, Programmable ■ Programmable Output OVP
Over Power Protection (OPP) Compensation, and
External Latch Triggering, Max On-time Limit, etc. t APPLICATIONS
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OB2202 is offered in SOP-8 and DIP-8 packages.
Offline AC/DC flyback converter for
■ Power Adaptor and Open-frame SMPS
■ LCD Monitor/TV/PC/Set-Top Box Power
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Supplies
■ NB/DVD/Portable DVD Power Supplies
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TYPICAL APPLICATION
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VCC Zener Clamp Voltage 31 V
VCC Clamp Continuous 10 mA
Current
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SS Input Voltage -0.3 to 7V
FB Input Voltage -0.3 to 7V
CS Input Voltage -0.3 to 7V
DEM Input Voltage -0.3 to 7V
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BO Input Voltage -0.3 to 7V
Min/Max Operating Junction -20 to 150 oC
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Temperature TJ
Min/Max Storage Temperature -55 to 150 oC
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Tstg
Lead Temperature (Soldering, 260 oC
Ordering Information
Part Number Description t 10secs)
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Note: Stresses beyond those listed under “absolute maximum
OB2202AP 8 Pin DIP, Pb free in Tube ratings” may cause permanent damage to the device. These are
OB2202CP 8 Pin SOP, Pb free in Tube stress ratings only, functional operation of the device at these or
any other conditions beyond those indicated under “recommended
OB2202CPA 8 Pin SOP, Pb free in T&R
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SOP8 DIP8
LT YWW LT YWW
OB2202CP OB2202AP
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s s
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Y: Year Code (0-9) Y: Year Code (0-9)
C: SOP8 A: DIP8
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P:lead-free P:lead-free
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s: internal code s: internal code
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TERMINAL ASSIGNMENTS
Pin Num Pin Name I/O Description t
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1 SS I/O Soft-start programming pin. Program the soft-start time with a capacitor
connected to GND. After soft-start, the pin’s voltage is clamped at 2V. This
pin is also used as external latch input, latch will be triggered when SS pin
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pin and current-sense signal level at Pin 3. The voltage level at this pin also
on
7 DEM I/O Input from auxiliary winding for demagnetization timing. Also this pin is
used for output over voltage protection (Load OVP).
8 BO I/O Brownout and Line OVP detection pin. Connect a resistor divider from line
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voltage to this pin to detect line voltage. If this pin drops below 0.5V and
lasts for 50ms, brownout protection will be triggered and PWM output will
be disabled. This pin is also used as line OVP sense input
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BLOCK DIAGRAM
VCC
Trimmed
6 Voltage/Current Internal reference Soft
Reference GATE
Driver
5
UVLO POR
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S Q
Timer,
PFC control,
Logic, R Qb On chip
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& Thermal shutdown
Fault
Regulator Management
Internal
supply Mode selection
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Valley FB
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detector
OLP 2
DEM
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7 Load OVP
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Latch Soft Start Brownout &
LEB
Line OVP
CS
3
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1 SS 4 GND 8 BO
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TA Operating Ambient Temperature -20 85 C
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ELECTRICAL CHARACTERISTICS
(TA = 25OC, VCC=16V, if not otherwise noted)
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I_VCC_quiet Operation Current VCC=12V, FB is floating, 1 mA
without switching
I_VCC_operation Operation current VCC=12V, Fsw=130KHz, 4 6 mA
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with switching 1nF load at GATE
UVLO(ON) VCC Under Voltage 8 9 10 V
Lockout Enter
UVLO(OFF) VCC Under Voltage 14 15 16 V
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Lockout Exit
(Startup)
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OVP(ON) VCC Over Voltage 31 V
Protection Enter
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VCC_Clamp VCC Zener Clamp I(VCC ) = 5 mA 32 V
Voltage
Feedback Input Section(FB Pin) t
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AVCS PWM Input Gain ΔVFB /ΔVcs 3 V/V
VFB_Open FB Open Voltage 4.8 V
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threshold
VTH_PFM_off PFM mode off 1.2 V
threshold
VTH_BM_on Burst Mode on 1.6 V
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threshold
VTH_BM_off Burst Mode off 1.0 V
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threshold
VTH_PL Power Limiting FB 4.4 V
Threshold Voltage
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comparator
Negative clamp
-0.7 V
VDEM_clamp(neg) voltage
VDEM_clamp(pos) Positive clamp
5.8 V
voltage
Tsupp Suppression of the
transformer ringing at
2 usec
start of secondary
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stroke
TOUT Timeout after last
5 usec
demag transistion
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TDEM_delay Demag propagation
150 nsec
delay
VTH_OVP Output OVP trigger
3.75 V
point
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T_ovp_plateau OVP plateau
sampling after 2 usec
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switching off
N_true_OVP Number of
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subsequent cycles to 4
be true OVP
Soft Start Section
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Iss Soft start charge 10 uA
current
VTH_ss_over Soft start over 2.1 V
threshold voltage
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current capability
when SS is clamped
VSS_clamp SS pin high clamp 5.8 V
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voltage
Timer Section
F_burst Burst mode switching 20 KHz
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frequency
F_QR_clamp_h Frequency high clamp 130 KHz
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in QR mode
F_QR_clamp_l Frequency low clamp 20 KHz
in QR mode
Ton_max Maximum on time 35 usec
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Thermal Protection
T_shutdown Thermal shutdown 140 ◦C
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temperature
Latch Protection
V_latch_trigger External latch trigger SS pin pull up current 3.75 V
threshold voltage at should be larger than
SS pin 200uA
V_latch_release VCC latch release 6 V
voltage
Brownout Protection and Line OVP Protection
Vth_BO Brownout comparator 0.5 V
threshold
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VOL Output Low Level Io = 20 mA (sink) 0.3 V
VOH Output High Level Io = 20 mA (source) 11 V
VG_Clamp Output Clamp VCC=20V 15 V
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Voltage Level
T_r Output Rising Time CL = 1nf 80 nSec
T_f Output Falling Time CL = 1nf 20 nSec
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CHARACTERIZATION PLOTS
Ivdd vs Vdd
Istartup(uA) vs Temperature(C)
2.5 3.0
2
Istarup(uA)
2.0
Ivdd(mA)
1.5
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1 1.0
0.5
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0.0
0
0 10 20 30 -40 -10 20 50 80 110
Vdd(V) Temperature(C)
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UVLO(ON((V) vs Temperature(℃) UVLO(OFF)(V) vs Temperature(℃)
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9.00 16.00
UVLO(OFF)(V)
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UVLO(ON)(V)
15.50
15.00
8.50
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14.50
14.00
8.00
-40 -10 20 50 80 110
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Fosc(KHz)
23.0
120.0
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21.0 110.0
-40 -15 10 35 60 85 110 -40 -15 10 35 60 85 110
Temperature(℃) Temperature(℃)
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45.0
Ivdd_lacth(uA)
40.0
35.0
30.0
-40 -10 20 50 80 110
Temperature(C)
OPERATION DESCRIPTION
Quasi-Resonant (QR) converter typically features valley switching characteristic is still preserved in
lower EMI and higher power conversion efficiency PFM mode. That is, when loading decreases, the
compared to conventional hard-switched converter system automatically skip more and more valleys
with a fixed switching frequency. OB2202 is a and the switching frequency is thus reduced. In
highly integrated QR controller optimized for such way, a smooth frequency foldback is realized
offline flyback converter applications. The built-in and high power conversion efficiency is achieved.
advanced energy saving with high level protection
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features provide cost effective solutions for energy ■ At zero load or very light load conditions
efficient power supplies. (VFB<Vth1), the system operates in On-Bright’s
proprietary “extended burst mode”. In this
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z Startup Current and Start up Control condition, voltage at FB is below burst mode
Startup current of OB2202 is designed to be very threshold level, Vth1. The Gate drive output
low so that VCC could be charged up above switches only when VCC voltage drops below a
UVLO(OFF) threshold level and device starts up preset level or FB input is active to output an on
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quickly. A large value startup resistor can therefore state. Otherwise the gate drive remains at off state
be used to minimize the power loss yet reliable to minimize the switching loss thus reduce the
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startup in application. For a typical AC/DC adaptor standby power consumption to the greatest extend.
with universal input range design, a 2 MΩ, 1/8 W In extended burst mode, the switching frequency is
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startup resistor could be used together with a VCC fixed to 20KHz, in this way, possible audio noise is
capacitor to provide a fast startup and yet low eliminated.
power dissipation design solution.
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z Operating Current
The operating current of OB2202 is very low. Good
efficiency is achieved by the low operating current
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optimized such that the operation frequency is activity on the auxiliary windings through DEM pin.
This voltage features a flyback polarity. A new
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■ At light load condition (Vth1<VFB<Vth2, Figure and FB), the switch is off and the flyback stroke
1), the system operates in PFM (pulse frequency starts. After the flyback stroke, the drain voltage
modulation) mode for high power conversion shows an oscillation with a frequency of
efficiency. In PFM mode, the “ON” time in a approximately 1 / 2π L p C d , where L p is the
switching cycle is fixed and the system modulates
the frequency according to the load conditions. primary self inductance of the transformer and Cd
Generally, in flyback converter, the decreasing of is the capacitance on the drain node, as shown in
loading results in voltage level decreasing at FB pin. Fig.2.
The controller monitors the voltage level at FB and
control the switching frequency. However, the
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Figure 2
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The typical detection level is fixed at 75mV at the
DEM pin. Demagnetization is recognized by
detection of a possible “valley” when the voltage at
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DEM is below 75mV in falling edge.
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z Current Sensing and Leading Edge
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Blanking
Cycle-by-Cycle current limiting is offered in
OB2202 current mode control. The switch current
is detected by a sense resistor into the CS pin. An t Figure 3
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internal leading edge blanking circuit chops off the
z Maximum and Minimum Frequency Clamp
sense voltage spike at initial MOSFET on state due
in QR operation
to snubber diode reverse recovery so that the
According to the QR operation principle, the
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2.1V
z Output Over voltage protection (OVP) 2V
An output over voltage protection (OVP) is
implemented by sensing the auxiliary winding
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voltage at DEM pin during the flyback phase. The SS
auxiliary winding voltage is a well-defined replica
of the output voltage. The OVP works by sampling Soft start process Time
the plateau voltage at DEM pin during the flyback
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phase.
Figure 5
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z Gate Drive
The Gate pin is connected to the gate of an external
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MOSFET for power switch control. Too weak the
gate drive results in higher conduction and switch
tloss of MOSFET while too strong gate drive output
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compromises the EMI.
Good tradeoff is achieved through the built-in
totem pole gate drive design with right output
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If the sampled plateau voltage exceeds the OVP trip 15V clamp is added for MOSFET gate protection at
level (3.75V), the controller stops all switching high VCC voltage.
operations and enters into latch off mode.
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z Overload Operation
When over load (for example, short circuit) occurs,
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Symbol
Min Max Min Max
A 1.350 1.750 0.053 0.069
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IMPORTANT NOTICE
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WARRANTY INFORMATION
On-Bright Electronics Corp. warrants performance of its hardware products to the specifications applicable at
the time of sale in accordance with its standard warranty. Testing and other quality control techniques are used
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to the extent it deems necessary to support this warranty. Except where mandated by government requirements,
testing of all parameters of each product is not necessarily performed.
On-Bright Electronics Corp. assumes no liability for application assistance or customer product design.
Customers are responsible for their products and applications using On-Bright’s components, data sheet and
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application notes. To minimize the risks associated with customer products and applications, customers should
provide adequate design and operating safeguards.
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LIFE SUPPORT
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On-Bright Electronics Corp.’s products are not designed to be used as components in devices intended to
support or sustain human life. On-bright Electronics Corp. will not be held liable for any damages or claims
resulting from the use of its products in medical applications.
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MILITARY
On-Bright Electronics Corp.’s products are not designed for use in military applications. On-Bright Electronics
Corp. will not be held liable for any damages or claims resulting from the use of its products in military
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applications.
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