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Dr. M. M.

Abdel Aziz

Chapter 1

Operational Amplifiers

An operational amplifiers (op-amp) is a circuit building block with universal importance.

Op-amp Terminals and Symbols

Op-amp Symbol Op-amp Terminals

1,2 ……..input terminals

4,5 ……….DC bias

3………….Output terminal

1…..inverting input, 2……non-inverting input

The Ideal Op-amp

 Equivalent circuit of the ideal op amp

 It amplifies the difference between the two input signals i.e v2 – v1

 It does not draw any input current i.e the input impedance is ∞

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Dr. M. M. Abdel Aziz

 The output impedance is zero

 The open-loop differential gain A is supposed to be ∞

 The bandwidth is ∞

 The common-mode gain Acm = 0

Because the open loop gain is very high, any input signal will result in saturated output.
This will make the op-amp useless as an amplifier. An outer feedback connection circuit is
used to reduce the open loop gain to resonable values and makes the gain controllable.

Op-amp Operating Modes ( Configurations)


1. Inverting Configuration

2. Non-inverting Configuration

3. Differential Configuration.

Representation of the input signal

The input signal sources v1 and v2 are represented in terms of their differential and
common-mode components as follows:

v Id  v2  v1

v1  v2
v Icm 
2

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Dr. M. M. Abdel Aziz

1. The Op-amp Inverting Configuration

Closed-loop gain G = vO / vI

vO
The differential gain A is idealy ∞, so v Id  v2  v1   0
A

Hence, v2 = v1 ….i.e there is a vertual short circuit between terminals 1 and 2

Since v2 = 0, thus v1 = 0,and terminal 1 is at vertual ground.

vI v
i1   i2   O
R1 R2

vO R
G  2
vI R1

Thus the closed-loop gain depends entirely on the external passive components.

Input and Output Resistances

Rin = R1, and Rout = 0

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Dr. M. M. Abdel Aziz

Rin should be large, but G = - R2 / R1 . For high gain; R2 should be impractically large. To
increase Rin and at the same time, keeping high gain, the following configuration is used.

Fig.4

Analysis

vI v R2
i1   i2   x , vx   vI
R1 R2 R1

i4  i2  i3

v x  vo v v
 x  x
R4 R2 R3

 vo  1 1 1  R  1 1 1 
 v x      2 v I    
R4  R4 R2 R3  R1  R4 R2 R3 

vo RR  1 1 1  R  R R 
 4 2       2 1  4  4 
vI R1  R4 R2 R3  R1  R2 R3 

vo R  R R 
 2 1  4  4 
vI R1  R2 R3 

R1 can be chosen as high as possible. The main factor affecting the gain is ( R4 / R3).

Numerical Example:

Consider the circuit in Fig. 4, with R1 = R2 = R4 = 1MὨ. Find the values of R3 to obtain
the following gains: a) -10 V/V, b) -100 V/V

Solution:

vo R  R R 
 2 1  4  4 
vI R1  R2 R3 

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Dr. M. M. Abdel Aziz

vo  1 
  1  1     10
vI  R3 

1/R3 = 8 , R3 = 1/8 MὨ = 125kὨ

The Weighted Summer

it  i1  i2  i3  .........in

v1 v2 vn v
i1  , i2  , .........in  , and i   O
R1 R2 Rn Rf

vO v v v
  1  2  .......  n
Rf R1 R2 Rn

 Rf Rf Rf 
vO   v1  v2  ........... vn 
 R1 R2 Rn 

The output is the weighted sum of the input signals

If Rf = R1 = R2 ……….= Rn

vO   v1  v2  ...........  vn 

Weighted summer is capable of summing signals with opposite signs as follows:

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Dr. M. M. Abdel Aziz

R R R R R R 
vO   a c v1  a c v2  c v3  c v4 
 R1 Rb R2 Rb R3 R4 

2. The Op-amp Non-Inverting Configuration

Derivation of the gain equation:

The sequence of the steps in the analysis is indicated by the circled numbers.

vo  v I v
 I
R2 R1

R2 R 
vo  vI  vI or vo  v I  2  1
R1  R1 

vo  R 
The closed- loop gain G is G  1  2 
vI  R1 

Put in the above equation R2 = 0 , and R1 = ∞

vo = vI , Rin = ∞ , Rout = 0

This connection is used as a buffer amplifier to connect a source with high impedance to a
load with low impedance

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Dr. M. M. Abdel Aziz

Self-Assessment:

For the shown figure, find : iI , v1 , i1 , i2 , vo , iL , io, and G = v o / vI .

3. Difference Amplifier Configuration

It amplifies the difference between two input signals, and reject the signals that are
common to the two inputs.

vo = Ad vId + Acm vIcm


Usually, Acm = 0

Representing the input signals to a differential amplifier in terms of their differential and
common-mode components:

Note : Why the op-amp itself is not used as a difference amplifier ?

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Dr. M. M. Abdel Aziz

Single Op-amp Difference Amplifier

Derivation of the condition that this circuit will amplify difference between the two
inputs:

R2 R4  R 
 1  2 
R1 R3  R4  R1 

R2 R1 R4
 
R1 R1  R2 R3  R4

R2 R4 R2 R4
 This condition is satisfied by selecting 
R1  R2 R3  R4 R1 R3

To get the difference gain Ad, use the superposition

R2
vO 1   vI1
R1

 R4  R  R
vO 2  v I 2  1  2    v I 2 2
 R3  R4  R1   R1

vO  vO1  vO 2  v I 2  v I 1 
R2 R
 2 v Id
R1 R1

R2
Thus Ad  v Id
R1

Self Assessment:

Find the condition that the shown circuit can provide subtraction of the two inputs. Find
also the differential gain of the circuit.

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Dr. M. M. Abdel Aziz

Differential Input Resistance

Consider R3 = R1 , and R4 =R2 , then:

v Id
RId  and v Id  R1iI  0  R1iI thus RId  2R1
iI

Drawbacks :

* The input resistance is low ( the gain = R 2 /R1 is required to be high )

*It is not easy to vary the differential gain.

The Instrumentation Amplifier


The problem of low input resistance is solved by buffering both inputs of the difference
amplifier . We have used voltage followers with gains A 1 and A2 and the difference
amplifier gain is A3.

 R   R  R
vO  1  2  v I 2  v I 1  4  1  2  4 v Id
R
 R1  R3  R1  R3

 R  R
Ad  1  2  4 and Rid = ∞
 R1  R3

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Dr. M. M. Abdel Aziz

Drawbacks:

* Common mode signals are amplified in the first stage A 1 and A2 to large values

* Amplifiers A1 and A2 should be perfectly matched , otherwise, spurious signals may


appear between their outputs.

* To vary the differential gain, two resistors have to be varied simultaneously ( R 1 ), and
must be perfectly matched.

These drawbacks are solved using the following configuration

Analysis

 R 
vO1 due to vI1is v I 1 1  2 
 2 R1 

 R2
vO1 due tovI2is vI 2
2R1

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Dr. M. M. Abdel Aziz

 R  R
Total output of A1 is : vO1  v I 1 1  2   v I 2 2
 2 R1  2 R1

 R  R
Also, total output of A2 is: vO 2  v I 2 1  2   v I 1 2
 2 R1  2 R1

vO  vO 2  vO1 
R4
The output of A3 is:
R3

R4   R2   R 
vO  v I 2 1    v I 1 1  2 
R3   R1   R1 

 R 
1  2  v I 2  v I 1 
R4

R3  R1 

R4  R 
Ad  1  2 
R3  R1 

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