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DIGITAL ELECTRONICS LABORATORY

SCHOOL OF ELECTRONICS ENGINEERING


KALINGA INSTITUTE OF INDUSTRIAL TECHNOLOGY (KIIT)
DEEMED TO BE UNIVERSITY, BHUBANESWAR – 751024

Digital Electronics Laboratory (EC2093)


Student Details
Name: Aditya Agarwal
Roll No. 2029147 Branch :CSCE

LABORATORY RECORD

Experiment No.7 Date of Experiment:10/11/2021 Date of Submission:

Aim of the Experiment:


Simulation off 2-bit Asynchronous UP counter using Verilog HDL in EDA playground.
Design and Verification of 2-bit asynchronous UP counter using Tinkercad.

Components/ Software Used:

Component/Software Specification
ICs 7473(JK FF)
Bread board, power supply, LEDs, Resisitors, -
Switches, Push button for Manual clock, connecting
wires
Software(s) used TinkerCad, EDA playground
Theory/Objective:
j

c_ L\<....

0 .L 0 l.. 0 C)

0 l. .1. 0

\i'N"\ \,·e-1.�'""""'
ld 1�"?1)
"'J

Q.,.._) � """"'
Verilog HDL Code

Screenshots of EDA Playground (Verilog HDL Code):

Screenshots of Test-bench Code:


Behavioral Simulation Results
EDA Playground Link: https://www.edaplayground.com/x/MaJz (async up)
https://www.edaplayground.com/x/BKWe (async down)

EDA Playground Simulation Outputs:

asyn_up

TinkerCAD Circuit Design


TinkerCAD Public Share Link: https://www.tinkercad.com/things/1mw6a9f6QOM-daring-kasi-
jaagub/editel?sharecode=r535lsheY9wQAp_uNK18U5VrLFAzze-DraHCDnnagv4)
https://www.tinkercad.com/things/0sMckkQ7iCx-fabulous-blorr/editel?
sharecode=hIybQHZAORqCKSpkC6yLVuKPsZnmGHkSz0XmeR38Iig
TinkerCAD Circuit Screenshots:

asyn_up
Design problem:- async down counter

asyn_down
Conclusion:
Asynchronous counters are those whose output is free from the clock signal. Because the flip
flops in asynchronous counters are supplied with different clock signals, there may be delay in
producing output.The required number of logic gates to design asynchronous counters is very less.
So they are simple in design. Another name for Asynchronous counters is “Ripple
counters”.The number of flip flops used in a ripple counter is depends up on the number of
states of counter. The number of output states of counter is called “Modulus” or “MOD” of the
counter. The maximum number of states that a counter can have is 2n where n represents the
number of flip flops used in counter.
5|P a g e

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