MODELING AND CAE FOR POWER ELECTRONIC TOPOLOGIES

Dierk Schroder

Abstract-The design of power conditioning circuits

qq-4 Ft”F,-
r - - 4 Cell Boost
is difficult. One difficulty are the parasitic elements Burk
if high switching frequencies are desired. This paper
shows a general procedure for the design and optimi-
zation of these circuits with CAEtools. These tools
L-
are physical models for the power-semiconductors
which are implemented in programs for electronic cir-

FTHj,
cuit analysis. But the physical models of the power-
Buck-8oosf Cuk
semiconductors are optimized to achieve on the one

FT-!k+
hand very short calculation times compared to device
models and on the other hand very good accuracy of
1% = A‘
the switching transients compared to SPICEmodels.
So this CAE-tool is an intermediate tool in between
the device-modeling for the semiconductor on the one
hand and the system-modeling on the other hand.
Zeta Sepic

I. INTRODUCTION

The analysis and synthesis of power conditioning circuits

is a practical experiment up to now. This approach is
very different to the procedures for the design of signal-
processing circuits where CAEtools are available for a
long time. This difference was due to two main facts. The
first fact was the lack of adequate models for power se-
miconductors, this will be discussed in the next chapter
in detail. The second fact was the relatively low comple-
xity of most of the electrical circuits in the past. Thus
breadboard-experiments were the most suited solution. If
we consider dc-dc-converters with resonant switch confi-
gurations, the design of these converters is difficult. Let’s
consider fig. 1. In fig. l a we define a basic cell and this
cell is an active switch and a diode, all elements should be
considered as ideal. If we use this basic cell, we can define
for example six basic topologies with this cell, the Buck-,
the Boost-, the Buck-Boost, the Cuk-, the Zeta- and the
Sepic-converter, (fig. la-f)
When we consider fig.la again - the Buck-converter - and
add the most important parasitic elements of power se-
miconductors now, which can be paralleled by the same
component in the real circuit, we get four basic topolo-
gies with quasi-resonant switches for the Buck-converter
(fig. Za,b,d,e). If we consider some more parasitics we get
multiresonant topologies (fig. 2c-f, for example).
Thus we can define five different active switch models - a
hard switched model and four parasitic models - and two
diode models in each topology in fig. 1. The same conside-
rations are valid for half- and full-bridge dc-dc-converters.
Prof. Dr.-Ing. D.Sch6der is chairman of the Institute of Electri-
cal Drives, Technical University of Munich, D-80333 Munich, Phone
0049892105-8357, FAX 0049-89-2105-8336
Fig. 1 . Basic dc-dc-converter topologies with
one active switch
The situation gets more complicated, if nonlinear induc-
tivities or dc-dc-topologies with constant switching fre-
quencies at all loads of the converter are examined. The
analysis of the stresses of the components - to define the
ratings and the interactions between the different com-
ponents, especially the semiconductors and their parasi-
tic elements, is very difficult. Very often these interactions
are not measurable, because the topology is changed by
applying the sensor or the desired signals are not measu-
rable. The same situation is valid for other power-sources
- for example converter or inverter for drives. The ana-
lysis of converter- or inverter-topologies is difficult even
if we consider the system aspects only. These aspects are
considered in [1],[2],[3],[4]. As an example for the dc-dc
converters the results are the basic design rules for the
ratings of the components and the control strategy. The
specific situation - analysis of such circuits starting from
the system approach - will be shown in the following ex-
ample. In the example a ”Phase-Shift-Bridge”-topology
[5] is assumed. For all active switches and diodes impro-
ved SPICEmodels are used during the simulation. For
example the reverse recovery effect of the diode is mode-
led in a basic approach. In fig. 3 the used topology and in
fig. 4 the results of the simulation are shown.
The active switches are ZVS, the topology is quasireso-

626

I I
Fig. 2. The six basic resonant converter cells:
a) Quasi-resonant ZCS, full wave
mode, b) Quasi-resonant ZVS, half
wave mode, c) Multi-resonant half
wave mode, d) Quasi-resonant ZCS,
half wave mode, e) Quasi-resonant
ZVS, full wave mode, f ) Multi-
resonant, full wave mode
Fig. 3. PhasoShift-Bridge-DC-DC-
Converter, topology
I
I
nant.
The results of the simulation in fig. 4 show clearly that
e the ratings of the elements are adequate and
0 the topology will work perfectly at a voltage U , =
4OOV if diodes with a voltage rating of 2QOVare used
for DG1-DG4.
In fig. 5 practical results are shown for a voltage U 0 =
70V. Especially the results of the voltage stresses for the
diodes DG1-DG4 at the output are very different from
the simulated results. The results would be more worse,
if the parameters of diodes are used, which can withstand
the real voltage stresses.
The differences between the results of the simulation in
fig. 3 and the results of the practical experiment in fig.
5 can be explained by the differences between the dyna-
mic characteristics of the diode model and the real power
diodes.
It is well known meanwhile, that the orginal diode-model
in SPICE is represented by the static characteristic, the
diffusion capacitance CO and the depletion capacitance
Cj ; furthermore the avalanche-behaviour is included. In
fig. 6a the original SPICE model of the diode and in fig.
6b the "reverse recovery effect" of this diode in the well
known test- circuit are shown.
If such a diode-model is used to describe the reverse re-
covery of a power-diode, there will be a negative diode
627
la i
5A /E

"01
lCQV/E

UDGI
200V/E

Fig. 5. Results of a practical experiment

(Ug = 70V)

"7
I,,,.
- u2.- -- - --
'p-

Fig. 7. Power-diode, charge distribution,

current- and voltagetransient during
reverse recovery

T T-
I A A A 1 I
8 current with a n approximately constant negative d i l d t at
the beginning due to the charging of the capacitors when a
transient with an inductive load is considered. After Cj is
Ob G mi" charged to the supply voltage a damped resonant process
will occur due to the capacitor Cj and the RL of the load.
But the simulated transients of the diode-current and the
diode-voltage and the real reverse recovery will vary very
much. The main explanations are the high injection of
the v-zone and the specific boundary conditions when a
power-diode is used. This stored charge will be removed
during the reverse recovery. Fig.7 shows the transient re-
moval of this charge during a reverse recovery and the
current and voltage of the diode.
Fig.7 shows clearly the differences to fig. 6 during the
reverse recovery. Thus the modeling of the charging of
the v-zone is important to describe the inductive beha-
viour of the power-diode during a switching-on transient.
But most important is the modeling of the removal of the
charge during reverse recovery (switching off),
Fig. 6. pn-junction, SPICE model and reverse Due to this lack of the original SPICE model other models
recovery exist, which describe the reverse recovery effects by adding
additional elements to the model, most of them are fitted
to a limited range of operating points or they are fitted to
a specific operating point. Therefore these models imitate
the reverse recoverey effect for a specific set of parameters

628
 Symbol
G+qq Drain
strUtture
model
Fig. 8 . Vertical MOSFET, type SIPMOS
of the diode and the topology. These models must fail, if
the parameters of the diode used and/or the parameters
of the topology differ. This was the situation in the exam-
ple in fig, 3 and the results in fig. 4 and fig. 5 . This is an
essential result and leads to the starting point of our re-
search; CAE-models for power-semiconductor should be
based on physical approach. This holds for all power-
semiconductors, because all power-semiconductors have
an intrinsic or low doped zone.
Fig.8 shows the symbol, the structure and an implified
model of a vertical MOSFET.
Considering the structure of such a vertical MOSFET,
it is a well-known fact, that power-MOSFETs possess
an inherent antiparallel n+n-p+-diode, this diode is a
typical power-diode. Furthermore we can define a para-
sitic n+ptn- n+-transistor (power-BJT or PBJT) which
is built by the source-gate-drift-zone. The base-collector-
diode of this parasitic transistor is the antiparallel power-
diode. Additionally there are capacitors and resistors.
This most basic model of a vertical FET is shown in fig.
6, too. As soon as such a very basic model is defined in
the first step to derive a model, it is necessary to consider
with great care how the components must be modeled.
This is very important for the range of validity. Even if
we use such a basic model, we can define critical operating
conditions. When we use - for example - the antiparallel
diode as a freewheeling diode, the reverse recovery current
of this diode can trigger a switching transient of the pa-
rasitic PBJT. This transient will occur, when the voltage
drop at the resistor between base and emitter is great
enough, An additional switching transient of the PBJT
can occur, when a transient with a high positive du/dt
is applied to the blocked MOSFET. This high du/dt will
produce a charging current for the capacitor between the
collector and the base of the parasitic PBJT. This cur-
rent can produce a voltage drop at the resistor between
base and emitter of the transistor again. Even avalanche
effects can be considered, if the components in the mo-
del are starting from semiconductor physics. As the first
result of the discussion in t h e chapter it must be stated,
that even a unipolar power switch as the vertical MOS-
FET contains parasitic elements, which are real bipolar
629
G
Drain D
Model1
model
Fig. 9. Structure of an IGBT
power-semiconductors. Thus we must consider the most
important effects of power-semiconductors physics, to de-
scribe the characteristics of these semiconductors.
The same considerations are necessary for all power-
semiconductors. We have to start from the structure of the
device and develop a basic model. The components and
their parameters of this model must be derived, starting
from semiconductor physics, reducing the partial differen-
tial equations to ordinary differential equations by specific
approximations. Thus the physical background is still va-
lid and the range of validity is ensured. If this approach
is accepted, we have to derive first models for the power-
diode, the P B J T and in a third step a full model for the
vertical MOSFET. When these basic models are available,
more complex models for recent power-semiconductors
can be derived.
The most recent power-semiconductors are combinations
of unipolar and bipolar devices to gain a combination of
the advantages of both: simple gate circuit, high blocking
voltage, low on-resistance, high collector currents and
good dynamic behaviour. From fig. 9 it can be derived ea-
sily, that for example the IGBT (Insulated Gate Bipolar
Transistor) is such a hybrid power switch. The structure
of the IGBT is at the upperside in fig. 9 similar to a verti-
cal F E T in fig. 8. Additionally a p+-layer is added at the
drain side of the FET.
If we summarize the aspects in this chapter, we must
state:
0 The modern power semiconductors have complicatcd
structures which result in very complex models to
describe the static and dynamic behaviour.
0 There is a wide variety of combinations of semicon-
ductors as active switch and there is a very wide va-
riety of topologies for dc-dc; dc-ac; ac-dc and ac-ac
converters. Furthermore hard switched semiconduc-
tors, special snubber circuits, ZVS or ZCS switch con-
figurations can be used.
Thus the optimization process
0 which topology for the desired application,
 0 which switch configuration, b = -Pn : mobility ratio
PP
which active switch,
D= ILn .p p : ambipolar diffusivity
0 which interactions and which parasitic effects can oc- + PP
Pn
cur, P + CA .p3
R=- : composite recombination rate
Th
0 are these effects acceptable or not,
Since D,b, TSRH are functions of the local carrier den-
e which are the stresses for the components and the sity, the local dopant density and other local parameters,
ratings of these components, these quantities are also functions of space.
This set of nonlinear partial differential equations has no
is difficult and costly. If models of these power- closed mathematical solution. Thus in device simulation
semiconductors can be derived, these models could be programs like PISCES this set of equations is is solved nu-
implemented in network simulator programs. Such a tool merically by inserting a geometric mesh and solving the
would be very helpful to reduce practical experiments and equations step by step. Due to this mathematical pro-
provide a path for CAE for power converter topologies, cedure the calculation of one switching transient is very
too. time-consuming and the complexity of the topology of the
circuit in which the power semiconductor is inserted must
11. BASICSTEPSFORTHEDERIVATION OF POWER be very simple.
SEMICONDUCTOR MODELS Due to this situation it is absolutely unefficient to try to si-
mulate the topologies shown in the first chapter with these
If the simulation of power-semiconductors or systems with programs. Another approach is the system simulation of
power-semiconductors are considered we must distinguish a system as in fig. 3 (third level). Due to the high order of
between three different simulation levels. The first level is this system and to the fact that the time-constants in such
the device simulation of the static and dynamic beha- a system vary very much (on the one hand lOns - 2011s
viour of the power-semiconductor itself. This simulation for the switching of the power-semiconductors and on the
uses the partial differential equations set of the semicon- other hand seconds in electrical machines) the integration
ductor physics as Poisson’s (or the Maxwell-), the current steps must be chosen or adapted automatically to this si-
density- and the continuity-equations. tuation to guarantee stability of the simulation. To avoid
Poisson’s equation : to small steps for the integration and to limit the compu-
ting time the semiconductors are approximated only by
ideal switches with a fixed time-constant normally. There-
fore both levels of simulation cannot be used to simulate
Current density equations: the switching behaviour of power semiconductors with-
in converter- or inverter-topologies and thus getting the
desired informations to replace breadboard experiments.
The objective of the approach discussed in this paper is a
circuit-analysis program to simulate the switching behavi-
Continuity equations: our of power-semiconductors. Such a simulation program
is classified in between the two levels discussed just before.
The general idea is:

start from the structures of the power-semicoii-

a’
- -- - R p - - .1V J p
a 9
Additionally we have to consider the ambipolar differen-
tial equation (ADE), which is necessary to describe the
charging and decharging in the intrinsic or low doped zone
(drift-zone, fig. 7)
This equation arises from the elimination of the electric
field E with p = n in the current equations and the inser-
tion of the resulting ambipolar current density equation
for Jp into the continuity equation for p .
ductors and derive a basic model,
use the equations of the semiconductor physics,
observe the special situation of power semiconduc-
tors as the low doped drift zones, high injection,
different recombination mechanisms as the Auger-
recombination or the surface-recombination for ex-
ample and use specific approximations to reduce the
partial differential equations into ordinary differen-
tial equations,

? - --. 8D
- + D a. p- + - . - 0. 2- p- J 1 ab develop for all passive and active components of the
at ax ax at2 q ( b + 1)2 ax basic model adequate descriptions,

630

diil(grYrtlp) = 1 (- P
- + aP
%)
DA TH
(Xu,Nonquasistatic) (static, quasistatic
\ approac~i)
azP
a.zz=o,...
I ai is theoretically arbitrary but substantial in practice.
I Solvable with boundary conditions
1 Near to x,(t) and r,(t) the carrier density shows enor-
Fig. 10. Quasistatic approach and approach
according to Xu
0 integrate the adequate descriptions into the basic mo-
del,
0 derive a parameter extraction procedure for all com-
ponents,
0 implement the models into a circuit-analysis pro-
gram,
0 define the range of validity of the model derived.
When we accept these objectives for our CAE-models of
power semiconductors and to the topology, we have to
return to the set of partial differentical equations.
The modelling in various degrees of complexity, was shown
in [GI ,[71,. ..,[181,[211,[2211p31.
The first acceptable strategy was shown by Xu.
In contrast to the commonly used quasistatic approach
- where the partial derivatives with respect to time are
simply set to zero (8/at = 0) in order to find an appro-
ximate solution of the ADE - Xu uses the more adequate
approximation:
aP --P
-
at - T
T is a time dependent state variable derived from the
integrated formulation of the ADE, and thus independent
of the space coordinate. With this approximation (see also
fig. 10 and [lo]), an approximate solution of the ADE can
be derived explicitely.
A more accurate approach to solve the ADE was presented
in [21], [23] and [22] which uses a time dependent discreti-
zation scheme for the high injected part of the drift zone.
This will be outlined briefly now.
As the borders of the high injected region xi and t r are
moving during switching transients, any spatial discreti-
zation introduced in order to solve the ambipolar diffusion
equation has to adapt to these moving boundaries. As the
boundary conditions (current density equations) have to
be fulfilled at changing positions, any discretization fixed
with respect to time and locus inherits either unphysical
results or severe numerical problems. Hence the most ade-
quate discretization is related directly to the positions of
xi(t) and tr(t)
with i = 1 . . .n, x1 = xI and x,, = I,. n denotes the to-
p
tal number of discretization points. The selection of the
mous variations with respect to time and position. Near
+
( z ~ ( t ) x,(t))/2 the time and local changes are slighter
by orders of magnitude. A power law for the determina-
tion of the ai has proved to be well suited to minimize
the disretization error in every operation state. Now all
partial derivatives can be expressed by finite differences
( y replaces the position dependent quantities p , D and b )
Yi+l - Yi-1
= 2 . 4 - 1 . y i + l - yi * ( 4 - 1 + d i ) + di . yi-1
a?,l
ax2 z=Z; di-1 * di . (di + di-1)
Time integration is simply and effectively performed by
standard methods [21]. All scattering and recombination
phenomena are described by expressions used in device
simulation as well [21].
The solution of the ADE is evaluated in a subroutine that
gets the necessary input data from the remaining system
of model equations. All important effects like displace-
ment current, the static and dynamic avalanche pheno-
mena [23] or the free-of-excess-carriers case (what leads
to the substantial snap-off phenomenon in power diodes)
make a contribution to this external system or change its
topology. The whole system of device equations forms a
general purpose model for the drift zone. So far, it is used
in the high power diode, GTO and IGBT models.
In fig. 11 a schematic of the diode is shown as an exam-
ple. The particular models have been explained in detail
in [22]. Here the figure shall illustrate how the general
purpose drift zone model is embedded in the individual
device models. It is represented as a thick frame inclu-
ding snapshots of possible carrier distribution shapes. The
631
 drift zone

1 :..............i.....,
;f(pl@
....i.............:
$!(p,li I -180
0 100 200 300 400 500 600 700 800 900 1000
Fig. 11. The drift zone module as a central time (ns)
part of the diode model
Fig. 12. Current during reverse recovery, model

electrical terminals are sited at the frame's left and right

side, any bidirectional control path reaches the frame at
its bottom. The single voltage drops b$, V,,, and V, form
the total voltage drop across the two drift zone terminals,
the potentials of which are solution vector elements in any
node potential based algorithm (e.g. in SPICE, SABER).
This approach is a strategy, which can be used to derive
physical based models for all power- semiconductors.

111. CAE-RESULTS

In this chapter we will present switching transients of

power-semiconductors first and simulations of switching
charateristics of power-semiconductors in circuits second.
The first example is the power-diode, the switching tran-
sient are shown at different temperatures. time (ns)
Due to the lack of low temperature transient measure-
ments a test diode was used both for the model and 2D Fig. 13. Current during reverse recoverey, de-
vice simulation
device simulations performed by PISCES. Practical tests
at very low temperatures however will be published soon.
The physical parameters of this test diode are as follows.
50

A = 0.3cm3 0
= 100pm
Wepi
-50
N+ = 2 . 1014cm-1
wa = w, = 2 0 p m --> -100

N , = N , = 5 . 1018cm-'
~ " 0= rPo = 6ps
4
-% -150

-200

Fig.12 and fig. 13 show the switching-off current transients -250

at different temperatures simulated with the model (fig.
-300
12) and PISCES (fig. 13). Agreement is excellent.
Fig.14 and fig. 15 show the corresponding voltage transi- -350
0 100 200 300 400 500 600 700 800 900 1000
ents for the model (fig. 14) and the device simulation (fig. time (ns)
15). Again agreement is to be called outstanding.
It is interesting to observe the strongly decreasing storage Fig. 14. Voltage during reverse recovery, model
charge Qrr (area under tho negative diode current) with

632
 time (ns)
Fig. 15. Voltage during reverse recovery, de-
vice simulation
drift zone (um)
Fig. 16. Carrier densities in the drift-zone
decreasing temperature, that follows from a significant li-
fetime reduction. As a consequence, the turn-off losses
(product of current and voltage integrated with respect
to time) are reduced as well. In fig. 16 we can observe
the carrier concentrations in the drift zone at interesting
instants (77K simulation).
In fig. 17 reverse-recovery with snap-off due to extraction
of all excess carriers in the drift zone is shown. For this
simulation ~~0 and 7-0 were reduced to 450ns.
In order to validate the developed models in real power
electronic circuits too, extensive measurements in a tradi-
tional chopper circuit (accomodating either an ultra fast
Toshiba IGBT or a small area Hitachi GTO) with clam-
ped inductive load were performed. Various circuit para-
meters, such as the load current, the source voltage, the
gate resistance (IGBT), the gate-di/dt(GTO) and the de-
vice package temperature were varied. It must be empha-
sized that physical modeling does not require any m e
del parameter adaption to the circuit topology. So once
633
Fig. 17. Snapoff
I [2 Ons/div]
Fig. 18. IGBT,turn-off at 300K for different
load currents (20A,40A,60A), emit-
ter current
validated, the models are effortlessly used in their main
application domain, the CAE development of new power
electronic topologies (ZCS, ZVS, ZVT). Validation results
for the IGBT model are shown in fig. 18 to fig. 20, those
for the GTO model in fig. 21 to fig. 23.
Iv. OF THE RANGEOF
DISCUSSION VALIDITY OF
THE MODELS
In the upper chapters different CAEmodels had been dis-
cussed. It's obvious from these discussions that a model
can have different levels of complexity. The lowest level
of complexity can be defined as a level in which the nor-
mal operating conditions are included only. The second le-
vel can - as an example - include two dimensional effects
and third level effects, which describe additional opera-
ting conditions, can destroy the device. Thus a discussion
of the range of validity is necessary. The development of
Fig. 19. IGBT, turn-off at 400K for different Fig. 21. GTO, snubberless turn-off of clam-
load currents (20A, 40A,60A), emit- ped inductive load at 40A/80V
ter current

Fig. 22. GTO, iduence of different d I G l d t -

Fig. 20. IGBT, turn-off at 400K for different rates on storage time and maximum
load currents (20A, 40A, MA), emit-
gate current
ter to collector voltage

634

I I I
_ -
I
Fig. 23. GTO, iduence of different gate pul-
ses on turn-on time
the model made several approximations which had to be
discussed in respect to its application. The first approxi-
mation is that the device is one-dimensional. This can be
assumed if the devices are fine structured, which is the
tendency for the development of the power devices now.
For devices with large structures the two-dimensional ef-
fects such as current crowding, current pinching etc. are
important. These two dimensional effects are not included
in the models. One possible solution is to fit the parame-
ters and average the effects. A more physical approxima-
tion is to parallel several models [6],[19].
A model for the avalanche breakdown, which describes the
field dependence of the ionization rate and the influence
of the mobile charges is added to each terminal current
boundary condition in the drift-zone model [22]. Thus,
also the important dynamic avalanche effect is accounted
for. Generally the range of validity for unipolar devices is
much higher as for bipolar devices.
In [20] an overview is given for different types of models:
generic, subcircuit, mathematical. One result of this in-
vestigation is: generic models are not very accurate and
very restricted in the range of validity. The subcircuit mo-
dels are generally better but nevertheless restricted in the
range of validity and in the accuracy, too. The mathemati-
cal models - starting from semiconductor physics are best
suited for general application, because the range of vali-
dity is high. But the more precise, the more complex are
the models. The author of the above mentioned paper con-
sidered these mathematical models best suited for device
designers, but much to complex for circuit design. The
reality shows contradictory results. So the efforts should
be concentrated on mathematical models.
635
V. CONCLUSION
In this paper CAE for power electronics is discussed. On
the one hand the latest power semiconductors can be des-
cribed only by models which contain different basic struc-
tures. These basic structures describe the basic effects
starting from semiconductor physics. On the other hand
modern power electronics do not only use "hard switched"
switches only, but also switches with special circuits to
reduce the switching losses or quasi-, multi-, or transient
switches. The analysis of such topologies is very difficult,
thus the determination of the ratings and therefore the
optimization of the elements is troublesome. An analysis
with CAE tools as described in this paper is a much favo-
rable solution than breadboard experiments. Furthermore
with this CAEtool the mutual interdepencies of different
parameters can be determined selectively. This gives an
opportunity to optimize the parameters of the different
elements or for the power semiconductors depending on
the specific topology. Another important objective is the
opportunity to study the influence of parasitic elements or
effects, which are very difficult to determine in a bread-
board experiment. Additionally internal signals can be
analyzed which cannot be measured or external signals
which are difficult to measure or which cannot be measu-
red at all because parasitic components are inserted which
change the topology. So the switching transients can be
simulated during the normal operation or with extended
models which describe critical operations.
This is an important step ahead to find the adequate to-
pology with the adequate power semiconductor for a spe-
cific application. Furthermore, the best suited data of the
power semiconductor in a specific application can be de-
termined. So this CAE-tool is the missing link between
the specialists on the one hand which design the topolo-
gies - but are no specialists in the field of semiconductors
physics - and the power semiconductor specialists on the
other hand which design the power semiconductors - but
are no specialists in the field of topologies.
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U. Kirchenberger, D. Schroder, " A multiresonant
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