Introduction to Computer Architecture

INTRODUCTION TO COMPUTER
ARCHITECTURE

BASIC CONCEPTS OF COMPUTER ARCHITECTURE

F Computer Architecture is the design of computers,

including their instruction sets, hardware
components, and system organization. It refers to the
understanding of the components that make up the
computer and the way they are interconnected.

More specifically, computer architecture refers to the

attributes of the system that are visible to the
programmer - those attributes that have a direct
impact on the execution of a program.

- Instruction Sets

- Data Representation

- Addressing

- I/O

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F On the other hand, Computer Organization is the

underlying implementation of the architecture
which is transparent to the programmer. An
architecture can have a number of organizational
implementations:

- Control Signals

- Technologies

- Device Implementations

F Most computers follow the Von Neumann Architecture.

It is also known as the Stored Program Architecture
or the Fetch-Decode- Execute Architecture.

A computer follows the Von Neumann Architecture if

it meets the following criteria:

1. It has three basic hardware subsystems: a

CPU, a main memory system, and an I/O
system.
2. It is a stored-program computer. Programs
(together with data) are stored in main
memory during execution.
3. It carries out instructions sequentially.
4. It has, or at least appears to have, a single
path between the main memory and the
control unit of the CPU.

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ARCHITECTURAL CLASSIFICATION SCHEMES

F Flynn’s Classification of Computers (in terms of

multiplicity of instruction-data streams) is the most
universally accepted method of classifying computers.

F Definitions of Terms:

1. Instruction Stream (IS) - a sequence of

instructions as executed by a machine.

2. Data Stream (DS) - a sequence of data

including input, partial, or temporary
results, called for by the instruction stream.

Both instructions and data are fetched from the

memory units (MU). Instructions are decoded by the
control unit (CU), which sends the decoded
instruction stream to the processor unit (PU) for
execution.
F Any computer can be placed in one of four broad
categories:
1. SISD (Single Instruction Stream over a
Single Data stream)
2. SIMD (Single Instruction Stream over a
Multiple Data stream)
3. MIMD (Multiple Instruction Stream over a
Multiple Data stream)
4. MISD (Multiple Instruction Stream over a
Single Data stream)

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F SISD (Single Instruction Stream over a Single Data

stream)

An SISD machine is a conventional sequential

machine (Von Neumann). A program executed by the
processor constitutes the single instruction stream,
and the sequence of data items that it operates on
constitutes the single data stream.

IS

Instructions are executed sequentially but may be

overlapped in their execution stages (pipelining).

Most SISD uniprocessor systems are pipelined.

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F SIMD (Single Instruction Stream over a Multiple

Data stream)

A single stream of instructions is broadcast to a

number of processors. Each processor operates on its
own data. The multiple data streams are the
sequences of data items accessed by the individual
processors in their own memories.

In other words, an SIMD computer has several

processors running the same program in lockstep but
each operating on different sets of data. This type of
processing is also called array processing.

"N

>

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F MIMD (Multiple Instruction Stream over a Multiple

Data stream)

These are the parallel computers (multiprocessor and

multiple computer systems). They involve a number
of independent processors, each executing a different
program and accessing its own sequence of data items
(or the same program and the same data but not in
lockstep as in SIMD machines).

I/O

I/O

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F MISD (Multiple Instruction Stream over a Single

Data stream)

A common data structure is manipulated by separate

processors, and each executes a different program.

This is also known as systolic arrays for pipelined

execution of specific algorithms.

This form of computation does not arise often in

practice.

▼
I/O

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SYSTEM ATTRIBUTES TO PERFORMANCE

F The ideal performance of a computer system demands

a perfect match between machine capability and
program behavior.

F Machine capability can be enhanced with better

hardware technology, innovative architectural
features, and efficient resource management.

F Program behavior is affected by algorithm design, data

structures, language efficiency, programmer skill, and
compiler technology.

F The simplest measure of program performance is the

turnaround time (the interval from the time of
submission to the time of completion. It is the sum of
the periods spent for disk and memory accesses, I/O
activities, compilation time, OS overhead, and CPU
time). In order to reduce turnaround time, one must
reduce all these time factors.

F In a multiprogrammed computer, the I/O and system

overheads of a given program may overlap with the
CPU times in other programs. Therefore, it is fair to
compare just the total CPU time needed for program
execution.

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F The CPU of today’s modern digital computer is driven

by a clock with a constant clock rate or clock
frequency (f in megahertz). The inverse of the clock
rate is the period or cycle time (T = 1 /f in seconds).

F The size of the program is determined by its Instruction

Count (Ic), in terms of the number of machine
instructions to be executed in the program.

F Different machine instructions may require different

numbers of clock cycles to execute.

Example:

For the Intel microprocessors, the MOV

instruction (register to register) takes 2 cycles to
execute. The MOV instruction (memory to
register) takes 8 cycles to execute. While the
SHR instruction takes 4 cycles to execute.

Therefore, the cycles per instruction (CPI) becomes

an important parameter for measuring the time
needed to execute each instruction.

For a given instruction set, the average CPI over all

instruction types can be computed.

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F The CPU Time (T in seconds/program) needed to

execute the program is estimated by finding the
product of the three contributing factors:

CPU Time (T) = Ic  CPI  

Example 1:
A 40-MHz processor was used to execute a
program with 50,000 instructions. The average CPI is
estimated to be 3.5 cycles/instruction. Calculate the
total execution time.

Solution:

1 1
  6
 25 ns
f 40 10

CPU Time (T) = Ic  CPI  

 50000  3.5  25  10-9

 4.375 ms

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Example 2:

A 40-MHz processor was used to execute a benchmark

program with the following instruction mix and clock
cycle counts:

Instruction Instruction Clock Cycle

Type Count Count
Integer 45,000
1
Arithmetic
Data Transfer 32,000 2
Floating Point 15,000 2
Control
8,000 2
Transfer

Determine the effective CPI and execution time for

this program.

Solution:
1 1
   25 ns
f 40 106

Total Cycles  45000  1 +

32000  2 +
15000  2 +
8000  2
Total Cycles = 155,000 cycles

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T otal Number of Cycles

CPI =
Total Number of Instructions

_____________155000__________-
45000 + 32000 + 15000 + 8000

_____________155000__________-
45000 + 32000 + 15000 + 8000
 155000
100000

 1.55 cycles/instruction

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F The execution of an instruction requires going through a

cycle of events involving instruction fetch, decode,
operand(s) fetch, execution, and store results.

Only the instruction decode and execution phases are

carried out in the CPU. The remaining three
operations may be required to access memory.

Memory cycle is defined as the time needed to

complete one memory reference (read or write).
Usually, a memory cycle is k times the processor cycle
T. The value of k depends on the speed of the memory
technology and processor-memory interconnection
scheme used.
F The CPI of an instruction can be divided into two
component terms corresponding to the total processor
cycles and memory cycles needed to complete the
execution of the instruction.

CPU Time (T) = Ic (p + m  k)  

where:

p is the number of processor cycles needed

for the instruction decode and execute
m is the number of memory references
needed
k is the ratio between memory cycle and
processor cycle

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F MIPS Rate

The processor speed is often measured in terms of

million instructions per second.
Let C be the total number of clock pulses or cycles
needed to execute a given program.

C = Ic x CPI

CPU Time (T) = Ic  CPI  

= C 
C
f

The equation for the MIPS rate is:

MIPS  Ic
T  10 6

Since T  Ic  CPI   then a second equation for the

MIPS rate can be derived as:

MIPS  f
CPI  106

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Since CPI = C/Ic , then a third equation for the

MIPS rate can be derived as:

f  Ic
MIPS 
C  106

Example 2:

A 40-MHz processor was used to execute a

benchmark program with the following instruction
mix and clock cycle counts:

Instruction Instruction Clock Cycle

Type Count Count
Integer 45,000
1
Arithmetic
Data Transfer 32,000 2
Floating Point 15,000 2
Control
8,000 2
Transfer

Determine the MIPS rate of the

system. Solution:

From the previous example:

Ic = 100,00 instructions
T = 3.875 ms

MIPS  =25.81 MIPS

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