DEPT.

of ECE, CEG, ANNA UNIVERSITY

EC 5303 Digital System Design

ASSESSMENT – II

Date: 24-11-2021 Duration: 1 hr Max. Marks: 25

Part-A (5 x 2 =10 Marks)
Q.No. Marks CO BL
1 Construct JK FF using RS FF. 2 3 1
2 What is the logic required to restart (i.e. make it to go 2 3 2
to the state 0000) the 4-bit ripple counter when it
reaches the state 1010.
3 Develop the transition table for the given expression. 2 4 3
Y1 = x’y1’ + xy2
Y2 = x’y1 + x’y2’
Where y1,y2 are present states and Y1,Y2 are next states
and x is the user input.
4 Simplify the function F(A,B,C,D) = 2 4 3
∑(0,2,6,7,8,10,12). What is the modification to
required to prevent static-1 hazard the given Function.
5 (i)Draw the transition (state) diagram for the following 1+1=2 4 3
transition table.
(ii)How many flip flops are required to design a race
free asynchronous sequential circuit for the given flow
table.

where X,Y are inputs.

 Part-B (7 marks)
Q.No. Marks CO BL
6a Design a synchronous counter using T FFs for the 7 3 3
states 1,0,5,7,6,1,0,5,7,6…repeat. Next state for all
the unused states is 3.

OR
7 3 3
6b Consider two flipflops A,B and one input x to design
a sequential circuit with the following flipflop inputs.
Develop the state table and its logic diagram
JA = Bx’ KA = B
JB = Ax KB = A’x’ +Ax

Part-C (8 Marks)
Q.No. Marks CO BL
7 Obtain a primitive flow table for a circuit with two 8 4 3
inputs x1 and x2 and two outputs Z1 and Z2 that satisfy
the following four conditions. Both inputs do not
change simultaneously.
i. When x1x2 = 00, the output is z1z2=00
ii. When x1 =1 and x2 changes from 0 to 1, the
output is z1z2 = 01.
iii. When x2 =1 and x1 changes from 0 to 1, the
output is z1z2 = 10.
iv. Otherwise the output does not change.

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CO1 CO2 CO3 CO4 CO5

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