Unit 4

Prepared by Mr. S.
Murali, AP/CSE
UNIT IV MICROCONTROLLER
Architectureof8051– Special Function

Registers(SFRs) - I/O Pins Ports and Circuits -
Instruction set - Addressing modes - Assembly
language programming.
Prepared by Mr. S. Murali, AP/CSE, VCET

Prepared by Mr. S. Murali, AP/CSE
CPU (Central Processing Unit)

Execute information stored in memory
I/O (Input/output) devices

Provide a means of communicating with CPU
Memory
RAM (Random Access Memory) – temporary storage of
programs that computer is running
The data is lost when computer is off
ROM (Read Only Memory) – contains programs and

information essential to operation of the computer
The information cannot be changed by use, and is not lost
when power is off
– It is called nonvolatile memory

The CPU is connected to memory and I/O through strips of

wire called a bus
Carries information from place to place

Address bus
Data bus
Control bus
Address bus
For a device (memory or I/O) to be recognized by the CPU,
it must be assigned an address
The address assigned to a given device must be unique
The CPU puts the address on the address bus, and the
decoding circuitry finds the device
Data bus
The CPU either gets data from the device or sends data to it
Control bus
Provides read or write signals to the device to indicate if the
CPU is asking for information or sending it information
Registers
The CPU uses registers to store information temporarily
Values to be processed
Address of value to be fetched from memory
In general, the more and bigger the registers, the better the
CPU
Registers can be 8-, 16-, 32-, or 64-bit
The disadvantage of more and bigger registers is the increased
cost of such a CPU


General-purpose microprocessors
Must add RAM, ROM, I/O ports, and timers externally to

make them functional
Make the system bulkier and much more expensive
Have the advantage of versatility on the amount of RAM,
ROM, and I/O ports
Microcontroller
The fixed amount of on-chip ROM, RAM, and number of

I/O ports makes them ideal for many applications in which
cost and space are critical
In many applications, the space it takes, the power it
consumes, and the price per unit are much more critical
considerations than the computing power
8-bit microcontrollers
Motorola’s 6811
Intel’s 8051
Zilog’s Z8
Microchip’s PIC
There are also 16-bit and 32-bit microcontrollers made by

various chip makers
The 8051 family has the largest number of diversified
(multiple source) suppliers
Intel (original)
Atmel
Philips/ Signetics
AMD
Infineon (formerly Siemens)
Matra Dallas Semiconductor/Maxim
Intel introduced 8051, referred as MCS-51, in 1981
The 8051 is an 8-bit processor

The CPU can work on only 8 bits of data at a time
Architecture:
The 8051 had
128 bytes of RAM

4K bytes of on-chip ROM
Two timers
One serial port
Four I/O ports, each 8 bits wide
6 interrupt sources


Central Processor Unit (CPU)
-brain of any processing device of the microcontroller.
-monitors and controls all operations that are performed on

the Microcontroller units.
-The User has no control over the work of the CPU directly .
-It reads program written in ROM memory and executes them

and do the expected task of that application.

Interrupts
Interrupt is a subroutine call that interrupts/ stops the

microcontrollers main operations and causes it to execute any
other program, which is more important at the time of
operation.
An Interrupts gives us a mechanism to put on hold the

ongoing operations, execute a subroutine and then again
resumes to another type of operations.

There are 5 vectored interrupts are shown in below
•INTO
•TFO
•INT1
•TF1
•R1/T1
INT0 and INT1 are external interrupts that could be negative

edge triggered or low level triggered.
When All these interrupts are activated, set the

corresponding flags except for serial interrupt.
The interrupt flags are cleared when the processor branches

to the interrupt service routine (ISR).
Memory
-Needs to store programs (collection of instructions) which tells

microcontroller to do specific tasks.
-The memory which is used to store the program of the

microcontroller is known as code memory or Program memory of
applications.
RAM memory - data memory of the 8051 stores data temporarily for
operation.
-8051 microcontroller has 4K of code memory or program memory,

that has 4KB ROM and also 128 bytes of data memory of RAM.

BUS
-collection of wires which work as a communication channel

or medium for transfer of Data.
-consists of 8, 16 or more wires of the microcontroller to carry

8 bits, 16 bits simultaneously.
Two types of buses that are shown in below
•Address Bus
•Data Bus

Address Bus:
Microcontroller 8051 has a 16 bit address bus for transferring

the data.
It is used to address memory locations and to transfer the

address from CPU to Memory of the microcontroller.
It has four addressing modes that are

Immediate addressing modes.
Bank address (or) Register addressing mode.
Direct Addressing mode.
Register indirect addressing mode.
Data Bus: Microcontroller 8051 has 8 bits of the data bus,

which is used to carry data of particular applications.
Oscillator
Microcontroller requires clock pulses for its operation and so

an on-chip oscillator is working as a clock source for CPU
The output pulses of oscillator are stable. Therefore, it

enables synchronized work of all parts of the 8051
Microcontroller.
Input / Output Port

Microcontroller is used in embedded systems to control the
operation of machines.
To connect with other machines, devices or peripherals we
require I/O interfacing ports
8051 has 4 input, output ports to connect it to the other
peripherals
Timers/Counters
8051 microcontroller has two 16 bit timers and counters.
These counters are again divided into a 8 bit register.
The timers are used for measurement of intervals to

determine the pulse width of pulses.


Pins 1 to 8 − These pins are known as Port 1 and serving as

I/O port
Pin 9 − RESET pin used to reset the microcontroller to its

initial values.
Pins 10 to 17 − These pins are known as Port 3. This port

serves some functions like interrupts, timer input, control
signals, serial communication signals RxD and TxD, etc.
Pins 18 & 19 − These pins are used for interfacing an external

crystal to get the system clock.
Pin 20 − This pin is connected to the ground.

Pins 21 to 28 − These pins are known as Port 2 and It serves as I/O

port. Higher order address bus signals are multiplexed using this
port.
Pin 29 − PSEN pin which stands for Program Store Enable and used
to read a signal from the external program memory.
Pin 30 − EA pin which stands for External Access input and used to
enable/disable the external memory interfacing.
Pin 31 − ALE pin which stands for Address Latch Enable and used
to demultiplex the address-data signal of port.
Pins 32 to 39 − These pins are known as Port 0. It serves as I/O

port. Lower order address bus signals are multiplexed using this
port.
Pin 40 − This pin is used to provide power supply to the circuit.
Special Function Registers

InternalMemory
(1) 8051 implements a separate memory space for programs (code) and data.
(2) Both code and data may be internal, however, both expand using external components
to a maximum of 64K code memory and 64K data memory.
(3) Internal memory consists of on-chip ROM and on-chip data RAM.
(4) On-chip RAM contains a rich arrangement of general purpose storage, bit addressable
storage, register banks, and special function registers.
(5) In the 8051, the registers and input/output ports are memory mapped and accessible
like any other memorylocation.
(6) In the 8051, the stack resides within the internal RAM, rather than in external RAM.
2
2

Registers RAM memory space allocation in the

8051 Microcontroller

Register banks in the 8051Microcontroller
24

Special Function Registers

(1) ACC
(2) B
(3) PSW
(4) SP
(5) DPTR
(6) I/O
(7) PMODE
(8) PCON
(9) TMODE
(10)TCON etc. 25

Accumulator
(1)A register is a general-purpose register used for storing
intermediate results obtained during operation.
(2)Prior to executing an instruction upon any number or

operand it is necessary to store it in the accumulator first.
(3)All results obtained from arithmetical operations performed

by the ALU are stored in the accumulator.
(4)Data to be moved from one register to another must go

through the accumulator.
26

B Register
(1)B register or accumulator B is used along with the accumulator
for multiply and divideoperations.
(2)MUL AB: multiplies 8 bit unsigned values in A and B. and leaves

the 16 bit result in A (low byte) and B (high byte).
(3)DIV AB: divided A by B, leaving the integer result in A and

remainder in B.
(4)B register is bit-addressable.
27

PSW (Program Status word) / Flag Register
11

Stack Pointer
(1)Stack pointer (SP) is an 8-bit register at address 81H.
(2) It contains the address of the data item currently on top of the
stack.
(3)Stack operations include pushing data on the stackandpopping
data off the stack.
(4)Pushing increments SP before writing thedata
(5)Popping from the stack reads the data and decrements theSP
(6). 8051 stack is kept in the internalRAM
(7)Depending on the initial value of the SP,stack canhave
different sizes
12

Data pointer (DPTR)

(1)Data pointer (DPTR): is used to access external data or code.
(2)DPTR is a 16 bit register at addresses 82H (low byte) and 83H

(high byte).
(3)The data pointer is used in operations regarding externalRAM

and some instructions involving codememory.
(4)Example: the following instructions write 55H into external

RAM location1000H:
• MOV A,#55H
• MOV DPTR,#1000H
• MOVX @DPTR,A
30


I/O Ports
32

PORT 0
(1)Port 0 is 8-bitbidirectional I/O port.
(2)Port 0 pins can be used as high-impedanceinputs.
(3)Port 0 is also the multiplexed low-order address and data

bus during accesses to external program and datamemory.
(4)We r using pins no. from 32 to39.
(5)When used as an output the pin latches areprogrammed

to 0.
(5). When used as an input the pin latches are programmed to

1. 33

PORT 1
(1)Port 1 is an 8-bit bidirectional I/0port.
(2)We r using pins no. from 1 to9.
(3). Port 1 have no dual functions.
(4)When used as an output the pin latchesare

programmed to 0.
(5)When used as an input the pin latches are

programmed to 1.
34

PORT 2
(1) Port 2 is an 8-bit bidirectional I/O port.
(2) Port 2 emits the high-order address byte during fetches from external
program memory and during accesses to external data memory that use 16-bit
addresses (MOVX @DPTR).
(3)When used as an output the pin latches are programmed to0.
(4). When used as an input the pin latches are programmed to 1.
(5). We r using pins no. from 21 to 28.
35

PORT 3
(1). Port 3 is an 8-bit bi-directional I/0port.
(2). We r using pins no. from 10 to17.
• RXD (P3.0): Serial input port,

• TXD (P3.1): Serial output port,
• INT0 (P3.2): External interrupt,
• INT1 (P3.3): External interrupt,
• T0 T0 (P3.4): Timer 0 external input,
• T1 (P3.5): Timer 1 external input,
• WR (P3.6): External data memory writestrobe,
• RD (P3.7): External data memory readstrobe,
36

PCON (Power Mode ControlRegister)
Address: 87H
Used for power management of 8051 in two modes i.e. idle mode and
power down mode.
SMOD – Serial mode bit used to determine the baud rate with Timer 1.
37


TCON (Timer/Counter Control Register)
39

TMOD (Timer Mode ControlRegister)
40

Interrupts
• An interrupt is triggered whenever corresponding event
occurs. When the event occurs, the 8051 temporarily puts
"on hold" the normal execution of the program and executes
a special section of code referred to as an interrupt handler.
• Whenever any device needs its service, the device notifies

the microcontroller by sending it an interruptsignal.
• There are total 5 interrupt sources in 8051 Microprocessor as

follows. (1). Timer Flag 0, (2). Timer Flag 1, (TF1 & TF2 are
Timer Flag Interrupts). (3). INT 0, (4). INT 1, (INT 0 & INT 1 are
externalinterrupts).
(5). Serial Port Interrupt (RI orTI).
41

Interrupts Priorities
Interrupt Destinations
Interrupt Addres
s
(Hex)
1 IE0 0003H
2 TF0 000BH
3 IE1 0013H
4 TF1 001BH
5 SERIAL 0023H
26

Interrupt Priority (IP) SFR
43

Interrupt Enable (IE) SFR
44

INSTRUCTION
SET OF
8051
486

8051 Instruction Set

• The instructions are grouped into 5 groups
– Arithmetic
– Logic
– Data Transfer
– Boolean
– Branching
487

1. Arithmetic Instructions
• ADD
– 8-bit addition between the accumulator (A) and a
second operand.
• The result is always in the accumulator.
• The CY flag is set/reset appropriately.
• ADDC
– 8-bit addition between the accumulator, a second
operand and the previous value of the CY flag.
488

ADD Instruction
• ADD A, source ;ADD the source operand to
the accumulator
• MOV A, #03H ;load 03H into A
MOV B,#02H ;load 02H into B
ADD A,B ;add B register to accumulator
;(A = A + B)= 05
489

SUBB
–Subtract with Borrow.
–A  A - <operand> - CY.
–The result is always saved in the
accumulator.
–The CY flag is set/reset appropriately.
490

SUBB Instruction
• SUBB A, source ;Subtract the source operand
with the accumulator
• MOV A, #03H ;load 03H into A
MOV B,#02H ;load 02H into B
SUBB A,B ;add B register to accumulator
;(A = A - B)= 01
491

• INC
– Increment the operand by one. Ex: INC DPTR
• The operand can be a register, a direct address, an
indirect address, the data pointer.
• DEC
– Decrement the operand by one. Ex: DEC B
• The operand can be a register, a direct address, an
indirect address.
• MUL AB / DIV AB
– Multiply A by B and place result in A:B.
– Divide A by B and place result in A:B.
492

Multiplication of Numbers
MUL AB ; A  B, place 16-bit result in B and A
MOV A,#05 ;load 05H to reg. A

MOV B,#03 ;load 03H in reg. B
MUL AB ;05 * 03 = 000F where B = 00 and A = 0F
Table 6-1:Unsigned Multiplication Summary (MULAB)
Multiplication Operand 1 Operand 2 Result
byte byte A B A=low byte,

B=high byte
493

Division of Numbers
MOV A,#05 ;load 05H to reg. A
MOV B,#03 ;load 03H in reg. B
DIV AB ;05/03 =>Quotient = 01,Reminder = 02
where B = 02 and A = 01
Table 6-2:Unsigned Division Summary (DIV AB)

Division Numerator Denominator Quotient Remainder
byte / byte A B A B
494

•ADD A,@Rn A = A+ memory content of Rn
•ADD A, Rn A = A+ Rn
•DA A Decimal Adjust A {BCD addition}
•ADDC A,@Rn A = A+ memory content of Rn + carry

•SUBB A,@Rn
•INC @Ri

2. Logical
instructions
496

• ANL D,S
-Performs logical AND of destination & source
-Destination : A/memory;
-Source : data/register/memory
- Eg: ANL A,#0FH ANL A,R5
• ORL D,S
-Performs logical OR of destination & source
- Eg: ORL A,#28H ORL A,@R0
497

•XRL D,S
-Performs logical XOR of destination & source
- Eg: XRL A,#28H XRL A,@R0
• CPL A
-Compliment accumulator
-gives 1’s compliment of accumulator data
• SWAP A
-Exchange the upper & lower nibbles of accumulator
498

• RL A
-Rotate data of accumulator towards left without
carry
• RLC A
- Rotate data of accumulator towards left with carry
• RR A
-Rotate data of accumulator towards right without
carry
• RRC A
- Rotate data of accumulator towards right with
carry
499

3. Data Transfer
Instructions
500

MOV Instruction
• MOV destination, source ; copy source to destination.
• MOV A,#55H ;load value 55H into reg. A

MOV R0,A ;copy contents of A into R0
;(now A=R0=55H)
;(now A=R0=R1=55H)
;(now A=R0=R1=R2=55H)
MOV R3,#95H ;load value 95H into R3
;(now R3=95H)
MOV A,R3 ;copy contents of R3 into A
;now A=R3=95H
501

• MOVX
– Data transfer between the accumulator and
a byte from external data memory.
•MOVX A, @Ri
•MOVX A, @DPTR
•MOVX @Ri, A
•MOVX @DPTR, A
Presented by C.GOKUL,AP/EEE , Velalar College of Engg & Tech, Erode 502

• PUSH / POP
– Push and Pop a data byte onto the stack.
– The data byte is identified by a direct
address from the internal RAM locations.
•PUSH DPL
•POP 40H
503

• XCH
– Exchange accumulator and a byte variable
•XCH A, Rn
•XCH A, direct
•XCH A, @Ri
504

4.Boolean variable
instructions
505

CLR:
• The operation clears the specified bit indicated in
the instruction
• Ex: CLR C clear the carry
SETB:
e.g. SETB 63H
• The operation sets the specified bit to 1.
CPL:
• The operation complements the specified bit
indicated in the instruction e.g. CPL A
506

• ANL C,<Source-bit>
-Performs AND bit addressed with the carry bit.

- Eg: ANL C,P2.7 AND carry flag with bit 7 of P2
• ORL C,<Source-bit>
-Performs OR bit addressed with the carry bit.

- Eg: ORL C,P2.1 OR carry flag with bit 1 of P2
507

• XORL C,<Source-bit>
-Performs XOR bit addressed with the carry bit.

- Eg: XOL C,P2.1 OR carry flag with bit 1 of P2
•MOV P2.3,C
•MOV C,P3.3
•MOV P2.0,C
508

5. Branching
instructions
509

• Program branching instructions are

used to control the flow of actions in
a program
• Some instructions provide decision
making capabilities and transfer
control to other parts of the program.
– e.g. conditional and unconditional
branches
510

Jump Instructions
• All conditional jumps are short jumps
– Target address within -128 to +127 of PC
• LJMP (long jump): 3-byte instruction

– 2-byte target address: 0000 to FFFFH
– Original 8051 has only 4KB on-chip ROM
e.g. LJMP LABEL PC = 16 bit address point out by LABEL
• SJMP (short jump): 2-byte instruction

– 1-byte relative address: -128 to +127 e.g. SJMP LABEL
511

Call Instructions
• LCALL (long call): 3-byte instruction
– 2-byte address
– Target address of routine within 64K-byte range
• ACALL (absolute call): 2-byte instruction

– 11-bit address
– Target address of routine within 2K-byte range
512

• The 8051 provides 2 forms for the return

instruction:
– Return from subroutine – RET
– Return from ISR – RETI
513

514

8051
Addressing
Modes
515

8051 Addressing Modes

• The CPU can access data in various ways, which are
called addressing modes
1. Immediate
2. Register
3. Direct
4. Register indirect
5. External Direct
516

1. Immediate Addressing Mode

• The source operand is a constant.
• The immediate data must be preceded by the pound sign, “#”
• Can load information into any registers, including 16-bit DPTR
register
– DPTR can also be accessed as two 8-bit registers, the high byte DPH and
low byte DPL
517

2. Register Addressing Mode

• Use registers to hold the data to be manipulated.
• The source and destination registers must match in size.

MOV DPTR,A will give an error
• The movement of data between Rn registers is not allowed

MOV R4,R7 is invalid
518

3. Direct Addressing Mode

• It is most often used the direct addressing mode to
access RAM locations 30 – 7FH.
• The entire 128 bytes of RAM can be accessed.
• Contrast this with immediate addressing mode, there is

no “#” sign in the operand.
519

Stack and Direct Addressing Mode

• Only direct addressing mode is allowed for pushing or
popping the stack.
• PUSH A is invalid.
• Pushing the accumulator onto the stack must be coded

as PUSH 0E0H.
520

4. Register Indirect Addressing Mode

• A register is used as a pointer to the data.
• Only register R0 and R1 are used for this purpose.
• R2 – R7 cannot be used to hold the address of an
operand located in RAM.
• When R0 and R1 hold the addresses of RAM locations,
they must be preceded by the “@” sign.
521

Register Indirect Addressing Mode

• Write a program to copy the value 55H into RAM memory locations 40H
to 41H using (a) direct addressing mode, (b) register indirect addressing
mode without a loop, and (c) with a loop.
522

Register Indirect Addressing Mode

• The advantage is that it makes accessing data dynamic
rather than static as in direct addressing mode.
• Looping is not possible in direct addressing mode.
• Write a program to clear 16 RAM locations starting at

RAM address 60H.
523

5. External Direct
• External Memory is accessed.
• There are only two commands that use External Direct

addressing mode:
– MOVX A, @DPTR
MOVX @DPTR, A
• DPTR must first be loaded with the address of external

memory.
524

Unit 4

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Unit 4

Uploaded by

Copyright:

Available Formats

Prepared by Mr. S.

Architectureof8051– Special Function

Prepared by Mr. S. Murali, AP/CSE, VCET

CPU (Central Processing Unit)

I/O (Input/output) devices

ROM (Read Only Memory) – contains programs and

Prepared by Mr. S. Murali, AP/CSE, VCET

The CPU is connected to memory and I/O through strips of

Carries information from place to place

The address assigned to a given device must be unique

Prepared by Mr. S. Murali, AP/CSE, VCET

Prepared by Mr. S. Murali, AP/CSE, VCET

Must add RAM, ROM, I/O ports, and timers externally to

The fixed amount of on-chip ROM, RAM, and number of

There are also 16-bit and 32-bit microcontrollers made by

Intel introduced 8051, referred as MCS-51, in 1981

The 8051 is an 8-bit processor

128 bytes of RAM

Prepared by Mr. S. Murali, AP/CSE, VCET

Prepared by Mr. S. Murali, AP/CSE, VCET

Central Processor Unit (CPU)

-brain of any processing device of the microcontroller.

-monitors and controls all operations that are performed on

-It reads program written in ROM memory and executes them

Prepared by Mr. S. Murali, AP/CSE, VCET

Interrupt is a subroutine call that interrupts/ stops the

An Interrupts gives us a mechanism to put on hold the

Prepared by Mr. S. Murali, AP/CSE, VCET

There are 5 vectored interrupts are shown in below

INT0 and INT1 are external interrupts that could be negative

When All these interrupts are activated, set the

The interrupt flags are cleared when the processor branches

-Needs to store programs (collection of instructions) which tells

-The memory which is used to store the program of the

-8051 microcontroller has 4K of code memory or program memory,

Prepared by Mr. S. Murali, AP/CSE, VCET

-collection of wires which work as a communication channel

-consists of 8, 16 or more wires of the microcontroller to carry

Two types of buses that are shown in below

Prepared by Mr. S. Murali, AP/CSE, VCET

Microcontroller 8051 has a 16 bit address bus for transferring

It is used to address memory locations and to transfer the

It has four addressing modes that are

Data Bus: Microcontroller 8051 has 8 bits of the data bus,

Microcontroller requires clock pulses for its operation and so

The output pulses of oscillator are stable. Therefore, it

Input / Output Port

8051 microcontroller has two 16 bit timers and counters.

These counters are again divided into a 8 bit register.

The timers are used for measurement of intervals to

Prepared by Mr. S. Murali, AP/CSE, VCET

Prepared by Mr. S. Murali, AP/CSE, VCET

Pins 1 to 8 − These pins are known as Port 1 and serving as

Pin 9 − RESET pin used to reset the microcontroller to its

Pins 10 to 17 − These pins are known as Port 3. This port

Pins 18 & 19 − These pins are used for interfacing an external

Pin 20 − This pin is connected to the ground.

Prepared by Mr. S. Murali, AP/CSE, VCET

Pins 21 to 28 − These pins are known as Port 2 and It serves as I/O

Pins 32 to 39 − These pins are known as Port 0. It serves as I/O

Special Function Registers

Prepared by Mr. S. Murali, AP/CSE, VCET

Registers RAM memory space allocation in the