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Brook_BH

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A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
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Title

Cover Page
Size Document Number Rev
A4
Brook_BH -1M
Date: Wednesday, February 04, 2015 Sheet 1 of 106
5 4 3 2 1
5 4 3 2 1

$3!#0 #
3?!*<<<: ::

BROOK ULT Board Block Diagram Project code : 4PD04X010001


PCB P/N : 14276
.&?46!
+$/!6%46
%46?46!
/6/

Revision : -1M !,!6 -*+$1+$


#679;9/ :9
.&?46! %46?46!
D D

DDR3L 1333/1600 Channel A DIM1 ><


9+2!9
+$/!6%46
LCD 99
eDPx4 8+8+2!9

CRT PORT $?4*+$1+$


DDR3L 1333/1600 Channel B DIM2
97
I2C x1 Intel CPU >8 #679;9/ :7(:;
.&?46! %46?46!
Touch Panel
VRAM 4
USB2.0x1 Haswell/Broadwell U +$/!6%46 +$$2$%#
DDR3 1500 4Gb )>(): 15W/28W, GT2/GT3 USB2.0 x 2 USB2.0 x 2 79 !,!6 -*+$1+$
DP TO VGA 97 DP 6?!9>;>7 :)
.&?46! %46?46!
USB3.0 x 1
DDR3

USB3.0 x 1
89 +$/!6%46 >+*9+2!*
HDMI 1.4b 9;
HDMI !,!6 -*+$1+$
USB Charger
USB3.0 x 1 USB3.0 x 1 #6)<8> :=
GPU PCIe x 4, DDI 89
TPS2544 87
N16S-GT-B-A2 .&?46! %46?46!
C ;7()* USB 3.0/2.0 ports (6) C

ETHERNET (10/100/1000Mb) +$/!6%46 >+89+2!8


High Definition Audio
SATA ports (3) PCIe / USB2.0 WLAN + BT
(NGFF) 7> !,!6 -*5+%
PCIe ports (6)
LPC I/F !>88=*+>9 9>
PCIE TO USB PCIE x 1 LAN RJ45 .&?46! %46?46!
UPD720202 8; PCIe x 1
RTL8111G(S) 8> 8<
8+8+2!9 >+8+2!9

SATA/ PCIe x 4 mSATA


3D Camera (NGFF) 78
USB Redrvier 8)
(optional) 8) USB3.0 x 1
TPS2544RTER
SATA x 2 HDD
SATA3.0 7:

CardReader USB2.0 x1
RTS5170 ODD
78 7:
B B

HDA
!? !" # I2C/PS2 Touch PAD (PTP)
<=
HD Audio Codec 79
SPI
ALC255
<;

TPM LPC BUS LPC debug port


NPCT650 => 7)
DMIC
<=

KBC SMBus
DMIC SPI Flash KB9028QA
<= 8MB <9
<:

$%&/%*'!$" Charger Wistron Confidential document, Anyone can not


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Keyboard Wistron Corporation


21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
79 Taipei Hsien 221, Taiwan, R.O.C.
25

FAN Title

Block Diagram
Size Document Number Rev
Custom
Brook_BH -1M
Date: Wednesday, February 04, 2015 Sheet 2 of 106
5 4 3 2 1
5 4 3 2 1

D CPU1B HSW_ULT_DDR3L 2 OF 19 D

D61 PROC_DETECT#
H_CPUPWRGD K61 MISC
CATERR#
24 PECI_EC N62 PECI PRDY# J62
PREQ# K62
1

PROC_TCK E60
EC401 E61
R413 PROC_TMS
AZ5325-01FDR7G-GP 1 2 PROCHOT#_CPU_RK63 JTAG E59
24,44,46 PROCHOT#_CPU PROCHOT# PROC_TRST#
56R2J-L1-GP THERMAL F63
PROC_TDI
PROC_TDO F62
DY
2

89 H_CPUPWRGD C61 PROCPWRGD PWR


R403
2 1 BPM#0 J60
10KR2J-L-GP H60
BPM#1
BPM#2 H61
BPM#3 H62
1 R406 2 200R2F-L1-GP SM_RCOMP_0 AU60 K59
1D35V_CPU_VDDQ_S3 SM_RCOMP0 BPM#4
C 1 R407 2 120R2F-GP SM_RCOMP_1 AV60 SM_RCOMP1
DDR3L
BPM#5 H63 C
1 R408 2100R2F-L1-GP-U SM_RCOMP_2 AU61 K60
R420 SM_RCOMP2 BPM#6
1 2 SM_DRAMRST# AV15 J61
470R2F-GP SM_DRAMRST# BPM#7
12 DDR_PG_CTRL AV61 SM_PG_CNTL1

R402 2
12,13 DDR3_DRAMRST# 1
Layout Note: HASWELL-6-GP-U
0R0402-PAD-1-GP 1. SM_RCOMP trace width=12~15mil
2. Isolation Spacing: 20mil
2

3. Total trace length<500mil


EC404
TVL-0402-01-AB1-1-GP
1

B B
1D05V_S0

1 2 PROCHOT#_CPU

R401
1

62R2J-GP
C402
SC47P50V2JN-3GP
2

Wistron Confidential document, Anyone can not


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Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (THERMAL/CLOCK/PM)
Size Document Number Rev
A4
Brook_BH -1M
Date: Wednesday, February 04, 2015 Sheet 4 of 106
5 4 3 2 1

!!.+*2*$?4

CPU1C HSW_ULT_DDR3L 3 OF 19

12 M_A_DQ[15:0]
M_A_DQ0 AH63 AU37 CPU1D HSW_ULT_DDR3L 4 OF 19
SA_DQ0 SA_CLK#0 M_A_CLK#0 12
M_A_DQ1 AH62 AV37
D SA_DQ1 SA_CLK0 M_A_CLK0 12 D
M_A_DQ2 AK63 AW36
SA_DQ2 SA_CLK#1 M_A_CLK#1 12
M_A_DQ3 AK62 AY36
SA_DQ3 SA_CLK1 M_A_CLK1 12 12 M_A_DQ[47:32]
M_A_DQ4 AH61 M_A_DQ32 AY31 AM38
SA_DQ4 SB_DQ0 SB_CK#0 M_B_CLK#0 13
M_A_DQ5 AH60 AU43 M_A_DQ33 AW31 AN38
SA_DQ5 SA_CKE0 M_A_CKE0 12 SB_DQ1 SB_CK0 M_B_CLK0 13
M_A_DQ6 AK61 AW43 M_A_DQ34 AY29 AK38
SA_DQ6 SA_CKE1 M_A_CKE1 12 SB_DQ2 SB_CK#1 M_B_CLK#1 13
M_A_DQ7 AK60 AY42 M_A_DQ35 AW29 AL38
SA_DQ7 SA_CKE2 SB_DQ3 SB_CK1 M_B_CLK1 13
M_A_DQ8 AM63 AY43 M_A_DQ36 AV31
M_A_DQ9 SA_DQ8 SA_CKE3 M_A_DQ37 SB_DQ4
AM62 AU31 AY49 M_B_CKE0 13
M_A_DQ10 SA_DQ9 M_A_DQ38 SB_DQ5 SB_CKE0
AP63 SA_DQ10 SA_CS#0 AP33 M_A_CS#0 12 AV29 SB_DQ6 SB_CKE1 AU50 M_B_CKE1 13
M_A_DQ11 AP62 AR32 M_A_DQ39 AU29 AW49
SA_DQ11 SA_CS#1 M_A_CS#1 12 SB_DQ7 SB_CKE2
M_A_DQ12 AM61 M_A_DQ40 AY27 AV50
M_A_DQ13 SA_DQ12 M_A_DQ41 SB_DQ8 SB_CKE3
AM60 AP32 AW27
M_A_DQ14 SA_DQ13 SA_ODT0 M_A_DQ42 SB_DQ9
AP61 AY25 AM32 M_B_CS#0 13
M_A_DQ15 SA_DQ14 M_A_DQ43 SB_DQ10 SB_CS#0
13 M_B_DQ[15:0] AP60 AY34 M_A_RAS# 12 AW25 AK32 M_B_CS#1 13
M_B_DQ0 SA_DQ15 SA_RAS# M_A_DQ44 SB_DQ11 SB_CS#1
AP58 SA_DQ16 SA_WE# AW34 M_A_WE# 12 AV27 SB_DQ12
M_B_DQ1 AR58 AU34 M_A_CAS# 12 M_A_DQ45 AU27 AL32
M_B_DQ2 SA_DQ17 SA_CAS# M_A_DQ46 SB_DQ13 SB_ODT0
AM57 SA_DQ18 AV25 SB_DQ14
M_B_DQ3 AK57 AU35 M_A_DQ47 AU25 AM35 M_B_RAS# 13
SA_DQ19 SA_BA0 M_A_BS0 12 13 M_B_DQ[47:32] SB_DQ15 SB_RAS#
M_B_DQ4 AL58 AV35 M_B_DQ32 AM29 AK35 M_B_WE# 13
M_B_DQ5 SA_DQ20 SA_BA1 M_A_BS1 12 M_B_DQ33 SB_DQ16 SB_WE#
AK58 AY41 M_A_BS2 12 AK29 AM33 M_B_CAS# 13
M_B_DQ6 SA_DQ21 SA_BA2 M_B_DQ34 SB_DQ17 SB_CAS#
AR57 AL28
M_B_DQ7 SA_DQ22 M_A_A0 M_B_DQ35 SB_DQ18
AN57 AU36 M_A_A[15:0] 12 AK28 AL35
M_B_DQ8 SA_DQ23 SA_MA0 M_A_A1 M_B_DQ36 SB_DQ19 SB_BA0 M_B_BS0 13
AP55 SA_DQ24 SA_MA1 AY37 AR29 SB_DQ20 SB_BA1 AM36 M_B_BS1 13
M_B_DQ9 AR55 AR38 M_A_A2 M_B_DQ37 AN29 AU49
M_B_DQ10 SA_DQ25 SA_MA2 M_A_A3 M_B_DQ38 SB_DQ21 SB_BA2 M_B_BS2 13
AM54 SA_DQ26 SA_MA3 AP36 AR28 SB_DQ22
M_B_DQ11 AK54 AU39 M_A_A4 M_B_DQ39 AP28 AP40 M_B_A0 M_B_A[15:0] 13
M_B_DQ12 SA_DQ27 SA_MA4 M_A_A5 M_B_DQ40 SB_DQ23 SB_MA0 M_B_A1
C AL55 AR36 AN26 AR40 C
M_B_DQ13 SA_DQ28 SA_MA5 M_A_A6 M_B_DQ41 SB_DQ24 SB_MA1 M_B_A2
AK55 SA_DQ29 SA_MA6 AV40 AR26 SB_DQ25 SB_MA2 AP42
M_B_DQ14 AR54 AW39 M_A_A7 M_B_DQ42 AR25 AR42 M_B_A3
M_B_DQ15 SA_DQ30 DDR CHANNEL A SA_MA7 M_A_A8 M_B_DQ43 SB_DQ26 SB_MA3 M_B_A4
12 M_A_DQ[31:16] AN54 AY39 AP25 AR45
M_A_DQ16 SA_DQ31 SA_MA8 M_A_A9 M_B_DQ44 SB_DQ27 SB_MA4 M_B_A5
AY58 AU40 AK26 AP45
M_A_DQ17 SA_DQ32 SA_MA9 M_A_A10 M_B_DQ45 SB_DQ28 SB_MA5 M_B_A6
AW58 AP35 AM26 AW46
M_A_DQ18 SA_DQ33 SA_MA10 M_A_A11 M_B_DQ46 SB_DQ29 SB_MA6 M_B_A7
AY56 AW41 AK25 AY46
M_A_DQ19 SA_DQ34 SA_MA11 M_A_A12 M_B_DQ47 SB_DQ30 SB_MA7 M_B_A8
AW56 AU41 12 M_A_DQ[63:48] AL25 AY47
M_A_DQ20 SA_DQ35 SA_MA12 M_A_A13 M_A_DQ48 SB_DQ31 DDR CHANNEL B SB_MA8 M_B_A9
AV58 SA_DQ36 SA_MA13 AR35 AY23 SB_DQ32 SB_MA9 AU46
M_A_DQ21 AU58 AV42 M_A_A14 M_A_DQ49 AW23 AK36 M_B_A10
M_A_DQ22 SA_DQ37 SA_MA14 M_A_A15 M_A_DQ50 SB_DQ33 SB_MA10 M_B_A11
AV56 SA_DQ38 SA_MA15 AU42 AY21 SB_DQ34 SB_MA11 AV47
M_A_DQ23 AU56 M_A_DQ51 AW21 AU47 M_B_A12
M_A_DQ24 SA_DQ39 M_A_DQS_DN0 M_A_DQ52 SB_DQ35 SB_MA12 M_B_A13
AY54 AJ61 M_A_DQS_DP[7:0] 12 AV23 AK33
M_A_DQ25 SA_DQ40 SA_DQSN0 M_A_DQS_DN1 M_A_DQ53 SB_DQ36 SB_MA13 M_B_A14
AW54 SA_DQ41 SA_DQSN1 AN62 AU23 SB_DQ37 SB_MA14 AR46
M_A_DQ26 AY52 AM58 M_B_DQS_DN0 M_B_DQS_DP[7:0] 13 M_A_DQ54 AV21 AP46 M_B_A15
M_A_DQ27 SA_DQ42 SA_DQSN2 M_B_DQS_DN1 M_A_DQ55 SB_DQ38 SB_MA15
AW52 SA_DQ43 SA_DQSN3 AM55 AU21 SB_DQ39
M_A_DQ28 AV54 AV57 M_A_DQS_DN2 M_A_DQ56 AY19 AW30 M_A_DQS_DN4
M_A_DQ29 SA_DQ44 SA_DQSN4 M_A_DQS_DN3 M_A_DQ57 SB_DQ40 SB_DQSN0 M_A_DQS_DN5
AU54 AV53 AW19 AV26
M_A_DQ30 SA_DQ45 SA_DQSN5 M_B_DQS_DN2 M_A_DQ58 SB_DQ41 SB_DQSN1 M_B_DQS_DN4
AV52 AL43 AY17 AN28
M_A_DQ31 SA_DQ46 SA_DQSN6 M_B_DQS_DN3 M_A_DQ59 SB_DQ42 SB_DQSN2 M_B_DQS_DN5
13 M_B_DQ[31:16] AU52 AL48 AW17 AN25
M_B_DQ16 SA_DQ47 SA_DQSN7 M_A_DQ60 SB_DQ43 SB_DQSN3 M_A_DQS_DN6
AK40 SA_DQ48 AV19 SB_DQ44 SB_DQSN4 AW22
M_B_DQ17 AK42 AJ62 M_A_DQS_DP0 M_A_DQ61 AU19 AV18 M_A_DQS_DN7
SA_DQ49 SA_DQSP0 M_A_DQS_DN[7:0] 12 SB_DQ45 SB_DQSN5
M_B_DQ18 AM43 AN61 M_A_DQS_DP1 M_A_DQ62 AV17 AN21 M_B_DQS_DN6
M_B_DQ19 SA_DQ50 SA_DQSP1 M_B_DQS_DP0 M_B_DQS_DN[7:0] 13 M_A_DQ63 SB_DQ46 SB_DQSN6 M_B_DQS_DN7
AM45 SA_DQ51 SA_DQSP2 AN58 13 M_B_DQ[63:48] AU17 SB_DQ47 SB_DQSN7 AN18
M_B_DQ20 AK45 AN55 M_B_DQS_DP1 M_B_DQ48 AR21
M_B_DQ21 SA_DQ52 SA_DQSP3 M_A_DQS_DP2 M_B_DQ49 SB_DQ48 M_A_DQS_DP4
AK43 AW57 AR22 AV30
M_B_DQ22 SA_DQ53 SA_DQSP4 M_A_DQS_DP3 M_B_DQ50 SB_DQ49 SB_DQSP0 M_A_DQS_DP5
AM40 AW53 AL21 AW26
M_B_DQ23 SA_DQ54 SA_DQSP5 M_B_DQS_DP2 M_B_DQ51 SB_DQ50 SB_DQSP1 M_B_DQS_DP4
AM42 AL42 AM22 AM28
B
M_B_DQ24 SA_DQ55 SA_DQSP6 M_B_DQS_DP3 M_B_DQ52 SB_DQ51 SB_DQSP2 M_B_DQS_DP5
B
AM46 AL49 AN22 AM25
M_B_DQ25 SA_DQ56 SA_DQSP7 M_B_DQ53 SB_DQ52 SB_DQSP3 M_A_DQS_DP6
AK46 AP21 AV22
M_B_DQ26 SA_DQ57 V_SM_VREF_CNT M_B_DQ54 SB_DQ53 SB_DQSP4 M_A_DQS_DP7
AM49 SA_DQ58 SM_VREF_CA AP49 AK21 SB_DQ54 SB_DQSP5 AW18
M_B_DQ27 AK49 AR51 M_B_DQ55 AK22 AM21 M_B_DQS_DP6
SA_DQ59 SM_VREF_DQ0 M_VREF_DQ_DIM0 12 SB_DQ55 SB_DQSP6
M_B_DQ28 AM48 AP51 M_B_DQ56 AN20 AM18 M_B_DQS_DP7
SA_DQ60 SM_VREF_DQ1 M_VREF_DQ_DIM1 13 SB_DQ56 SB_DQSP7
M_B_DQ29 AK48 M_B_DQ57 AR20
M_B_DQ30 SA_DQ61 M_B_DQ58 SB_DQ57
AM51 AK18
M_B_DQ31 SA_DQ62 1D35V_S3 M_B_DQ59 SB_DQ58
AK51 AL18
SA_DQ63 M_B_DQ60 SB_DQ59
AK20
M_B_DQ61 SB_DQ60
AM20
M_B_DQ62 SB_DQ61
AR18
SB_DQ62

1
M_B_DQ63 AP18
R512 SB_DQ63
1K8R2F-GP

2
R503
1 2 V_SM_VREF_CNT
12,13 VREF_CA
2R2J-2-GP
HASWELL-6-GP-U

1
R516 C504
1K8R2F-GP HASWELL-6-GP-U

SCD022U16V2KX-3GP
Wistron Confidential document, Anyone can not

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application without get Wistron permission

VREF_RC
Brook_BH
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

1
R518 Title
24D9R2F-L-GP
CPU (DDR)
Size Document Number Rev

2
Custom
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 5 of 106
5 4 3 2 1
5 4 3 2 1

!!.+*2*$?4

D D
CPU1S HSW_ULT_DDR3L 19 OF 19

eDP Enable
1:Disable AC60 AV63
CFG0 RSVD_TP#AV63
CFG4 AC62 CFG1 RSVD_TP#AU63 AU63
0:Enable AC63 CFG2
AA63 CFG3
CFG4 AA60 C63
CFG4 CFG4 RSVD_TP#C63
Y62 CFG5 RSVD_TP#C62 C62
Y61 CFG6 RSVD#B43 B43
Y60
1

CFG7
R603 V62 CFG8 RSVD_TP#A51 A51
1KR2J-L2-GP V61 CFG9 RSVD_TP#B51 B51
V60 CFG10
U60 CFG11 RSVD_TP#L60 L60
T63
2

CFG12 RESERVED
T62 CFG13 RSVD#N60 N60
T61 CFG14
T60 CFG15 RSVD#W23 W23
OPI_COMP3
DY 20141216 -1
RSVD#Y22 Y22 2 R611 1 49D9R2F-GP
C AA62 CFG16 PROC_OPI_RCOMP AY15 OPI_COMP1 2 R610 1 49D9R2F-GP C
U63 CFG18
AA61 CFG17 RSVD#AV62 AV62
U62 CFG19 RSVD#D58 D58
R607
2 1 CFG_RCOMP V63 P22
CFG_RCOMP VSS
49D9R2F-GP VSS N21
A5 RSVD#A5
RSVD#P20 P20
E1 RSVD#E1 RSVD#R20 R20
D1 RSVD#D1
J20 RSVD#J20
R606 H18 RSVD#H18
1 2 TD_IREF B12 TD_IREF
8K2R2J-3-GP

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Wistron Confidential document, Anyone can not


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application without get Wistron permission
Brook_BH

A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (CFG)
Size Document Number Rev
Custom
Brook_BH -1M
Date: Wednesday, February 04, 2015 Sheet 6 of 106
5 4 3 2 1
5 4 3 2 1

!!.+*2*$?4 1D35V_S3 1D35V_CPU_VDDQ_S3

PG701
1 2

GAP-CLOSE-PWR

PG702
1 2
D 1V_CPU_CORE D
GAP-CLOSE-PWR 1D35V_CPU_VDDQ_S3 CPU1L HSW_ULT_DDR3L 12 OF 19

PG703 L59 C36


RSVD#L59 VCC
1 2 J58 RSVD#J58 VCC C40
VCC C44
GAP-CLOSE-PWR AH26 C48
VDDQ VCC
AJ31 VDDQ VCC C52
PG704 AJ33 C56
VDDQ VCC
1 2 AJ37 VDDQ VCC E23
AN33 VDDQ VCC E25
GAP-CLOSE-PWR AP43 E27
VDDQ VCC
AR48 VDDQ VCC E29
PG705 AY35 E31
VDDQ VCC
1 2 AY40 VDDQ VCC E33
1D05V_S0 1V_CPU_CORE
$4,)$*',*$?4 GAP-CLOSE-PWR
AY44 VDDQ VCC E35
AY50 VDDQ VCC E37
R703 VCC E39
130R2F-1-GP
1 2 VIDSOUT_CPU PG706 F59 E41
VCC VCC
1 2 N58 RSVD#N58 VCC E43
R704 AC58 RSVD#AC58 VCC E45
75R2F-2-GP
1 2 VIDALERT#_CPU GAP-CLOSE-PWR E47
VCC_SENSE VCC
46 VCC_SENSE E63 VCC_SENSE VCC E49
AB23 RSVD#AB23 VCC E51
C 1V_VCOMP_OUT A59 E53 C
VCCIO_OUT VCC
E20 VCCIOA_OUT VCC E55
AD23 RSVD#AD23 VCC E57
#;*>*"4,)$*',*$?4 AA23 RSVD#AA23 VCC F24
AE59 RSVD#AE59 VCC F28
R705 F32
VCC
RN701 46 VIDALERT#_CPU 2 43R2J-GP1 VIDALERT#_CPU_R L62 VIDALERT# VCC F36
VSS_SENSE HSW ULT POWER
1 4 VSS_SENSE 23,46
46 VIDSCK_CPU N63 VIDSCLK VCC F40
2 3 VCC_SENSE L63 F44
46 VIDSOUT_CPU VIDSOUT VCC
VCCST_GD_CPU B59 F48
VCCST_PWRGD VCC
SRN100J-3-GP 46 H_VR_EN F60 F52
IMVP_PWRGD_R VR_EN VCC
C59 VR_READY VCC F56
1V_CPU_CORE VCC G23
1D05V_S0 D63 G25
R706 VSS VCC
1 2 PWR_DEBUG H59 G27
RN702 150R2F-4-L-GP PWR_DEBUG# VCC
P62 VSS VCC G29
VCCST_GD_CPU
40,48,51 1D05V_S0_PWRGD 1 4
IMVP_PWRGD_R
5,44,6*..'$4*$#/ P60 RSVD_TP#P60 VCC G31
26,40,46 IMVP_PWRGD 2 3 P61 RSVD_TP#P61 VCC G33
N59 RSVD_TP#N59 VCC G35
1

SRN10KJ-L-GP N61 G37


RSVD_TP#N61 VCC
1

ET701 T59 G39


RSVD#T59 VCC
2

TVL-0402-01-AB1-1-GP R708 AD60 G41


ET702 R707 5K1R2-GP RSVD#AD60 VCC
AD59 RSVD#AD59 VCC G43
5K1R2-GP AA59 G45
TVL-0402-01-AB1-1-GP

RSVD#AA59 VCC
B AE60 RSVD#AE60 VCC G47 B
2

AC59 RSVD#AC59 VCC G49


2

AG58 RSVD#AG58 VCC G51


1

1D05V_S0 U59 G53


RSVD#U59 VCC
V59 RSVD#V59 VCC G55
VCC G57
AC22 VCCST VCC H23
AE22 VCCST VCC J23
1V_CPU_CORE AE23 K23
1D05V_S0 VCCST VCC
VCC K57
AB57 VCC VCC L22
$;*83$;>9*"4,)$*',*$?4 AD57 VCC VCC M23
AG57 VCC VCC M57
DY ?.&*!$<<*! <<*! <8 C24 VCC VCC P57
C28 U57
1

C703 C715 VCC VCC


C32 W57
SC22U6D3V5MX-L3-GP

SC1U10V2KX-L1-GP

VCC VCC
2

HASWELL-6-GP-U

Wistron Confidential document, Anyone can not


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A A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VCC_CORE)
Size Document Number Rev
Custom
Brook_BH -1M
Date: Wednesday, February 04, 2015 Sheet 7 of 106
5 4 3 2 1
5 4 3 2 1

!!.+*2*$?4

D D

CPU1A HSW_ULT_DDR3L 1 OF 19

$+?
57 HDMI_DATA_CPU_N2 C54 DDI1_TXN0 EDP_TXN0 C45 eDP_TX_CPU_N0 55
57 HDMI_DATA_CPU_P2 C55 DDI1_TXP0 EDP_TXP0 B46 eDP_TX_CPU_P0 55
57 HDMI_DATA_CPU_N1 B58 DDI1_TXN1 EDP_TXN1 A47 eDP_TX_CPU_N1 55
3+-. 57
57
HDMI_DATA_CPU_P1
HDMI_DATA_CPU_N0
C58
B55
DDI1_TXP1
DDI1_TXN2
EDP_TXP1 B47 eDP_TX_CPU_P1 55

$+?*7:*0$)$08$
57 HDMI_DATA_CPU_P0 A55 DDI1_TXP2 EDP_TXN2 C47 eDP_TX_CPU_N2 55
57 HDMI_DATA_CPU_N3 A57 DDI1_TXN3 EDP_TXP2 C46 eDP_TX_CPU_P2 55
57 HDMI_DATA_CPU_P3 B57 DDI1_TXP3 EDP_TXN3 A49 eDP_TX_CPU_N3 55
DDI EDP B49
EDP_TXP3 eDP_TX_CPU_P3 55
56 DDI_VGA_DATA_CPU_N0 C51 DDI2_TXN0
56 DDI_VGA_DATA_CPU_P0 C50 DDI2_TXP0 EDP_AUXN A45 eDP_AUX_CPU_N 55
C C53 B45 1V_VCOMP_OUT C
56 DDI_VGA_DATA_CPU_N1 DDI2_TXN1 EDP_AUXP eDP_AUX_CPU_P 55
B54 R801
56 DDI_VGA_DATA_CPU_P1 DDI2_TXP1
C49 D20 EDP_RCOMP 2 24D9R2F-L-GP
1
DDI2_TXN2 EDP_RCOMP
B50 DDI2_TXP2 EDP_DISP_UTIL A43
A53 DDI2_TXN3
+?*',*+()94&:*?,0'
B53 DDI2_TXP3

Layout Note:
Design Guideline:
HASWELL-6-GP-U EDP_COMP keep routing length max 100 mils.
Trace Width:20 mils.

B B

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A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (DDI/EDP)
Size Document Number Rev
A4
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 8 of 106
5 4 3 2 1
5 4 3 2 1

1D35V_CPU_VDDQ_S3
1V_CPU_CORE
Power current=40A
D Power current=3A D

1
PC1010 PC1009 PC1007 PC1006 PC1005 PC1002
1

1
C1040 C1035 C1036 C1037 C1038 C1039

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP
SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

2
2

2
DY
1

1
EC1006 EC1007 EC1008 EC1009 PC1020 PC1019 PC1018 PC1017 PC1016 PC1015 PC1013 PC1012
SC2D2U10V3KX-L-GP

SC2D2U10V3KX-L-GP

SC2D2U10V3KX-L-GP

SC2D2U10V3KX-L-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP
2

C C

2
5,0*..'$4*#$",%%$.; *?&0'

1V_CPU_CORE 1V_CPU_CORE
1V_CPU_CORE

15WDY/28W

1
PT1001 C1002 C1003 C1004 C1005
ST220U2VDM-8-GP
DY DY DY DY DY DY

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
2
B B

2
1

EC1001 EC1002 EC1003 EC1004 EC1005 EC1016


SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP
2

5,0*..'$4*#$",%%$.; *?&0'

Wistron Confidential document, Anyone can not


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A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (Power CAP1)


Size Document Number Rev
A4
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 10 of 106
5 4 3 2 1
5 4 3 2 1

Page 21,

-!<=*8>*;:!
D D

3D3V_SUS
1D05V_S0 1D05V_S0 1D05V_S0
3D3V_RTC_AUX
1D05V_VCCUSB3PLL_S0 1D05V_VCCSATA3PLL_S0
L1101 L1102

1 2 1 2
IND-2D2UH-196-GP IND-2D2UH-196-GP C1116

1
C1102;C1103 C1108;C1109 C1104;C1106 C1135;C1136
1

1
C1102 C1103 C1108 C1109 C1104 C1106 C1136 C1116 pin AC9

1
pin K9 L10 pin B18 pin B11 C1135 pin AG10 SC10U6D3V3MX-L-GP
SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC4D7U6D3V3KX-L-GP

SC10U6D3V3MX-L-GP

SC4D7U6D3V3KX-L-GP

SC10U6D3V3MX-L-GP

2
SCD1U25V2KX-L-GP
2

2
2

SC1U6D3V3KX-L1-GP
DY DY

C C

-!<=**><)9!
1D05V_S0 -!<=*8>9>!
1D05V_S0
3D3V_S0 1D05V_VCCACLKPLL_S0 1D05V_VCCCLK_S0
L1104 L1103

1 2 1 2
IND-2D2UH-196-GP IND-2D2UH-196-GP

C1101 C1101 pin V8 C1111;C1115


1

C1119 C1111 C1115

1
C1119 pin K14 C1118;C1120 pin J18
SCD1U16V2KX-L-GP

SC22U6D3V5MX-L3-GP

SC4D7U6D3V3KX-L-GP

SC10U6D3V3MX-L-GP
1

1
C1118 C1120
pin A20

SC4D7U6D3V3KX-L-GP

SC10U6D3V3MX-L-GP
2

2
DY

2
DY
B B

1D05V_S0 1D05V_S0
1D05V_S0
Wistron Confidential document, Anyone can not
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!""## !"""+,!""-#$$ $%&'$."" C1122;C1123

1
1

C1144 C1134 C1141 C1110 C1122 C1123


Wistron Corporation
1

$%&'$()* !""#"$ $%&'$()/ pin AA21


SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC22U6D3V5MX-L3-GP

SC4D7U6D3V3KX-L-GP

SC10U6D3V3MX-L-GP
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

2
A A
2

DY Taipei Hsien 221, Taiwan, R.O.C.


2

DY Title

CPU (Power CAP2)


Size Document Number Rev
Custom
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 11 of 106
5 4 3 2 1
5 4 3 2 1

SSID = MEMORY

D DM2 SODIMM Memory Connectivity and Topology D


Note: ODT Signal Connectivity and Support
M_A_A0
5 M_A_A[15:0]
M_A_A1
98
A0 NP1
NP1 If SA0 DIM0 = 0, SA1_DIM0 = 0 For DDR3L SODIMM designs, Intel recommends ODT signals not to be routed between
97 NP2
M_A_A2 A1 NP2 SO-DIMMA SPD Address is 0xA0 CPU and DIMM on platform, leave ODT at CPU as no-connect (open), and tie DIMM
96
M_A_A3 A2 ODT to VDDQ through FET and resistor. The reason for this additional ODT-control
95 110
M_A_A4 92
A3 RAS#
113
M_A_RAS# 5 SO-DIMMA TS Address is 0x30 circuitry on the platform is to save power dissipation by turning off VDDQ to VTT path
M_A_A5 A4 WE# M_A_WE# 5
91 115 M_A_CAS# 5 during low power states, as ODT signal is terminated to VTT through RTT on SODIMM.
M_A_A6 A5 CAS#
90
M_A_A7 86
A6
114 If SA0 DIM0 = 1, SA1_DIM0 = 0 The ODT value for DDR3L SODIMM 1-DPC platform will be encoded in the write
A7 CS0# M_A_CS#0 5 command and use RTT_NOM = Off and RTT_WR = (60,120) Ohm.
M_A_A8 89
A8 CS1#
121 M_A_CS#1 5 SO-DIMMA SPD Address is 0xA2
M_A_A9 85 CPU ODT output would be NOCON
M_A_A10 107
A9
73 SO-DIMMA TS Address is 0x32 SODIMM ODT input should be tied to VDDQ through a FET and a resistor to
A10/AP CKE0 M_A_CKE0 5
M_A_A11 84 74
M_A_A12 A11 CKE1 M_A_CKE1 5 support low power states.
83
M_A_A13 A12
119 101 M_A_CLK0 5
M_A_A14 A13 CK0
80 103 M_A_CLK#0 5
M_A_A15 A14 CK0#
78
A15
5 M_A_BS2 79 102 M_A_CLK1 5
A16/BA2 CK1
104 M_A_CLK#1 5
CK1#
5 M_A_BS0 109
BA0
5 M_A_BS1 108 11
BA1 DM0
28
M_A_DQ0 DM1
5 M_A_DQ[15:0] 5 46
M_A_DQ1 DQ0 DM2
7 63
M_A_DQ2 DQ1 DM3
15 136
M_A_DQ3 DQ2 DM4
17 153
M_A_DQ4 DQ3 DM5
4 170
M_A_DQ5 DQ4 DM6
6 187
M_A_DQ6 DQ5 DM7
16
M_A_DQ7 DQ6
18 200 SMB_DATA 13,18
M_A_DQ8 DQ7 SDA
21 202 SMB_CLK 13,18
M_A_DQ9 DQ8 SCL
23
M_A_DQ10 DQ9 TS#_DIMM1_1 3D3V_S0
33 198
M_A_DQ11 DQ10 EVENT# TS#_DIMM1_1 13
35
M_A_DQ12 DQ11
22 199
M_A_DQ13 DQ12 VDDSPD
24
M_A_DQ14 DQ13 C1203
34 197
DQ14 SA0

1
M_A_DQ15

SCD1U16V2KX-L-GP
36 201
M_A_DQ16 DQ15 SA1
5 M_A_DQ[31:16] 39
M_A_DQ17 DQ16
41 77
DQ17 NC#1

2
C M_A_DQ18 51 122 DY C
M_A_DQ19 DQ18 NC#2 1D35V_S3
53 125
M_A_DQ20 DQ19 NC#/TEST
40
M_A_DQ21 DQ20
42 75
M_A_DQ22 DQ21 VDD1
50 76
M_A_DQ23 DQ22 VDD2
52 81
M_A_DQ24 DQ23 VDD3
57 82
M_A_DQ25 DQ24 VDD4 1D35V_S3
59 87
M_A_DQ26 DQ25 VDD5
67 88
M_A_DQ27 DQ26 VDD6
69 93
M_A_DQ28 DQ27 VDD7
56 94
M_A_DQ29 DQ28 VDD8
58 99 ET1201
M_A_DQ30 DQ29 VDD9

D
68 100
M_A_DQ31 DQ30 VDD10 DDR3_DRAMRST#
5 M_A_DQ[47:32] 70 105 2 1 Q1203
M_A_DQ32 DQ31 VDD11
M_A_DQ33
129
131
DQ32 VDD12
106
111 1D35V_S3 DMN5L06K-7-GP %+6*0$)()',0*%-)'*A$*77>9*,#%
M_A_DQ34 141
DQ33 VDD13
112 3D3V_S0 G 84.05067.031
M_A_DQ35 DQ34 VDD14 TVL-0402-01-AB1-1-GP R1208
143 117 M_A_DIM0_ODT0
M_A_DQ36 DQ35 VDD15 1 2
130 118 ET1202
M_A_DQ37 DQ36 VDD16 66D5R2F-GP
132 123

S
1
M_A_DQ38 DQ37 VDD17 DDR3_DRAMRST#
140 124 2 1
M_A_DQ39 DQ38 VDD18 R1212 R1209
142 M_A_DIM0_ODT1
M_A_DQ40 DQ39 220KR2J-L2-GP 1 2

G
147 2
M_A_DQ41 DQ40 VSS 66D5R2F-GP
149 3
M_A_DQ42 DQ41 VSS TVL-0402-01-AB1-1-GP
157 8

2
DQ42 VSS M_A_B_DIM_ODT
M_A_DQ43 159 9
M_A_DQ44 DQ43 VSS S D
146 13 4 DDR_PG_CTRL
M_A_DQ45 DQ44 VSS R1210
148 14
M_A_DQ46 DQ45 VSS 1 2 M_B_DIM0_ODT0 13
M_A_DQ47
158
160
DQ46 VSS
19
20
5&:,-'*&,'$= Q1202 66D5R2F-GP
5 M_A_DQ[63:48] DQ47 VSS
M_A_DQ48
M_A_DQ49
163
DQ48 VSS
25 1D35V_S3
?4&"$*'#$)$*$&9)*.$&0 DMN5L06K-7-GP
165
DQ49 VSS
26 84.05067.031 DDR_PG_OUT 49
R1211
M_A_DQ50 175
DQ50 VSS
31 !%(+.--!> 1 2 M_B_DIM0_ODT1 13
M_A_DQ51
M_A_DQ52
177
DQ51 VSS
32
@><*<*@><*8 ):>*9*7;>*8> 66D5R2F-GP
164
DQ52 VSS
37
!%+.--*!*+ $%4?5.&0
M_A_DQ53
M_A_DQ54
166
DQ53 VSS
38 +'# >+
174 43
M_A_DQ55 DQ54 VSS
176 44
M_A_DQ56 DQ55 VSS
181 48
DQ56 VSS
1

1
M_A_DQ57 183 49 C1206 C1207 C1208 C1209 C1210
M_A_DQ58 DQ57 VSS
SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
191 54
B M_A_DQ59 DQ58 VSS B
193 55
DQ59 VSS
2

2
M_A_DQ60 180 60 DY DY
M_A_DQ61 DQ60 VSS
182 61 1D35V_S3
M_A_DQ62 DQ61 VSS
192 65
M_A_DQ63 DQ62 VSS
194 66
DQ63 VSS
71

1
M_A_DQS_DN0 VSS
5 M_A_DQS_DN[7:0] 10 72
M_A_DQS_DN1 DQS0# VSS R1203
27 127
M_A_DQS_DN2 DQS1# VSS 1K8R2F-GP
45 128
M_A_DQS_DN3 DQS2# VSS
62 133
M_A_DQS_DN4 DQS3# VSS
135 134

2
M_A_DQS_DN5 DQS4# VSS
152 138 R1205
M_A_DQS_DN6 DQS5# VSS
169 139 VREF_DQ0
M_A_DQS_DN7 DQS6# VSS 5 M_VREF_DQ_DIM0 1 2
186 144
DQS7# VSS 2R2J-2-GP
145
1

VSS C1223 C1222 C1221 C1220


M_A_DQS_DP0 12 150
SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

5 M_A_DQS_DP[7:0] DQS0 VSS


M_A_DQS_DP1 29 151
M_A_DQS_DP2 DQS1 VSS C1202
47 155
2

1
M_A_DQS_DP3 DQS2 VSS

SCD022U16V2KX-3GP
64 156

1
M_A_DQS_DP4 DQS3 VSS
137 161 R1202
M_A_DQS_DP5 DQS4 VSS
154 162

2
DQS5 VSS 1K8R2F-GP
M_A_DQS_DP6 171 167
DQS6 VSS

2VREF_DIMM0
M_A_DQS_DP7 188 168
DQS7 VSS
172

2
M_A_DIM0_ODT0 VSS
116 173
$4,)$*#!->*$!*?*+@*9(. M_A_DIM0_ODT1 120
ODT0 VSS
178
ODT1 VSS
179
VREF_CA VREF_DQ0 VREF_CA VSS
126 184
5,13 VREF_CA VREF_DQ0 VREF_CA VSS
1 185
VREF_DQ VSS R1206
C1218 189
VSS
1

C1217 30 190 24D9R2F-L-GP


SCD1U16V2KX-L-GP

4,13 DDR3_DRAMRST# RESET# VSS


?4&"$*'#$)$*"&9)
SCD1U16V2KX-L-GP

195
VSS 0D675V_VREF_S0
196

1
VSS "4,)$*',*+66>*&.;*+66<>
2

0D675V_VREF_S0 203 205


VTT1 VSS
204 206
VTT2 VSS
SKT_DDR 204P SMD 5,0*..'$4*#$",%%$.;*$4,)$*',*+.--
DDR3-204P-263-GP-U
62.10024.S61
1

C1214 C1215 C1219 C1216


SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

A
2ND = 62.10024.M51 A
2

3RD = 62.10024.Q71 DY DY
4TH = 62.10017.I21 Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
Brook_BH application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3-SODIMM1
Size Document Number Rev
A2 Brook_BH -1M
Date: Wednesday, February 04, 2015 Sheet 12 of 106
5 4 3 2 1
5 4 3 2 1

SSID = MEMORY
DM1

M_B_A0 98 NP1
5 M_B_A[15:0] A0 NP1
M_B_A1 97 NP2
M_B_A2 A1 NP2
96
M_B_A3 A2
95 110 M_B_RAS# 5
M_B_A4 A3 RAS#
92 A4 WE# 113 M_B_WE# 5
M_B_A5 91 115
A5 CAS# M_B_CAS# 5
M_B_A6 90
M_B_A7 A6
86 114 M_B_CS#0 5
M_B_A8 A7 CS0#
89 121 M_B_CS#1 5
M_B_A9 A8 CS1#
D 85 A9 D
M_B_A10 107 73 Note:
A10/AP CKE0 M_B_CKE0 5
M_B_A11 84 74
M_B_A12 83
A11 CKE1 M_B_CKE1 5 SO-DIMMB SPD Address is 0xA4
M_B_A13 A12
M_B_A14
119 A13 CK0 101 M_B_CLK0 5 SO-DIMMB TS Address is 0x34
80 A14 CK0# 103 M_B_CLK#0 5
M_B_A15 78 A15
5 M_B_BS2 79 A16/BA2 CK1 102 M_B_CLK1 5
CK1# 104 M_B_CLK#1 5 SO-DIMMB is placed farther from
109
5
5
M_B_BS0
M_B_BS1 108
BA0
11 the Processor than SO-DIMMA
BA1 DM0
28
M_B_DQ23 DM1
5 M_B_DQ[15:0] 5 46
M_B_DQ17 DQ0 DM2
7 63
M_B_DQ20 DQ1 DM3
15 136
M_B_DQ19 DQ2 DM4
17 DQ3 DM5 153
M_B_DQ22 4 170
M_B_DQ16 DQ4 DM6
6 DQ5 DM7 187
M_B_DQ21 16
M_B_DQ18 DQ6
18 DQ7 SDA 200 SMB_DATA 12,18
M_B_DQ5 21 202
DQ8 SCL SMB_CLK 12,18
M_B_DQ4 23
M_B_DQ7 DQ9 TS#_DIMM1_1 3D3V_S0
33 198
M_B_DQ6 DQ10 EVENT#
35
M_B_DQ3 DQ11
22 199
M_B_DQ2 DQ12 VDDSPD
24
DQ13
M_B_DQ0 34
DQ14 SA0
197
Thermal EVENT

1
M_B_DQ1 36 201 SA1_DIM1 C1303
M_B_DQ9 DQ15 SA1 3D3V_S0

SCD1U16V2KX-L-GP
5 M_B_DQ[31:16] 39 DQ16
M_B_DQ14 41 77 RN1314
DQ17 NC#1

2
M_B_DQ11 51 122 SA1_DIM1 1 4
M_B_DQ13 DQ18 NC#2 1D35V_S3 12 TS#_DIMM1_1 TS#_DIMM1_1
53 DQ19 NC#/TEST 125 DY 2 3
M_B_DQ12 40
M_B_DQ8 DQ20
42 75
M_B_DQ15 DQ21 VDD1 SRN10KJ-L-GP
50 76
M_B_DQ10 DQ22 VDD2
52 81
M_B_DQ24 DQ23 VDD3
57 82
M_B_DQ25 DQ24 VDD4
C 59 87 C
M_B_DQ26 DQ25 VDD5
67 88
M_B_DQ27 DQ26 VDD6
69 93
M_B_DQ31 DQ27 VDD7
56 DQ28 VDD8 94
M_B_DQ29 58 99
M_B_DQ30 DQ29 VDD9
68 DQ30 VDD10 100
M_B_DQ28 70 105
M_B_DQ34 DQ31 VDD11
5 M_B_DQ[47:32] 129 DQ32 VDD12 106
M_B_DQ35 131 111
M_B_DQ36 DQ33 VDD13
141 112
M_B_DQ38 DQ34 VDD14
143 117
M_B_DQ32 DQ35 VDD15
130 DQ36 VDD16 118
M_B_DQ33 132 123
M_B_DQ37 DQ37 VDD17
140 124
M_B_DQ39 DQ38 VDD18
142
M_B_DQ40 DQ39
147 2
M_B_DQ41 DQ40 VSS
149 3
M_B_DQ42 DQ41 VSS
M_B_DQ43
157
DQ42 VSS
8 Layout Note:
159 9
M_B_DQ44 146
DQ43 VSS
13 Place these Caps near 1D35V_S3
M_B_DQ45 DQ44 VSS
M_B_DQ46
148
DQ45 VSS
14 SO-DIMMB.
158 19
DQ46 VSS 1D35V_S3

1
M_B_DQ47 160 20
5 M_B_DQ[63:48]
M_B_DQ48 163
DQ47 VSS
25 SODIMM B DECOUPLING R1304
M_B_DQ49 DQ48 VSS
165 DQ49 VSS 26 1K8R2F-GP
M_B_DQ50 175 31
M_B_DQ51 DQ50 VSS
177 32
DQ51 VSS

2
M_B_DQ52 164 37 DY DY DY
DQ52 VSS

1
M_B_DQ53 166 38 C1305 C1306 C1308 C1309 C1310 R1306
DQ53 VSS C1307
M_B_DQ54 VREF_DQ1

SC5D6P50V2CN-1GP

SC56P50V2JN-2GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
174 43 5 M_VREF_DQ_DIM1 1 2

SC10U6D3V3MX-L-GP
M_B_DQ55 DQ54 VSS
176 44 2R2J-2-GP
DQ55 VSS

2
M_B_DQ56 181 48
M_B_DQ57 DQ56 VSS
183 49
M_B_DQ58 DQ57 VSS
191 54 C1311
DQ58 VSS

1
M_B_DQ59 193 55

SCD022U16V2KX-3GP
DQ59 VSS

1
M_B_DQ60 180 60
M_B_DQ61 DQ60 VSS
182 DQ61 VSS 61 R1303

2VREF_DIMM1 2
B M_B_DQ62 192 65 1K8R2F-GP B
M_B_DQ63 DQ62 VSS
194 66
DQ63 VSS
71
VSS

2
M_B_DQS_DN2 10 72
5 M_B_DQS_DN[7:0] DQS0# VSS
M_B_DQS_DN0 27 127
M_B_DQS_DN1 DQS1# VSS
45 128
M_B_DQS_DN3 DQS2# VSS
62 133
DDR3_DRAMRST# M_B_DQS_DN4 DQS3# VSS
135 134
M_B_DQS_DN5 DQS4# VSS R1307
152 138
1

1
DQS5# VSS C1320 C1321 C1318 C1319
1

M_B_DQS_DN6 169 139 24D9R2F-L-GP


SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
EC1301 M_B_DQS_DN7 DQS6# VSS
186 144
AZ5325-01FDR7G-GP DQS7# VSS
145
2

2
VSS

1
M_B_DQS_DP2 12 150
5 M_B_DQS_DP[7:0] DQS0 VSS
DY M_B_DQS_DP0 29 151
M_B_DQS_DP1 DQS1 VSS
47 155
DQS2 VSS
2

M_B_DQS_DP3
M_B_DQS_DP4
64
137
DQS3 VSS
156
161
5,0*..'$4*#$",%%$.;*$4,)$*',*+.--
M_B_DQS_DP5 DQS4 VSS
154 162
Reserve for EMC M_B_DQS_DP6 171
DQS5 VSS
167
M_B_DQS_DP7 DQS6 VSS
188 168
DQS7 VSS
172
VSS
12 M_B_DIM0_ODT0 116 173
ODT0 VSS
12 M_B_DIM0_ODT1 120 178
ODT1 VSS
179
VREF_CA VSS
126 184
$4,)$*#!-8*$!*?*+@*9(. 5,12 VREF_CA VREF_DQ1 1
VREF_CA
VREF_DQ
VSS
VSS 185 ?4&"$*'#$)$*"&9)*"4,)$*',
189
VSS
4,12 DDR3_DRAMRST# 30
RESET# VSS
190 0D675V_VREF_S0
+66>*&.;*+66<>
195
VREF_CA VREF_DQ1 VSS
196
VSS
0D675V_VREF_S0 203 205
VTT1 VSS
C1304 204
VTT2 VSS
206 DY
1

C1302 DY
SCD1U16V2KX-L-GP

C1314 C1315 C1316 C1317


SCD1U16V2KX-L-GP

SKT_DDR 204P SMD


DDR3-204P-262-GP-U
SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
2

62.10024.S21
2

A 2ND = 62.10024.M31 A
3RD = 62.10024.Q61
Wistron Confidential document, Anyone can not
4TH = 62.10017.I31 Duplicate, Modify, Forward or any other purpose
Brook_BH application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3-SODIMM2
Size Document Number Rev
Custom Brook_BH -1M
Date: Wednesday, February 04, 2015 Sheet 13 of 106
5 4 3 2 1
5 4 3 2 1

3D3V_S0

D D
3D3V_S0

R1533 3D3V_S0
2 1 PEG_CLKREQ_CPU# 18,76
RN1504 8K2R2J-3-GP
SRN10KJ-6-GP

4
3
1 8 INT_PIRQC#

2
1
2 7 WLAN_CLKREQ_CPU# WLAN_CLKREQ_CPU# 18,61,89
RN1506
3 6 INT_PIRQB# SRN2K2J-5-GP RN1509
4 5 INT_PIRQD# SRN2K2J-5-GP
HSW_ULT_DDR3L
RN1505 20141014 Rober CPU1I 9 OF 19

1
2
SRN10KJ-L-GP

3
4
1 4 PSW_CLR#
2 3 LAN_DIS# LAN_DIS# 20

55 eDP_BLCTRL_CPU B8 EDP_BKLCTL DDPB_CTRLCLK B9 HDMI_CLK_CPU 57


24 eDP_BLEN_CPU A9 EDP_BKLEN DDPB_CTRLDATA C9 HDMI_DATA_CPU 57
C6 eDP SIDEBAND D9 DP_CLK_CPU
55 eDP_VDDEN_CPU EDP_VDDEN DDPC_CTRLCLK
C D11 DP_CLK_DATA C
DDPC_CTRLDATA

INT_PIRQA# U6
11/19 pull high DDPCCTRLCLK & DATA
20 INT_PIRQA# PIRQA#/GPIO77
INT_PIRQB# P4 C5
INT_PIRQC# PIRQB#/GPIO78 DDPB_AUXN
N4 PIRQC#/GPIO79 DDPC_AUXN B6 PCH_DPC_AUXN 56
INT_PIRQD# N2 DISPLAY B5
PIRQD#/GPIO80 DDPB_AUXP
AD4 PME# DDPC_AUXP A6 PCH_DPC_AUXP 56
PCIE

20,65 TP_IN# U7 GPIO55


76,79 DGPU_HOLD_RST# L1 GPIO52
PSW_CLR# L3 C8
GPIO54 DDPB_HPD HDMI_DET_CPU 57
24,85,86 DGPU_PWROK R5 GPIO51 DDPC_HPD A8 CRT_PCH_HPD 56
86,87 DGPU_PWR_EN# L4 GPIO53 EDP_HPD D6 eDP_HPD_CPU 55

HASWELL-6-GP-U
B B

eDP_BLEN_CPU PSW_CLR#
2

Pass Word Clear


R1501 G1501
100KR2J-4-GP GAP-OPEN
1

RN1503 Wistron Confidential document, Anyone can not


SRN10KJ-L-GP Duplicate, Modify, Forward or any other purpose
DGPU_PWR_EN# 1 4 <Core Design> application without get Wistron permission
DGPU_HOLD_RST# 2 3

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU(EDP SIDEBAND/GPIO/DDI)
Size Document Number Rev
A4
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 15 of 106
5 4 3 2 1
5 4 3 2 1

4!/*6&A4$
Pair Device
CPU1K HSW_ULT_DDR3L 11 OF 19 0 4!/8>**?,0'*
1 4!/8>**?,0'>
76 PEG_RX_CPU_N0 F10 AN8 USB_CPU_PN0 36
0?4*? 0*/4! 76 PEG_RX_CPU_P0 E10
PERN5_L0
PERP5_L0
USB2N0
USB2P0 AM8 USB_CPU_PP0 36 4!/*9,0'* 2 4!/8>**?,0'<
D PX D
76 PEG_TX_CON_N0
C1605 1 2 SCD1U16V2KX-L-GP PEG_TX_CPU_N0 C23 AR7 USB_CPU_PN1 35 3 4!/8>**?,0'8
76 PEG_TX_CON_P0
C1606 1 2 SCD1U16V2KX-L-GP PEG_TX_CPU_P0 C22
PETN5_L0
PETP5_L0
USB2N1
USB2P1 AT7 USB_CPU_PP1 35 4!/*9,0'>
PX 4 /6
76 PEG_RX_CPU_N1 F8 AR8 USB_CPU_PN2 66
76 PEG_RX_CPU_P1 E8
PERN5_L1
PERP5_L1
USB2N2
USB2P2 AP8 USB_CPU_PP2 66 4!/*9,0'< 5 6%4$3*!$# &
PX
76 PEG_TX_CON_N1
C1607 1 2 SCD1U16V2KX-L-GP PEG_TX_CPU_N1 B23 PETN5_L1 USB2N3 AR10 USB_CPU_PN3 66 6 $$+
C1608 2 SCD1U16V2KX-L-GP PEG_TX_CPU_P1
76 PEG_TX_CON_P1
PX
1 A23 PETP5_L1 USB2P3 AT10 USB_CPU_PP3 66 4!/*9,0'8 7 $&0;*#$&;$0
76 PEG_RX_CPU_N2
76 PEG_RX_CPU_P2
H10
G10
PERN5_L2 USB2N4 AM15
AL15
USB_CPU_PN4 61,89
USB_CPU_PP4 61,89
/6
PERP5_L2 USB2P4
PX
C1613 2 SCD1U16V2KX-L-GP PEG_TX_CPU_N2
76 PEG_TX_CON_N2
76 PEG_TX_CON_P2
C1614
1
1 2 SCD1U16V2KX-L-GP PEG_TX_CPU_P2
B21
C21
PETN5_L2 USB2N5 AM13
AN13
USB_CPU_PN5 55
USB_CPU_PP5 55
6%4$3*!$# &
PETP5_L2 USB2P5
PX
76 PEG_RX_CPU_N3 E6 AP11 USB_CPU_PN6 55
76 PEG_RX_CPU_P3 F6
PERN5_L3
PERP5_L3
USB2N6
USB2P6 AN11 USB_CPU_PP6 55 $$+
PX
C1615 2 SCD1U16V2KX-L-GP PEG_TX_CPU_N3
76 PEG_TX_CON_N3
76 PEG_TX_CON_P3
C1616
1
1 2 SCD1U16V2KX-L-GP PEG_TX_CPU_P3
B22
A21
PETN5_L3 USB2N7 AR13
AP13
USB_CPU_PN7 33
USB_CPU_PP7 33
$&0;*#$&;$0
PETP5_L3 USB2P7
PX
5!&* 31 PCIE_RX_CPU_N3 G11 PERN3
31 PCIE_RX_CPU_P3 F11 PERP3 USB3RN1 G20
H20
USB30_RX_CPU_N1 35,89
USB30_RX_CPU_P1 35,89
4!/*8>**9,0'*
C1621 USB3RP1
31 PCIE_TX_LAN_N3 1 2 SCD1U16V2KX-L-GP PCIE_TX_CPU_N3 C29 PETN3
C1622 1 2 SCD1U16V2KX-L-GP PCIE_TX_CPU_P3 B30 PCIE USB C33
31 PCIE_TX_LAN_P3 PETP3 USB3TN1 USB30_TX_CPU_N1 35
USB3TP1 B34 USB30_TX_CPU_P1 35
C5!& 61,89 PCIE_RX_CPU_N4 F13 PERN4
4!/*8>**9,0'>
C G13 E18 C
61,89 PCIE_RX_CPU_P4 PERP4 USB3RN2 USB30_RX_CPU_N2 35,89
USB3RP2 F18 USB30_RX_CPU_P2 35,89
C1619 1 2 SCD1U16V2KX-L-GP PCIE_TX_CPU_N4 B29
61,89 PCIE_TX_W LAN_N4 PETN4
C1620 1 2 SCD1U16V2KX-L-GP PCIE_TX_CPU_P4 A29 B33
61,89 PCIE_TX_W LAN_P4 PETP4 USB3TN2 USB30_TX_CPU_N2 35
USB3TP2 A33 USB30_TX_CPU_P2 35
38 USB30_RX_CPU_N3 G17 PERN1/USB3RN3
B,0*/0,&;6$44*8+*$&%$0& 38 USB30_RX_CPU_P3 F17 PERP1/USB3RP3

38 USB30_TX_CPU_N3 C30
C31
PETN1/USB3TN3
AJ10 USB_RBIAS
R1611
1 22D6R2F-L1-GP
2
Layout Note:
38 USB30_TX_CPU_P3 PETP1/USB3TP3 USBRBIAS# 1. USB_COMP using 50 ohm single-ended impedance
USBRBIAS AJ11
37 PCIE_RX_CPU_N2 F15 PERN2/USB3RN4 RSVD#AN10 AN10 2. Isolation Spacing :15mil
37 PCIE_RX_CPU_P2 G15 PERP2/USB3RP4 RSVD#AM10 AM10 3. Total trace length<500mil
C1623 1 2 SCD1U16V2KX-L-GP PCIE_TX_CPU_N2 B31
37 PCIE_TX_USB_N2 PETN2/USB3TN4
C1624 1 2 SCD1U16V2KX-L-GP PCIE_TX_CPU_P2 A31
37 PCIE_TX_USB_P2 PETP2/USB3TP4
HW_3D OC0/GPIO40# AL3
AT1 USB_OC#
3D3V_SUS

1D05V_VCCUSB3PLL_S0 OC1/GPIO41#
B,0*3&)6$44*8+*$&%$0& HW_3D E15
OC2/GPIO42# AH2
AV3
R1602
1 10KR2J-L-GP
2
R1601 RSVD#E15 OC3/GPIO43#
E13 RSVD#E13
1 3K01R2F-3-GP
2 PCIE_COMP A27 PCIE_RCOMP
B27 PCIE_IREF

Layout Note: HASW ELL-6-GP-U


B B
1. PCIE_RCOMP/ PCIE_IREF trace width=12~15mil
2. Isolation Spacing: 12mil
3. Total trace length<500mil

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
Brook_BH application without get Wistron permission
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (PCI/USB)
Size Document Number Rev
A3
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 16 of 106

5 4 3 2 1
5 4 3 2 1

DSWODVREN - On Die DSW VR Enable

D R1728 HIGH Enabled (DEFAULT) D


1 10KR2J-L-GP
2 PM_SUS_STAT#
LOW Disabled

3D3V_SUS

3D3V_RTC_AUX

1R1717 2
330KR2J-L-GP

DSW ODVREN

3D3V_S0
RN1712
1 8 MSATA_PEDET2
MSATA_PEDET2 19
2 7 SYS_RESET#
3 6 MSATA_PEDET1
MSATA_PEDET1 19
4 5

SRN10KJ-6-GP

20141216 -1
CPU1H HSW_ULT_DDR3L 8 OF 19

SYSTEM POWER MANAGEMENT

PM_SUSACK# AK2 AW7 DSW ODVREN


24 PM_SUSACK# SUSACK# DSWVRMEN
C SYS_RESET# AC3 AV5 PCH_DPW ROK 1 R1739 2 PM_RSMRST# C
SYS_RESET# DPWROK
24 SYS_PW ROK 1 R1724 2 0R0402-PAD-1-GP SYS_PW ROK_R AG2 SYS_PWROK WAKE# AJ5 0R0402-PAD-1-GP
PCH_PCIE_W AKE# 24,31,61,63
40 PCH_PW ROK AY7 PCH_PWROK
AB5 APWROK
24,31,37,40,61,63,68,89,91 PLTRST#_PCH AG7 PLTRST# CLKRUN#/GPIO32 V5 PM_CLKRUN#_EC 24,91
SUS_STAT#/GPIO61 AG4 PM_SUS_STAT# 91
AE6 SUS_CLK_CPU
SUSCLK/GPIO62 SUS_CLK_CPU 61,63
PCH_PW ROK R1727 AP5
SLP_S5#/GPIO63
1 10KR2J-L-GP
2 PM_RSMRST# AW6 RSMRST#
1

PM_SUSW ARN# AV4


24 PM_SUSW ARN# SUSWARN#/SUSPWRDNACK#/GPIO30
EC1701 AL7 AJ6
20,24,89 PM_PW RBTN# PWRBTN# SLP_S4# PM_SLP_S4# 24,49
AZ5325-01FDR7G-GP AJ8 AT4
24 AC_PRESENT ACPRESENT/GPIO31 SLP_S3# PM_SLP_S3# 24,40,48,51
BATLOW # AN4 AL5
20 BATLOW # BATLOW#/GPIO72 SLP_A#
AF3 AP4 PM_SLP_SUS#
SLP_S0# SLP_SUS# PM_SLP_SUS# 24,39
DY AM5 SLP_WLAN#/GPIO29 SLP_LAN# AJ7
2

PLTRST#_PCH
DY HASW ELL-6-GP-U DY_DS3
1

R1738 R1737
EC1702 PM_SUSW ARN# 1 0R2J-L-GP
2 PM_SUSACK# PCH_DPW ROK 1 2 KBC_DPW ROK 24
AZ5325-01FDR7G-GP
0R2J-L-GP

2
DY_DS3
DY R1732
2

3D3V_AUX_S5
10KR2J-L-GP
B
Non_DS3 B
R1709

1
1 100KR2J-4-GP
2
2

Cloes to CPU R1716 R1702 3D3V_SUS


10KR2J-L-GP R1712 1KR2J-L2-GP
Q1701 1KR2J-L2-GP PM_SUSW ARN# 2 1
3D3V_S5 4 3 PM_RSMRST# 2 1 RSMRST#_KBC 24
1

RN1701 3D3V_S0
SRN10KJ-6-GP 3V_5V_POK_# 5 2 3V_5V_POK_C 1 R1740 2 R1719
3V_5V_POK 45
1 8 0R0402-PAD-1-GP PM_CLKRUN#_EC 1 10KR2J-L-GP
2
MCP_GPIO12 20 24,91 PM_CLKRUN#_EC
2 7 AC_PRESENT 6 1
3 6 RTC_DET# RTC_DET# 20,25
4 5PCH_PCIE_W AKE# 2N7002KDW -GP DY_DS3
PCH_PCIE_W AKE# 24,31,61,63 R1721
84.2N702.A3F 1 0R2J-L-GP
2 PM_SLP_SUS#
2nd = 75.00601.07C
3rd = 84.2N702.F3F

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
A Brook_BH application without get Wistron permission A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (DMI/FDI/PM)
Size Document Number Rev
A3
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 17 of 106
5 4 3 2 1
5 4 3 2 1

3D3V_S0 "4,)$*',*?$3
RN1808
1 8 LAN_CLKREQ_CPU#
2 7 H_RCIN# H_RCIN# 20,24
3 6 CK_REQ
4 5 USB_CLKREQ_CPU#

SRN10KJ-6-GP
RN1806
1 8 SATA_ODD_DA#
SATA_ODD_DA# 20,60
2 7 MSATA_CLKREQ_CPU#
HSW_ULT_DDR3L
D 3 6 SATA_ODD_PRSNT# CPU1F 6 OF 19 D
SATA_ODD_PRSNT# 19,60
4 5
20141216 -1
SRN10KJ-6-GP

37 USB_CLK_CPU C43 A25 CPU_XTAL_24M_IN


CLKOUT_PCIE_N0 XTAL24_IN CPU_XTAL_24M_OUT
37 USB_CLK_CPU# C42 CLKOUT_PCIE_P0 XTAL24_OUT B25
37 USB_CLKREQ_CPU# U2 PCIECLKRQ0#/GPIO18 1D05V_VCCACLKPLL_S0
RSVD#K21 K21 &$$;*8$0:*"4,)$*',*?$3
B41 CLKOUT_PCIE_N1 RSVD#M21 M21 R1801
A41 C26 DIFFCLK_BIAS 1 2 RN1810
CK_REQ CLKOUT_PCIE_P1 DIFFCLK_BIASREF CLK_BUF_CKSSCD_N
Y5 PCIECLKRQ1#/GPIO19 3K01R2F-3-GP 2 3
C35 CLK_BUF_CKSSCD_N CLK_BUF_CKSSCD_P 1 4
CLOCK TESTLOW_C35 CLK_BUF_CKSSCD_P
5!& 31 LAN_CLK_CPU#
31 LAN_CLK_CPU
C41
B42
CLKOUT_PCIE_N2 TESTLOW_C34 C34
AK8 CLK_BUF_DOT96_P 2
R1804
1 LPC_CLK_DBG 68
SRN10KJ-L-GP
CLKOUT_PCIE_P2 SIGNALS TESTLOW_AK8 CLK_BUF_DOT96_N 22R2J-2-GP
31 LAN_CLKREQ_CPU# AD1 PCIECLKRQ2#/GPIO20 TESTLOW_AL8 AL8 RN1811
R1803 CLK_BUF_DOT96_P 2 3
LPC_CLK_CPU_P0
C5!& 61,89 W LAN_CLK_CPU#
61,89 W LAN_CLK_CPU
B38
C37
CLKOUT_PCIE_N3 CLKOUT_LPC_0 AN15
AP15 LPC_CLK_CPU_P1 2 1
2 1
22R2J-2-GP
LPC_CLK_KBC 24
LPC_CLK_TPM 91
CLK_BUF_DOT96_N 1 4
CLKOUT_PCIE_P3 CLKOUT_LPC_1
15,61,89 W LAN_CLKREQ_CPU# N1 PCIECLKRQ3#/GPIO21 R1802 22R2J-2-GP SRN10KJ-L-GP
CLKOUT_ITPXDP# B35
0?4*? 0*/4! 76 PEG_CLK_CPU#
76 PEG_CLK_CPU
A39
B39
CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P A35
CLKOUT_PCIE_P4 C1808
15,76 PEG_CLKREQ_CPU# U5 PCIECLKRQ4#/GPIO22 SC15P50V2JN-L-GP
&055 63 MSATA_CLK_CPU# B37 CLKOUT_PCIE_N5
CPU_XTAL_24M_IN 2 1
63 MSATA_CLK_CPU A37 CLKOUT_PCIE_P5
T2 X1801
63 MSATA_CLKREQ_CPU# PCIECLKRQ5#/GPIO23

2
C 1 4 C

HASW ELL-6-GP-U R1807


1MR2J-L3-GP
2 3

1
XTAL-24MHZ-81-GP C1807
82.30004.841 SC15P50V2JN-L-GP
CPU_XTAL_24M_OUT 2 1

HSW_ULT_DDR3L
CPU1G 7 OF 19 3D3V_SUS

AU14 AN2 MCP_GPIO11


24,68,91 LPC_AD_CPU_P0 LAD0 SMBALERT#/GPIO11 RN1803
AW12 AP2 SMB_CLK_CPU
24,68,91 LPC_AD_CPU_P1 LAD1 SMBCLK SMB_CLK_CPU 4 1
AY12 LPC AH1 SMB_DATA_CPU
24,68,91 LPC_AD_CPU_P2 LAD2 SMBDATA SMB_DATA_CPU 3 2
AW11 SMBUS AL2 MCP_GPIO60
24,68,91 LPC_AD_CPU_P3 LAD3 SML0ALERT#/GPIO60
24,68,91 LPC_FRAME#_CPU AV12 LFRAME# SML0CLK AN1 SML0_CLK_CPU 69 SRN2K2J-5-GP
SML0DATA AK1 SML0_DATA_CPU 69
AU4 MCP_GPIO73
SML1ALERT#/PCHHOT#/GPIO73 MCP_GPIO73 20 RN1805
SML1CLK/GPIO75 AU3 SML1_CLK 24,79 SML1_DATA 4 1
SML1DATA/GPIO74 AH3 SML1_DATA 24,79 SML0_DATA_CPU 3 2
24,25 SPI_CLK_CPU AA3 SPI_CLK
B 24,25 SPI_CS_CPU_N0 Y7
Y4
SPI_CS0# CL_CLK AF2
AD2
$*1*6#$0%&1*+0! SRN2K2J-5-GP B
SPI_CS1# CL_DATA
AC2 SPI_CS2#
SPI C-LINK
CL_RST# AF4
AA2 RN1809
24,25 SPI_SI_CPU SPI_MOSI
AA4 MCP_GPIO8 4 1
24,25 SPI_SO_CPU SPI_MISO 20 MCP_GPIO8
Y6 SML1_CLK 3 2
25 SPI_W P_CPU SPI_IO2
25 SPI_HOLD_CPU AF1 SPI_IO3 SRN2K2J-5-GP

3D3V_S0
HASW ELL-6-GP-U 3D3V_SUS
RN1807
1 4 RN1804
2 3 MCP_GPIO60 8 1
SML0_CLK_CPU 7 2
SRN2K2J-5-GP MCP_GPIO11 6 3
MCP_GPIO13 5 4
20 MCP_GPIO13
Q1801 SRN10KJ-6-GP
SMB_DATA_CPU 6 1 SMB_DATA 12,13
5 2

4 3

2N7002KDW -GP Wistron Confidential document, Anyone can not


84.2N702.A3F Duplicate, Modify, Forward or any other purpose
A 2nd = 75.00601.07C Brook_BH application without get Wistron permission A
3rd = 84.2N702.F3F
SMB_CLK 12,13
SMB_CLK_CPU Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (PCI-E/SMBUS/CLOCK/CL)
Size Document Number Rev
A3
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 18 of 106
5 4 3 2 1
5 4 3 2 1

3D3V_RTC_AUX
INTVRMEN- Integrated SUS
R1928 1.05V VRM Enable
D D
1 2 High - Enable internal VRs
20KR2F-L3-GP Low - Enable external VRs

1
1
R1927 EC1902
1 2 C1903 CPU1E HSW_ULT_DDR3L 5 OF 19

AZ5325-01FDR7G-GP
20KR2F-L3-GP 3D3V_RTC_AUX

2
DY
SC1U6D3V3KX-L1-GP
CPU_XTAL_32K_X1 AW5 RTCX1

2
CPU_XTAL_32K_X2 AY5
SM_INTRUDER# RTCX2
2 R1904 1 1M1R2J-GP
1 R1905 2 330KR2F-L-GP PCH_INTVRMEN
AU6
AV7
INTRUDER#
INTVRMEN
SATA_RN0/PERN6_L3
SATA_RP0/PERP6_L3
J5
H5
SATA_RX_CPU_N0
SATA_RX_CPU_P0
60
60
!!6!*3++
SRTC_RST# AV6 RTC B15
SRTCRST# SATA_TN0/PETN6_L3 SATA_TX_CPU_N0 60
RTC_RST# AU7 A15
RTCRST# SATA_TP0/PETP6_L3 SATA_TX_CPU_P0 60
#6$*#$)$'* J8
2

SATA_RX_CPU_N1 60
!!6!*%++
SATA_RN1/PERN6_L2
1

G1901 H8
SATA_RP1/PERP6_L2 SATA_RX_CPU_P1 60
EC1901 C1904 GAP-OPEN A17
SATA_TN1/PETN6_L2 SATA_TX_CPU_N1 60
AZ5325-01FDR7G-GP B17
SATA_TP1/PETP6_L2 SATA_TX_CPU_P1 60
2
SC1U6D3V3KX-L1-GP

DY HDA_BITCLK_CPU AW8 J6
1

HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1 PCIE_RX_CPU_N6 63


HDA_SYNC_CPU AV11 H6
HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1 PCIE_RX_CPU_P6 63
2

HDA_RST#_CPU AU8 B14


HDA_RST#/I2S_MCLK# SATA_TN2/PETN6_L1 PCIE_TX_CPU_N6 63
Cloes to CPU 27 HDA_SDIN0_CPU AY10
AU12
HDA_SDI0/I2S0_RXD
AUDIO SATA
SATA_TP2/PETP6_L1 C15 PCIE_TX_CPU_P6 63
R1908 HDA_SDI1/I2S1_RXD
2 1 1KR2J-L2-GP HDA_SDOUT_CPU AU11 F5
24 ME_UNLOCK HDA_SDO/I2S0_TXD SATA_RN3/PERN6_L0 SATA_RX_CPU_N3 63
AW10 HDA_DOCK_EN#/I2S1_TXD# SATA_RP3/PERP6_L0 E5 SATA_RX_CPU_P3 63
AV10
AY8
HDA_DOCK_RST#/I2S1_SFRM#
I2S1_SCLK
SATA_TN3/PETN6_L0
SATA_TP3/PETP6_L0
C17
D17
SATA_TX_CPU_N3
SATA_TX_CPU_P3
63
63
&055*!!+

C V1 MCP_GPIO34 C
SATA0GP/GPIO34
SATA1GP/GPIO35 U1 SATA_ODD_PRSNT# 18,60 1D05V_VCCSATA3PLL_S0
V6 MSATA_PEDET1
SATA2GP/GPIO36 MSATA_PEDET1 17
AC1 MSATA_PEDET2
SATA3GP/GPIO37 MSATA_PEDET2 17
AU62 PCH_TRST#
AE62 PCH_TCK SATA_IREF A12
3D3V_S0 AD61 PCH_TDI RSVD#L11 L11
R1932 AE61 PCH_TDO RSVD#K10 K10 R1926
AD62 JTAG C12 SATA_RCOMP 1 2
2 1 MCP_GPIO34 PCH_TMS SATA_RCOMP
AL11 RSVD#AL11 SATALED# U3 3K01R2F-3-GP
10KR2J-L-GP AC4 RSVD#AC4
R1929 AE63 JTAGX
2 1 INT_SERIRQ 20,24,91 AV2 RSVD#AV2
10KR2J-L-GP

HASW ELL-6-GP-U

M.2 auto detection


RN1901
1 4 HDA_SDOUT_CPU
27 HDA_SDOUT_CODEC
2 3 HDA_SYNC_CPU Q1902
27 HDA_SYNC_CODEC
CPU_XTAL_32K_X1 4 3 MSATA_PEDET1
SRN33J-5-GP-U
R1901 63 MSATA_PEDET 5 2 MSATA_PEDET 63
1 2 CPU_XTAL_32K_X2
MSATA_PEDET2 6 1
10MR2J-L-GP
B RN1903 2N7002KDW -GP B
1 4 HDA_RST#_CPU 84.2N702.A3F
27 HDA_RST#_CODEC
2 3 HDA_BITCLK_CPU RTC_RST# 2nd = 75.00601.07C
27 HDA_BITCLK_CODEC
X1901
SRN33J-5-GP-U Baseline
1 4

D
1

Q1903
C1901 C1902
2 3 2N7002K-2-GP
SC5P50V2CN-2GP

SC5P50V2CN-2GP

84.2N702.J31
2

XTAL-32D768KHZ-64-GP 5,0*!5# 2ND = 84.2N702.031


82.30001.661 3rd = 84.2N702.W31
2nd = 82.30001.B21
G

24 RTCRST_ON
RTC_RST#_R
1
1

R1918 R1921
100KR2J-4-GP 2K2R2J-L1-GP
2
2

Wistron Confidential document, Anyone can not


A Duplicate, Modify, Forward or any other purpose A
Brook_BH application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (RTC/LPC/SATA/HDA)
Size Document Number Rev
Custom
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 19 of 106
5 4 3 2 1
5 4 3 2 1

3D3V_SUS

RN2004
1 4 MCP_GPIO73
MCP_GPIO73 18
D 2 3 MCP_GPIO45 D

SRN10KJ-L-GP
RN2005
1 8 EC_SMI#
2 7 EC_SCI#
THERMTRIP#_PCH
3 6 MCP_GPIO14
4 5 MCP_GPIO26

1
SRN10KJ-6-GP
EC2001
DY AZ5325-01FDR7G-GP
R2058
1 2 MCP_GPIO24 HSW_ULT_DDR3L
CPU1J 10 OF 19
DY
10KR2J-L-GP

2
DY
R2001
2 1 MCP_GPIO15
10KR2J-L-GP MCP_GPIO76 P1 D60 THERMTRIP#_PCH 1 R2039 2
BMBUSY#/GPIO76 THRMTRIP# H_THERMTRIP# 40
AU2 V4 0R0402-PAD-1-GP
3D3V_S5 18 MCP_GPIO8 GPIO8 RCIN#/GPIO82 H_RCIN# 18,24
17 MCP_GPIO12 AM7 LAN_PHY_PWR_CTRL/GPIO12 SERIRQ T4 INT_SERIRQ 19,24,91
RN2010 MCP_GPIO15 AD6 CPU/ AW15 OPI_COMP2 R2011
GPIO15 PCH_OPI_RCOMP OPI_COMP2 1 2
SRN10KJ-6-GP AMIC_DMIC# Y1 MISC AF20
GPIO16 RSVD#AF20
1 8 PM_PW RBTN# PM_PW RBTN# 17,24,89
18,60 SATA_ODD_DA# T3 GPIO17 RSVD#AB21 AB21 49D9R2F-GP
2 7 BATLOW # BATLOW # 17
MCP_GPIO24 AD5 GPIO24
3 6 MCP_GPIO27 MCP_GPIO27 MCP_GPIO27
MCP_GPIO27 AN5 GPIO27
4 5 MCP_GPIO25 79 GPU_EVENT# AD7 GPIO28
MCP_GPIO26 AN3 GPIO26 MCP_GPIO83
GSPI0_CS#/GPIO83 R6
C AG6 L6 MCP_GPIO84 C
RTC_DET# GPIO56 GSPI0_CLK/GPIO84 ODD_PW R_EN_N R2042 2 3D3V_S0
17,25 RTC_DET# AP1 GPIO57 GSPI0_MISO/GPIO85 N6 1 ODD_PW R_EN 24,60
AL4 L8 MCP_GPIO86 0R0402-PAD-1-GP
GPIO58 GSPI0_MOSI/GPIO86 MCP_GPIO87 RN2014
AT5 GPIO59 GSPI1_CS#/GPIO87 R7
1 R2020 2 GC6_FB_EN_MCP AK4 GPIO L5 MIC_DET SRN10KJ-6-GP
79,86 GC6_FB_EN GPIO44 GSPI1_CLK/GPIO88
0R0402-PAD-1-GP AB6 N7 DGPU_DUAL1 MCP_GPIO87 1 8
3D3V_S0 24 EC_SMI# GPIO47 GSPI1_MISO/GPIO89
U4 K2 DGPU_DUAL2 TOUCH_DET# 2 7
69 GSENSOR_INT1 GPIO48 GSPI_MOSI/GPIO90
20141014 Rober DGPU_TYPE2 Y3 GPIO49 UART0_RXD/GPIO91 J1 TOUCH_DET# 55 TOUCH_S_RST# 3 6
R2030 55 TOUCH_INT# P3 GPIO50 UART0_TXD/GPIO92 K3 TOUCH_S_RST# 55 4 5
1 2 MCP_GPIO76 Y2 J2 CCD_PW R_ENR 1 R2041 2 CCD_PW R_EN# 38
HSIOPC/GPIO71 SERIAL IO UART0_RTS#/GPIO93 0R0402-PAD-1-GP 20141216 -1
4K7R2J-L-GP 18 MCP_GPIO13 AT3 GPIO13 UART0_CTS#/GPIO94 G1 FW _GPIO 38
MCP_GPIO14 AH4 K4
GPIO14 UART1_RXD/GPIO0 RN2007
RN2001 MCP_GPIO25 AM4 G2
AMIC_DMIC# MCP_GPIO45 GPIO25 UART1_TXD/GPIO1 INT_PIRQA#
1 4 AG5 GPIO45 UART1_RST#/GPIO2 J3 15 INT_PIRQA# 8 1
2 3 GPU_EVENT# MCP_GPIO46 AG3 J4 15,65 TP_IN# TP_IN# 7 2
GPIO46 UART1_CTS#/GPIO3 MCP_GPIO83
I2C0_SDA/GPIO4 F2 I2C0_DATA_CPU 55 6 3
SRN10KJ-L-GP AM3 F3 MCP_GPIO84 5 4
GPIO9 I2C0_SCL/GPIO5 I2C0_CLK_CPU 55
24 EC_SCI# AM2 GPIO10 I2C1_SDA/GPIO6 G4 I2C1_DATA_CPU 65
17,24,31,61 DEVSLP P2 F1 SRN10KJ-6-GP
DEVSLP0/GPIO33 I2C1_SCL/GPIO7 I2C1_CLK_CPU 65
MCP_GPIO70 C4 E3
LAN_DIS# SDIO_POWER_EN/GPIO70 SDIO_CLK/GPIO64
15 LAN_DIS# L2 DEVSLP1/GPIO38 SDIO_CMD/GPIO65 F4
N5 D3 3D3V_S0
DEVSLP2/GPIO39 SDIO_D0/GPIO66 SRN2K2J-4-GP
27 HDA_SPKR V2 SPKR/GPIO81 SDIO_D1/GPIO67 E4 RN2008
SDIO_D2/GPIO68 C3 I2C0_CLK_CPU 8 1
SDIO_D3/GPIO69 E2 I2C0_DATA_CPU 7 2
I2C1_DATA_CPU 6 3
I2C1_CLK_CPU 5 4
HASW ELL-6-GP-U
B B

3D3V_S0 3D3V_S0
DGPU_DUAL1!
"For N16V-GM VBIOS loading dependence MIC_DET
3D3V_S0
1

1
Dual rank H: Daul rank H: Single MIC UMA DGPU_TYPE2
R2016 L: Single rank" R2012
10KR2J-L-GP L: Dual MIC H:UMA
10KR2J-L-GP
1

SINGLE L:OPTIMUS
R2018
2

2
DGPU_DUAL1 DGPU_TYPE2
10KR2J-L-GP
0!?.*2-%!.2//!*2#D!!+2?C#E
2
1

MIC_DET

1
Single rank PX ?4 # ! #+ +
R2017 R2010
10KR2J-L-GP 10KR2J-L-GP ?+ !?.****/4!
1

DUAL
R2019
2

2
R2040
10KR2J-L-GP MCP_GPIO86 2 1
1KR2J-L2-GP
2

3D3V_S0
DGPU_DUAL2
For N16S-GT VBIOS loading dependence
H: Daul rank
1

Dual rank Wistron Confidential document, Anyone can not


R2021
L: Single rank" Duplicate, Modify, Forward or any other purpose
3D3V_SUS 10KR2J-L-GP Brook_BH application without get Wistron permission
A A
R2004
2 1 MCP_GPIO46
2

1KR2J-L2-GP
DGPU_DUAL2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
1

Taipei Hsien 221, Taiwan, R.O.C.


R2015 Single rank
2 1 MCP_GPIO70
R2022 Title
10KR2J-L-GP 10KR2J-L-GP
CPU (GPIO/MISC)
2

Size Document Number Rev


A3
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 20 of 106

5 4 3 2 1
5 4 3 2 1

D D

3D3V_SUS

1
C2108

SC1U10V2KX-L1-GP
2
HSW_ULT_DDR3L
CPU1M 13 OF 19
1D05V_S0
1D05V_S0 K9 VCCHSIO
L10 VCCHSIO
M9 VCCHSIO
N8 HSIO RTC AH11 3D3V_RTC_AUX
VCC1_05 VCCSUS3_3
P9 VCC1_05 VCCRTC AG10
1D05V_VCCUSB3PLL_S0 B18 AE7 3D3V_DCPRTC C2109 1 2 SCD1U16V2KX-L-GP
C2101 VCCUSB3PLL DCPRTC
1

1D05V_VCCSATA3PLL_S0 B11
SC1U10V2KX-L1-GP

VCCSATA3PLL
C 3D3V_S5 C
2

1D05V_S0 Y20 SPI Y8 3D3V_VCCSPI_S5 1 R2103 2


RSVD#Y20 VCCSPI 0R0402-PAD-1-GP
AA21 VCCAPLL
OPI
W21 VCCAPLL
AG14 1D05V_S0 C2110 1 2 SCD1U16V2KX-L-GP
VCCASW
VCCASW AG13

J13 USB3 1D05V_S0


3D3V_SUS DCPSUS3
VCC1_05 J11
VCC1_05 H11
AH14 HDA H15
VCCHDA VCC1_05
VCC1_05 AE8
AF22 R2120
1

C2103 VCC1_05
AH13 VRM AG19 DCPSUSYP 1 5D1R2F-GP
2 DCPSUSYP_R C21111 2 SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP

DCPSUS2 CORE DCPSUSBYP#AG19


DCPSUSBYP#AG20 AG20
AE9
2

3D3V_SUS VCCASW C2117 1 2 SCD47U25V3KX-1GP 3D3V_S5


VCCASW AF9
AC9 VCCSUS3_3 VCCASW AG8 1D05V_S0
3D3V_S5 AA9 VCCSUS3_3
GPIO/LPC
DCPSUS1#AD10 AD10
AH10 AD8 1D5V_S0 3D3V_S0
VCCDSW3_3 DCPSUS1#AD8
3D3V_S0 V8 VCC3_3
W9 VCC3_3
VCCTS1_5 J15
THERMAL SENSOR K14
VCC3_3
VCC3_3 K16

1
C2116 C2105
1D05V_VCCCLK_S0

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
3D3V_S0
1D05V_VCCCLK_S0 J18 VCCCLK

2
K19 SERIAL IO U8
B 1D05V_VCCACLKPLL_S0 VCCCLK VCCSDIO B
A20 VCCACLKPLL VCCSDIO T9
J17 VCCCLK
R21 VCCCLK
T21 LPT LP POWER
VCCCLK SUS OSCILLATOR
K18 RSVD#K18 DCPSUS4 AB8
M20 RSVD#M20
C2104 C2107 V21 1D05V_S0
3D3V_SUS RSVD#V21
1

1
SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

AE20 VCCSUS3_3 RSVD#AC20 AC20


AE21 VCCSUS3_3 VCC1_05 AG16
USB2 AG17
VCC1_05
2

1
C2102

SC1U10V2KX-L1-GP
HASW ELL-6-GP-U

2
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
Brook_BH application without get Wistron permission
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (POWER1)
Size Document Number Rev
A3
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 21 of 106

5 4 3 2 1
5 4 3 2 1

D D

HSW_ULT_DDR3L 17 OF 19
CPU1Q

DC_AY2_AW2 AY2 A3 DC_A3_B3


DC_AY3_AW3 DAISY_CHAIN_NCTF_AY2 DAISY_CHAIN_NCTF_A3 DC_A4
AY3 DAISY_CHAIN_NCTF_AY3 DAISY_CHAIN_NCTF_A4 A4 1 TP2219
1 DC_AY60 AY60
TP2212 DAISY_CHAIN_NCTF_AY60
DC_AY61_AW61 AY61 A60 DC_A60 1
DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_A60 TP2218
DC_AY62_AW62 AY62 A61 DC_A61_B61
DC_B2 DAISY_CHAIN_NCTF_AY62 DAISY_CHAIN_NCTF_A61 DC_A62
TP2213 1 B2 DAISY_CHAIN_NCTF_B2 DAISY_CHAIN_NCTF_A62 A62 1 TP2217
DC_A3_B3 B3 AV1 DC_AV1 1
DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_AV1 TP2215
DC_A61_B61 B61 AW1 DC_AW1 1
DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_AW1 TP2216
DC_B62_B63 B62 AW2 DC_AY2_AW2
DAISY_CHAIN_NCTF_B62 DAISY_CHAIN_NCTF_AW2 DC_AY3_AW3
B63 DAISY_CHAIN_NCTF_B63 DAISY_CHAIN_NCTF_AW3 AW3
DC_C1_C2 C1 AW61 DC_AY61_AW61
DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_AW61 DC_AY62_AW62
C2 DAISY_CHAIN_NCTF_C2 DAISY_CHAIN_NCTF_AW62 AW62
AW63 DC_AW63 1
DAISY_CHAIN_NCTF_AW63 TP2214
HASWELL-6-GP-U
C C

HSW_ULT_DDR3L 18 OF 19
CPU1R

RSVD#N23 N23
RSVD#R23 R23
AT2 RSVD#AT2 RSVD#T23 T23
AU44 RSVD#AU44 RSVD#U10 U10
AV44 RSVD#AV44
D15 RSVD#D15
RSVD#AL1 AL1
RSVD#AM11 AM11
F22 RSVD#F22 RSVD#AP7 AP7
H22 RSVD#H22 RSVD#AU10 AU10
J21 RSVD#J21 RSVD#AU15 AU15
RSVD#AW14 AW14
RSVD#AY14 AY14
B B

HASWELL-6-GP-U

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
Brook_BH application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (RSVD)
Size Document Number Rev
Custom
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 22 of 106
5 4 3 2 1
5 4 3 2 1

HSW_ULT_DDR3L
CPU1N HSW_ULT_DDR3L 14 OF 19 CPU1O 15 OF 19

A11 VSS VSS AJ35 AP22 VSS VSS AV59


A14 VSS VSS AJ39 AP23 VSS VSS AV8
A18 VSS VSS AJ41 AP26 VSS VSS AW16
A24 AJ43 AP29 AW24 CPU1P HSW_ULT_DDR3L 16 OF 19
VSS VSS VSS VSS
A28 VSS VSS AJ45 AP3 VSS VSS AW33 VSS H17
D A32 VSS VSS AJ47 AP31 VSS VSS AW35 D33 VSS VSS H57 D
A36 VSS VSS AJ50 AP38 VSS VSS AW37 D34 VSS VSS J10
A40 VSS VSS AJ52 AP39 VSS VSS AW4 D35 VSS VSS J22
A44 VSS VSS AJ54 AP48 VSS VSS AW40 D37 VSS VSS J59
A48 VSS VSS AJ56 AP52 VSS VSS AW42 D38 VSS VSS J63
A52 VSS VSS AJ58 AP54 VSS VSS AW44 D39 VSS VSS K1
A56 VSS VSS AJ60 AP57 VSS VSS AW47 D41 VSS VSS K12
AA1 VSS VSS AJ63 AR11 VSS VSS AW50 D42 VSS VSS L13
AA58 VSS VSS AK23 AR15 VSS VSS AW51 D43 VSS VSS L15
AB10 VSS VSS AK3 AR17 VSS VSS AW59 D45 VSS VSS L17
AB20 VSS VSS AK52 AR23 VSS VSS AW60 D46 VSS VSS L18
AB22 VSS VSS AL10 AR31 VSS VSS AY11 D47 VSS VSS L20
AB7 VSS VSS AL13 AR33 VSS VSS AY16 D49 VSS VSS L58
AC61 VSS VSS AL17 AR39 VSS VSS AY18 D5 VSS VSS L61
AD21 VSS VSS AL20 AR43 VSS VSS AY22 D50 VSS VSS L7
AD3 VSS VSS AL22 AR49 VSS VSS AY24 D51 VSS VSS M22
AD63 VSS VSS AL23 AR5 VSS VSS AY26 D53 VSS VSS N10
AE10 VSS VSS AL26 AR52 VSS VSS AY30 D54 VSS VSS N3
AE5 VSS VSS AL29 AT13 VSS VSS AY33 D55 VSS VSS P59
AE58 VSS VSS AL31 AT35 VSS VSS AY4 D57 VSS VSS P63
AF11 VSS VSS AL33 AT37 VSS VSS AY51 D59 VSS VSS R10
AF12 VSS VSS AL36 AT40 VSS VSS AY53 D62 VSS VSS R22
AF14 VSS VSS AL39 AT42 VSS VSS AY57 D8 VSS VSS R8
AF15 VSS VSS AL40 AT43 VSS VSS AY59 E11 VSS VSS T1
AF17 VSS VSS AL45 AT46 VSS VSS AY6 E17 VSS VSS T58
AF18 VSS VSS AL46 AT49 VSS VSS B20 F20 VSS VSS U20
AG1 VSS VSS AL51 AT61 VSS VSS B24 F26 VSS VSS U22
AG11 VSS VSS AL52 AT62 VSS VSS B26 F30 VSS VSS U61
AG21 VSS VSS AL54 AT63 VSS VSS B28 F34 VSS VSS U9
C AG23 AL57 AU1 B32 F38 V10 C
VSS VSS VSS VSS VSS VSS
AG60 VSS VSS AL60 AU16 VSS VSS B36 F42 VSS VSS V3
AG61 VSS VSS AL61 AU18 VSS VSS B4 F46 VSS VSS V7
AG62 VSS VSS AM1 AU20 VSS VSS B40 F50 VSS VSS W20
AG63 VSS VSS AM17 AU22 VSS VSS B44 F54 VSS VSS W22
AH17 VSS VSS AM23 AU24 VSS VSS B48 F58 VSS VSS Y10
AH19 VSS VSS AM31 AU26 VSS VSS B52 F61 VSS VSS Y59
AH20 VSS VSS AM52 AU28 VSS VSS B56 G18 VSS VSS Y63
AH22 VSS VSS AN17 AU30 VSS VSS B60 G22 VSS
AH24 VSS VSS AN23 AU33 VSS VSS C11 G3 VSS
AH28 VSS VSS AN31 AU51 VSS VSS C14 G5 VSS VSS V58
AH30 VSS VSS AN32 AU53 VSS VSS C18 G6 VSS VSS AH46
AH32 VSS VSS AN35 AU55 VSS VSS C20 G8 VSS VSS V23
AH34 VSS VSS AN36 AU57 VSS VSS C25 H13 VSS VSS_SENSE E62 VSS_SENSE 7,46
AH36 VSS VSS AN39 AU59 VSS VSS C27 VSS AH16
AH38 VSS VSS AN40 AV14 VSS VSS C38
AH40 AN42 AV16 C39 HASW ELL-6-GP-U
VSS VSS VSS VSS
AH42 VSS VSS AN43 AV20 VSS VSS C57
AH44 VSS VSS AN45 AV24 VSS VSS D12
AH49 VSS VSS AN46 AV28 VSS VSS D14
AH51 VSS VSS AN48 AV33 VSS VSS D18
AH53 VSS VSS AN49 AV34 VSS VSS D2
AH55 VSS VSS AN51 AV36 VSS VSS D21
AH57 VSS VSS AN52 AV39 VSS VSS D23
AJ13 VSS VSS AN60 AV41 VSS VSS D25
AJ14 VSS VSS AN63 AV43 VSS VSS D26
AJ23 VSS VSS AN7 AV46 VSS VSS D27
AJ25 VSS VSS AP10 AV49 VSS VSS D29
AJ27 VSS VSS AP17 AV51 VSS VSS D30
B B
AJ29 VSS VSS AP20 AV55 VSS VSS D31

HASW ELL-6-GP-U

HASW ELL-6-GP-U

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A Brook_BH A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VSS)
Size Document Number Rev
A3
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 23 of 106
5 4 3 2 1
!!.+*2*"/$ 5 4 3 2 1
For EC power consumption reserver
3D3V_AUX_KBC
3D3V_AUX_KBC 3D3V_AUX_S5

1 R2409 2

2
PLTRST#_PCH 0R0603-PAD
VCC_LPC(Pin9) R2435
0R0402-PAD-1-GP
VCC_LPC(Pin9) R2411

1
PLTRST#_PCH KBC1 PM_SUSWARN#_R DY_DS3 2 0R2J-L-GP
1 3D3V_AUX_KBC_AVCC 3D3V_AUX_KBC
PM_SUSWARN# 17
EC2401

1
1

R2488 AZ5325-01FDR7G-GP VCC_LPC 9 1.8_3.3V L2406


VCC_LPC
1.8_3.3V AVCC
67 2 1
47KR2J-L2-GP DY 1
GPIO00/GA20/ESPI_GPIO
2 63 AD_IA 44 BLM15AG121SN-1GP
18,20 H_RCIN# GPIO01/KBRST#/ESPI_ALERT# GPIO38/AD0

2
3 64 PCB_VER_AD
19,20,91 INT_SERIRQ GPIO02/SERIRQ/ESPI_GPIO GPIO39/AD1
2

1
4 65 ADT_TYPE_AD C2418 C2419
18,68,91 LPC_FRAME#_CPU LFRAME#/ESPI_CS# GPIO3A/AD2
Close to the EC MODEL_ID_AD SML1_CLK

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
5 66

D D
18,68,91 LPC_AD_CPU_P3 LAD3/ESPI_IO3 GPIO3B/AD3
6 75 SML1_DATA
65 KB_BL_DET GPIO04/ESPI_CS2#/ESPI_GPIO GPIO42/AD4 DGPU_PWROK 15,85,86

2
7 76 PM_SUSWARN#_R DY_DS3
18,68,91 LPC_AD_CPU_P2 LAD2/ESPI_IO2 GPIO43/AD5 PM_SLP_SUS#_R
18,68,91 LPC_AD_CPU_P1 8 73 2 R2410 1 0R2J-L-GP
PM_SLP_SUS# 17,39
LAD1/ESPI_IO1 GPIO40/CIR_RX/AD6

1
18,68,91 LPC_AD_CPU_P0 10 74 ALL_SYS_PWRGD 40
LAD0/ESPI_IO0 GPIO41/CIR_RLC_TX/AD7 D2401
18 LPC_CLK_KBC 12
PCICLK/ESPICLK 0R0402-PAD-1-GP EC_AGND
17,31,37,40,61,63,68,89,91 PLTRST#_PCH 13 68 FAN1_DAC 26
GPIO05/PCIRST#/WP2/ESPI_GPIO GPIO3C/DA0 OPMODE
14 70 1R2437 2 USB_CHAR_SEL 36
AZ5125-02S-R7G-GP
GPIO07/I_CLK_EHB/ESPI_RST# GPIO3D/OPMODE/DA1
71 WLAN_PWR_EN# 61
GPIO3E/DA2
3D3V_AUX_KBC GPIO3F/DA3
72 PTP_PWR_EN# 65 75.05125.07D
20 EC_SMI# 1 R2466 2 2nd = 75.08212.07D

3
0R0402-PAD-1-GP 22
VCC2 DY
20 EC_SCI#
0R2J-L-GP 2 R2465 1 ECSCI#_KBC ECSCI#_KBC 33
VCC2 1.8_3.3V
DY swap D2401 1/29
16 15
ECSCI#_KBC 67
LID_CLOSE# GPIO0A/OWM/RLC_RX2 GPIO08/I_CLK_EPB/PROCHOT2#/SCL4 DGPUHOT 79
20 19 PM_SUSACK#_R 1 R2434 2 0R2J-L-GP
GPIO0E/SCI# GPIO0D/RLC_TX2/SDA4 PM_SUSACK# 17
17,40,48,51 PM_SLP_S3# 32
GPIO18/POWER_FAIL1 GPIO0B/ESBCLK/SCL5
17 WLAN_PCIE_WAKE# 61 DY_DS3
17,49 PM_SLP_S4# 36 18 LAN_PCIE_WAKE# 31
ECRST# GPIO1A/NUMLED# GPIO0C/ESBDAT/SDA5
37
ECRST# 3D3V_AUX_KBC
17,91 PM_CLKRUN#_EC 38
GPIO1D/CLKRUN#

61 E51_TXD 30
GPIO16/TXD/SER_TXD/LPC_TXD 1.8_3.3V VCC3
96
61 E51_RXD 31
GPIO17/RXD/SER_CLK/LPC_CLK/PBOUT
GPIO44/SCL0
77 SML1_CLK 18,79 < ---CPU/GPU

1
78 C2431 C2432 C2433 C2434 C2413 C2414
GPIO45/SDA0 SML1_DATA 18,79
< ---BATTER /CHARGER

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
27 KBC_BEEP 21 79 BAT_SCL 43,44,89
KB_BL_PWMR GPIO0F/PWM0 GPIO46/IEDI_SCL/SCL1_BATMGR
65 KB_BL_PWM 1 R2408 2 23 80 BAT_SDA 43,44,89
GPIO10/PWM1 GPIO47/IEDI_SDA/SDA1_BATMGR

2
64
64 PWRLED
STDBY_LED
0R0402-PAD-1-GP 25
34
GPIO11/PWM2
GPIO19/PWM3/WDT_LED_ALT GPIO4A/SMBD_CLK/PSCLK1/SCL2
83 FUN_OFF# 65
20141014 Rober DY DY
84 EC_TP_IN# 65 ODD_PWR_EN 20,60
GPIO4B/SMBD_DAT/PSDAT1/SDA2 ODD_PWR_EN_R
45 5V_CHARGER_EN# 26 85 2 1
GPIO12/FANPWM0 GPIO4C/PSCLK2/SCL3 Charger_Boost_Status# 1R2447
36 USB_CHARGER_EN 27
GPIO13/FANPWM1 GPIO4D/PSDAT2/SDA3
86 DY R2448 0R2J-L-GP 2 PWR_CHG_BM# 44
28 87 0R0402-PAD-1-GP
26 FAN_TACH1 GPIO14/FANFB0 GPIO4E/PSCLK3/KSO18 EC_TPCLK 65
17,31,61,63 PCH_PCIE_WAKE# 29
GPIO15/FANFB1 GPIO4F/PSDAT3/KSO19
88 EC_TPDATA 65 < ---Touch Pad
3D3V_AUX_KBC
65,89 KCOL[0..7]
KCOL0 55
GPIO52/WP#/KSO20
90 ME_UNLOCK 19 OPMODE (Pin70)
3D3V_AUX_KBC KCOL1 GPIO30/KSI0/SER_TXD/TRAP2
56
GPIO31/KSI1

2
KCOL2 57
KCOL3 GPIO32/KSI2 R2401
RN2404 58 97 RTCRST_ON 19
BAT_IN# KCOL4 GPIO33/KSI3 GPIO60/SHICS# 330KR2J-L-GP
1 8 59 98 BLON_OUT 55
GPIO34/KSI4/EDICS GPIO61/SHICLK
C C
ECRST# 2 7 KCOL5 60 99
GPIO35/KSI5/EDICLK GPIO62/SHIDO AD_OFF 43
CHG_ON# 3 6 KCOL6 61
GPIO36/KSI6/EDIDI

1
PROCHOT#_EC 4 5 KCOL7 62 109 OPMODE R2404
GPIO37/KSI7/EDIDO GPIO78/ADC8/VCIN0/SHIDI VD_IN1 26
20141216 -1 104 KBC_PWRBTN#_R 1 2
65,89 KROW[0..17] GPIO67/VCOUT0 VD_OUT1 26 KBC_PWRBTN# 64,65,89
SRN100KJ-L-GP KROW0 39 102
GPIO20/KSO0/TRAP_TCK GPIO65/ADC9/VCIN1 VD_IN2 26 470R2J-2-GP

2
KROW1 40 103 PROCHOT#_EC
GPIO21/KSO1/TRAP0 GPIO66/PROCHOT#/VCOUT1

1
KROW2 41 R2455
GPIO22/KSO2/TRAP1
11/18 RN7904 to RN2404 3D3V_S0 KROW3
KROW4
42
43
GPIO23/KSO3/TRAP_EN GPIO50/LOCK#
89
91
6K2R2F-GP G2401
GAP-OPEN
KROW5 44
GPIO24/KSO4 GPIO53/CAPSLED#
92
BAT_IN# 43,44,89 LPC
GPIO25/KSO5 GPIO54/WDT_LED CHARGE_LED 64

1
KROW6 45 93
R2417 GPIO26/KSO6 GPIO55/SCROLED# DC_BATFULL 64

2
FAN_TACH1 10KR2F-L1-GP 1 2 KROW7 46 95
GPIO27/KSO7 GPIO56/RSMRST# RSMRST#_KBC 17
KROW8 47 100
GPIO28/KSO8 GPIO63/POWER_FAIL0/FANFB2 AMP_MUTE# 27
KROW9 48 101
GPIO29/KSO9 GPIO64/FANFB3 S5_ENABLE# 40,89
KROW10 49
KROW11 GPIO2A/KSO10
50
KROW12 GPIO2B/KSO11
51 106 SYS_PWROK 17
KROW13 GPIO2C/KSO12 GPIO69

R2452
KROW14
52
53
GPIO2D/KSO13 GPIO6B/GWG
108 DC_Protect_EC 44 0?.%***3(F#*!"'(8$
AD_OFF KROW15 GPIO2E/KSO14 3D3V_AUX_KBC
2 11KR2J-L2-GP 54 105 eDP_BLEN_CPU 15
GPIO2F/KSO15 GPIO68/IO2_SHR_ROM Q2402
107 AC_PRESENT 17
GPIO6A/IO3_SHR_ROM PROCHOT#_EC G
RN2412
SRN10KJ-6-GP KROW16 81 D
GPIO48/KSO16 PROCHOT#_CPU 4,44,46
FUN_OFF# 1 8 KROW17 82
GPIO49/KSO17 1.8_3.3V
KB_BL_PWM 2 7 124 S
VCC_IO2
5V_CHARGER_EN#
S5_ENABLE#
3
4
6
5 119 SPI_SO_KBC 1 R2402
Rober change 11/17
0R0402-PAD-1-GP
2 2N7002K-2-GP
GPIO5B/MISO_SHR_ROM SPI_SO_CPU 18,25
120 SPI_SI_KBC 1 R2403 0R0402-PAD-1-GP
2 84.2N702.J31
3D3V_RTC_AUX GPIO5C/MOSI_SHR_ROM SPI_SI_CPU 18,25
126 SPI_CLK_KBC 1 R2407 0R0402-PAD-1-GP
2 2ND = 84.2N702.031
GPIO58/SPICLK_SHR_ROM SPI_CLK_CPU 18,25
20141216 -1 128 SPI_CS_KBC_N0 1 R2412 0R0402-PAD-1-GP
2 3rd = 84.2N702.W31
GPIO5A/SPICS#_SHR_ROM SPI_CS_CPU_N0 18,25
1 R2438 2 3D3V_RTC_AUX_R 111
VCC0

1
1.8_3.3V GPIO7D/IO2_ROM_EXPD
116 KBC_DPWROK 17
C2423

SCD1U16V2KX-L-GP
0R0402-PAD-1-GP 117
GPIO7E/IO3_ROM_EXPD WIFI_RF_EN 61
44 AC_IN# 110
GPIO79/AC_IN#

2
112
KBC_PWRBTN#_R GPIO7A/GPXIOD02/EC_EN#
114
GPIO7B/PBIN/PWRBTN#
17,20,89 PM_PWRBTN# 115 121 BLUETOOTH_EN 61
GPIO7C/GPXIOD04 GPIO57/XCLK32K/MOSI_ROM_EXPD ECRST#
122 USB_PWR_EN# 35,66
GPIO5D/XCLKI/MISO_ROM_EXPD
123 USB_CHAR_CT1 36 Q2401
GPIO5E/XCLKO/SPICS#_ROM_EXPD
127 CHG_ON# 44 C2415 MMBT3906-4-GP
GPIO59/SPICLK_ROM_EXPD 3D3V_AUX_KBC

B B

1
84.T3906.A11

SC1U10V2KX-L1-GP
118 H_PECI_KBC 1 R2429 2 43R2J-GP
GPIO7F/PECI PECI_EC 4
2ND = 84.T3906.E11 RN2413

E
AGND

125 1 4

2
3D3V_AUX_KBC
GND
GND
GND
GND
GND

VCC ECRST#_Q
B 2 3 PURE_HW_SHUTDOWN# 26,40
KB9038QA-GP-U1
113
94
35
24
11
69

C
SRN10KJ-L-GP

20141216 -1

3D3V_AUX_KBC R2405
1 2
0R0402-PAD-1-GP
1

R2431
EC_AGND
MODEL_ID 20KR2F-L3-GP
3D3V_AUX_KBC
2

MODEL_ID_AD 1
R2425
100KR2F-L3-GP
1

R2436 45W
100KR2F-L3-GP
2

ADT_TYPE_AD
2

R2430
EC_AGND 100KR2F-L3-GP
90W/45W
2

3D3V_AUX_KBC

EC_AGND
1

R2424

A A
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
20KR2F-L3-GP application without get Wistron permission
2

PCB_VER_AD
Brook_BH

DY
Wistron Corporation
1

C2417
SCD1U16V2KX-L-GP

R2426 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


100KR2F-L3-GP Taipei Hsien 221, Taiwan, R.O.C.
2

Title
2

KBC_KB9038
Size Document Number Rev
A2

Thursday, February 12, 2015


Brook_BH -1M
EC_AGND Date: Sheet 24 of 106

5 4 3 2 1
5 4 3 2 1

!!.+*2*54&)#>#%- !?.*55!!3*#%-*D)-*A:'$E*B,0*?$3*
!?.*#%-* G-&4*4$.F'#*.$$;*',*4$))*'#&.*9**%(4
SPI FLASH ROM (8M byte)
1ST= 072.02564.0001(AMIC A25LQ64M)
2ND=072.25B64.0001(Gigadevice GD25B64BSIGR)

purge=72.25Q64.K01 (WINBOND W25Q64FVSSIQ)


D 72.25647.00A (MXIC MX25L6473EM2I) D

3D3V_S5 3D3V_S5 3D3V_S5

1
1

2
R2504
R2502 R2503 C2501
EC2502 3K3R2F-2-GP
3K3R2F-2-GP 3K3R2F-2-GP

SCD1U16V2KX-L-GP
SC10U6D3V3MX-L-GP
1

2
2

2
U2501

18,24 SPI_CS_CPU_N0 1 R2505 2 20R2J-3-GP SPI_CS_ROM_N0 1 CS# VCC 8


18,24 SPI_SO_CPU 1 R2501 2 33R2J-L1-GP SPI_SO_ROM 2 DO/IO1 HOLD#/IO3 7 SPI_HOLD_ROM 1 R2508 2 33R2J-L1-GP SPI_HOLD_CPU 18
18 SPI_W P_CPU 1 R2509 2 33R2J-L1-GP SPI_W P_ROM 3 WP#/IO2 CLK 6 SPI_CLK_ROM 1 R2510 2 33R2J-L1-GP SPI_CLK_CPU 18,24
4 5 SPI_SI_ROM 1 R2513 2 33R2J-L1-GP
GND DI/IO0 SPI_SI_CPU 18,24

W 25Q64FVSSIQ-GP
72.25Q64.K01
C
2nd = 072.25B64.0001 C

!!.+*2*#/!6 3rd = 72.25Q64.R01

Width=20mils 3D3V_RTC_VCC
RTC1
3D3V_RTC_AUX Q2501 R2517
2 3D3V_RTC_PW R 1 1KR2J-L2-GP
2 1 PWR
2 GND
3 NP1 20141216 -1
3D3V_AUX_S5 NP1
NP2 NP2
1
1

C2505 BAS40CW -GP BAT-060003HA002M213ZL-GP-U1


SC1U10V3KX-8-GP

83.00040.E81 62.70014.001
2

DY 2nd = 20.F2316.002
3rd = 62.70001.061

Q2502
3D3V_RTC_PW R G

D RTC_DET# 17,20
2

R2519 S
B B
10MR2J-L-GP
2N7002K-2-GP
84.2N702.J31
1

2ND = 84.2N702.031
3rd = 84.2N702.W31

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A Brook_BH A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Flash(KBC+PCH)/RTC
Size Document Number Rev
A3
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 25 of 106
5 4 3 2 1
5 4 3 2 1

5V_FAN1_S0

D
*Layout* 15 mil D

K
1

1
C2603 C2602
D2601

SC4D7U25V5KX-L2-GP

SCD1U16V2KX-L-GP
RB551V30-1-GP

2
083.55130.008F
2ND = 83.R5003.H8H

A
D2602
RB551V30-1-GP FAN1
083.55130.008F 4
2ND = 83.R5003.H8H 1 3D3V_S0

24 FAN_TACH1 A K FAN_TACH1_C 2 20141014 Rober


3

2
5
R2603
ACES-CON3-10-GP-U 10KR2J-L-GP

20.F1621.003

1
FON1# U2603
5V_S0
C
2nd = 020.F0283.0003 C

89 FAN_TACH1_C FAN_TACH1_C 1 8
FON# GND
2 VIN GND 7
3 VOUT GND 6

1
4 VSET GND 5
C2613
SC2D2U10V3KX-L-GP

2
AP2113MTR-G1-GP

DY
2 R2615 15V_FAN1_S0
3D3V_AUX_S5 FAN1_DAC_R 1 R2616 2 FAN1_DAC 24
0R3J-L1-GP 0R0402-PAD-1-GP

5V_S0 5V_FAN1_S0
1

R2611 3D3V_S0
16KR2F-GP
2

1
R2606
VD_IN1 24
2KR2F-L1-GP
1

RT2601

2
1

NTC-100K-11-GP-U C2607 C2608


SCD1U16V2KX-L-GP SC100P50V2JN-L-GP Q2603 R2610
S THERM_SYS_SHDN#_R 1 2 VD_OUT1 24
2

B 0R0402-PAD-1-GP B

24,40 PURE_HW _SHUTDOW N# D


2

G IMVP_PW RGD_G

1
DY DY

1
R2608 C2606 2N7002K-2-GP
10KR2J-L-GP 84.2N702.J31

SCD1U16V2KX-L-GP
2ND = 84.2N702.031

2
3rd = 84.2N702.W31 1 R2609 2 IMVP_PW RGD 7,40,46

2
0R0402-PAD-1-GP
3D3V_AUX_S5
1

R2612
DY 16KR2F-GP
2

VD_IN2 24
1

RT2602
1

NTC-100K-11-GP-U C2610 C2609 Wistron Confidential document, Anyone can not


DY SCD1U16V2KX-L-GP SC100P50V2JN-L-GP Duplicate, Modify, Forward or any other purpose
Brook_BH application without get Wistron permission
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2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal 7718/Fan Controllor P2793


Size Document Number Rev
A3
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 26 of 106

5 4 3 2 1
5 4 3 2 1

SSID = AUDIO 1
G2703
2

GAP-CLOSE
G2701
5V_S0 1 2 placed nearby codec PIN12
C2725
GAP-CLOSE RN2704
1 R2719 2 5V_PVDD AUDIO_PC_BEEP 1 2 KBC_BEEP_C 4 1 KBC_BEEP 24
0R0603-PAD G2702 3 2 HDA_SPKR 20
1 2 SCD1U16V2KX-L-GP

1
C2721 C2727 SRN47K-2-GP-U

1
SCD1U16V2KX-L-GP
GAP-CLOSE

SC10U10V5KX-L1-GP
R2730

2
AUD_AGND 4K7R2J-L-GP

2
D AUD_AGND close to codec IC D

5VA_S0

3V_MIC2V

SC2D2U10V3KX-L-GP
Close to Pin46 3D3V_S0 29 AUD_HP1_JACK_L2

29 AUD_HP1_JACK_R2 AUD_AGND

1
C2710
Layout Note:

SC10U6D3V3MX-L-GP
C2711

100KR2J-4-GP
1
SCD1U25V2KX-L-GP

2
DY C2701 C2704 Place close to Pin 26

SCD1U16V2KX-L-GP
1
SC4D7U6D3V3KX-L-GP R2711

2
Close pin36 1 2

C2705
1 C2702
SC2D2U10V3KX-L-GP
1

C2722 C2726

2
LINE1_VREFO_R
SCD1U16V2KX-L-GP

1 R2748 2

LINE1_VREFO_L

1
SC10U10V5KX-L1-GP

0R0402-PAD-1-GP
2

1D5V_S0 1D5V_AVDD_S0 5V_S0


3D3V_S0

2
1
C2714

SC10U6D3V3MX-L-GP

2
1 R2766 2

SC4D7U6D3V3KX-L-GP
0R0402-PAD-1-GP 5VA_S0 1 R2721 2

AUD_VREF
LDO1_CAP
2
1

SC2D2U10V3KX-L-GP
C2715 0R0603-PAD

3V_MIC2V
CPVDD

CPVEE
CBN
AUD_AGND

1
C2703 DY

2
Close to Pin41 C2708 RN2703
SC1U10V2KX-L1-GP 2 3 LINE1_VREFO_L

2
Close pin40 1 4 LINE1_VREFO_R

36
35
34
33
32
31
30
29
28
27
26
25
U2701
AUD_SPK_R+ AUD_AGND SRN4K7J-8-GP

CPVEE

HPOUT-L_PORT-I-L
LINE1-VREFO-L

MIC2-VREFO

LDO1-CAP
AVDD1
AVSS1
CPVDD
CBN

HPOUT-R_PORT-I-R

LINE1-VREFO-R

VREF

3
4
AUD_SPK_R-
RN2702
CBP 37 24 3D3V_S5 SRN2K2J-5-GP
C2712 SC10U6D3V3MX-L-GP CBP LINE2-L_PORT-E-L
AUD_AGND 38 23
AVSS2 LINE2-R_PORT-E-R
2

1 2 LDO2_CAP 39 22 LINE1_L C2723 1 2SC4D7U6D3V3KX-L-GP AUD_HP1_JACK_L2


LDO2-CAP LINE1-L_PORT-C-L

2
1
D2704 40 21 LINE1_R C2724 1 2SC4D7U6D3V3KX-L-GP AUD_HP1_JACK_R2
1D5V_AVDD_S0 AVDD2 LINE1-R_PORT-C-R
AZ5125-02S-R7G-GP 41 20 V3D3_STB 1 R2712 2
5V_PVDD PVDD1 VD33_STB
42 19 MIC_CAP C2713 1 2SC10U6D3V3MX-L-GP 0R0402-PAD-1-GP
29 AUD_SPK_L+ SPK-OUT-L+ MIC_CAP AUD_AGND
75.05125.07D 29 AUD_SPK_L-
43
SPK-OUT-L- MIC2-R_PORT-F-R/SLEEVE
18 SELEEVE 29
C 44 17 RING2 29
C
29 AUD_SPK_R- SPK-OUT-R- MIC2-L_PORT-F-L/RING
2nd = 75.08212.07D 29 AUD_SPK_R+
45
SPK-OUT-R+ 071.00255.0003 MONO-OUT
16
46 15 20140926 Rober Remove NC
5V_PVDD PVDD2 SPDIFO/FRONT_JD_JD3/GPIO3
3

1 R2754 2 EAPD# 47 14
24 AMP_MUTE# PDB MIC2/LINE2_JD_JD2 AUD_SENSE_A
Close to LOUT1 0R0402-PAD-1-GP 48 13 1 2

GPIO0/DMIC-DATA
SPDIF-OUT/GPIO2 HP/LINE1_JD_JD1 AUD_HP1_JD# 29

GPIO1/DMIC-CLK
R2713

1
R2708 is need to 49
GND
200KR2F-L-GP
Layout Note:

SDATA-OUT
connect.To prvent 3D3V_S0

LDO3-CAP
Place close to Pin 13 ED2701

SDATA-IN
DVDD-IO

PCBEEP
DC_DET
the beep sound

RESET#
AUD_SPK_L+ AZ5125-02S-R7G-GP
R2722

DVDD

SYNC
BCLK
AUD_SPK_L- AUD_SENSE_A 1 2
Layout Note:
ALC255-CG-GP-U
100KR2J-4-GP

1
2
3
4
5
6
7
8
9
10
11
12

3
75.05125.07D
2

3D3V_S0
D2705 2nd = 75.08212.07D

LDO3_CAP
AZ5125-02S-R7G-GP 3D3V_AUDIO_DVDD DVDD_IO 1 R2714 2
0R0402-PAD-1-GP
75.05125.07D
1

C2706 C2707
2nd = 75.08212.07D 3D3V_AUDIO_DVDD
SC10U6D3V3MX-L-GP

SCD1U16V2KX-L-GP

3D3V_S0 1 R2720 2

2
0R0603-PAD
3

DY

AUDIO_PC_BEEP

1
Width>40mil, to improve Headpohone Crosstalk noise

SC10U6D3V3MX-L-GP

SCD1U16V2KX-L-GP
C27182

C27191
Close to LOUT1 C2720
Change it to sharp will be better.
1

C2735 1 C2734
SCD1U16V2KX-L-GP

Add 2 vias (>0.5A) when trace layer change.

SC10U6D3V3MX-L-GP
SCD1U16V2KX-L-GP
2

AUD_HP1_JACK_L2

Close to Pin1
AUD_HP1_JACK_R2

29 DMIC_DATA_CON

29 DMIC_CLK_CON
2

D2703
AZ5125-02S-R7G-GP 19 HDA_SDOUT_CODEC
B 2nd = 75.08212.07D B
19 HDA_BITCLK_CODEC
1 2 HDA_SDIN0_CODEC
19 HDA_SDIN0_CPU R2718 33R2J-L1-GP
3

19 HDA_SYNC_CODEC

19 HDA_RST#_CODEC

A A

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Brook_BH

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Audio Codec_ALC255
Size Document Number Rev
A2
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 27 of 106
5 4 3 2 1
5 4 3 2 1

!9$&1$0 11/19 EMI Change SPK1


!!.+*2*!4+.% 5

27 AUD_SPK_L- EL2914 1 2 BLM15PX121SN1D-GP AUD_SPK1_L-_CON 1

EL2915 1 2 BLM15PX121SN1D-GP AUD_SPK1_L+_CON 2 20.F1621.004


27 AUD_SPK_L+
EL2916 1 2 BLM15PX121SN1D-GP AUD_SPK1_R-_CON 3 2nd = 020.F0155.0004
27 AUD_SPK_R-
EL2917 1 2 BLM15PX121SN1D-GP AUD_SPK1_R+_CON 4
27 AUD_SPK_R+
EC2901 1 2 SC1KP50V2KX-L-1-GP 6

EC2902 1 2 SC1KP50V2KX-L-1-GP ACES-CON4-17-GP-U1


D D
AUD_SPK1_L-_CON EC2915 1 2 SC1KP50V2KX-L-1-GP
AUD_SPK1_L-_CON 89
AUD_SPK1_L+_CON EC2920 1 2 SC1KP50V2KX-L-1-GP
AUD_SPK1_L+_CON 89
AUD_SPK1_R-_CON
AUD_SPK1_R-_CON 89
5&:,-'*&,'$=
AUD_SPK1_R+_CON
AUD_SPK1_R+_CON 89 60&"$*6(;'#2:*%(4
AFTP TESTPOINT

3D3V_S0
$,%A,*'&"1
AUD1
1 R2910 2 27 RING2
R2920 1 2 0R0402-PAD-1-GP RING2_R 3
0R0402-PAD-1-GP ER2913 1 263D4R3F-GP AUD_HP1_JACK_L1 1
27 AUD_HP1_JACK_L2
20141216 -1 AUD_HP1_JD#_TYPE 5

2
AUD_HP1_JD#_R 6
Q2901 R2905 ER2912 1 263D4R3F-GP AUD_HP1_JACK_R1 2
27 AUD_HP1_JACK_R2
AUD_HP1_JD#_R G
DY 10KR2J-L-GP
27 SELEEVE
R2921 1 2 0R0402-PAD-1-GP SELEEVE_R 4
MS
D AUD_HP1_JD# 27
Audio(IP/NK comb)

1
DY AUDIO-JK506-GP-U
1

C2902 R2901
S AUD_HP1_JD#_TYPE
AUD_HP1_JD#_TYPE 89
EC2923 1 2
DY AUD_AGND
SC22P50V2JN-L-GP
022.10002.0951
SC22P50V2JN-L-GPDY
100KR2J-4-GP 2N7002K-2-GP EC2921 1 2 SC22P50V2JN-L-GP
SC10U6D3V3MX-L-GP
2

DY 84.2N702.J31 DY EC2922 1 2
SC22P50V2JN-L-GP DY

2
C
DY 2ND = 84.2N702.031 EC2912 1 2 C
2

SC22P50V2JN-L-GP DY
R2906 AUD_HP1_JD#_R EC2913 1 2 SC22P50V2JN-L-GP
AUD_HP1_JD#_R 89
0R0402-PAD-1-GP EC2914 1 2
AUD_HP1_JACK_R1
AUD_HP1_JACK_R1 89 DY

1
AUD_AGND AUD_HP1_JACK_L1
AUD_HP1_JACK_L1 89
AUD_AGND RING2_R
RING2_R 89
SELEEVE_R
SELEEVE_R 89
0527_SB AUD_HP1_JD#_TYPE
AUD_HP1_JD#_TYPE 89

AFTP TESTPOINT

R2917 1
DUAL 20R2J-L-GP MIC2

SINGLE 2 R2916 1 DUAL/SINGAL


DMIC_DATA_R
1
2
ENHANCE VDD 6
5 DMIC_DATA_CON_R
3D3V_S0
0R2J-L-GP CS DATA DMIC_CLK_CON_R
3 GND CLK 4
20141216 -1
DMIC_CLK_CON_R R2909 1 2 0R0402-PAD-1-GP DMIC_CLK_CON 27
MICROPHONE-105-GP-U
B B
082.40011.0001 DMIC_DATA_CON_R R2911 1 2 0R0402-PAD-1-GP DMIC_DATA_CON 27
DMIC_CLK_CON_R1 0R2J-L-GP 2 1 R2912 DMIC_CLK_CON

DY DY DY DUAL
1

1
EC2903 EC2904 EC2905
SC4D7P50V2BN-GP

SC4D7P50V2BN-GP

SC4D7P50V2BN-GP
2

2
MIC1
DMIC_DATA_R
1 ENHANCE VDD 6 3D3V_S0
2 5 DMIC_DATA_R1
CS DATA
3 GND DUAL CLK 4 DMIC_CLK_CON_R1

2
R2919
MICROPHONE-105-GP-U
082.40011.0001
SINGLE 0R2J-L-GP

1
DUAL MIC=082.40011.0001 DMIC_DATA_R1 0R2J-L-GP 2 1 R2913 DMIC_DATA_R

SINGALE MIC=082.40011.0011 DY DUAL


1

Single MIC 2nd=082.40002.0031


SC4D7P50V2BN-GP

CLK_CON_MIC3 EC2906
2

DATA_CON_MIC3
MIC3 Wistron Confidential document, Anyone can not
5 Duplicate, Modify, Forward or any other purpose
A DY DY Brook_BH application without get Wistron permission A
1

1 3D3V_S0
EC2908 EC2907
CLK_CON_MIC3 R2914 1 2 0R0402-PAD-1-GP
2 DMIC_CLK_CON 27
Wistron Corporation
SC4D7P50V2BN-GP

SC4D7P50V2BN-GP
2

3 DATA_CON_MIC3
4 R2915 1 2 0R0402-PAD-1-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
DMIC_DATA_CON 27
Taipei Hsien 221, Taiwan, R.O.C.
6
Title

PTW O-CON4-9-GP-U1 Audio Jack


DY 11/30 SB Size Document Number Rev
A3
Brook_BH -1M
Date: Thursday, February 12, 2015 Sheet 29 of 106
5 4 3 2 1
5 4 3 2 1

C3122 Layout:
SC12P50V2JN-3GP
For RTL8111G(S)
2 1 C3124: colse to Pin8
* Place C3121 to C3124 close to each VDD10 pin--3, 8,
X3101
C3125 close to Pin30
C3126: close to Pin3
LAN_XTAL_25M_IN 1 4 C3127: close to Pin22

2
R3109
1MR2J-L3-GP 2 3 REGOUT 1 R3101 2 1V_LAN_VDD10
DY C3123 0R0603-PAD
D SC15P50V2JN-L-GP D

1
LAN_XTAL_25M_OUT XTAL-25MHZ-181-GP 2 1
82.30020.G71

1
2nd = 82.30020.G61 C3102 C3127 C3130 C3125 C3126 C3124
C3114

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SC1U10V2KX-L1-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP

2
RSET DY DY
1

R3108
2K49R2F-2-L-GP
U3102
2

1V_LAN_VDD10 3 1
1V_LAN_VDD10 AVDD10 MDIP0 MDI0+ 32
8 AVDD10 MDIN0 2 MDI0- 32
1V_LAN_VDD10 30 4
AVDD10 MDIP1 MDI1+ 32
MDIN1 5 MDI1- 32
11 6 3D3V_S5 3D3V_LAN_VDD33
AVDD33 MDIP2 MDI2+ 32
3D3V_S5 32 AVDD33 MDIN2 7 MDI2- 32
MDIP3 9 MDI3+ 32
1V_LAN_VDD10 22 10 2 R3104 1
DVDD10 MDIN3 MDI3- 32
0R0805-PAD
3D3V_LAN_VDD33 23 28 LAN_XTAL_25M_IN
VDDREG CKXTAL1 LAN_XTAL_25M_OUT
CKXTAL2 29

1
C3107 C3108 C3115
REGOUT EC3116

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SC4D7U6D3V3KX-L-GP
16 PCIE_TX_LAN_P3 13 HSIP REGOUT 24
14 31 RSET SC4D7U6D3V3KX-L-GP DY
16 PCIE_TX_LAN_N3 HSIN RSET

2
C C
SCD1U16V2KX-L-GP C3128 2 1 PCIE_RX_LAN_P3 17 27
16 PCIE_RX_CPU_P3 HSOP LED0
SCD1U16V2KX-L-GP C3129 2 1 PCIE_RX_LAN_N3 18 26
16 PCIE_RX_CPU_N3 HSON LED1/GPO
LED2 25
18 LAN_CLK_CPU 15 REFCLK_P
16 20 ISOLATEB
18 LAN_CLK_CPU# REFCLK_N ISOLATE#
21 LAN_W AKE#_R
LANWAKE#
18 LAN_CLKREQ_CPU# 12 CLKREQ#

17,24,37,40,61,63,68,89,91 PLTRST#_PCH 19 PERST# GND 33 C3108: close to Pin32


C3107: close to Pin11 (RTL8111 only)
RTL8111H-CG-1-GP

3D3V_S0

2
R3110
1KR2J-L2-GP

3D3V_S5

1
ISOLATEB

1
B B

2
R3113
R3115 15K4R2F-GP
10KR2J-L-GP

2
IOAC IOAC

1
R3117
LAN_W AKE#_R 1 0R2J-L-GP
2
0611_-1 LAN_PCIE_W AKE# 24

R3116
1 0R2J-L-GP
2 PCH_PCIE_W AKE# 17,24,61,63

NON-IOAC
Need level shift for BM

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
A Brook_BH application without get Wistron permission A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LAN (RTL8111G(S))
Size Document Number Rev
A3
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 31 of 106
5 4 3 2 1
5 4 3 2 1

SSID = LAN
XF3201
RJ45_7
1:1
31 MDI3+ 12 13

XRF_TDC1 10 15 MCT1

11 14 RJ45_8
31 MDI3- RJ45
D
9
1:1
16 RJ45_3 RJ45_1
9
1
CHASSIS#9 AFTP TESTPOINT D
31 MDI1+ MDO0+ RJ45_1
RJ45_1 89
7 18 MCT2 RJ45_2 2 RJ45_2
MDO0- RJ45_2 89
RJ45_3 3 RJ45_3
MDO1+ RJ45_3 89
1

C3218 8 17 RJ45_6 RJ45_4 4 RJ45_4


31 MDI1- MDO2+ RJ45_4 89
RJ45_5 RJ45_5
SCD1U16V2KX-L-GP

5 MDO2- RJ45_5 89
RJ45_6 6 RJ45_6
MDO1- RJ45_6 89
2

RJ45_4 RJ45_7 RJ45_7


1:1
31 MDI2+ 6 19 7 MDO3+ RJ45_7 89
RJ45_8 8 RJ45_8
MDO3- RJ45_8 89
4 21 MCT3 10 CHASSIS#10
RJ45_5 RJ45
31 MDI2- 5 20
RJ45-8P-196-GP-U

RJ45_1
1:1
3 22
31 MDI0+ 022.10001.00F1
1 24 MCT4 2nd = 022.10001.0F21
2 23 RJ45_2
31 MDI0-
XFORM-24P-63-GP
68.89240.30D 5V_S5
2nd = 68.IH601.301
3rd = 068.24101.3011 3rd not used

MCT1
MCT2
MCT3
MCT4
6

4
C C
MDI1-

U3201
MDI0+

MDI1+

MDI2+

MDI3+
MDI0-

MDI2-

MDI3-

8
7
6
5
TVLST2304BD0-GP
075.02304.007C RN3212
SRN75J-1-GP

1
2
3
4
2

31 MDI3+
31 MDI3- MCT_R
EC3210 EC3209 EC3203 EC3204 EC3205 EC3206 EC3208 EC3207
1

1
SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

SC6D8P50V2CN-GP

1
31 MDI1- C3217
31 MDI1+ SC100P3KV8JN-2-GP

2
5V_S5

DY DY DY DY DY DY DY DY 12/23 PD
B B
6

U3202
TVLST2304BD0-GP
075.02304.007C
1

31 MDI2+
31 MDI2-

31 MDI0-
31 MDI0+

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
Brook_BH application without get Wistron permission
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(LAN+VGA) CONNECTOR
Size Document Number Rev
A3
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 32 of 106

5 4 3 2 1
5 4 3 2 1

SD_W P
SD_DATA1
SD_DATA0
SD_CD#

10
11
12
13
14
D D

8
9
U3301
RTS5170-GR-GP

SP1
SP2
SP3
SP4
SP5
SP6
SP7
71.05170.003
C3301
2 1 V1.8 24 2 USB_CPU_PN7_R 1 R3303 2 0R0402-PAD-1-GP
V18 DM USB_CPU_PN7 16
SC1U10V2KX-L1-GP 3 USB_CPU_PP7_R 1 R3304 2 0R0402-PAD-1-GP
DP USB_CPU_PP7 16
3D3V_S0 4 3V3_IN R3301
3D3V_CARD_S0 5 1 RREF 2 6K19R2F-GP
1
CARD_3V3 RREF

GPIO0 17
VREG 6 SDREG
23 XD_D7
7 XD_CD# GND 25
1
C3302

SP10
SP11
SP12
SP13
SP14
SP8
SP9
2

SC1U10V2KX-L1-GP
3D3V_CARD_S0

15
16
18
19
20
21
22
CARD1

4 VDD NP1 NP1


SD_DATA2 NP2
SD_DATA3 NP2
SD_CMD SD_CMD 2
SD_CLK_R SD_CLK CMD
5 CLK 12 12
SD_CD# 10 13
C 3D3V_S0 3D3V_CARD_S0 SD_W P CD 13 C
11 WP 14 14
15 15
SD_DATA0 7
SD_DATA1 DAT0
8 DAT1
SD_DATA2 9 3
SD_DATA3 DAT2 VSS
C3303
SC4D7U6D3V3KX-L-GP

C3305
SC4D7U6D3V3KX-L-GP

1 CD/DAT3 VSS 6
1

2
C3304

FC3301

C3306
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SKT-SDCARD-56-GP
2

DY 062.10002.0251

SD_CLK_R 1 R3302 2 SD_CLK


0R0402-PAD-1-GP

1
C3307
1 SD_DATA0

1 SD_DATA1

1 SD_DATA2

1 SD_DATA3

SC6D8P50V2CN-GP
DY
1SD_CMD

2
SD_CLK
C3308
SC22P50V2JN-L-GP

C3309
SC22P50V2JN-L-GP

C3310
SC22P50V2JN-L-GP

C3311
SC22P50V2JN-L-GP

C3312
SC22P50V2JN-L-GP

89 SD_CLK
DY DY DY DY DY
SD_CMD
89 SD_CMD
2

B SD_W P B
89 SD_W P
SD_CD#
89 SD_CD#
SD_DATA0
89 SD_DATA0
SD_DATA1
89 SD_DATA1
SD_DATA2
89 SD_DATA2
SD_DATA3
89 SD_DATA3

AFTP TESTPOINT

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
Brook_BH application without get Wistron permission
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Card Reader CONN (Reserved)
Size Document Number Rev
A3
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 33 of 106

5 4 3 2 1
5 4 3 2 1

USB 3.0 Connector


Pin definition

Low Active 2A 1 POWER


5V_USB30
2 USB 2.0 D-
5V_S5
U3501
5V_USB30_CHARGER
3 USB 2.0 D+
5 IN OUT 1 4 GND
GND 2
D 4 EN# OC# 3 5 StdA_SSRX- SuperSpeed RX D
1

1
C3501
SC1U10V2KX-L1-GP
C3502 C3503 6 StdA_SSRX+
SY6288DAAC-GP

SCD1U16V2KX-L-GP
SC100U6D3V6MX-GP
2

1
C3504 7 GND

2
2nd = 074.00524.0C9F SC100U6D3V6MX-GP
3rd = 074.22802.0A9F 8 StdA_SSTX- SuperSpeed TX

2
24,66 USB_PW R_EN# 9 StdA_SSTX+

074.06288.009B
USB2
5V_USB30_CHARGER
EL3501 USB30_TX_CON_P1
10
9
CHASSIS CHASSIS
13 AFTP TESTPOINT
2 1 USB_CON_PN0 1
36 USB_CHAR_PN0
USB30_TX_CON_P1
USB_CON_PP0 USB30_TX_CON_N1 USB30_TX_CON_N1 USB30_TX_CON_P1 89
36 USB_CHAR_PP0 3 4 8 USB30_TX_CON_N1 89
USB_CON_PN0 2
MCM1012B900FBP-GP-U 7 USB_CON_PN0
USB_CON_PP0 USB_CON_PP0 USB_CON_PN0 89
68.01012.201 3 USB_CON_PP0 89
2nd = 68.00396.001 USB30_RX_CPU_P1 6
3rd = 69.10118.001 4 USB30_RX_CPU_P1
USB30_RX_CPU_N1 USB30_RX_CPU_N1 USB30_RX_CPU_P1 16,89
5 USB30_RX_CPU_N1 16,89
11 12
CHASSIS CHASSIS

EU3501 SKT-USB13-24-GP-U1
C USB30_TX_CON_P2 C
USB30_TX_CON_P2 89
16,89 USB30_RX_CPU_N1 1
2
LINE_1 NC#10 10
9
USB30_RX_CPU_N1
USB30_RX_CPU_P1 22.10339.571 USB30_TX_CON_N2
USB30_TX_CON_N2 89
16,89 USB30_RX_CPU_P1 LINE_2 NC#9
3 8 USB_CON_PN1
SCD1U16V2KX-L-GP C3508 GND GND USB30_TX_CON_N1 USB_CON_PP1 USB_CON_PN1 89
16 USB30_TX_CPU_N1 2 1 4 LINE_3 NC#7 7 USB_CON_PP1 89
SCD1U16V2KX-L-GP 2 1 C3509 5 6 USB30_TX_CON_P1
16 USB30_TX_CPU_P1 LINE_4 NC#6 USB30_RX_CPU_P2
USB30_RX_CPU_N2 USB30_RX_CPU_P2 16,89
AZ1045-04F-R7G-GP USB30_RX_CPU_N2 16,89

75.01045.073
2nd = 075.00550.0071 EU3503
3rd = 75.01045.073
USB_CON_PN1 1 6 USB_CON_PP1
I/O1 I/O4
2 GND VDD 5 5V_S5
USB_CON_PN0 3 4 USB_CON_PP0
I/O2 I/O3

AZC099-04S-1-GP
75.09904.07C
11/18 SB Change to 5V_S5
2nd = 75.00005.C7C
3rd = 075.01256.007C
EL3502
B USB_CON_PN1 B
16 USB_CPU_PN1 2 1

3 4 USB_CON_PP1
16 USB_CPU_PP1 5V_USB30 USB1
MCM1012B900FBP-GP-U 10 CHASSIS CHASSIS
13
68.01012.201 USB30_TX_CON_P2 9
2nd = 68.00396.001 1
3rd = 69.10118.001
USB30_TX_CON_N2 8
USB_CON_PN1 2
7
USB_CON_PP1 3
EU3502 USB30_RX_CPU_P2 6
4
1 10 USB30_RX_CPU_N2 USB30_RX_CPU_N2 5
16,89 USB30_RX_CPU_N2 LINE_1 NC#10
2 9 USB30_RX_CPU_P2 11 12
16,89 USB30_RX_CPU_P2 LINE_2 NC#9
3 GND GND 8 CHASSIS CHASSIS

SCD1U16V2KX-L-GP 2 1 C3511 4 7 USB30_TX_CON_N2 SKT-USB13-24-GP-U1


16 USB30_TX_CPU_N2 LINE_3 NC#7
SCD1U16V2KX-L-GP 2 1 C3510 5 6 USB30_TX_CON_P2
16 USB30_TX_CPU_P2 LINE_4 NC#6
22.10339.571
AZ1045-04F-R7G-GP

75.01045.073 Wistron Confidential document, Anyone can not


2nd = 075.00550.0071 Duplicate, Modify, Forward or any other purpose
3rd = 75.01045.073 Brook_BH application without get Wistron permission
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB_3.0
Size Document Number Rev
A3
Brook_BH -1M
Date: Tuesday, February 10, 2015 Sheet 35 of 106

5 4 3 2 1
5 4 3 2 1

5V_S5

1
DY C3605 5V_USB30_CHARGER

2
D C3604 D

SC10U10V5KX-L1-GP
R3605 R3602

2
10KR2J-3-GP U3603

10KR2J-3-GP
SCD1U16V2KX-L-GP
DY DY

SCD1U16V2KX-3GP

SC1KP50V2KX-1GP
1

1
1 12 EC3604 EC3603
IN OUT

1
add by 10/3
13 16 USB_CHAR_ILIM_HI 23K2R2F-GP 1 R3604 2
FAULT# ILIM_HI

2
15 USB_CHAR_ILIM_LO 33KR2F-2-GP 1 R3607 2
ST_R ILIM_LO
9 STATUS#
DM_IN 11 USB_CHAR_PN0 35
24 USB_CHAR_SEL
USB_CHAR_SEL 4 ILIM_SEL DP_IN 10 USB_CHAR_PP0 35 To Connector
24 USB_CHARGER_EN 2 R3639 1 0R0402-PAD-1-GP
USB_CHARGER_EN_R 5 EN DM_OUT 2 USB_CPU_PN0 16
DP_OUT 3 USB_CPU_PP0 16 To PCH
24 USB_CHAR_CT1 2 R3640 1 0R0402-PAD-1-GP USB_CHAR_CT1_R 6 CTL1
7 CTL2 GND 14
USB_CHAR_CT3 8 17
CTL3 GND

G3703R41D-GP
074.03703.0093
TPS2544RTER-GP P/N:74.02544.073

C C
20150115 -1

B B

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
Brook_BH application without get Wistron permission
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB Charger
Size Document Number Rev
A3
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 36 of 106

5 4 3 2 1
5 4 3 2 1

3D3V_USB3_S0 3D3V_S0
C3735
HW_3D C3734
1 2 C3736 SCD1U16V2KX-L-GP 1D05V_S0

1
SCD1U16V2KX-L-GP
2
1 2
HW_3D U3702

USB3_URXP_UP
C3730 SCD1U16V2KX-L-GP
HW_3D C3729 6 VDD10 U3RXDP1 31
USB3_URXN_UP
USB3_URXP_UP 38
HW_3D 1
C3731
2
SCD01U50V2KX-L-GP
1 2
SCD01U50V2KX-L-GP HW_3D 9
21
VDD10 U3RXDN1 32
40
USB3_URXN_UP 38
VDD10 U3RXDP2
1 2
HW_3D C3728 30 VDD10 U3RXDN2 41
D
SCD01U50V2KX-L-GP 1 2
SCD01U50V2KX-L-GP HW_3D 33
39
VDD10
28 USB3_UTXP0_UP D
VDD10 U3TXDP1 USB3_UTXP0_UP 38
C3720 3D3V_S0 42 29 USB3_UTXN0_UP
VDD10 U3TXDN1 USB3_UTXN0_UP 38
1D05V_S0 1 2
SCD01U50V2KX-L-GP HW_3D 12
U3TXDP2 37
38
C3762 C3724 VDD33 U3TXDN2
22 VDD33
HW_3D 1
C3760
2
SCD1U16V2KX-L-GP
1 2
SCD01U50V2KX-L-GP HW_3D 3D3V_USB3_S0
34
43
VDD33 PECLKP 1
2
USB_CLK_CPU 18
USB_CLK_CPU# 18
VDD33 PECLKN
1 2
HW_3D C3725
C3761 SCD1U16V2KX-L-GP 1 2
HW_3D 3 AVDD33 PERXP 7 PCIE_TX_USB_P2 16
HW_3D 1 2 SCD01U50V2KX-L-GP 25 AVDD33 PERXN 8 PCIE_TX_USB_N2 16
C3721 SCD1U16V2KX-L-GP
PCIE_RX_USB_P2 HW_3D 2 SCD1U16V2KX-L-GP PCIE_RX_CPU_P2
1
C3722
2
SCD01U50V2KX-L-GP HW_3D 35
PETXP 4
5 PCIE_RX_USB_N2
C3744 1
C3739 1 2 SCD1U16V2KX-L-GP PCIE_RX_CPU_N2
PCIE_RX_CPU_P2 16
U2DP1 PETXN PCIE_RX_CPU_N2 16
HW_3D 1
C3723
2
SCD01U50V2KX-L-GP
36 U2DM1
47 PLT_RST#1HW_3D 1 R3726 2
PERST# PLTRST#_PCH 17,24,31,40,61,63,68,89,91
1
C3732
2
SCD01U50V2KX-L-GP HW_3D 3D3V_S0 RN3705
44
45
U2DP2 PEWAKE# 48
10 USB3_PCIE_CLKRQ0#1
0R0402-PAD-1-GP
1 R3727 2 USB_CLKREQ_CPU# 18
U2DM2 PECREQ#
HW_3D 1
C3733
2
SCD01U50V2KX-L-GP 1
SRN10KJ-L-GP
4 3V3OCI 19 15 SPI_CLK_RD3
0R0402-PAD-1-GP

3V3OCI2 OCI1# SPISCK SPI_CS#_RD3


1
C3737
2
SCD01U50V2KX-L-GP HW_3D 2 3 17 OCI2# SPICS# 14
16 SPI_DO_RD3
SPISI SPI_DI_RD3
HW_3D 1 2
SCD01U50V2KX-L-GP HW_3D 20
18
PPON1 SPISO 13
PPON2
C
XTL_24M_X1_CPU 24 26 RREF_RR 1 R3701 2
HW_3D C

XTL_24M_X2_CPU XT1 RREF 10Mil 1K6R2F-GP


23 XT2 IC_L 27

PORST# 11
R3712 1 10KR2F-L1-GP USB_SMI# PONRST#
2 46 SMI# GND 49

DY UPD720202K8-701-BAA-A-GP-U

HW_3D
3D3V_S0

HW_3D

1
3D3V_USB3_S0 3D3V_S0
R3713 R3709 3D3V_S0
10KR2F-L1-GP 10KR2F-L1-GP
1 R3752 2
0R0603-PAD
HW_3D

2
HW_3D

1
B
HW_3D C3764 B
X3702
3D3V_S0 SCD1U16V2KX-L-GP

2
U3701
XTL_24M_X2_CPU 3 2
SPI_CS#_RD3 1 8
SPI_DI_RD3 CS# VCC
HW_3D R3755 HW_3D 2 SO NC#7 7
K

3V3P11 3 6 SPI_CLK_RD3
D3701 R3730 XTL_24M_X1_CPUR XTL_24M_X1_CPU WP# SCLK SPI_DO_RD3
4 1 1 2 4 GND SI 5
SBR0230T5-7-GP 100KR2J-4-GP
680R2F-GP
1

MX25L5121EMC-20G-GP
XTAL-24MHZ-81-GP
A

PORST# C3727
SC15P50V2JN-L-GP C3726
HW_3D
2
1

SC15P50V2JN-L-GP
HW_3D
2

C3763
HW_3D
SCD1U16V2KX-L-GP HW_3D
2

HW_3D Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Brook_BH

A
Wistron Corporation A

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title

PCIE to USB
Size Document Number Rev
B
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 37 of 106
5 4 3 2 1
5 4 3 2 1

D D

3D3V_S0
U3801
3D_Camera USB3_UTXN0
1 VCC DEVICE_TX1- 23
13 22 USB3_UTXP0
VCC DEVICE_TX1+

HOST_TX2- 11 USB3_URXN_UP_C C3840


1 SCD1U16V2KX-L-GP
2
HW_3D USB3_URXN_UP 37
R3827 2 10KR2J-L-GP
1
3D_Camera
U3RE_EQ1 2 EQ1 HOST_TX2+ 12 USB3_URXP_UP_C 1 2
HW_3D USB3_URXP_UP 37
1

C3815 C3812 C3813 C3819


R3811 2 10KR2J-L-GP
1
DY U3RE_EQ2 17 EQ2
C3841 SCD1U16V2KX-L-GP

R3814 2 10KR2J-L-GP
DY RR1 USB3_UTXN0_UP_C C3842 SCD1U16V2KX-L-GP
HW_3D
3D_Camera
SCD01U50V2KX-L-GP

1 4 8 1 2
SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

OS1 HOST_RX1- USB3_UTXN0_UP 37


2

DY R3815 2 10KR2J-L-GP
1
DY RR2 15 OS2 HOST_RX1+ 9 USB3_UTXP0_UP_C 1
C3843
2
SCD1U16V2KX-L-GP HW_3D USB3_UTXP0_UP 37
3D_Camera

3D_Camera

R3855 2 10KR2J-L-GP
1
3D_Camera
U3RE_DE1 3 DE1 DEVICE_RX2- 20 USB3_URXN0
R3813 2 10KR2J-L-GP
1
3D_Camera
U3RE_DE2 16 DE2 DEVICE_RX2+ 19 USB3_URXP0

C R3825 2 10KR2J-L-GP
1
DY U3RE_EN_RXD 5
14
EN_RXD
6
C

RSVD GND
GND 10
GND 18
7 NC#7 GND 21
24 NC#24 GND 25

HPA02232ARGER-GP
71.02232.003
20141013 Rober
3D3V_S0

8+*$&%$0&*?,6$0 5V_CAMERA_S0

5V_S0

R3818 10KR2J-L-GP
B,0*/0,&;6$44*8+*$&%$0&
1 2
3D_Camera U3RE_EN_RXD

R3824 2 10KR2J-L-GP
1
DY RR1 BW_3D C3807

1
USB3_URXN_UP_C SCD1U16V2KX-L-GP
2 1 C3850

SC1U10V2KX-L1-GP
USB30_RX_CPU_N3 16

SC1U10V2KX-L1-GP
USB3_URXP_UP_C SCD1U16V2KX-L-GP
2 1 C3851 C3816 DY
USB30_RX_CPU_P3 16
R3826 2 10KR2J-L-GP
1
DY RR2 BW_3D 3D_Camera

2
USB3_UTXN0_UP_C SCD1U16V2KX-L-GP
2 1 C3848
USB3_UTXP0_UP_C SCD1U16V2KX-L-GP C3849 USB30_TX_CPU_N3 16
2 1 USB30_TX_CPU_P3 16
B BW_3D B
BW_3D U3802

3D3V_S0 5 1 C3817
IN OUT
GND 2

1
20 CCD_PW R_EN# 4 3

SC1U10V2KX-L1-GP
EN# OC# C3814
SC10U10V5KX-L1-GP
R3820 2 10KR2J-L-GP
1
DY U3RE_EQ1 CAM1

2
11 SY6288DAAC-GP
074.06288.009B

2
1 R3838 2nd = 074.00524.0C9F
3rd = 074.22802.0A9F DY
3D_Camera

100KR2J-4-GP
R3821 2 10KR2J-L-GP
1
DY U3RE_EQ2 2 USB3_URXN0 DY
3
4
USB3_URXP0
3D_Camera 3D_Camera

1
5 CCD_UTXN0 C3846 1 SCD1U16V2KX-L-GP
2 USB3_UTXN0
R3822 2 10KR2J-L-GP
1
DY U3RE_DE1 6 CCD_UTXP0 C3847 1 SCD1U16V2KX-L-GP
2 USB3_UTXP0 20140926 change to low enable by Brian
7
8 FW _GPIO35 R3836 1 3D_Camera
2 0R0402-PAD-1-GP FW _GPIO 20
9 Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
R3823 2 10KR2J-L-GP
1
DY U3RE_DE2 10 5V_CAMERA_S0 application without get Wistron permission
12
Preserve schematic IPEX-CON10-1-GP

3D3V_S0
3D_Camera
Brook_BH
A A
20.K0329.010
R3819 10KR2J-L-GP Wistron Corporation
1 2
DY FW _GPIO 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB Redriver
Size Document Number Rev
A3
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 38 of 106
5 4 3 2 1
5 4 3 2 1

D D

3D3V_S5 3D3V_SUS
C C

R3901 1 2 0R0402-PAD-1-GP

U3901
DY_DS3 DY_DS3
DY_DS3
1

1
C3901 5 1 C3902
SC4D7U6D3V3KX-L-GP IN OUT SC4D7U6D3V3KX-L-GP
GND 2
DS3_PWRCTL 4 3
EN OC#
2

2
1

DY_DS3 G524B1T11U-GP
R3902
0R2J-L-GP 074.00524.0B9F
2

PM_SLP_SUS# 17,24

B B

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
Brook_BH application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

DS3
Size Document Number Rev
A4
Brook_BH -1M
Date: Wednesday, February 04, 2015 Sheet 39 of 106
5 4 3 2 1
5 4 3 2 1

Power Sequence

7,48,51 1D05V_S0_PWRGD 2 R4014 1 0R0402-PAD-1-GP ALL_SYS_PWRGD 24


7,26,46 IMVP_PWRGD 2 R4006 1 0R0402-PAD-1-GP PCH_PWROK 17

D4001
D 1 D

3 BAS16PT-GP
17,24,48,51 PM_SLP_S3#
83.00016.F11
2 2ND = 83.00016.K11
3RD = 83.00016.H11

ANNIE Run Power 3V_SYS_OUT 3D3V_S0 5V_SYS_OUT_2 5V_S0

PG4006 PG4001
1 2 1 2
1 R4032 2 VTT_PWR
17,24,48,51 PM_SLP_S3#
0R0402-PAD-1-GP GAP-CLOSE-PWR GAP-CLOSE-PWR

PG4007 PG4002
1 2 1 2

5V_S5 3D3V_S5 GAP-CLOSE-PWR GAP-CLOSE-PWR


U4001
3V_SYS_OUT PG4008 PG4003
15 1 2 1 2
GND
1 14
VIN1#1 VOUT1#14
2 13 GAP-CLOSE-PWR GAP-CLOSE-PWR
VIN1#2 VOUT1#13 VTT_CT_3D3VC
3 12
ON1 CT1 5V_SYS_OUT_2 PG4009 PG4004
4 11
VTT_PWR VBIAS GND VTT_CT_5VC
5 10 1 2 1 2
ON2 CT2
6 9
VIN2#6 VOUT2#9
7 8 GAP-CLOSE-PWR GAP-CLOSE-PWR
VIN2#7 VOUT2#8
C PG4010 PG4005 C
TPS22966DPUR-GP DY DY 1 2 1 2

1
74.22966.093 C4009 C4005
1

DY 2nd = 74.03523.A73

SC47P50V2JN-3GP

SC47P50V2JN-3GP
GAP-CLOSE-PWR GAP-CLOSE-PWR

2
C4033 C4006 C4032 C4007 3rd = 074.05016.0093 2
C4010

2
SC1U10V2KX-L1-GP

SC22U6D3V5MX-L3-GP

SC1U10V2KX-L1-GP

SCD1U25V2KX-L-GP C4012 SCD1U16V2KX-L-GP


2

SCD1U25V2KX-L-GP

1
DY
DY

2
DY C4013
C4008 SCD1U16V2KX-L-GP

1
SC22U6D3V5MX-L3-GP
Discharge circuit

B 1D05V_S0 B
1

R4007
1KR2J-L2-GP
2

H_THERMTRIP# 20

DY
E

Q4002
B MMBT2222A-3-GP
84.02222.V11
C
2

R4009 C4011
H_PWRGD_R
SCD1U16V2KX-L-GP

17,24,31,37,61,63,68,89,91 PLTRST#_PCH 1 2
4K7R2J-L-GP DY
1
1

DY 1D5V_S0
DY R4010
2K2R2J-L1-GP Q4010 3D3V_S5
220R3F-1-GP 1 R4005 2 1D5V_DIS_Q 3 4
2

2 2 5
17,24,48,51 PM_SLP_S3#
R4016
3 1 6 1D5V_DIS 2 1
PURE_HW_SHUTDOWN# 24,26
1 BAS16PT-GP 2N7002KDW-GP 100KR2J-4-GP
45 3V_5V_EN
83.00016.F11 84.2N702.A3F
D4002 2ND = 83.00016.K11 2nd = 75.00601.07C
3RD = 83.00016.H11 3rd = 84.2N702.F3F

R4012
11/18 D3602 change to D4002
2 1 S5_ENABLE# 24,89
2KR2F-L1-GP
A A

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission

Brook_BH

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Connected Standby1
Size Document Number Rev
A2
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 40 of 106
5 4 3 2 1
5 4 3 2 1

Battery Connector
Battery Reset
12V_BT+_connector
3D3V_RTC_AUX

BAT_RST
Battery Insert
1

1
D PR4301 DY D
PC4301

SCD1U25V2KX-L-GP
1MR2J-1-GP
RESET1

2
BIS
2

T1 T2 BATT1
9
1
T5 T6
PN4301 2 SW 1
1 8 89 BI 3
T3 T4 2 7 BAT_IN#_1 4 T1 T2
24,44,89 BAT_IN#
3 6 BATA_SCL_1 5
24,44,89 BAT_SCL
4 5 BATA_SDA_1 6
SW -TACT-6P-GP 24,44,89 BAT_SDA
7 T5 T6
62.40009.B71 SRN33J-7-GP-U 8
2nd = 62.40009.D51 3D3V_RTC_AUX
10
T3 T4

BAT_RST
ACES-CON8-53-GP
SW -TACT6-1-GP-U

20.F2132.008

1
62.40009.D51
DY PR4309 2nd = 62.40009.B71
10MR2J-L-GP

G
2nd = 020.F0043.0008

2
BIS S D BI 3rd = 20.F2464.008

C C
PQ4301

2
PR4306 DMN5L06K-7-GP
LAB 0R2J-L-GP

1
2/5 PD Rober
2/5 PD Rober

PU4302
TPCC8131-GP 19V_AD+
19V_AD_JK 84.08131.037
2nd = 084.03307.0037
1 S D 8
2 S D 7
B B

!&&. *),4-'(,.
3 S D 6
PR4305 PC4304 D 5
G

200KR3F-GP

SC1U50V5ZY-1-GP-U
1

4
1
!;&9',0*(.*',*F$.$0&'$*+$/!6%46

2
PW R_AD+_2

2
PQ4304
19V_AD_JK PQ4303
R2
E
DCIN1 3 PW R_ADJK_EN B
7 1 R1 R1
C
24 AD_OFF
1 2
R2 PDTA124EU-1-GP

1
2 LTC024EUB-FS8-GP 84.00124.K1K
K

3 84.00024.A1K 2nd = 84.00024.01K PR4304


1

4 PC4306 PC4305 2ND = 84.00124.H1K 3rd = 84.05124.A11 100KR2J-4-GP


3rd = 84.05124.011
SC1U50V5ZY-1-GP-U

SCD1U50V3KX-L-GP

5
6
2

2
8
A

ACES-CON6-40-GP
20.F0818.006
PD4310
P6SMBJ20A-GP
83.P6SMB.AAG
2nd = 083.00020.00AG
A Brook_BH A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
DCIN JACK&BATT CONN
Size Document Number Rev
A3
Brook_BH -1M
Date: Thursday, February 05, 2015 Sheet 43 of 106
5 4 3 2 1
5 4 3 2 1

SSID = Charger AD+_TO_SYS 19V_DCBATOUT


12V_BT+
PU4401
TPCC8131-GP 45/90W PU4402
19V_AD+ 8 D S 1 PR4404
7 D S 2 1 2 1 S D 8

1
6 D S 3 PR4421 2 S D 7
D D01R3721F-GP-U S D 6

100KR2F-L3-GP
5 3
G D 5
G
84.08131.037

4
1
2nd = 084.03307.0037 TPCC8131-GP

4
2

2
84.08131.037
PR4423 AD+_G_2 PG4401 PG4402 19V_AD+
2nd = 084.03307.0037
10KR2F-L1-GP GAP-CLOSE-PWR GAP-CLOSE-PWR

1
PR4409

1
PR4422 0R2J-L-GP
10KR2F-L1-GP

DC_IN_D
1 2
DY

1
PR4411
D D
PQ4401

2
1 2 470KR2J-L1-GP

AD+_G_1
3 4 PC4403
SCD1U25V2KX-L-GP

2
PWR_CHG_ACOK 2 5

1 6 19V_DCBATOUT

19V_AD+

2
45W 90W 2N7002KDW-GP 84.2N702.A3F
PC4402 PC4404

PWR_CHG_ACN
PWR_CHG_ACP
PR4404 20m(64.R0205.7FL) 10m(64.R0105.7FL) 2nd = 75.00601.07C

SCD1U25V2KX-L-GP
SCD1U25V2KX-L-GP

1
PWR_CHG_REGN
PR4407 60.4K(64.60425.6DL) 60.4K(64.60425.6DL) 1 2 PWR_CHG_VCC DY

1
PC4405 PC4425 PC4406
CHG_AGND

1
PR4415 PC4401 CHG_AGND PC4409
PR4401 100K(64.10035.L3L) 100K(64.10035.L3L)

SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP

SCD1U25V2KX-L-GP
5
6
7
8
PR4406 10R5J-GP SCD47U25V3KX-1GP PD4403 SC1U10V2KX-L1-GP

2
D
D
D
D
316KR2F-GP PR4408

2
1 2 PWR_CHG_BTST_R
K A 1 2 PU4404
2 CHG_AGND

1
PU4403 0R3J-L1-GP SM3319NSQAC-TRG-GP

SCD047U25V2KX-GP
CH520S-30GP-GP-U 2nd = 84.07410.A37

PC4417
4

G
ACN
ACP
PWR_CHG_REGN

1
PWR_CHG_IOUT 2nd = 83.1R003.I8F 3rd = 84.08067.A37

S
S
S
20
VCC

1
PR4431

3
2
1
PR4407 3rd = 83.R2003.B8M

2
R1 60K4R2F-GP 10KR2F-L1-GP PWR_CHG_ACDET6 17 PWR_CHG_BTST
ACDET BTST
1

PR4410
$,&6 $>**;H;H8

2
49K9R2F-L-GP PC4410 AC_Protect 16
REG
SCD01U50V2KX-L-GP +$#=*8;I:*%%#%
Charger Current=1.4~3.6A
2

3D3V_AUX_S5

1
PR4401 PR4402 3
CMPOUT DY .;"*=*9>9*!*3*.)&'*=*>*!
2

RN4415 18 PWR_CHG_HIDRV
PWR_CHG_ILIM 100KR2F-L3-GP 3D3MR2J-GP HIDRV 12V_BT+
1 8 R2 1 2 PR4417
2 7 AC_IN# 4 PL4401
PWR_CHG_ACOK CMPIN PWR_CHG_PHASE PC4413 BT+_R
3 6
PHASE
19 1 2 1 2 /&''$0:*.*!$.)$
2

2
4 5 PWR_CHG_CMPIN SC3300P50V2KX-1GP IND-4D7UH-173-GP-U
68.4R71C.10K D01R3721F-GP-U
SRN100KJ-L-GP CHG_AGND PWR_CHG_BAT_SCL 9 15 PWR_CHG_LODRV 2nd = 68.4R710.20D
CHG_AGND SCL LODRV PC4420 PC4421 PC4422

1
20141216 -1
adapter 65W and 90W

5
6
7
8
PWR_CHG_BAT_SDA 74.02224.073 PC4423

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
8 1 2
C SDA C
AC mode (default:120% ):

D
D
D
D
PR4425 PU4405 SCD1U25V2KX-L-GP

2
2

2
10R2F-L-GP SM3319NSQAC-TRG-GP PG4417 GAP-CLOSE-PWR
set up the value by PR4401 and PR4407
PWR_CHG_ILIM SRP
13 PWR_CHG_SRP 1 2 084.03319.0A37 PG4403 PG4404
2nd = 84.07410.A37

GAP-CLOSE-PWR
10 GAP-CLOSE-PWR
ILIM

1
PQ4406 12 PWR_CHG_SRN 1 2 4 3rd = 84.08067.A37 1 2

G
SRN

1
PWR_CHG_ACOK 3D3V_AUX_S5 PR4424 PC4419

S
S
S
4 3
1

DY PWR_CHG_BM# 11 7D5R2F-GP PG4416 GAP-CLOSE-PWR

SCD1U25V2KX-L-GP
BM#

3
2
1
PR4426
AC_IN# 5 2 CHG_ON# 24
100KR2J-4-GP DY 20141216 -1
PWR_CHG_ILIM 6 1 1 2
PR4413 CHG_AGND
?4::*:1?4::*9*"#&.F$*',*!.!:>< 1 2
2

2N7002KDW-GP PR4405 5 7 PWR_CHG_IOUT 1 2 AD_IA 24 PG4414 GAP-CLOSE-PWR


10KR2F-L1-GP ACOK# IOUT 0R2J-L-GP PWR_CHG_CSOP_1
84.2N702.A3F

GND

GND
3D3V_AUX_S5 12V_BT+_connector
2nd = 75.00601.07C
12V_BT+

1
1 2
PC4416

8K45R2F-2-GP
Wistron Confidential document, Anyone can not
HPA02224RGRR-1-GP

PR4428
21

14
SCD1U25V2KX-L-GP Duplicate, Modify, Forward or any other purpose PG4415 GAP-CLOSE-PWR

2
1
2

application without get Wistron permission

SC220P50V2JN-3GP
24 PWR_CHG_BM# PG4413
RN4412

PC4411
1 2
BATT_SENSE_G
SRN2K2J-5-GP !;;*?#:)8)1?#::8; 2 1

1
PG4412
GAP-CLOSE-PWR
<*>>>*)>;

2
CHG_AGND GAP-CLOSE-PWR PC4412
DY
4
3

SCD1U25V2KX-L-GP PG4409 PG4411

GAP-CLOSE-PWR

GAP-CLOSE-PWR
2
2 1 PWR_CHG_BAT_SCL CHG_AGND
24,43,89 BAT_SCL

1
PG4408 GAP-CLOSE-PWR
CHG_AGND
2 1 PWR_CHG_BAT_SDA
24,43,89 BAT_SDA
PG4410 GAP-CLOSE-PWR
CHG_AGND

AC_IN#
24 AC_IN# PC4431 PC4429 PC4430
2 1 1 2 1 2

SCD1U25V2KX-L-GP SCD1U25V2KX-L-GP SCD1U25V2KX-L-GP


3D3V_S0
Bmon+_R 3D3V_S0
B B
DC_PROTECT DC_PROTECT

1
Bmon-_R DC_PROTECT

1
5V_S0 PR4412 Bmon-_R
100KR2J-4-GP PR4414
PR4446 100KR2J-4-GP Bmon+_R
2D2R2F-GP

2
1 2 PU4407

2
DC_PROTECT DC_PROTECT
SC1U10V2KX-L1-GP

DC_PROTECT
PC4415

1 10
PQ4408 BATT_OCPUVP_VCC CSP CSN BATT_OCPUVP_ASSERT
2 9
VCC PROCHOT#
1

4 3 BATT_OCPUVP_ILIM 3 8 BATT_OCPUVP_RESET
DGPUHOT# 79 BATT_OCPUVP_EN ILIM RESET BATT_OCPUVP_OVPSET
4 7
EN OVSET
AC_Protect 1 PR4444 2 AC_Protect_R1 5 2 AC_Protect_R 1 PR4441 2 AC_Protect DC_PROTECT BATT_OCPUVP_TIMER 5 6 BATT_OCPUVP_UVPSET

GND
TIMER UVSET
2

0R0402-PAD-1-GP 0R0402-PAD-1-GP
6 1 3D3V_S0
4,24,46 PROCHOT#_CPU
1

RT9553AGQW-GP

11
2N7002KDW-GP PR4450
/&''$0:*%$? #8 #:
1

124KR2F-GP

1
84.2N702.A3F DY
2nd = 75.00601.07C PC4426 DC_PROTECT PR4432
SCD01U50V2KX-L-GP 165KR2F-GP #8 7*$$44*D8!<?E ;! >*9" 9<>8"
+$F4("'#*6(%$*!$''(.F DC_PROTECT
2

:*$$44*D:!>?E :! >79" 9<>8"


><9"*(J*+$F4('"#*'(%$*=*9-)

2
8;9"*(J*+$F4('"#*'(%$*=*>9-) DC_PROTECT
BATT_OCPUVP_ILIM
/&''$0:*4+? #9 #7

1
PR4418 DC_PROTECT
52K3R2F-L-GP
7*$$44*D8!<?E =+ >79" ;>>9"
#:
4,24,46 PROCHOT#_CPU :*$$44*D:!>?E ><+ >>*" ;>>9"

2
/&''$0:*%$?*)$''(.F
3D3V_S0 /&''$0:*%+? #; #)
7*$$44*D8!<?E >8><+ =*>=" ;>>9"
PQ4410 3D3V_S0 3D3V_S0
1

2 PR4451 1 BATT_OCPUVP_ASSERT PR4439


3D3V_S0 PR4447 DC_PROTECT 0R0402-PAD-1-GP DC_PROTECT :*$$44*D:!>?E >;>7+ 9>>>" ;>>9"
100KR2J-4-GP
DC_PROTECT
4 3
DC_PROTECT 10KR2F-L1-GP
DC_PROTECT

1
2 1 PWR_BAT_UVPMON_BT+_R 5 2 BATT_OCPUVP_ACT
PQ4413
PR4433 DC_PROTECT PR4435
2

110KR2F-GP 51K1R2F-GP
A 6 1 24,43,89 BAT_IN# G #9 #; DC_PROTECT A
2 PR4452 1 BATT_OCPUVP_RESET
84.2N702.A3F 0R0402-PAD-1-GP D BATT_OCPUVP_EN
2N7002KDW-GP

2
BATT_OCPUVP_UVPSET BATT_OCPUVP_OVPSET
DC_PROTECT
1

2nd = 75.00601.07C S Wistron Confidential document, Anyone can not

1
PC4414 Duplicate, Modify, Forward or any other purpose
PR4434 PR4436 Brook_BH
2N7002K-2-GP SCD1U25V2KX-L-GP
DC_PROTECT DC_PROTECT DC_PROTECT application without get Wistron permission
2

71K5R2F-1-GP 71K5R2F-1-GP
84.2N702.J31 #7 #)
2ND = 84.2N702.031 Wistron Corporation

2
/&''$0:*4+?*)$''(.F /&''$0:*%+?*)$''(.F 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

2 PR440 1 BATT_OCPUVP_ACT Title


24 DC_Protect_EC 0R0402-PAD-1-GP

DC_PROTECT CHARGER_HPA02224
Size Document Number Rev
Custom
Brook_BH -1M
Date: Wednesday, February 04, 2015 Sheet 44 of 106
5 4 3 2 1
5 4 3 2 1

SSID = PWR.Plane.Regulator_3p3v5v
PWR_3D3V 3D3V_S5 PWR_5V 5V_S5

19V_DCBATOUT PWR_DCBATOUT_3D3V PG4507 19V_DCBATOUT PWR_DCBATOUT_5V PG4515


1 2 1 2
PG4504
PG4501 GAP-CLOSE-PWR 1 2 GAP-CLOSE-PWR
1 2 PG4508 PG4516
1 2 GAP-CLOSE-PWR 1 2
GAP-CLOSE-PWR PG4505
PG4502 GAP-CLOSE-PWR 1 2 GAP-CLOSE-PWR
1 2 PG4509 PG4517
1 2 GAP-CLOSE-PWR 1 2
GAP-CLOSE-PWR PG4506
D PG4503 GAP-CLOSE-PWR 1 2 GAP-CLOSE-PWR D
1 2 PG4510 PG4518
1 2 GAP-CLOSE-PWR 1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR GAP-CLOSE-PWR
PG4511 PG4519
1 2 1 2

GAP-CLOSE-PWR GAP-CLOSE-PWR
PG4512 PG4520
1 2 1 2

GAP-CLOSE-PWR GAP-CLOSE-PWR
PG4513
1 2

GAP-CLOSE-PWR
PG4514
1 2

GAP-CLOSE-PWR

19V_DCBATOUT
1

PC4510
DY ST15U25VDM-1-GP
2

PWR_DCBATOUT_3D3V
19V_DCBATOUT PWR_DCBATOUT_5V

PC4501 PC4509 PC4511


DY
2

2
SC10U25V5KX-GP

SC10U25V5KX-GP

PC4512 PC4522 PC4515

5
6
7
8
PC4513

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
PC4502
SCD1U25V2KX-L-GP

D
D
D
D
SCD1U25V2KX-L-GP
C SCD1U25V2KX-L-GP C
1

1
PU4504
8
7
6
5 PU4501 SM3319NSQAC-TRG-GP
D
D
D
D
RT6575DGQW-GP 084.03319.0A37
PU4502 084.03319.0A37 074.06575.0A43 4 2nd = 84.07410.A37

G
12
2nd = 84.07410.A37 3rd = 84.08067.A37

S
S
S
Iomax=4.83A SM3319NSQAC-TRG-GP 3rd = 84.08067.A37

VIN

3
2
1
012314567$87/8$9$87#:$9$-7+;; 4 PC4518 012314567$87/8$9$87#:$9$-7+;;
G

( 4.0+0.83 ) PC4517 PR4508 PR4509 SCD1U25V2KX-L-GP


S
S
S

<!=>$"/? +$;!"; SCD1U25V2KX-L-GP 2D2R3F-L-GP 2D2R3F-L-GP <!=>$"/? +$;!"; Design Current = 6.625A
OCP>7.3A
1
2
3

#$%$>$/($,$#&1'$>$"#( 2 1 PWR_3D3V_BOOT2_A 1 2 PWR_3D3V_BOOT2 9 17 PWR_5V_BOOT1 1 2 PWR_5V_BOOT1_A 2 1 #$%$>$/($,$#&1'$>$"#(


BOOT2 BOOT1 3.625+3.0
PWR_3D3V PWR_3D3V_HG2 10 16 PWR_5V_HG1 PWR_5V 10A<OCP
PL4501 UGATE2 UGATE1 PL4502
1 2 PWR_3D3V_PH2 8 18 PWR_5V_PH1 1 2
IND-2D2UH-122-GP-U PHASE2 PHASE1 IND-2D2UH-122-GP-U
PWR_3D3V_LG2 PWR_5V_LG1
68.2R21B.10J 11
LGATE2 LGATE1
15 68.2R21B.10J
2nd = 68.2R21A.20B 2nd = 68.2R21A.20B
8
7
6
5

PWR_5V_BYP1
D
D
D
D

14
BYP1
1

5
6
7
8
PC4519 PG4530 PU4503

1
D
D
D
D
PWR_3D3V_FB2 PWR_5V_FB1
SCD1U25V2KX-L-GP

GAP-CLOSE-PWR-3-GP

PT4502 4 2 PG4532 PG4531 PC4520


ST150U6D3VDM-28-GP FB2 FB1

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

SCD1U25V2KX-L-GP
SM3319NSQAC-TRG-GP PU4505 PT4501
2

4 ST150U6D3VDM-28-GP
G
2

2
084.03319.0A37 SM3319NSQAC-TRG-GP
1 S
2 S
3 S

2
PWR_3D3V_EN PWR_5V_EN 084.03319.0A37
?C-*8+8+*%$? 6 20 ?C-*9+*%$? 4

G
EN2 EN1
!!"#$%&'()*+&'(,&,-'. 2nd = 84.07410.A37 2nd = 84.07410.A37

S
S
S
3rd = 84.08067.A37 3rd = 84.08067.A37
/012345675

3
2
1
PWR_3D3V_CS2 PWR_5V_CS1
5
CS2 CS1
1 !!"#$%&'()*+&'(,&,-'.
PWR_3D3V_FB2_A

1899:;+<#==;>?2(!""+5 /012345675
1

PWR_5V_FB1_A
PR4501 19 PR4502
140KR2F-1-GP VCLK 140KR2F-1-GP 1899:;+<#==;>?2(!""+5
PWR_3D3V_5V_PG 7 21
PGOOD GND
2

2
$4,)$*',*5/<*?(.*D9(.:E
$4,)$*',*5/>*?(.*D9(.<E

LDO3

LDO5
1

Power Ray change 1121 Power Ray change 1003

13

1
PR4512
B 3D3V_AUX_S5 B

#> #>
6K8R2F-2-GP PG4533 PG4534 5V_AUX_S5 PR4515
GAP-CLOSE-PWR-3-GP GAP-CLOSE-PWR-3-GP 15K4R2F-GP
1 2 1 2
2

2
PWR_3D3V_LDO3

PWR_5V_LDO5

1
PR4520
1

#< #<
PR4517 10KR2F-L1-GP
10KR2F-L1-GP

2
2

PC4527 PC4526
1

1
SC4D7U6D3V3KX-L-GP

SC10U10V5KX-L1-GP
2

17 3V_5V_POK 2 PR4528 1
0R0402-PAD-1-GP
+,-'**2*<*H*D*>*/*#>1#<*E
+,-'**2*<*H*D*>*/*#>1#<*E
*******2*<*H*D*>*/*7>)"*1*>*"E
*******2*<*H*D*>*/*>9>:"*1*>*"E
*******2*8>87+
*******2*9>*)*+

11/18 R4913 and R4914 need to change R4513and R4514

2 R4513 1 PWR_3D3V_EN
40 3V_5V_EN 0R0402-PAD-1-GP
1

PC4920
DY
SC47P50V2JN-3GP
2

A A

Wistron Confidential document, Anyone can not


2 R4514 1 PWR_5V_EN
24 5V_CHARGER_EN# Duplicate, Modify, Forward or any other purpose
0R0402-PAD-1-GP application without get Wistron permission
Brook_BH
1

PC4928

Wistron Corporation
SC47P50V2JN-3GP

DY
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51225_5V/3D3V
Size Document Number Rev
Custom
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 45 of 106
5 4 3 2 1
5 4 3 2 1

!!.+*2*$?4>#$F-4&',0
PW R_CORE_VREF

1
PR4601 15W28W

2
>9C <)C .,'$ NTC-100K-10-GP-U

1
PR4613 PR4614
PR4615
?#:7>: 7)*" 9<8" !$''(.F*.-!< 75R2F-2-GP
680KR2J-GP 71K5R2F-1-GP
PC4602 DY
D ?#:7>; >**" >**" 50$G2>><-*3K D

1
SC4700P50V2KX-1GP

2
PR4602
?#:7>> :;9" 8)8" >9C 13K3R2F-L1-GP
1 2

?#:7>< ;9" ;9" %$? 1 2

1
PR4612 PR4617
PR4611
75KR2F-GP PR4616 PR4618
?#:7*; <"); <"); 55 39KR2F-GP
1475KR2F-GP
2 1 2 150KR2F-L-GP 100KR2F-L3-GP
?6>**> +, -,-.' ?%!($!? 2 1
15W 28W 15W 28W

2
PC4601 15W 28W
SC1KP50V2KX-L-1-GP

1 2 PW R_CORE_B-RAMP
PR4603 75R2F-2-GP
PW R_CORE_F-Imax
DY

PWR_CORE_THERM
PR4604

PWR_CORE_OCP-1
PW R_CORE_O-USR

PWR_CORE_IMON
19V_DCBATOUT 1 2PW R_CORE_SLEW A

39KR2F-GP

1 PR4605 2PW R_CORE_VBAT

10KR2F-L1-GP

16

15

14

13

12

11

10

9
U4601

VBAT

SLEWA

THERM

IMON

F-IMAX

O-USR
OCP-I

BOOT
C C
17 8 PW R_CORE_VRON 2 PR4632 1
47 PW R_CORE_CSP1 CSP1 VR_ON H_VR_EN 7
0R0402-PAD-1-GP
47 PW R_CORE_CSN1 18 CSN1 SKIP# 7 PW R_CORE_SKIP# 47
19 CSN2 PWM1 6 PW R_CORE_PW M1 47

3D3V_S5 2 PR4633 1 PW R_CORE_CSP2 20 5


CSP2 PWM2
0R0402-PAD-1-GP
3D3V_S5 2 PR4630 1 PW R_CORE_PU3 21
74.51624.073 4 PW R_CORE_MODE 1 PR4628 2 3D3V_S0
NC#21 MODE PR4619
0R0402-PAD-1-GP 100KR2F-L3-GP
22 3 PW R_CORE_PG 2 PR4637 1 IMVP_PW RGD 7,26,40 IMVP_PW RGD 2 1
NC#22 TPS51624RSMR-GP-U1 PGOOD 0R0402-PAD-1-GP
2 PR4610 1 PW R_CORE_GFB 23 2 PW R_CORE_VDD
7,23 VSS_SENSE 0R0402-PAD-1-GP GFB VDD 2KR2F-L1-GP
2 PR4609 1 PW R_CORE_VFB 24 1
7 VCC_SENSE 0R0402-PAD-1-GP VFB VDIO

VR_HOT#

ALERT#
DROOP

COMP

VREF

VCLK
GND

GND
V5A
PR4621
1R3F-GP
1 2
!1-!!3+2+31
3D3V_S5
25

26

27

28

29

30

31

32

33
!"3!'".!"+'+#$%:;=

1
PC4606
SC1U10V2KX-L1-GP
PW R_CORE_DROOP

2
PWR_CORE_DATA
PWR_CORE_PROCHOT#

PWR_CORE_CLK

PWR_CORE_ALERT#
B PC4603 B
1 2 PW R_CORE_COMP 1D05V_S0 PC4607
SC100P50V2JN-L-GP SCD1U16V2KX-L-GP

1 2
1 PR4606 2 1 2PW R_CORE_VREF
PWR_CORE_V5A

10KR2F-L1-GP 2 R4636 1
PR4607 0R0402-PAD-1-GP VIDSOUT_CPU 7 PR4622
2K87R2F-1-GP 1 110R2F-GP
2 VIDSOUT_CPU
2 R4631 1
VIDALERT#_CPU 7
2

0R0402-PAD-1-GP
PC4604 PR4623
PR4620
2 R4634 1 1 54D9R2F-L1-GP
2 VIDSCK_CPU
1

1 2PW R_CORE_DROOP_A
1 2 0R0402-PAD-1-GP VIDSCK_CPU 7
SCD33U6D3V2KX-1-GP DY
PR4624
PC4608 10KR2F-L1-GP VIDALERT#_CPU
2 R4635 1 PROCHOT#_CPU 4,24,44 2 75R2F-2-GP
1
SC1500P50V2KX-2GP 0R0402-PAD-1-GP

PR4608
$4,)$*',*?4:7*>
1 2 5V_S5

10R3F-GP
1

PC4605
SC1U10V2KX-L1-GP
2

Wistron Confidential document, Anyone can not


A Duplicate, Modify, Forward or any other purpose A
Brook_BH application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51624_CPUCORE(1/2)
Size Document Number Rev
Custom
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 46 of 106
5 4 3 2 1
5 4 3 2 1

19V_DCBATOUT PWR_DCBATOUT_CORE

PG4701
1 2 PWR_DCBATOUT_CORE

GAP-CLOSE-PWR
PG4702
D D
1 2

GAP-CLOSE-PWR
PG4703 74.97374.043
1 2
PU4701 5V_S5 PC4704
GAP-CLOSE-PWR SC2D2U10V3KX-L-GP
PG4704 5 2 1 2
VIN VDD
1 2

GAP-CLOSE-PWR 2 R4701 1 PWR_CORE_SKIP#_A 1 SKIP# BOOT_R 6 PWR_CORE_BOOTR1


2 PR4702 1PWR_CORE_BOOTR1_A PC4705
PG4705 46 PWR_CORE_SKIP# 0R0402-PAD-1-GP SCD22U25V3KX-GP

2
1 2 2D2R3F-L-GP
8 7 PWR_CORE_BOOT1 1V_CPU_CORE
GAP-CLOSE-PWR 46 PWR_CORE_PWM1 PWM BOOT
PG4706

PGND
1 2 3 4 PWR_CORE_VSW1 1 2
PGND VSW PL4701
GAP-CLOSE-PWR
CSD97374Q4M-GP-U1 IND-D22UH-31-GP

9
&$'+'+3"+(+3"+(+-

2
C
PG4726 )<1+"'*4.+++"'"&!+5,75 PG4727 C

GAP-CLOSE-PWR -)<+(. +*+./$?+0+&* GAP-CLOSE-PWR

1PWR_CORE_CSP1_A 1

1
>9C <)C
?#:;*: >9>)" >=>7"
PWR_DCBATOUT_CORE 19V_DCBATOUT
?4:;*> ;:>=;8;:>*:8 ;:>=;8;:>*:8
1

PC4701 PC4702 PC4703


PC4714 PR4721
ST15U25VDM-1-GP 2K37R2F-GP
SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
2

2
DY
15W 28W
2 PR4704 1

15K8R2F-GP
B B

1 2PWR_CORE_CSN1_A
1 2 PWR_CORE_CSN1 46
PR4705 PR4706
2K94R2F-GP NTC-10K-26-GP-U
PC4707
1 2
SCD1U25V2KX-L-GP

PWR_CORE_CSP1 46

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
Brook_BH application without get Wistron permission

Wistron Corporation
A A

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51624_CPUCORE(2/2)
Size Document Number Rev
B
Brook_BH -1M
Date: Wednesday, February 04, 2015 Sheet 47 of 106
5 4 3 2 1
5 4 3 2 1

1D05V_S0 PW R_1D05V
PG4804
1 2

GAP-CLOSE-PW R
PG4805
1 2
19V_DCBATOUT PW R_DCBATOUT_1D05V
PG4801 GAP-CLOSE-PW R
1 2 PG4806
1 2
D GAP-CLOSE-PW R D
PG4802 GAP-CLOSE-PW R
1 2
PG4807
GAP-CLOSE-PW R 1 2
PG4803
GAP-CLOSE-PW R
1 2 +.+
GAP-CLOSE-PW R 5,F("(3(F#*2**>;9+ PG4808
1 2
5,F("(5,6**2**>8+
PR4801 GAP-CLOSE-PW R
5D1R2F-GP PG4809
PW R_1D05V_VID 2 1 5V_S5 1 2

1
PC4801 GAP-CLOSE-PW R
SC1U10V2KX-L1-GP
PW R_DCBATOUT_1D05V

2
%$?*)$''(.F

1
PC4813 PC4814 PC4815

SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP

SCD1U25V2KX-L-GP
PW R_1D05V_CS PW R_1D05V_VDD 2 PR4802 1 5V_S5

2
0R0402-PAD-1-GP

1
3D3V_S0 PR4803

1
324KR2F-1-GP PC4802
SC1U10V2KX-L1-GP
1

C C

5
6
7
8
PR4804

D
D
D
D
1KR2J-L2-GP
PU4802
2

PU4801 SM3319NSQAC-TRG-GP
2 PR4805 1 RT8231AGQW -GP 4

G
13

11

12
7,40,51 1D05V_S0_PW RGD
0R0402-PAD-1-GP 074.08231.0073 PR4811 PC4806 2nd = 84.07410.A37

S
S
S
2D2R3F-L-GP SCD1U25V2KX-L-GP 3rd = 84.08067.A37

VID

VDD
CS

3
2
1
PW R_DCBATOUT_1D05V
PW R_1D05V_BOOT PW R_1D05V_BOOT_A
PR4806 PW R_1D05V_PG BOOT 18 1 2 1 2 +$)(F.*$-00$.'**=8!
10 PGOOD
620KR2F-GP %$?*J:>9!
2 1 PW R_1D05V_TON 9 17 PW R_1D05V_HG
TON UGATE
PW R_1D05V_S5_EN 8 PL4801 PW R_1D05V
S5 IND-1UH-206-GP
PW R_1D05V_S3_EN 7 16 PW R_1D05V_PH 1 2
S3 PHASE
VLDOIN_1D05 19
68.1R01E.10U
VLDOIN
15 PW R_1D05V_LG
LGATE

5
6
7
8
!()&5$')$)*'%*'$%1%$%&'",$')'

1
D
D
D
D
PC4807 PC4808 PC4809 PC4812
&'&&$5$)+$'"5$)*'%*'$%1% PU4803

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SCD1U16V2KX-L-GP
1 VTTGND PGND 14

2
PG4810 SM3319NSQAC-TRG-GP
GAP-CLOSE-PW R 4

G
PW R_1D05V_VDDQ 2nd = 84.07410.A37

S
S
S
VDDQ 5 2 1 1D05V_S0
B B
3rd = 84.08067.A37

3
2
1
17,24,40,51 PM_SLP_S3# 2 PR4807 1 PW R_1D05V_S5_EN VTT_1D05 20 VTT FB 6 PW R_1D05V_FB
0R0402-PAD-1-GP
1

PC4803 2 VTTSNS
VTTREF

DY SCD1U16V2KX-L-GP

1
DY
GND

GND
2

PR4809
!9

1
11K3R2F-2-GP PC4805
#> SC18P50V2JN-1-GP
21

2
PWR_1D05V_VTTREF

2 PR4808 1 PW R_1D05V_S3_EN
0R0402-PAD-1-GP

#<
!8
1

PR4810
20KR2F-L3-GP

+,-'*!$''(.F
+,-'**2*+0$B*H*D*>*/*#>1#<*E
2
1

PC4804
SCD033U16V2KX-GP
*******2**>7;9*H*D*>*/*>>>8"*1*<*"E Wistron Confidential document, Anyone can not
2

*******2*>>*97*+ Duplicate, Modify, Forward or any other purpose


Brook_BH application without get Wistron permission
A A
+.+*8)*+0$B*6&A4$
+.+*5,F("(3(F#*2J*+0$B*2**>7;9*+ Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
+.+*5,F("(5,6**2J*+0$B*2***>;9*+ Taipei Hsien 221, Taiwan, R.O.C.
.,'$>*+0$B*"&.*,.4:*A$*"#&.F$;*B,0%* Title
*>7;98*',**>;98*&B'$0*9,6$0(,.
DC to DC_1D05V(SY8208D)
Size Document Number Rev
A3
Brook_BH -1M
Date: Thursday, February 05, 2015 Sheet 48 of 106

5 4 3 2 1
5 4 3 2 1

SSID = PWR.Plane.Regulator_1p2v0p6v

19V_DCBATOUT PWR_DCBATOUT_VDDQ PWR_1D35V 1D35V_S3


PG4901 PG4910
1 2 1 2

GAP-CLOSE-PWR GAP-CLOSE-PWR
PG4902 PG4911
1 2 1 2

D GAP-CLOSE-PWR GAP-CLOSE-PWR D
PG4903 PG4912
1 2 1 2

GAP-CLOSE-PWR GAP-CLOSE-PWR
PG4904 PG4913
1 2 1 2

GAP-CLOSE-PWR GAP-CLOSE-PWR

RT8231 for VDDQ


PG4914
1 2

GAP-CLOSE-PWR

PR4904
5D1R2F-GP
PWR_VDDQ_VCC5 2 1 5V_S5

1
PC4903
SC1U10V2KX-L1-GP PWR_DCBATOUT_VDDQ
%$?*)$''(.F

2
PWR_VDDQ_CS

1
17,24 PM_SLP_S4# 2 PR4901 1 PWR_VDDQ_EN PC4911 PC4912 PC4913 PC4914

1
0R0402-PAD-1-GP PWR_VDDQ_VDDP 1 PR4905 2

SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP

SCD1U25V2KX-L-GP
5V_S5
0R0603-PAD

2
1

1
PR4911 PC4905
PC4901 324KR2F-1-GP SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP DY
2

2
C DY C

5
6
7
8
D
D
D
D
3D3V_S5
PU4901 PU4902
DY RT8231AGQW-GP

1
SM3319NSQAC-TRG-GP
PR4902 4 2nd = 84.07410.A37

G
13

11

12
10KR2F-L1-GP PC4906 3rd = 84.08067.A37

S
S
S
PR4906 SCD1U25V2KX-L-GP

CS

VID

VDD

3
2
1
2D2R3F-L-GP
Close to pin23 2 18 PWR_VDDQ_BOOT 1 2 PWR_VDDQ_BOOT_A 1 2
RUNPWROK BOOT
10
PGOOD

PWR_DCBATOUT_VDDQ 1PR4903
620KR2F-GP
2 PWR_VDDQ_TON 9
TON UGATE
17 PWR_VDDQ_HG
IccMAX = 4.3A PWR_1D35V
PWR_VDDQ_EN 8
S5
PL4901
IND-1UH-206-GP
OCP > 6.5A
PWR_VTT_EN 7 16 PWR_VDDQ_PH 1 2
PG4915 S3 PHASE
PWR_VDDQ_VTTIN
68.1R01E.10U
1D35V_S3 2 1 19
VLDOIN

5
6
7
8
1

D
D
D
D
PC4902 15 PWR_VDDQ_LG PC4915 PC4916 PC4917 PC4918 PC4921
PG4916
GAP-CLOSE-PWRSC10U6D3V3MX-L-GP LGATE PU4904

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SCD1U16V2KX-L-GP
1

1
2 1
2

SM3319NSQAC-TRG-GP
1 14 4 2nd = 84.07410.A37

G
GAP-CLOSE-PWR VTTGND PGND

2
3rd = 84.08067.A37

S
S
S
PG4907

3
2
1
5 PWR_VDDQ_SENSE 2 1 1D35V_S3
VDDQ

Close to pin23 PWR_VTT 20


VTT FB
6 PWR_VDDQ_FB
GAP-CLOSE-PWR

1
PR4907

1
2
VTTSNS 20KR2F-L3-GP
VTTREF DY PC4907
SC18P50V2JN-1-GP
Iomax=1A R1
GND

GND

B B

2
OCP>1.5A

2
Close to output cap pin1, not
21

1
PR4908
inside of the output cap
?4:=*>*"#&.F$*',*#6)<*;- R2 20KR2F-L3-GP
+,-'2*>7;9*7*D>/#>1#<E
1PWR_VDDQ_VTTREF

*****2*>7;9*7*D*>/<*1<*E

2
*****2>>89
+,-'*)$''(.F

Close to PIN9
+0.675VS PC4908
SCD033U16V2KX-GP

Iomax: 1.2A
2

0D675V_VREF_S0 PG4908 PWR_VTT


2 1

GAP-CLOSE-PWR 12 DDR_PG_OUT 2 PR4910 1 PWR_VTT_EN


0R0402-PAD-1-GP
PG4909
2 1

A GAP-CLOSE-PWR DY Wistron Confidential document, Anyone can not A


1

PC4909 PC4910 Duplicate, Modify, Forward or any other purpose


Brook_BH application without get Wistron permission
SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RT8231(VDDQ_VTT)
Size Document Number Rev
Custom

Wednesday, February 04, 2015


Brook_BH -1M
Date: Sheet 49 of 106
5 4 3 2 1
5 4 3 2 1

D
TLV70215 for 1D5V_S0 D

Enable=1.5V
Disable=0.4V

3D3V_S5

C C
PWR_3D3V_1D5V
PG5101
2 1
Iomax=120mA

1
GAP-CLOSE-PWR PC5104
SC1U10V2KX-L1-GP

2
PWR_1D5V 1D5V_S0
Reserve for RF PU5103
PG5103
7,40,48 1D05V_S0_PWRGD 1 PR5101 2
0R0402-PAD-1-GP 1 5 2 1
VIN VOUT
2 VSS
17,24,40,48 PM_SLP_S3# 1 PR5102 2 PWR_1D5V_S0_EN 3 ON/OFF NC#4 4 GAP-CLOSE-PWR
0R2J-L-GP 2

2
>+9+2?C#2 & DY

1
PC5105 PR5107 S-1339D15-M5001-GP
100KR2J-L-GP PC5106
SC22P50V2JN-L-GP 74.01339.B3F
1

SC1U10V2KX-L1-GP
B
DY DY B

2
2nd = 074.09198.0A3F

5(7*+,-'2>+9+
.%&728**%!
%$?*2*:**%!
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
Brook_BH application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

1D5V_S0 SYW232
Size Document Number Rev
Custom
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 51 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = LCD


..8$0'$0*?,6$0
19V_DCBATOUT
19V_DCBATOUT_LCD
F5501
2 1
LCD1
41 POLYSW -1D1A24V-GP-U
C5502

1
C5504 69.50007.A31

SC4D7U25V5KX-L2-GP
D 1 2nd = 69.50007.A41 D

SCD1U25V2KX-L-GP
2

2
2 eDP_AUX_CON_P C5501 1 2 SCD1U16V2KX-L-GP eDP_AUX_CPU_P 8
3 eDP_AUX_CON_N C5505 1 2 SCD1U16V2KX-L-GP eDP_AUX_CPU_N 8
4
5 eDP_TX_CON_P0 C5506 1 2 SCD1U16V2KX-L-GP eDP_TX_CPU_P0 8
6 eDP_TX_CON_N0 C5507 1 2 SCD1U16V2KX-L-GP eDP_TX_CPU_N0 8
7
8 eDP_TX_CON_P1 C5517 1 2 SCD1U16V2KX-L-GP eDP_TX_CPU_P1 8
9 eDP_TX_CON_N1 C5518 1 2 SCD1U16V2KX-L-GP eDP_TX_CPU_N1 8
10
11 eDP_TX_CON_P2 C5519 1 2 SCD1U16V2KX-L-GP RN5513
eDP_TX_CPU_P2 8
12 eDP_TX_CON_N2 C5520 1 2 SCD1U16V2KX-L-GP eDP_BLEN_CON 1 4
eDP_TX_CPU_N2 8 BLON_OUT 24
13 eDP_HPD_CON 2 3 eDP_HPD_CPU 15
14 eDP_TX_CON_P3 C5521 1 2 SCD1U16V2KX-L-GP eDP_TX_CPU_P3 8
15 eDP_TX_CON_N3 C5522 1 2 SCD1U16V2KX-L-GP SRN1KJ-7-GP
eDP_TX_CPU_N3 8
16 eDP_HPD_CON
17 3D3V_LCDVDD_PW R 2 R5501 1 3D3V_LCDVDD_S0
20141216 -1
18 0R0805-PAD
19 2 R5526 1 0R2J-L-GP
20 TS_USB RN5514
21 TOUCH_DETR# R55211 TS2 TS_I2C eDP_HPD_CON 1 4
TOUCH_DET# 20 R5515
22 TOUCH_S_RST#_R 33R2J-L1-GP 1 2 eDP_BLEN_CON 2 3
TOUCH_S_RST# 20
23 TOUCH_INTR# R5522 1 2 33R2J-L1-GP
24 TS_S0 TS33R2J-L1-GP TOUCH_INT# 20 SRN100KJ-6-GP
25 TS_USB_CON_N 20140926 Rober
26 TS_USB_CON_P 20141216 -1
27 3D3V_CAMERA_S0
28 USB_CON_PP6
C 29 USB_CON_PN6 C
30
31
32
33
34 eDP_BLEN_CON
R5520
35 eDP_BLCTRL_CON 1 2 eDP_BLCTRL_CPU 15
36 33R2J-L1-GP
37 19V_DCBATOUT_LCD
38
39
40

42

STAR-CON40-1-GP
20.K0809.040
2nd = 20.K0678.040
TS_I2C USB_CON_PP6
R5523 USB_CON_PP6 89
1 2 0R2J-L-GP I2C0_DATA_CPU 20
USB_CON_PN6
USB_CON_PN6 89
R5524 1 2 0R2J-L-GP EL5504
I2C0_CLK_CPU 20
USB_CON_PP6 2 1 TS_USB_CON_N
USB_CPU_PP6 16 TS_USB_CON_N 89
TS_USB_CON_P
TS_USB_CON_P 89
TS_I2C USB_CON_PN6 3 4 USB_CPU_PN6 16
TS_USB_CON_P 3 4
TS_USB MCM1012B900FBP-GP-U
3D3V_CAMERA_S0
3D3V_CAMERA_S0 89
USB_CPU_PP5 16
68.01012.201 TOUCH_DETR#
B TS_USB_CON_N TOUCH_S_RST#_R TOUCH_DETR# 89 B
2 1 USB_CPU_PN5 16 2nd = 68.00396.001 TOUCH_S_RST#_R 89
3rd = 69.10118.001
EL5503 TS_S0
MCM1012B900FBP-GP-U eDP_TX_CON_P3 TS_S0 89
EU5504 eDP_TX_CON_N3 eDP_TX_CON_P3 89
68.01012.201 eDP_TX_CON_N3 89
2nd = 68.00396.001
3rd = 69.10118.001 USB_CON_PN6 1 6 USB_CON_PP6 eDP_TX_CON_P2
I/O1 I/O4 eDP_TX_CON_N2 eDP_TX_CON_P2 89

TS_S0
eDP_AUX_CON_P eDP_TX_CON_N2 89
6($%-*?,6$0 3D3V_LCDVDD_S0 2 GND VDD 5 5V_S0
eDP_AUX_CON_N eDP_AUX_CON_P 89
TS_USB_CON_N 3 I/O2 I/O3 4 TS_USB_CON_P 6,-"#*9&.$4**?,6$0 eDP_TX_CON_P0 eDP_AUX_CON_N 89
eDP_TX_CON_P0 89
eDP_TX_CON_N0
eDP_TX_CON_N0 89
3D3V_LCDVDD_PW R 89
DY AZC099-04S-1-GP 3D3V_S0 1 R5744 2 eDP_TX_CON_P1
eDP_TX_CON_P1 89
2

C5509 3D3V_S0 75.09904.07C eDP_TX_CON_N1


C5511 eDP_TX_CON_N1 89
C5508 2nd = 75.00005.C7C DY0R3J-L1-GP TOUCH_INTR#
SC1U10V2KX-L1-GP
SC4D7U6D3V3KX-L-GP

TOUCH_INTR# 89
SCD1U16V2KX-L-GP

3rd = 075.01256.007C
1

eDP_HPD_CON 89

C5512 5V_S0 1 R5745 2


$&%$0&*?,6$0
eDP_BLEN_CON 89
1
SC4D7U6D3V3KX-L-GP

3D3V_S0 0R3J-L1-GP
eDP_BLCTRL_CON 89
3D3V_CAMERA_S0
TS
2

2
C5515 C5516
F5510
AFTP TESTPOINT

SC10U10V5KX-L1-GP

SCD1U16V2KX-L-GP
1 2
U5501
20141216 -1
TS

1
Layout 40 mil POLYSW -1D1A6V-9-GP-U TS
2

1 5 C5513 C5514 <Core Design>


A 15 eDP_VDDEN_CPU EN VIN#5 69.48001.081 A
SC10U10V5KX-L1-GP

SCD1U16V2KX-L-GP

2
3
GND
4 2ND = 69.50011.081
VOUT VIN#4
Wistron Corporation
1

1
2

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


R5509 RT9724GB-GP
Taipei Hsien 221, Taiwan, R.O.C.
74.09724.09F
100KR2J-4-GP

2ND = 74.03514.07F Title

LCD Connector
1

Size Document Number Rev


A3
Brook_BH -1M
Date: Thursday, February 12, 2015 Sheet 55 of 106

5 4 3 2 1
VGA RTD2168
CRT_HPD 1 R5644 2 CRT_PCH_HPD 15

SSID = Display
0R0402-PAD-1-GP

1
L5601
R5617
100KR2J-4-GP CRT_RED 1 2 CRT_RED_CON

1
C5604
BLM18BB220SN-GP

2
SC10P50V2JN-L1-GP C5605

2
3D3V_S0 SC10P50V2JN-L1-GP
Embedded LDO L5604

2
3D3V_S0
Select VCCK_V12 source from external 1.2V or 3D3V_AVCC_S0 1 2
embedded LDO

2
C5618
L5602
C5616 PBY100505T-600Y-N-GP
1

R5611 SC10U10V5KX-L1-GP C5620


SCD1U16V2KX-L-GP SCD1U16V2KX-L-GP CRT_GREEN 1 2CRT_GREEN_CON
C5603

1
4K7R2J-L-GP

1
1 2 1D2V_VCCK_S0
close to pin5 BLM18BB220SN-GP
close to pin24 C5606 C5607
2

SC10P50V2JN-L1-GP SC10P50V2JN-L1-GP
SCD1U16V2KX-L-GP L5605

2
LDO_EN 20141013 Rober 3D3V_DAC_S0
1 2

2
close to pin25 C5619
SC10U10V5KX-L1-GP C5617 PBY100505T-600Y-N-GP C5621
L5603
SCD1U16V2KX-L-GP SCD1U16V2KX-L-GP CRT_BLUE SC10P50V2JN-L1-GP 1 2 CRT_BLUE_CON

1
C5608 BLM18BB220SN-GP C5609

8
7
6
5

8
7
6
5
SC10P50V2JN-L1-GP
close to pin9 close to pin20

2
3D3V_S0 RN5610 RN5611
U5601 SRN150J-1-GP SRN150J-1-GP

3D3V_AVCC_S0 24
AVCC_33 HPD 1 CRT_HPD
RN5612 those compoent need to close

1
2
3
4

1
2
3
4
1D2V_VCCK_S0 25 2 SMB_SCL 2 3
AVCC_12 SMB_SCL
5 DVCC_33
SMB_SDA 3 SMB_SDA

CRT_DDCCLK_CON
1 4
20141216 -1 L5601~3 change to 68.00084.B61
3D3V_S0 20 DVCC_33 VGA_SCL 4
6 CRT_DDCDATA_CON SRN4K7J-8-GP
1D2V_VCCK_S0 VGA_SDA 1D2V_VCCK_S0
19 VCCK_12

1
C5623
3D3V_DAC_S0 9 7 CRT_VSYNC C5622
VDD_DAC_33 VSYNC CRT_HSYNC 5V_CRT_S0 5V_HDMI_S0 SCD1U16V2KX-L-GP SC2D2U10V3KX-L-GP
HSYNC 8

2
LDO_EN 21 15 CRT_RED
LDO_EN RED_P

1
16 D5601
DP_AUX_CON_P RED_N CH551H-30PT-GP
1 2 26 AUX_P
15 PCH_DPC_AUXP C5615 1 2SCD1U16V2KX-L-GP DP_AUX_CON_N 27 12 CRT_GREEN 83.R5003.C8F
15 PCH_DPC_AUXN AUX_N GREEN_P
C5614
1 2
SCD1U16V2KX-L-GP
DDI_VGA_DATA_C_P0 29
GREEN_N 13 2ND = 83.R5003.H8H
3rd = 83.5R003.08F
close to pin19
LANE0P

2
8 DDI_VGA_DATA_CPU_P0 C5613 1 2SCD1U16V2KX-L-GP DDI_VGA_DATA_C_N0 30 10 CRT_BLUE
8 DDI_VGA_DATA_CPU_N0 LANE0N BLUE_P R5605
C5612 SCD1U16V2KX-L-GP 11
DDI_VGA_DATA_C_P1 BLUE_N CRT_VSYNC CRT_VSYNC_CON
1 2 31 LANE1P 1 2
8 DDI_VGA_DATA_CPU_P1

1
2

1
C5611 1 2SCD1U16V2KX-L-GP DDI_VGA_DATA_C_N1 32 22 POL1_SDA
8 DDI_VGA_DATA_CPU_N1 C5610 SCD1U16V2KX-L-GP LANE1N POL1_SDA POL1_SCL RN5601 C5601
POL2_SCL 23 36R2F-1-GP SC10P50V2JN-L1-GP
20140926 Rober SRN2K2J-5-GP

2
17 XI/CKIN
18 XO GND_DAC 14

4
3
RRX 28 33 CRT_DDCDATA_CON
RRX GND R5606
1

CRT_DDCCLK_CON CRT_HSYNC 1 2 CRT_HSYNC_CON

1
R5610 RTD2168-CGT-GP
12KR2F-L-GP C5602
36R2F-1-GP SC10P50V2JN-L1-GP
20141013 Rober

2
2

CRT_DDCDATA_CON
Mode Configure Table(Power On Latch) EEPROM MODE
CRT_DDCCLK_CON CRT_DDCDATA_CON 89 3D3V_S0 3D3V_S0 3D3V_S0
CRT_RED_CON CRT_DDCCLK_CON 89
CRT_GREEN_CON CRT_RED_CON 89 U5602
CRT_BLUE_CON CRT_GREEN_CON 89
CRT_VSYNC_CON CRT_BLUE_CON 89
CRT_VSYNC_CON 89 1 A0 VCC 8
1

CRT_HSYNC_CON R5613 R5615 2 7


CRT_HSYNC_CON 89 A1 WP POL1_SCL
DY 3 A2 SCL 6
4K7R2J-L-GP 4K7R2J-L-GP 4 GND DY SDA 5 POL1_SDA
AFTP TESTPOINT
2

CAT24C128YI-GT3-GP
In EEPROM mode,an additional EEPROM is
needed. EEPROM should configure with
5V_CRT_S0
POL1_SDA POL1_SCL
VEDOR CHECK following conditions. 1- EEPROM
CRT1 with a size of 16K-Byte
ROM or EEPROM mode: connect to PCH SMBUS
1

R5614 R5616
2- EEPROM device should be 2-byte
9 VCC_CRT NC#4 4 addressing device
NC#11 11 4K7R2J-L-GP
DY 4K7R2J-L-GP 3- Slave address should configure as
0xA8
1

C5632 CRT_DDCDATA_CON 12 DDCDATA_ID1


2

CRT_DDCCLK_CON
SCD1U16V2KX-L-GP

15 DDCCLK_ID3
GND 5
2

CRT_RED_CON 1 6
CRT_GREEN_CON CRT_RED GND
2 CRT_GREEN GND 7
CRT_BLUE_CON 3 8
CRT_BLUE GND
GND 10 RTD2168 Supports three operation mode for systemdesign.
CRT_VSYNC_CON 14 16 Reserve 4.7K resistor pull high/low for mode selection
CRT_HSYNC_CON VSYNC GND Wistron Confidential document, Anyone can not
13 HSYNC GND 17 ROM ONLY Mode: PIN22 pull low, PIN23 pull high Duplicate, Modify, Forward or any other purpose
EP Mode: PIN22 pull high, PIN23 pull low application without get Wistron permission
EEPROM Mode: PIN22 pull high, PIN23 pull high Brook_BH
D-SUB-15-155-GP-U

20.20984.015 Wistron Corporation


2nd = 20.20938.015 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

VGA RTD2168
Size Document Number Rev
A3
Brook_BH -1M
Date: Thursday, February 12, 2015 Sheet 56 of 106
5 4 3 2 1

SSID = VIDEO HDMI Level Shifter & CONN


$4,)$*',*3+-.*$,..$"',0
HDMI CONN
R5732 NON_LS C5704 NON_LS HDMI1
AFTP TESTPOINT
0R2J-L-GP
1 2 HDMI_DATA_C_P0 1 2 SCD1U16V2KX-L-GP HDMI_DATA_CON_P0
8 HDMI_DATA_CPU_P0
8 HDMI_DATA_CPU_N0 1 2 HDMI_DATA_C_N0 1 2 SCD1U16V2KX-L-GP HDMI_DATA_CON_N0 5V_HDMI_S0 18 15 HDMI_CLK_CON HDMI_DATA_CON_P0
HDMI_DATA_CON_P0 89
HDMI_CLK_CON
HDMI_CLK_CON 89
+5V_POWER SCL HDMI_DATA_CON HDMI_DATA_CON_N0 HDMI_DATA_CON
R5733
0R2J-L-GP NON_LS C5703 NON_LS SDA
16 HDMI_DATA_CON_N0 89 HDMI_DATA_CON 89
HDMI_DATA_CON_P0 HDMI_DATA_CON_P1
D R5735 NON_LS C5706 NON_LS HDMI_DATA_CON_N0
7
9
TMDS_DATA0+
13 HDMI_DATA_CON_N1 HDMI_DATA_CON_P1 89 HDMI_DET_CON
D
0R2J-L-GP TMDS_DATA0- CEC HDMI_DATA_CON_N1 89 HDMI_DET_CON 89
1 2 HDMI_DATA_C_P1 1 2 SCD1U16V2KX-L-GP HDMI_DATA_CON_P1 HDMI_DATA_CON_P1 4 17
8 HDMI_DATA_CPU_P1 TMDS_DATA1+ DDC/CEC_GROUNG
8 HDMI_DATA_CPU_N1 1 2 HDMI_DATA_C_N1 1 2 SCD1U16V2KX-L-GP HDMI_DATA_CON_N1 HDMI_DATA_CON_N1 6 19 HDMI_DET_CON HDMI_DATA_CON_P2
HDMI_DATA_CON_P2 89
TMDS_DATA1- HOT_PLUG_DETECT
R5734
0R2J-L-GP NON_LS C5705 NON_LS HDMI_DATA_CON_P2
HDMI_DATA_CON_N2
1
3
TMDS_DATA2+
14
HDMI_DATA_CON_N2
HDMI_DATA_CON_N2 89
TMDS_DATA2- RESERVED#14
R5737
0R2J-L-GP NON_LS C5708
NON_LS 8 HDMI_CLK_CON_P3
1 2 HDMI_DATA_C_P2 1 2 SCD1U16V2KX-L-GP HDMI_DATA_CON_P2 TMDS_DATA0_SHIELD HDMI_CLK_CON_P3 89
8 HDMI_DATA_CPU_P2 5 HDMI_CLK_CON_N3
8 HDMI_DATA_CPU_N2 1 2 HDMI_DATA_C_N2 1 2 SCD1U16V2KX-L-GP HDMI_DATA_CON_N2 TMDS_DATA1_SHIELD HDMI_CLK_CON_N3 89
2
0R2J-L-GP TMDS_DATA2_SHIELD
R5736 NON_LS C5707 NON_LS GND
20
R5739 NON_LS C5702 NON_LS HDMI_CLK_CON_P3
11
10
TMDS_CLOCK_SHIELD GND
21
22
0R2J-L-GP TMDS_CLOCK+ GND
1 2 HDMI_DATA_C_P3 1 2 SCD1U16V2KX-L-GP HDMI_CLK_CON_P3 HDMI_CLK_CON_N3 12 HDMI 23
8 HDMI_DATA_CPU_P3 TMDS_CLOCK- (A_Type) GND
1 2 HDMI_DATA_C_N3
1 2 SCD1U16V2KX-L-GP HDMI_CLK_CON_N3
8 HDMI_DATA_CPU_N3
R5738
0R2J-L-GP C5701 NON_LS SKT-HDMI23-133-GP-U 5V_HDMI_S0 5V_S0
NON_LS 022.10025.00A1
NON_LS HDMI_PLL_GND F5701
NON_LS
1 R5701 2 470R2F-GP 2nd = 22.10296.211 5V_HDMI_S0 1 2
1 R5702 2 470R2F-GP ER5701 ER5702 ER5703 ER5704
NON_LS HDMI_DET_CON
1 R5703 2 470R2F-GP

1
NON_LS C5733

SCD1U16V2KX-L-GP
R5704 470R2F-GP 1 2 1 2 1 2 1 2 POLYSW-1D1A6V-9-GP-U
1 2
NON_LS 1 R5705 2 470R2F-GP 69.48001.081
NON_LS 1 R5706 2 470R2F-GP 180R2J-1-GP 180R2J-1-GP 180R2J-1-GP 180R2J-1-GP 2ND = 69.50011.081

2
3D3V_S0 4K7R2J-L-GP 2 DY 1 R5727 PS8201_EN NON_LS

HDMI_DATA_CON_N0

HDMI_DATA_CON_N1

HDMI_DATA_CON_N2
HDMI_DATA_CON_P0

HDMI_DATA_CON_P1

HDMI_DATA_CON_P2
1 R5707 2 470R2F-GP 3D3V_S0
NON_LS

HDMI_CLK_CON_N3

HDMI_CLK_CON_P3
1 R5708 2 470R2F-GP

3D3V_S0 4K7R2J-L-GP 2 LS 1 R5728 PS8201_DDCBUF $4,)$*',*5$8$4*!#(B' Q5701


C
MMBT3904-4-GP C

C
R5729 84.T3904.C11
4K7R2J-L-GP 2 1 R5731 1D5V_S0 1 2 HDMI_HPD_B B 2ND = 84.03904.P11
DY Q5702 3rd = 84.03904.L06
150KR2J-L1-GP
2N7002K-2-GP
NON_LS

E
84.2N702.J31

1
2ND = 84.2N702.031 NON_LS
DY
R5710
2

LS 20KR2F-L3-GP HDMI_DET_CPU 15

S
G
C5713 C5712 C5714 5V_S0
4K7R2J-L-GP 2 1 R5713 PS8201_PRE
SCD01U50V2KX-L-GP

SCD01U50V2KX-L-GP

SCD01U50V2KX-L-GP

2
3D3V_S0
1

2
U5701
5V_S0
4K7R2J-L-GP 2 DY 1 R5714 3D3V_S0 11 21 HDMI_CLK_CON_N3 R5711
VDD33 OUT_CKN HDMI_CLK_CON_P3 10KR2J-L-GP
22
OUT_CKP
NON_LS NON_LS

3
25 HDMI_DATA_CON_P0
OUT_D0P HDMI_DATA_CON_N0
1D5V_S0 40 24
VDD15 OUT_D0N

3D3V_S0 4K7R2J-L-GP 2 DY 1 R5724 PS8201_CFG


LS LS LS 19
OUT_D1P
27
26
HDMI_DATA_CON_P1
HDMI_DATA_CON_N1
D5701
VDD15 OUT_D1N BAW56-5-GP
30 HDMI_DATA_CON_P2
20
OUT_D2P
29 HDMI_DATA_CON_N2 83.00056.Q11
VDD15 OUT_D2N

5V_DDC_HDMI1 1

5V_DDC_HDMI2 2
3D3V_S0 4K7R2J-L-GP 2 LS 1 R5726 PS8201_EQ 1D5V_S0
31
VDD15
32 HDMI_CLK_CON
SCL_SNK HDMI_DATA_CON
LS C5724 1 2 SCD1U16V2KX-L-GP HDMI_DATA_CPU_P0_C 6
SDA_SNK
33
28 HDMI_DET_CON NON_LS
8 HDMI_DATA_CPU_P0 IN_D0P HPD_SNK
4K7R2J-L-GP 2 DY 1 R5709 LS C5723 1 2 SCD1U16V2KX-L-GP HDMI_DATA_CPU_N0_C 7
8 HDMI_DATA_CPU_N0 IN_D0N
LS C5726 1 2 SCD1U16V2KX-L-GP HDMI_DATA_CPU_P1_C 4 38 HDMI_CLK_CPU
8 HDMI_DATA_CPU_P1 IN_D1P SCL_SRC
LS C5725 1 2 SCD1U16V2KX-L-GP HDMI_DATA_CPU_N1_C 5 39 HDMI_DATA_CPU
8 HDMI_DATA_CPU_N1 IN_D1N SDA_SRC
1

C5710 C5709 C5711 LS C5728 1 2 SCD1U16V2KX-L-GP HDMI_DATA_CPU_P2_C 1 3 HDMI_HPD_E 1 R5722 2 HDMI_DET_CPU


B 8 HDMI_DATA_CPU_P2 IN_D2P HPD_SRC B
4K7R2J-L-GP 2 DY 1 R5730 PS8201_ISET C5727 SCD1U16V2KX-L-GP HDMI_DATA_CPU_N2_C 0R0402-PAD-1-GP
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

3D3V_S0 8 HDMI_DATA_CPU_N2 LS 1 2 2
IN_D2N
8 I2C_CTL_EN R5723 1 2 4K7R2J-L-GP 3D3V_S0
I2C_CTL_EN
2

4
3
C5722 2 SCD1U16V2KX-L-GP HDMI_CLK_CPU_P3_C
4K7R2J-L-GP 2 DY 1 R5712
8 HDMI_DATA_CPU_P3 LS
LS C5721
1
1 2 SCD1U16V2KX-L-GP HDMI_CLK_CPU_N3_C
9
10
IN_CKP
16 PS8201_PRE DY RN5701
8 HDMI_DATA_CPU_N3 IN_CKN PRE SRN2K2J-5-GP
3D3V_S0
PS8201_EN 13
PS8201_DDCBUF 14 DCIN_EN/SCL_CTL PS8201_PD# R5725
LS LS LS DDCBUF/SDA_CTL PD#
36 1
DY 2 4K7R2J-L-GP 3D3V_S0

1
2
PS8201_EQ 17
EQ/I2C_ADDR Q5703
R5721
PS8201_CFG 23
CFG
35 4 3
NON_LSHDMI_CLK_CON
3D3V_S0 3D3V_S0 GND 15 HDMI_CLK_CPU
4K02R2F-GP 2 1 PS8201_REXT 18 41 HDMI_DATA_CON
REXT GND 15 HDMI_DATA_CPU
5 2
LS 1D5V_S0 12
15
NC#12
6 1
NC#15
3D3V_S0 37
NC#37 2N7002KDW-GP
34
NC#34
2

C5715 84.2N702.A3F
C5716 PS8201_ISET
SCD1U16V2KX-L-GP

2nd = 75.00601.07C
PS8201ATQFN40GTR2-A0-GP 3rd = 84.2N702.F3F
SCD01U50V2KX-L-GP
1

LS NON_LS
I2C_CTL_EN 1 R5715 2
0R0402-PAD-1-GP
LS Wistron Confidential document, Anyone can not
LS Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A Brook_BH A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

HDMI Level Shifter&Conn


Size Document Number Rev
Custom
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 57 of 106
5 4 3 2 1
5 4 3 2 1

!!.+*2*C(0$4$)) Mini Card Connector(802.11a/b/g/n)

3D3V_IOAC SKT-NGFF75P-66-GP

D NP2 NP2 NP1 NP1 D

NGFF_KEY_E_75P GND 1
2 3_3VAUX USB_D+ 3 USB_CPU_PP4 16,89
4 3_3VAUX USB_D- 5 USB_CPU_PN4 16,89
6 7 3D3V_IOAC
LED#1 GND
8 PCM_CLK SDIO_CLK 9
10 PCM_SYNC SDIO_CMD 11
12 13 R6115
PCM_IN SDIO_DAT0
14 PCM_OUT SDIO_DAT1 15 1 2
16 17 10KR2F-L1-GP
LED#2 SDIO_DAT2
18 GND SDIO_DAT3 19 IOAC IOAC
20 UART_WAKE SDIO_WAKE 21
22 23 PCIE_W AKE#R 1 R6108 2
UART_RX SDIO_RESET W LAN_PCIE_W AKE# 24
0R2J-L-GP
11/30 SB
32 UART_TX GND 33
34 UART_RTS PETP0 35 PCIE_TX_W LAN_P4 16,89 1 R6111 2 PCH_PCIE_W AKE# 17,24,31,63
R6116 36 37 0R2J-L-GP
UART_CTS PETN0 PCIE_TX_W LAN_N4 16,89
24 E51_TXD 1 2 38 CLINK_RESET GND 39
40 CLINK_DATA PERP0 41 PCIE_RX_CPU_P4 16,89 NON-IOAC
GAP-OPEN-PW R-2-GP 42 43
CLINK_CLK PERN0 PCIE_RX_CPU_N4 16,89
R6117 E51_TXDR 44 45
GAP-OPEN-PW R-2-GP 1 E51_RXDR COEX3 GND
24 E51_RXD 2 46 COEX2 REFCLKP0 47 W LAN_CLK_CPU 18,89
R6126 48 49
COEX1 REFCLKN0 W LAN_CLK_CPU# 18,89
17,63 SUS_CLK_CPU DY 1 0R2J-L-GP 2CLK_W LAN 50
W LAN_RST# 52 SUSCLK_32KHZ GND 51
PERST0# CLKREQ0# 53 W LAN_CLKREQ_CPU# 15,18,89
1 R6127 2 BT_EN 54 55 PCIE_W AKE#R
24 BLUETOOTH_EN RESERVED#54/W_DISABLE#2 PEWAKE0#
24 W IFI_RF_EN 0R0402-PAD-1-GP
1 2 W IFI_RF_EN_CON 56 57
C 0R0402-PAD-1-GP W_DISABLE#1 GND C
58 NFC_I2C_SM_DATA RESERVED#59/2ND_LANE_PETP1 59
R6114 60 61
NFC_I2C_SM_CLK RESERVED#61/2ND_LANE_PETN1
62 NFC_I2C_IRQ/MGPIO5 GND 63
64 65 0R0402-PAD-1-GP
3D3V_IOAC GPIO0_NFC_RESET#/MGPIO7 RESERVED#65/2ND_LANE_PERP1 W LAN_RST#
66 RESERVED#66 RESERVED#67/2ND_LANE_PERN1 67 1 2 PLTRST#_PCH 17,24,31,37,40,63,68,89,91
68 RESERVED#68 GND 69
70 71 R6104
RESERVED#70 RESERVED#71
72 3_3VAUX RESERVED#73 73

1
3D3V_IOAC 74 75
3_3VAUX GND
76 76 77 77 DY EC6120
SCD1U16V2KX-L-GP

2
W LAN1
062.10007.0161
2nd = 062.10003.0401
1

C6102 C6103 C6104


SCD1U16V2KX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
2

DY

3D3V_S0 3D3V_IOAC
CLK_W LAN
89 CLK_W LAN W LAN_RST#
3D3V_S5 89 W LAN_RST# BT_EN
89 BT_EN
PCIE_W AKE#R
R6110 1 2 0R3J-L1-GP 89 PCIE_W AKE#R
B B

IOAC NON-IOAC 89 W IFI_RF_EN_CON W IFI_RF_EN_CON


C6106
1

SC1U10V2KX-L1-GP
2

IOAC
U6101

5 IN OUT 1
GND 2
24 W LAN_PW R_EN# 4 EN# OC# 3

SY6288DAAC-GP
2nd = 074.00524.0C9F

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Mini Card WLAN


Size Document Number Rev
A3
Brook_BH -1M
Date: W ednesday, February 11, 2015 Sheet 61 of 106
5 4 3 2 1
5 4 3 2 1

!!.+*2*%!!6! Mini Card Connector(mSATA)

3D3V_S0 3D3V_MSATA_S0
D D

2 R6301 1

0R0805-PAD

Baseline
3D3V_MSATA_S0

DY
1

1
C6305 C6306 C6307 C6308 C6310 C6311
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
2

2 3D3V_MSATA_S0
Baseline Baseline Baseline Baseline Baseline
MSATA_PEDET 19
C 3D3V_MSATA_S0 MSATA1 C

1
DY
NP2 NP1 R6304 R6303
NP2 NP1 1MR2J-L3-GP 0R2J-L-GP
76 76 77 77
74 3_3VAUX GND 75
72 3_3VAUX GND 73

2
R6327 70 71
3_3VAUX GND
17,61 SUS_CLK_CPU DY 1 2
0R2J-L-GP
CLK_MSATA 68 SUSCLK_32KHZ PEDET(OC_PCIE/GND_SATA) 69 MSATA_PEDET
58 NC#58 NC#67 67 Baseline
56 NC#56 GND 57
17,24,31,61 PCH_PCIE_W AKE# 1 R6312 2 MSATA_PCIE_W AKE#_C 54 PEWAKE#/NC#54 REFCLKP 55 MSATA_CLK_CPU 18
0R0402-PAD-1-GP 52 53
18 MSATA_CLKREQ_CPU# CLKREQ#/NC#52 REFCLKN MSATA_CLK_CPU# 18
17,24,31,37,40,61,68,89,91 PLTRST#_PCH 1 R6308 2 MSATA_RST# 50 PERST#/NC#50 GND 51 Baseline
48 49 SATA_TX_MSATA_P3 C6309 2 1 SCD1U16V2KX-L-GP
NC#48 PERP0/SATA_A+ SATA_TX_CPU_P3 19
0R0402-PAD-1-GP 46 47 SATA_TX_MSATA_N3 C6320 2 1 SCD1U16V2KX-L-GP
NC#46 PERN0/SATA_A- SATA_TX_CPU_N3 19
44 NC#44 GND 45 Baseline
42 43 SATA_RX_MSATA_N3 R6330 1Baseline20R0402-PAD-1-GP
NC#42 PETP0/SATA_B- SATA_RX_CPU_N3 19
R6328 40 41 SATA_RX_MSATA_P3 R6331 1 2 0R0402-PAD-1-GP
NC#40 PETN0/SATA_B+ SATA_RX_CPU_P3 19
17,24,31,61 DEVSLP DEVSLP 1 2 DEVSLP_R 38 39 Baseline
0R2J-L-GP DEVSLP GND PCIE_TX_MSATA_P6 C6317
36 NC#36 PERP1 37 2 1 SCD1U16V2KX-L-GP PCIE_TX_CPU_P6 19
34 35 PCIE_TX_MSATA_N6 C6318 2 1 SCD1U16V2KX-L-GP
NC#34 PERN1 PCIE_TX_CPU_N6 19
DY 32 NC#32 GND 33 Baseline
30 NC#30 PETP1 31 Baseline PCIE_RX_CPU_P6 19
28 NC#28 PETN1 29 PCIE_RX_CPU_N6 19
26 NC#26 GND 27
24 NC#24 PERP2 25
22 23 20140922 schematic review change
MSATA_RST# NC#22 PERN2
20 NC#20 GND 21
18 3_3VAUX PETN2 19
B B
16 3_3VAUX PETP2 17
1

14 3_3VAUX GND 15
EC6301 12 13
AZ5325-01FDR7G-GP TPAD14-OP-GP TP6302 DAS/DSS# 3_3VAUX PERP3
1 10 DAS/DSS# PERN3 11
8 NC#8 GND 9
DY 6 NC#6 PETN3 7
4 3_3VAUX PETP3 5
2

2 3_3VAUX GND 3
GND 1
NGFF_KEY_M 75P

SKT-MINI67P-14-GP
U6305
062.10003.0431
2nd = 062.10003.0721 SATA_TX_MSATA_P3 1 6 SATA_RX_MSATA_P3
SATA_TX_MSATA_N3 2 TMDS_CH1- NC#6 SATA_RX_MSATA_N3
3rd = 062.10003.0731 TMDS_CH1+ NC#7 7
9 SATA_TX_MSATA_N3
NC#9 SATA_TX_MSATA_P3
NC#10 10
SATA_RX_MSATA_N3 4
SATA_RX_MSATA_P3 5 TMDS_CH2-
TMDS_CH2+ GND 3
GND 8
Baseline
IP4294CZ10-TBR-GP
Baseline
2/5 PD Rober Part number change with EU3501 Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

MSATA Conn
Size Document Number Rev
A3
Brook_BH -1M
Date: Thursday, February 12, 2015 Sheet 63 of 106
5 4 3 2 1
5 4 3 2 1

SSID = User.Interface LED1


R6407 5V_S5
Orange

Power Button_LED
STDBY_LED#_Q 1 2 STDBY_LED#_R 2

820R2F-GP 1
D D
Q6402 FRONT_PWRLED#_Q 1 R6405 2 FRONT_PWRLED#_R 3
3 FRONT_PWRLED#_Q Blue
1 R1 680R2F-GP
24 PWRLED
2 LED-BO-9-GP-U
R2
LTC043ZUB-FS8-GP
84.00043.011 LED2
2nd = 84.00143.D1K R6408 5V_AUX_S5
CHARGE_LED#_Q CHARGE_LED#_R Orange
1 2 2

820R2F-GP 1

Power STDBY_LED DC_BATFULL#_Q 1 R6409 2

680R2F-GP
DC_BATFULL#_R 3
Blue
Q6405 LED-BO-9-GP-U
3 STDBY_LED#_Q 1/7 -1
1 R1
24 STDBY_LED
C 2 C

Power Button
R2
LTC043ZUB-FS8-GP
84.00043.011
2nd = 84.00143.D1K

Battery LED2(DC_BATFULL) PB1


Q6407 T1 T2 KBC_PWRBTN# 24,65,89
3 DC_BATFULL#_Q
1 R1
24 DC_BATFULL
2 T5 T6
R2
LTC043ZUB-FS8-GP
84.00043.011 T3 T4
2nd = 84.00143.D1K
B B
SW-TACT-6P-GP

LAB
Battery LED1(CHARGE)
20140926 LAB remove

Q6408
3 CHARGE_LED#_Q
1 R1
24 CHARGE_LED
2
R2
LTC043ZUB-FS8-GP Wistron Confidential document, Anyone can not
84.00043.011 Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
2nd = 84.00143.D1K Brook_BH

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LED Bard/Powe Button


Size Document Number Rev
A4
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 64 of 106
5 4 3 2 1
5 4 3 2 1

Precision Touch Pad


3D3V_TP_S3
3D3V_TP_S3 I2C Addr. = 0X2C (Synaptics)

1
2
1
RN6503
SRN4K7J-8-GP 3D3V_TP_S3
R6506
100KR2J-4-GP
Q6502

2
G

4
3
D 3D3V_S0 D
RN6502 10
D TP_IN#_R SRN33J-5-GP-U 8
1 4 EC_TP_CLK_C 7
24 EC_TPCLK
S 2 3 EC_TP_DATA_C 6
15,20 TP_IN# 24 EC_TPDATA
5
2N7002K-2-GP I2C1_DATA_TP 4
2nd = 84.2N702.031 I2C1_CLK_TP 3
3rd = 84.2N702.W31 TP_IN#_R 2

1 R6524 2 TP_LID_CLOSE# 1
24 FUN_OFF#
24 EC_TP_IN# 1 R6512 2 0R0402-PAD-1-GP 9
0R0402-PAD-1-GP
TPAD1
ACES-CON8-40-GP
20.K0667.008
3D3V_TP_S3
2nd = 20.K0665.008
3D3V_S5
3D3V_S0
3D3V_S5
11/18 Chang 180 degree

4
3
RN6505 3D3V_TP_S3

1
SRN2K2J-5-GP
20141216 -1
DY R6507
100KR2J-4-GP
1
2

Q6503

2
1 6 I2C1_CLK_TP U6502
20 I2C1_CLK_CPU
EC6503

1
TPAD_PWRCTL
2 5
DY C6509
SC4D7U6D3V3KX-L-GP
5 IN OUT 1
2
C6504
SC4D7U6D3V3KX-L-GP
C TPAD_PWRCTL 4 GND C
3 4 2 EN# OC# 3

2
SCD1U16V2KX-L-GP

2
2N7002KDW-GP EC_TP_CLK_C
SY6288DAAC-GP 89 EC_TP_CLK_C
20 I2C1_DATA_CPU 89 EC_TP_DATA_C EC_TP_DATA_C
R6505 074.06288.009B
I2C1_DATA_TP 0R0402-PAD-1-GP 2nd = 074.00524.0C9F
89 I2C1_DATA_TP I2C1_DATA_TP
84.2N702.A3F EC6505 3rd = 074.22802.0A9F I2C1_CLK_TP

1
1

2nd = 75.00601.07C 89 I2C1_CLK_TP


3rd = 84.2N702.F3F DY TP_IN#_R
SCD1U16V2KX-L-GP 89 TP_IN#_R
PTP_PWR_EN# 24 TP_LID_CLOSE#
2

89 TP_LID_CLOSE#

..'$0.&4*"$:/,&0;*$,..$"',0

KB1
ACES-CON28-9-GP
020.K0130.0028 PTWO-CON4-9-GP-U1 5V_S0

4
KB_BL 3
2 KB_BL_DET_R 1
R6504
2 KB_BL_DET 24
30

28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2

29

100KR2J-4-GP C6501

1
KB_LED_PWM_D
1
KB_BL

1
B B
KROW10
KROW11
KROW12
KROW13
KROW14
KROW15
KROW16
KROW17

DY
KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
KROW8
KROW9

SCD1U16V2KX-L-GP
5 R6502

2
200KR2F-L-GP

KB_BL1 KB_BL

2
KCOL0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6

KCOL7

D
20.K0382.004
2nd = 20.K0465.004 Q6501
KROW[0..17] 24,89 3rd = 20.K0422.004 2N7002K-2-GP

24,64,89 KBC_PWRBTN#
KCOL[0..7] 24,89 KB_BL 84.2N702.J31
2ND = 84.2N702.031
3rd = 84.2N702.W31

S
24 KB_BL_PWM

1
C6502
SCD1U16V2KX-L-GP
DY
2

A Wistron Confidential document, Anyone can not A


Duplicate, Modify, Forward or any other purpose
Brook_BH application without get Wistron permission
KB_BL_DET_R KB_BL_DET_R 89
KB_LED_PWM_D
KB_LED_PWM_D 89
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Key Board/Touch Pad


Size Document Number Rev
Custom
Brook_BH -1M
Date: Wednesday, February 04, 2015 Sheet 65 of 106
5 4 3 2 1
5 4 3 2 1

Low Active 2A
5V_S5 RDSon = 80m! (Typ) 5V_USB
U6601

D 5 1 D
IN OUT
GND 2
4 EN# OC# 3

1
C6609 C6604 C6603
SC1U10V2KX-L1-GP SY6288DAAC-GP

SCD1U16V2KX-L-GP

SC10U10V5KX-L1-GP
2
074.06288.009B

2
2nd = 074.00524.0C9F DY
24,35 USB_PWR_EN#

5V_USB

USBBD1 USB_CON_PN2_C
USB_CON_PN2_C 89
17

C 1 USB_CON_PP2_C C
USB_CON_PP2_C 89
68.01012.201 2 USB_CON_PN3_C
USB_CON_PN3_C 89
2nd = 68.00396.001 3
3rd = 69.10118.001 4 USB_CON_PP3_C
USB_CON_PP3_C 89
5
EL6601 6
16 USB_CPU_PP2 3 4
USB_CON_PP2_C
7
8
AFTP TEST POINT
2 1 USB_CON_PN2_C 9
16 USB_CPU_PN2
10
MCM1012B900FBP-GP-U USB_CON_PP3_C 11
USB_CON_PN3_C 12
EL6602 13
16 USB_CPU_PP3 3 4 14
15
16 USB_CPU_PN3 2 1 16
MCM1012B900FBP-GP-U 18
68.01012.201
B 2nd = 68.00396.001 PTWO-CON16-1-GP B
3rd = 69.10118.001
20.K0429.016
2nd = 20.K0460.016

20150112 Rober

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A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

IO Board
Size Document Number Rev
A4
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 66 of 106
5 4 3 2 1
5 4 3 2 1

D D

3D3V_AUX_S5

C6704

1
SCD1U16V2KX-L-GP
DY

2
C C
LIDSW1

1 VSS
R6702 2
LID_CLOSE#_1 VDD
24 LID_CLOSE# 1 2 3 OUT
100R2J-L-GP

S-5716ACDL0-M3002-GP
1

DY 74.05716.07B
C6703
SCD047U25V2KX-GP
2

B B

Wistron Confidential document, Anyone can not


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Brook_BH application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Hall Sensor
Size Document Number Rev
Custom
Brook_BH -1M
Date: Wednesday, February 04, 2015 Sheet 67 of 106
5 4 3 2 1
5 4 3 2 1

D D

3D3V_S0
DBG1
11
1

C
18,24,91 LPC_AD_CPU_P0 2 C

18,24,91 LPC_AD_CPU_P1 3
18,24,91 LPC_AD_CPU_P2 4
18,24,91 LPC_AD_CPU_P3 5
18,24,91 LPC_FRAME#_CPU 6
17,24,31,37,40,61,63,89,91 PLTRST#_PCH 7
8
18 LPC_CLK_DBG 9
10
12

ACES-CON10-1-GP-U1

LAB

B B

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Brook_BH application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

Dubug connector
Size Document Number Rev
A4
Brook_BH -1M
Date: Wednesday, February 04, 2015 Sheet 68 of 106
5 4 3 2 1
5 4 3 2 1

Note
SSID = User.Interface - no via, trace, under the sensor (keep out area around 2mm)
- stay away from the screw hole or metal shield soldering joints
- design PCB pad based on our sensor LGA pad size (add 0.1mm)
G Sensor - solder stencil opening to 90% of the PCB pad size
- mount the sensor near the center of mass of the NB as possible as you can

D D

3D3V_S0

3D3V_S0
C6901 1

1
SCD22U25V3KX-GP
3D3V_S0

2
GSENSOR 2 C6902

14
15
16
C R6909 U6901 SC1U10V2KX-L1-GP C

2
RN6912 10KR2J-3-GP

ADC2
ADC1
VDD
1 4 GSENSOR GSENSOR
2 3 GSENSOR

1
SRN2K2J-5-GP 20141014 Rober 13
12
ADC3
GND
VDD_IO
NC#2
1
2
20 GSENSOR_INT1 1 R6911 2 GSENSOR_INT1_R 11 3

SDA/SDI/SDO
0R0402-PAD-1-GP INT1 NC#3 SML1_CLK_G
10 RES SCL/SPC 4
Q6902 1 2 9 5
60 HDD_INT2

SDO/SA0
SML1_DATA_G INT2 GND
18 SML0_DATA_CPU 6 1 DY
R2439 0R2J-L-GP
5 2

CS
GSENSOR
4 3 LIS3DHTR-GP

8
7
6
3D3V_S0 3D3V_S0
GSENSOR
2N7002KDW -GP
84.2N702.A3F
3D3V_S0

2
2nd = 75.00601.07C SML1_DATA_G

G_SA0
G_CS
3rd = 84.2N702.F3F
SML1_CLK_G 20141014 Rober R6905
10KR2J-3-GP
R6907
10KR2J-3-GP

GSENSOR_INT2

2
DY R6910
GSENSOR

1
G_CS G_SA0 GSENSOR 10KR2J-3-GP
18 SML0_CLK_CPU

1
R6906 R6908
10KR2J-3-GP 10KR2J-3-GP
DY
GSENSOR
1

1
B B

SDO="H"; address="3Ah"
*SDO="L"; address="38h"

*CS="H"; mode="I2C"
CS="L"; mode="SPI"

Wistron Confidential document, Anyone can not


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Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

G-SENSOR
Size Document Number Rev
A3
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 69 of 106
5 4 3 2 1
5 4 3 2 1

1D05V_VGA_S0

Non-GC6
R7604
VGA_RST# 3D3V_AON_S0

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC4D7U6D3V3KX-L-GP
15,79 DGPU_HOLD_RST# 1 2

1
SC10U10V5KX-L1-GP

SC10U10V5KX-L1-GP

SC22U6D3V5MX-L3-GP
C7602 C7604 C7605 C7606 C7607
0R2J-L-GP C7603
PX PX PX PX PX PX

2
GPU1A 1 OF 14

1
1/14 PCI_EXPRESS
R7655
PX 10KR2J-L-GP
Q7601 PX AB6
PEX_WAKE#
G

2
D
D AC7
PEX_IOVDD_1
AA22
AB23
Under GPU Near GPU D
15,18 PEG_CLKREQ_CPU# 79 VGA_RST# PEX_RST# PEX_IOVDD_2
AC24
PEG_CLKREQ#_1 PEX_IOVDD_3
S AC6 AD25
PEX_CLKREQ# PEX_IOVDD_4
PEX_IOVDD_5
AE26 10uF(X5R) 22uF(X5R)
2N7002K-2-GP 18 PEG_CLK_CPU AE8 AE27
3rd = 84.2N702.W31 84.2N702.J31 18 PEG_CLK_CPU# AD8
PEX_REFCLK PEX_IOVDD_6 M0805 ×4 M0805 ×4
PEX_REFCLK#
2nd = 84.2N702.031
16 PEG_RX_CPU_P0
PEG_RX_CPU_P0 PX C7601 1 2 SCD1U16V2KX-L-GP PEG_RX_CON_P0 AC9
PEX_TX0
PEG_RX_CPU_N0 PX C7611 1 2 SCD1U16V2KX-L-GP PEG_RX_CON_N0 AB9
16 PEG_RX_CPU_N0 PEX_TX0#
PEG_TX_CON_P0 AG6
16 PEG_TX_CON_P0 PEX_RX0
PEG_TX_CON_N0 AG7 AA10
16 PEG_TX_CON_N0 PEX_RX0# PEX_IOVDDQ_1
AA12
PEX_IOVDDQ_2

Power current=0.79A
PEG_RX_CPU_P1 PX C7610 1 2 SCD1U16V2KX-L-GP PEG_RX_CON_P1 AB10 AA13
16 PEG_RX_CPU_P1 PEX_TX1 PEX_IOVDDQ_3
PEG_RX_CPU_N1 PX C7609 1 2 SCD1U16V2KX-L-GP PEG_RX_CON_N1 AC10 AA16
16 PEG_RX_CPU_N1 PEX_TX1# PEX_IOVDDQ_4
AA18
PEG_TX_CON_P1 PEX_IOVDDQ_5
16 PEG_TX_CON_P1 AF7 AA19
PEG_TX_CON_N1 PEX_RX1 PEX_IOVDDQ_6
16 PEG_TX_CON_N1 AE7 AA20
PEX_RX1# PEX_IOVDDQ_7
AA21
PEG_RX_CPU_P2 PEG_RX_CON_P2 PEX_IOVDDQ_8
16 PEG_RX_CPU_P2 PX C7621 1 2 SCD1U16V2KX-L-GP AD11
PEX_TX2 PEX_IOVDDQ_9
AB22
16 PEG_RX_CPU_N2
PEG_RX_CPU_N2 PX C7622 1 2 SCD1U16V2KX-L-GP PEG_RX_CON_N2 AC11
PEX_TX2# PEX_IOVDDQ_10
AC23
AD24
PEG_TX_CON_P2 PEX_IOVDDQ_11
16 PEG_TX_CON_P2 AE9 AE25
PEG_TX_CON_N2 PEX_RX2 PEX_IOVDDQ_12
16 PEG_TX_CON_N2 AF9 AF26
PEX_RX2# PEX_IOVDDQ_13
AF27
PEX_IOVDDQ_14
16 PEG_RX_CPU_P3
PEG_RX_CPU_P3 PX C7617 1 2 SCD1U16V2KX-L-GP PEG_RX_CON_P3 AC12
PEX_TX3
PEG_RX_CPU_N3 PX C7620 1 2 SCD1U16V2KX-L-GP PEG_RX_CON_N3 AB12
16 PEG_RX_CPU_N3 PEX_TX3#
PEG_TX_CON_P3 AG9
16 PEG_TX_CON_P3 PEG_TX_CON_N3 PEX_RX3
16 PEG_TX_CON_N3 AG10
PEX_RX3#
AB13
PEX_TX4
AC13
PEX_TX4#
AF10
PEX_RX4
AE10
PEX_RX4# 3D3V_AON_S0
NC FOR GF119
AD14
PEX_TX5
AC14
PEX_TX5# PEX_PLL_HVDD_1
AA8 210mA
AA9
PEX_PLL_HVDD_2

SC4D7U6D3V3KX-L-GP
C AE12 C
PEX_RX5

SC4D7U6D3V3KX-L-GP
AF12
PEX_RX5#
PX

NC FOR GM108
AB8
PEX_SVDD_3V3

1
AC15
PEX_TX6 PX PX

1
AB15 C7625
PEX_TX6#

SCD1U16V2KX-L-GP
C7623 C7624

2
AG12
PEX_RX6

2
AG13
PEX_RX6#
AB16
PEX_TX7
AC16
PEX_TX7#
AF13
AE13
PEX_RX7 Near GPU
PEX_RX7#
100nF(X5R) 4.7uF(X5R)
AD17
AC17
PEX_TX8 K0402 ×1 K0603 ×2
PEX_TX8#
AE15
PEX_RX8
AF15
PEX_RX8#
AC18 F2
PEX_TX9 VDD_SENSE NVVDD_SENSE 85
AB18
PEX_TX9#
AG15 F1
PEX_RX9 GND_SENSE NVGND_SENSE 85
AG16
PEX_RX9#
AB19
PEX_TX10
AC19
PEX_TX10#
AF16
PEX_RX10
AE16
PEX_RX10#
AD20
PEX_TX11
AC20
PEX_TX11#
AE18
PEX_RX11
AF18
PEX_RX11#
NC FOR GF117/GK208/GM108

AC21
PEX_TX12 DY
AB21
B PEX_TX12# R7304 200R2F-L1-GP B
AG18 AF22 PEX_TSTCLK_OUT 1 2
PEX_RX12 PEX_TSTCLK_OUT PEX_TSTCLK_OUT#
AG19 AE22
PEX_RX12# PEX_TSTCLK_OUT#
1D05V_VGA_S0
AD23
PEX_TX13 100nF(X7R) 1uF(X5R) 4.7uF(X5R)
AE23
PEX_TX13# K0402 ×1 K0603 ×1 K0805 ×1
AF19 AA14
PEX_RX13 PEX_PLLVDD_1
AE19 AA15
PEX_RX13# PEX_PLLVDD_2

2
AF24
PEX_TX14

1
SCD1U16V2KX-L-GP
AE24 C7626 C7627 C7628
PEX_TX14#
PX PX PX

SC1U10V2KX-L1-GP

SC4D7U6D3V3KX-L-GP
1
AE21
PEX_RX14

2
AF21
PEX_RX14# TESTMODE
AD9
TESTMODE
AG24
PEX_TX15
AG25
PEX_TX15#
AG21
AG22
PEX_RX15 Under GPU Near GPU
PEX_RX15#

AF25 PEX_TERMP
PEX_TERMP
PX PX
1

N16S-GM-S-A2-GP R7605 R7606


2K49R2F-2-L-GP 10KR2J-L-GP
PX Wistron Confidential document, Anyone can not
2

Duplicate, Modify, Forward or any other purpose


application without get Wistron permission

A A

Brook_BH

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU (PEG)
Size Document Number Rev
A2
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 76 of 106
5 4 3 2 1
5 4 3 2 1

GPU1H 5 OF 14
GPU1G 4 OF 14 5/14 IFPC
4/14 IFPAB IFPC GPU1J 7 OF 14
7/14 IFPEF
T6 IFPC_RSET GF119/GK208
IFPA_TXC# AC4 GF119/GK208
IFPA_TXC AC3 DVI/HDMI DP DVI-DL DVI-SL/HDMI DP
AA6 IFPAB_RSET M7 IFPC_PLLVDD_1 I2CW_SDA IFPC_AUX_I2CW_SDA# N5 I2CY_SDA I2CY_SDA IFPE_AUX_I2CY_SDA# J3
IFPA_TXD0# Y3 N7 IFPC_PLLVDD_2 I2CW_SCL IFPC_AUX_I2CW_SCL N4 I2CY_SCL I2CY_SCL IFPE_AUX_I2CY_SCL J2
IFPA_TXD0 Y4 J7 IFPEF_PLLVDD_1
V7 IFPAB_PLLVDD_1 TXC IFPC_L3# N3 TXC TXC IFPE_L3# J1
D
IFPA_TXD1# AA2 TXC IFPC_L3 N2 TXC TXC IFPE_L3 K1 D
W7 IFPAB_PLLVDD_2 IFPA_TXD1 AA3 K7 IFPEF_PLLVDD_2
PX TXD0 IFPC_L2# R3 TXD0 TXD0 IFPE_L2# K3

NC FOR GF117/GM108
TXD0 IFPC_L2 R2 TXD0 TXD0 IFPE_L2 K2
IFPA_TXD2# AA1
IFPA_TXD2 AB1 TXD1 IFPC_L1# R1 K6 IFPEF_RSET TXD1 TXD1 IFPE_L1# M3

NC FOR GF117/GM108
TXD1 IFPC_L1 T1 TXD1 TXD1 IFPE_L1 M2

NC FOR GF117/GM108
NC FOR GF117/GM108

IFPA_TXD3# AA5 TXD2 IFPC_L0# T3 TXD2 TXD2 IFPE_L0# M1


IFPA_TXD3 AA4 TXD2 IFPC_L0 T2 TXD2 TXD2 IFPE_L0 N1

AB4 GF117 IFPE NC FOR GK208


IFPB_TXC#
IFPB_TXC AB5 P6 IFPC_IOVDD NC GPIO15 C3
NC FOR GF117/GM108
HPD_E HPD_E GPIO18 C2
W6 AB2 N16S-GM-S-A2-GP
IFPA_IOVDD IFPB_TXD4#

NC FOR GF117/GK208/GM108
IFPB_TXD4 AB3
GPU1I 6 OF 14 NC FOR GF117
Y6 IFPB_IOVDD
6/14 IFPD
IFPB_TXD5# AD2 H6 IFPE_IOVDD
IFPB_TXD5 AD3 GF119/GK208
GF119/GK208
U6 IFPD_RSET J6 IFPF_IOVDD DVI-DL DVI-SL/HDMI DP
DVI/HDMI DP
IFPB_TXD6# AD1 I2CZ_SDA IFPF_AUX_I2CZ_SDA# H4
IFPB_TXD6 AE1 I2CZ_SCL IFPF_AUX_I2CZ_SCL H3
T7 IFPD_PLLVDD_2 I2CX_SDA IFPD_AUX_I2CX_SDA# P4
I2CX_SCL IFPD_AUX_I2CX_SCL P3
IFPB_TXD7# AD5 R7 IFPD_PLLVDD_1 TXC IFPF_L3# J5
C AD4 J4 C
IFPB_TXD7 TXC IFPF_L3
TXC IFPD_L3# R5
TXC IFPD_L3 R4 TXD3 TXD0 IFPF_L2# K5
TXD3 TXD0 IFPF_L2 K4

NC FOR GF117/GM108
GF117 TXD0 IFPD_L2# T5
T4 L4

NC FOR GF117/GM108
TXD0 IFPD_L2 TXD4 TXD1 IFPF_L1#
B3 IFPF TXD4 TXD1 L3

NC FOR GF117/GM108
NC
IFPAB GPIO14
IFPD
TXD1
TXD1
IFPD_L1# U4
U3
IFPF_L1
M5
IFPD_L1 TXD5 TXD2 IFPF_L0#
N16S-GM-S-A2-GP TXD5 TXD2 M4
IFPF_L0
TXD2 IFPD_L0# V4
V3
PX TXD2 IFPD_L0 NC FOR GK208

GF117 F7
HPD_F GPIO19
R6 IFPD_IOVDD NC GPIO17 D4
NC FOR GF117

N16S-GM-S-A2-GP

N16S-GM-S-A2-GP
PX
GPU1K 3 OF 14 PX
3/14 DACA

GF117/GM108 GF117 GM108/GK208 RN7701


B I2CA_SCL B
W5 DACA_VDD NC NC I2CA_SCL B7 1 4
NC A7 I2CA_SDA 2 3
I2CA_SDA
AE2 DACA_VREF TSEN_VREF
SRN1K8J-GP
AF2 DACA_RSET NC NC
NC
DACA_HSYNC AE3
AE4
PX
DACA_VSYNC

NC DACA_RED AG3

NC DACA_GREEN AF4

NC DACA_BLUE AF3

GM108
GK208
GF117

N16S-GM-S-A2-GP

PX

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
A Brook_BH application without get Wistron permission A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU (DIGITALOUT)
Size Document Number Rev
A3
Brook_BH -1M
Date: Thursday, February 05, 2015 Sheet 77 of 106
5 4 3 2 1
5 4 3 2 1

PX
1D5V_VGA_S0
81,82,83,84 FBA_D[63..0]
GPU1B 2 OF 14
FBA_CMD28 1
RN7801
4
SRN100J-3-GP
PX RN7813 SRN100J-3-GP
1D5V_VGA_S0
2/14 FBA FBA_CMD28 2 3 FBA_CMD27 1 4
FBA_D0 E18 NC F3 FB_CLAMP FBA_CMD27 2 3
FBA_D0 FB_CLAMP 1D5V_VGA_S0
FBA_D1 F18
FBA_D1 1D5V_VGA_S0
FBA_D2 E16 GF119
FBA_CMD9 1 4
FBA_D3 FBA_D2 FBA_CMD9 FBA_CMD24
F17 2 3 1 4
FBA_D3

1
FBA_D4 D20 FBA_CMD24 2 3
FBA_D5 FBA_D4
FBA_D6
D21
F20
FBA_D5
R7869
10KR2J-L-GP
RN7802
SRN100J-3-GP PX RN7814
FBA_D6
FBA_D7 E21
FBA_D7 PX PX 1D5V_VGA_S0
SRN100J-3-GP
FBA_D8 E15
FBA_D8
RN7804
PX 1D5V_VGA_S0

2
FBA_D9 D15 FBA_CMD11 1 4 SRN100J-3-GP RN7815 SRN100J-3-GP
FBA_D10 FBA_D9 FBA_CMD11 FBA_CMD13
F15 2 3 1 4
FBA_D11 FBA_D10 FBA_CMD13
D
FBA_D12
F13
C13
FBA_D11 PX 1D5V_VGA_S0 2 3 D
FBA_D12 1D5V_VGA_S0
FBA_D13 B13 FBA_CMD15 1 4
FBA_D14 FBA_D13 FBA_CMD15 FBA_CMD25
E13 2 3 1 4
FBA_D15 FBA_D14 FBA_CMD25
FBA_D16
D13
FBA_D15 PXRN7803 2 3

FBA_D17
B15
C16
FBA_D16 SRN100J-3-GP PX RN7816
FBA_D18 FBA_D17
FBA_D19
A13
FBA_D18 PX RN7806 1D5V_VGA_S0
SRN100J-3-GP

FBA_D20
A15
B18
FBA_D19 FBA_CMD26 1 4
SRN100J-3-GP
PX RN7817 SRN100J-3-GP
1D5V_VGA_S0
FBA_D21 FBA_D20 FBA_CMD26 FBA_CMD7
A18 2 3 1 4
FBA_D22 FBA_D21 FBA_CMD7
A19 1D5V_VGA_S0 2 3
FBA_D23 FBA_D22
C19 1D5V_VGA_S0
FBA_D24 FBA_D23 FBA_CMD21
B24 1 4
FBA_D25 FBA_D24 FBA_CMD21 FBA_CMD10
C23 2 3 1 4
FBA_D26 FBA_D25 FBA_CMD10
FBA_D27
A25
FBA_D26 PXRN7805 2 3

FBA_D28
A24
FBA_D27 PXRN7818
FBA_D29
A21
B21
FBA_D28
SRN100J-3-GP
PX
RN7808 SRN100J-3-GP
1D5V_VGA_S0
SRN100J-3-GP
FBA_D29 1D5V_VGA_S0
FBA_D30 FBA_CMD30
FBA_D31
C20
C21
FBA_D30 FBA_CMD30
1
2
4
3 FBA_CMD5 PX1 RN7819 SRN100J-3-GP
4
FBA_D32 FBA_D31 FBA_CMD5
R22 1D5V_VGA_S0 2 3
FBA_D33 FBA_D32
R24 C27 1D5V_VGA_S0
FBA_D34 FBA_D33 FBA_CMD0 FBA_CMD0 81,82 FBA_CMD12
T22 C26 1 4
FBA_D35 FBA_D34 FBA_CMD1 FBA_CMD1 82 FBA_CMD12 FBA_CMD4
R23 E24 2 3 1 4
FBA_D36 FBA_D35 FBA_CMD2 FBA_CMD2 81 FBA_CMD4
FBA_D37
N25
FBA_D36 FBA_CMD3
F24
FBA_CMD3 81,82 PXRN7807 2 3

FBA_D38
N26
N23
FBA_D37 FBA_CMD4
D27
D26
FBA_CMD4 81,82,83,84 SRN100J-3-GP PXRN7820
FBA_D38 FBA_CMD5 FBA_CMD5 81,82,83,84 1D5V_VGA_S0
FBA_D39
FBA_D40
N24
FBA_D39 FBA_CMD6
F25
FBA_CMD6 81,82,83,84 FBA_CMD23 PX
RN7810 SRN100J-3-GP SRN100J-3-GP
1D5V_VGA_S0
FBA_D41
V23
V22
FBA_D40 FBA_CMD7
F26
F23
FBA_CMD7 81,82,83,84 FBA_CMD23
1
2
4
3 FBA_CMD29 PX
1
RN7821
4
SRN100J-3-GP

FBA_D42 FBA_D41 FBA_CMD8 FBA_CMD8 81,82,83,84 FBA_CMD29


T23 G22 2 3
FBA_D43 FBA_D42 FBA_CMD9 FBA_CMD9 81,82,83,84
U22 G23 1D5V_VGA_S0 1D5V_VGA_S0
FBA_D44 FBA_D43 FBA_CMD10 FBA_CMD10 81,82,83,84
Y24 G24
FBA_D45 FBA_D44 FBA_CMD11 FBA_CMD11 81,82,83,84 FBA_CMD8 FBA_CMD22
AA24 F27 1 4 1 4
FBA_D46 FBA_D45 FBA_CMD12 FBA_CMD12 81,82,83,84 FBA_CMD8 FBA_CMD22
Y22 G25 2 3 2 3
FBA_D47 FBA_D46 FBA_CMD13 FBA_CMD13 81,82,83,84
FBA_D48
AA23
FBA_D47 FBA_CMD14
G27
FBA_CMD14 81,82,83,84 PX
FBA_D49
AD27
AB25
FBA_D48 FBA_CMD15
G26
M24
FBA_CMD15 81,82,83,84 PXSRN100J-3-GP
RN7809 RN7822
SRN100J-3-GP
FBA_D50 FBA_D49 FBA_CMD16 FBA_CMD16 83,84
AD26 M23
FBA_D51 FBA_D50 FBA_CMD17 FBA_CMD17 84
AC25 K24 1D5V_VGA_S0
FBA_D52 FBA_D51 FBA_CMD18 FBA_CMD18 83 SRN100J-3-GP
C AA27 K23 RN7811 C
FBA_D53 FBA_D52 FBA_CMD19 FBA_CMD19 83,84 FBA_CMD14
AA26 M27 1 4
FBA_D54 FBA_D53 FBA_CMD20 FBA_CMD20 81,82,83,84 FBA_CMD14
W26 M26 2 3
FBA_D55 FBA_D54 FBA_CMD21 FBA_CMD21 81,82,83,84
Y25 M25
FBA_D56 FBA_D55 FBA_CMD22 FBA_CMD22 81,82,83,84
FBA_D57
R26
T25
FBA_D56 FBA_CMD23
K26
K22
FBA_CMD23 81,82,83,84 PX
FBA_D58 FBA_D57 FBA_CMD24 FBA_CMD24 81,82,83,84
N27 J23 1D5V_VGA_S0
FBA_D59 FBA_D58 FBA_CMD25 FBA_CMD25 81,82,83,84
R27 J25
FBA_D60 FBA_D59 FBA_CMD26 FBA_CMD26 81,82,83,84
V26 J24
FBA_D61 FBA_D60 FBA_CMD27 FBA_CMD27 81,83 FBA_CMD6
V27 K27 1 4
FBA_D62 FBA_D61 FBA_CMD28 FBA_CMD28 81,82,83,84 FBA_CMD6
W27 K25 2 3
FBA_D63 FBA_D62 FBA_CMD29 FBA_CMD29 81,82,83,84
W25 J27
FBA_D63 FBA_CMD30 FBA_CMD30 82,84 RN7812
J26
FBA_CMD31 SRN100J-3-GP
D19 20140930 Rober
81,82
81,82
FBA_DQM0
FBA_DQM1
D14
FBA_DQM0
FBA_DQM1
PX
C17 GF117/GF119 1D5V_VGA_S01D5V_VGA_S0
81,82 FBA_DQM2 FBA_DQM2
C22 GK208 1D5V_VGA_S0 1D5V_VGA_S0 1D5V_VGA_S0 1D5V_VGA_S0
81,82 FBA_DQM3 FBA_DQM3
P24 1D5V_VGA_S0
83,84 FBA_DQM4 FBA_DQM4
W24 NC B19
83,84 FBA_DQM5 FBA_DQM5 NC#B19
AA25
83,84 FBA_DQM6 FBA_DQM6 FBA_DEBUG0
83,84 FBA_DQM7
U25
FBA_DQM7 FBA_DEBUG0 FBA_DEBUG0
F22
FBA_DEBUG1
DY R7822 1 2 60D4R2F-GP
PX PX
FBA_DEBUG1 FBA_DEBUG1
J22 DY R7823 1 2 60D4R2F-GP
PX PX PX PX

1
C7805 C7811

1
81,82 FBA_DQS0 E19 C7802 C7803 C7801 C7804

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
FBA_DQS_WP0
81,82 FBA_DQS1 C15

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
FBA_DQS_WP1

2
81,82 FBA_DQS2 B16 D24
FBA_DQS_WP2 FBA_CLK0 FBA_CLK0 81,82

2
81,82 FBA_DQS3 B22 D25
FBA_DQS_WP3 FBA_CLK0# FBA_CLK0# 81,82
83,84 FBA_DQS4 R25 N22
FBA_DQS_WP4 FBA_CLK1 FBA_CLK1 83,84
83,84 FBA_DQS5 W23 M22
FBA_DQS_WP5 FBA_CLK1# FBA_CLK1# 83,84
83,84 FBA_DQS6 AB26
FBA_DQS_WP6
83,84 FBA_DQS7 T26
FBA_DQS_WP7

81,82 FBA_DQSN0 F19 D18


FBA_DQS_RN0 FBA_WCK01
81,82 FBA_DQSN1 C14 C18
FBA_DQS_RN1 FBA_WCK01#
81,82 FBA_DQSN2 A16 D17
FBA_DQS_RN2 FBA_WCK23
81,82 FBA_DQSN3 A22 D16
FBA_DQS_RN3 FBA_WCK23#
83,84
83,84
FBA_DQSN4
FBA_DQSN5
P25
W22
FBA_DQS_RN4 FBA_WCK45
T24
U24
97mA
FBA_DQS_RN5 FBA_WCK45# 1D05V_VGA_S0
83,84 FBA_DQSN6 AB27 V24
B FBA_DQS_RN6 FBA_WCK67 B
83,84 FBA_DQSN7 T27
FBA_DQS_RN7 FBA_WCK67#
V25 100nF(X7R)
K0402 ×3 30ohm@100MHz ESR=0.01 PX
GF119 L7801
F16 FB_PLLA_DLLA_VDD 1 2
FB_PLLAVDD_1
NC
P22 MPZ1608S300AT-GP
FB_PLLAVDD_2
1

1
FB_PLLAVDD H22
FB_DLLAVDD
PX
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

C7823 C7824 C7825 C7826


GF117 PX PX PX SC22U6D3V5MX-L3-GP
2

2
22uF(X5R)
K0805 ×1

FB_VREF
TP7801 1 D23
FB_VREF_PROBE Under GPU
N16S-GM-S-A2-GP Near GPU

PX

FBCLK Termination placed near each VRAM


Memory ODTx, CKEx and RST Termination
at board edge side
FBA_CMD19
FBA_CMD16
FBA_CMD0 FBA_CLK1 FBA_CLK0
FBA_CMD3
FBA_CMD20
1

R7804 R7805
2

162R2F-GP 162R2F-GP
R7808 R7809 R7810 R7811 R7812 PX PX
10KR2J-L-GP 10KR2J-L-GP 10KR2J-L-GP 10KR2J-L-GP 10KR2J-L-GP
2

A A
FBA_CLK1# FBA_CLK0#
1

Wistron Confidential document, Anyone can not


PX PX PX PX PX Duplicate, Modify, Forward or any other purpose
CHECK N16 Design guide P.98 Table 6-7 Brook_BH application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU (VRAM I/F)


Size Document Number Rev
A2
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 78 of 106

5 4 3 2 1
5 4 3 2 1

1V_VGA_CORE_S0
PX
GPU1E 11 OF 14
11/14 NVVDD
K10
VDD_001
K12
VDD_002
K14
VDD_003
K16
VDD_004

1
C8010 C8013 C8017 C8004 C8005 C8006 C8002 C8007 C8008 C8003 K18
VDD_005 GPU1F
4.7uF(X5R) PX

SC4D7U6D3V3KX-L-GP

SC4D7U6D3V3KX-L-GP

SC4D7U6D3V3KX-L-GP

SC4D7U6D3V3KX-L-GP

SC4D7U6D3V3KX-L-GP

SC4D7U6D3V3KX-L-GP

SC4D7U6D3V3KX-L-GP

SC4D7U6D3V3KX-L-GP

SC4D7U6D3V3KX-L-GP

SC4D7U6D3V3KX-L-GP
L11 13 OF 14
VDD_006
L13 13/14 GND
K0603 ×10 VDD_007

2
PX PX PX PX PX PX PX PX PX PX L15
VDD_008
A2
GND_001 GND_071
M13
L17 AB17 M15
VDD_009 GND_005 GND_072
M10 AB20 M17
VDD_010 GND_006 GND_073
M12 AB24 N10
VDD_011 GND_007 GND_074
M14 AC2 N12
VDD_012 GND_008 GND_075
Under GPU M16
M18
VDD_013
AC22
AC26
GND_009 GND_076
N14
N16
VDD_014 GND_010 GND_077
N11 AC5 N18
VDD_015 GND_011 GND_078
D N13 AC8 P11 D
VDD_016 GND_012 GND_079
N15 AD12 P13
VDD_017 GND_013 GND_080
N17 AD13 P15
VDD_018 GND_014 GND_081
P10 A26 P17
VDD_019 GND_002 GND_082

1
C8009 C8012 C8011 C8036 C8035 P12 AD15 P2
VDD_020 GND_015 GND_083
4.7uF(X5R)

SC4D7U6D3V3KX-L-GP

SC4D7U6D3V3KX-L-GP

SC4D7U6D3V3KX-L-GP

SC4D7U6D3V3KX-L-GP

SC4D7U6D3V3KX-L-GP
P14 AD16 P23
VDD_021 GND_016 GND_084
P16 AD18 P26
K0805 ×5 VDD_022 GND_017 GND_085

2
PX PX PX PX PX P18
VDD_023
AD19
GND_018 GND_086
P5
R11 AD21 R10
VDD_024 GND_019 GND_087
R13 AD22 R12
VDD_025 GND_020 GND_088
Near GPU R15
R17
VDD_026
AE11
AE14
GND_021 GND_089
R14
R16
VDD_027 GND_022 GND_090
T10 AE17 R18
VDD_028 GND_023 GND_091
T12 AE20 T11
VDD_029 GND_024 GND_092
T14 AB11 T13
VDD_030 GND_003 GND_093
T16 AF1 T15
VDD_031 GND_025 GND_094
T18 AF11 T17
VDD_032 GND_026 GND_095
U11 AF14 U10
VDD_033 GND_027 GND_096
1uF(X5R) U13
VDD_034
AF17
GND_028 GND_097
U12

1
C8014 C8015 C8016 C8037 U15 AF20 U14
K0402 ×4 PX PX PX PX
VDD_035 GND_029 GND_098

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
U17 AF23 U16
VDD_036 GND_030 GND_099
V10 AF5 U18
VDD_037 GND_031 GND_100

2
V12 AF8 U2
VDD_038 GND_032 GND_101
V14 AG2 U23
VDD_039 GND_033 GND_102
V16 AG26 U26
VDD_040 GND_034 GND_103
V18 AB14 U5
VDD_041 GND_004 GND_104
B1 V11
GND_035 GND_105
Under GPU N16S-GM-S-A2-GP
B11
B14
GND_036 GND_106
V13
V15
GND_037 GND_107
B17 V17
GND_038 GND_108

Power current=26A
B20 Y2
GND_039 GND_109
B23 Y23
GND_040 GND_110
B27 Y26
GND_041 GND_111
B5 Y5
GND_042 GND_112
B8
GND_043

1
PX PX PX PX PX PX PX E11
GND_044
22uF(X5R) C8018 C8019 C8023 C8026 C8033 C8038 C8039 E14
GND_045

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP
E17
M0805 ×1 GND_046

2
E2
GND_047
E20
GND_048
E22
GND_049
C E25 C
GND_050
E5
GND_051
E8
GND_052
H2
GND_053
Near GPU H23
H25
GND_054
GND_055
H5
GND_056
K11
GND_057
K13
GND_058

Power current=60mA
K15
GND_059
K17
GND_060
L10
GND_061
L12
GND_062
3D3V_VGA_S0 L14
GND_063
0.1uF(X7R) 1uF(X5R) L16
GND_064
L18
K0402 ×2 K0603 ×1 L2
GND_065
GND_066
L23
GND_067
L25
GND_068
L5 AA7
GND_069 GND_F
M11 AB7
GND_070 GND_H
1

C8041 GPU1D 12 OF 14
1

1
SC4D7U6D3V3KX-L-GP

C8022 12/14 FBVDDQ

PX
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SC1U10V2KX-L1-GP

C8020 C8021
2

PX PX PX B26
FBVDDQ_01
N16S-GM-S-A2-GP
2

C25
FBVDDQ_02
GPU1C 14 OF 14 Near GPU E23
E26
FBVDDQ_03
FBVDDQ_04
14/14 XVDD/VDD33 F14
FBVDDQ_05
AD10 G8
Under GPU F21
G13
FBVDDQ_06
NC#AD10 VDD33_1 FBVDDQ_07
AD7 G9 G14
NC#AD7 GM108 VDD33_2 FBVDDQ_08
3V3_AON VDD33_3
G10 1uF(X5R) G15
FBVDDQ_09
3V3_AON G12 G16
VDD33_4 K0402 ×1 3D3V_AON_S0
G18
FBVDDQ_10
FBVDDQ_11
TP8001 1GPU_NC_F11 F11 G19
3V3AUX FBVDDQ_12
G20
FBVDDQ_13
V5 G21
NC#V5 FBVDDQ_14
V6 L22
NC#V6 FBVDDQ_19
1

C8042 L24
FBVDDQ_20
1
SC4D7U6D3V3KX-L-GP

C8025 L26
FBVDDQ_21
1

B B
SC1U10V2KX-L1-GP

M21
FBVDDQ_22
2

PX PX
SCD1U16V2KX-L-GP

C8024 N21
FBVDDQ_23
2

CONFIGURABLE PX R21
FBVDDQ_24
2

POWER CHANNELS T21


FBVDDQ_25
* nc on substrate V21
FBVDDQ_26
W21
FBVDDQ_27
G1
G2
NC#G1 Near GPU
NC#G2 GF117
G3
G4
NC#G3 Under GPU GF119
NC#G4 GK208
G5
NC#G5 0.1uF(X7R)

Power current=1.37A
G6 H24 FBVDDQ
G7
NC#G6 K0402 ×1 H26
FBVDDQ_15
FBVDDQ
NC#G7 1D5V_VGA_S0 FBVDDQ_16
J21 FBVDDQ
FBVDDQ_17
K21 FBVDDQ
FBVDDQ_18
V1
NC#V1
V2
NC#V2

W1
NC#W1 PX PX
1

1
W2 C8031 C8032
NC#W2
PX
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC4D7U6D3V3KX-L-GP

SC4D7U6D3V3KX-L-GP
W3 C8027 C8028 C8029 C8030
NC#W3
W4
NC#W4 PX
2

PX 2 PX
1D5V_VGA_S0
N16S-GM-S-A2-GP

PX
Under GPU
CHECK N16 Design guide P.96 6.1.7 GPU Driver Calibration
0.1uF(X7R) 1uF(X7R) 4.7uF(X5R)
K0402 ×2 K0603 ×2 K0603 ×2 PX
D22 FB_CAL_PD_VDDQ 1 2
FB_CAL_PD_VDDQ R8001 40D2R2F-GP

C24 FB_CAL_PU_GND
FB_CAL_PU_GND
1

C8034
1

A FB_CAL_TERM_GND A
PX
SC10U10V5KX-L1-GP

B25
C8040 FB_CAL_TERM_GND
2
SC22U6D3V5MX-L3-GP

PX
2

N16S-GM-S-A2-GP Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
PX Brook_BH

1
PX PX

51D1R2F-GP

42D2R2F-GP
Near GPU
10uF(X5R)
R8002 R8003
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
M0805 ×1

2
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU (POWER/GND)
Size Document Number Rev
A2
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 80 of 106
5 4 3 2 1
5 4 3 2 1

1D5V_VGA_S0 VRAM_A
1D5V_VGA_S0 VRAM_A
VRAM1
VRAM2
B2 VDD DQL0 E3 FBA_D11 78,82
D9 VDD DQL1 F7 FBA_D13 78,82 B2 VDD DQL0 E3 FBA_D5 78,82
G7 VDD DQL2 F2 FBA_D8 78,82 D9 VDD DQL1 F7 FBA_D1 78,82
K2 VDD DQL3 F8 FBA_D15 78,82 G7 VDD DQL2 F2 FBA_D7 78,82
K8 VDD DQL4 H3 FBA_D10 78,82 K2 VDD DQL3 F8 FBA_D0 78,82
N1 VDD DQL5 H8 FBA_D14 78,82 K8 VDD DQL4 H3 FBA_D4 78,82
N9 VDD DQL6 G2 FBA_D9 78,82 N1 VDD DQL5 H8 FBA_D3 78,82
R1 VDD DQL7 H7 FBA_D12 78,82 N9 VDD DQL6 G2 FBA_D6 78,82
R9 VDD R1 VDD DQL7 H7 FBA_D2 78,82
D
DQU0 D7 FBA_D17 78,82 R9 VDD
D
A1 VDDQ DQU1 C3 FBA_D22 78,82 DQU0 D7 FBA_D31 78,82
A8 VDDQ DQU2 C8 FBA_D16 78,82 A1 VDDQ DQU1 C3 FBA_D25 78,82
C1 VDDQ DQU3 C2 FBA_D23 78,82 A8 VDDQ DQU2 C8 FBA_D30 78,82
C9 VDDQ DQU4 A7 FBA_D19 78,82 C1 VDDQ DQU3 C2 FBA_D24 78,82
D2 VDDQ DQU5 A2 FBA_D21 78,82 C9 VDDQ DQU4 A7 FBA_D29 78,82
E9 VDDQ DQU6 B8 FBA_D18 78,82 D2 VDDQ DQU5 A2 FBA_D27 78,82
F1 VDDQ DQU7 A3 FBA_D20 78,82 E9 VDDQ DQU6 B8 FBA_D28 78,82
H2 VDDQ F1 VDDQ DQU7 A3 FBA_D26 78,82
H9 VDDQ DQSU C7 FBA_DQS2 78,82 H2 VDDQ
DQSU# B7 FBA_DQSN2 78,82 H9 VDDQ DQSU C7 FBA_DQS3 78,82
VRAM3_VREFD H1 B7
VREFDQ DQSU# FBA_DQSN3 78,82
VRAM3_VREFC M8 F3 VRAM3_VREFD H1
VREFCA DQSL FBA_DQS1 78,82 VREFDQ
VRAM_ZQ3 L8 G3 VRAM3_VREFC M8 F3
ZQ DQSL# FBA_DQSN1 78,82 VREFCA DQSL FBA_DQS0 78,82
VRAM_ZQ4 L8 G3
ZQ DQSL# FBA_DQSN0 78,82
ODT K1 FBA_CMD0 78,82
2

VRAM_A 78,82,83,84 FBA_CMD7 N3 A0 ODT K1 FBA_CMD0 78,82

2
R8101 P7 VRAM_A N3
78,82,83,84 FBA_CMD10 A1 78,82,83,84 FBA_CMD7 A0
243R2F-L1-GP 78,82,83,84 P3 L2 R8104 P7
FBA_CMD24 A2 CS# FBA_CMD2 78 78,82,83,84 FBA_CMD10 A1
N2 T2 1D5V_VGA_S0 243R2F-L1-GP P3 L2
78,82,83,84 FBA_CMD6 A3 RESET# FBA_CMD20 78,82,83,84 78,82,83,84 FBA_CMD24 A2 CS# FBA_CMD2 78
78,82,83,84 FBA_CMD22 P8 A4 78,82,83,84 FBA_CMD6 N2 A3 RESET# T2 FBA_CMD20 78,82,83,84
1

78,82,83,84 FBA_CMD26 P2 A5 78,82,83,84 FBA_CMD22 P8 A4

1
1
78,82,83,84 FBA_CMD5 R8 A6 VRAM_A 78,82,83,84 FBA_CMD26 P2 A5
R2 L9 R8102 R8
78,82,83,84 FBA_CMD21 A7 NC#L9 1K33R2F-GP 78,82,83,84 FBA_CMD5 A6
78,82,83,84 FBA_CMD8 T8 A8 NC#L1 L1 78,82,83,84 FBA_CMD21 R2 A7 NC#L9 L9
78,82,83,84 FBA_CMD4 R3 A9 NC#J9 J9 78,82,83,84 FBA_CMD8 T8 A8 NC#L1 L1
78,82,83,84 FBA_CMD25 L7 A10/AP NC#J1 J1 78,82,83,84 FBA_CMD4 R3 A9 NC#J9 J9

2
78,82,83,84 FBA_CMD23 R7 A11 78,82,83,84 FBA_CMD25 L7 A10/AP NC#J1 J1
N7 82 VRAM3_VREFD VRAM3_VREFD R7
C 78,82,83,84 FBA_CMD9 A12/BC# 78,82,83,84 FBA_CMD23 A11 C
78,82,83,84 FBA_CMD12 T3 A13 VSS A9 78,82,83,84 FBA_CMD9 N7 A12/BC#

1
78,82,83,84 FBA_CMD14 T7 A14 VSS B3 VRAM_A VRAM_A 78,82,83,84 FBA_CMD12 T3 A13 VSS A9

1
M7 E1 R8103 T7 B3 VRAM3_VREFD
NC#M7 VSS 1K33R2F-GP C8102 78,82,83,84 FBA_CMD14 A14 VSS
G8 M7 E1
VRAM_A

SCD01U50V2KX-L-GP
VSS NC#M7 VSS

1
78,82,83,84 FBA_CMD29 M2 BA0 VSS J2 VSS G8 C8117

2
78,82,83,84 FBA_CMD13 N8 J8 78,82,83,84 FBA_CMD29 M2 J2

SCD01U50V2KX-L-GP
BA1 VSS BA0 VSS

2
78,83 FBA_CMD27 M3 BA2 VSS M1 78,82,83,84 FBA_CMD13 N8 BA1 VSS J8

2
VSS M9 78,83 FBA_CMD27 M3 BA2 VSS M1
VSS P1 VSS M9
J7 P9 1D5V_VGA_S0 P1
78,82 FBA_CLK0 CK VSS VSS
78,82 FBA_CLK0# K7 CK# VSS T1 78,82 FBA_CLK0 J7 CK VSS P9
VSS T9 78,82 FBA_CLK0# K7 CK# VSS T1

1
78,82 FBA_CMD3 K9 CKE VRAM_A VSS T9
B1 R8106 K9
VSSQ 1K33R2F-GP 78,82 FBA_CMD3 CKE
VSSQ B9 VSSQ B1
78,82 FBA_DQM2 D3 DMU VSSQ D1 VSSQ B9
E7 D8 D3 D1 VRAM3_VREFC
78,82 FBA_DQM1 DML VSSQ 78,82 FBA_DQM3 DMU VSSQ

2
E2 78,82 FBA_DQM0 E7 D8
VSSQ DML VSSQ VRAM_A

1
E8 82 VRAM3_VREFC VRAM3_VREFC E2
VSSQ VSSQ C8119
78,82,83,84 FBA_CMD28 L3 F9 E8

SCD01U50V2KX-L-GP
WE# VSSQ VSSQ

1
78,82,83,84 FBA_CMD15 K3 CAS# VSSQ G1 VRAM_A VRAM_A 78,82,83,84 FBA_CMD28 L3 WE# VSSQ F9

2
1
J3 G9 R8105 K3 G1
78,82,83,84 FBA_CMD11 RAS# VSSQ 1K33R2F-GP C8107 78,82,83,84 FBA_CMD15 CAS# VSSQ

SCD01U50V2KX-L-GP
78,82,83,84 FBA_CMD11 J3 RAS# VSSQ G9

2
2
H5TC4G63AFR-11C-GP
72.05463.D0U H5TC4G63AFR-11C-GP
72.05463.D0U
B B

78,82,83,84 FBA_D[63..0]

FOR VRAM2
1D5V_VGA_S0

FOR VRAM1
1D5V_VGA_S0
1D5V_VGA_S0 1D5V_VGA_S0

VRAM_A VRAM_A VRAM_A VRAM_A VRAM_A


1

C8115 C8109 VRAM_A VRAM_A C8104 C8105 C8106 VRAM_A VRAM_A VRAM_A
1

C8101 C8103 VRAM_A VRAM_A C8112 C8113 C8114


SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

1
C8110 C8111
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
2

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
2

2
1D5V_VGA_S0 1D5V_VGA_S0
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
Brook_BH application without get Wistron permission
A VRAM_A VRAM_A A
1

C8116 C8118
Wistron Corporation
SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
2

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRA1,2 (1/4)
Size Document Number Rev
Custom
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 81 of 106

5 4 3 2 1
5 4 3 2 1

1D5V_VGA_S0 DY_VRAM_B
1D5V_VGA_S0 DY_VRAM_B VRAM4
VRAM3
B2 VDD DQL0 E3 FBA_D1 78,81
B2 E3 FBA_D13 78,81 D9 F7 FBA_D5 78,81
VDD DQL0 VDD DQL1
D9 VDD DQL1 F7 FBA_D11 78,81 G7 VDD DQL2 F2 FBA_D0 78,81
G7 VDD DQL2 F2 FBA_D15 78,81 K2 VDD DQL3 F8 FBA_D7 78,81
K2 VDD DQL3 F8 FBA_D8 78,81 K8 VDD DQL4 H3 FBA_D2 78,81
D
K8 VDD DQL4 H3 FBA_D12 78,81 N1 VDD DQL5 H8 FBA_D6 78,81 D
N1 VDD DQL5 H8 FBA_D9 78,81 N9 VDD DQL6 G2 FBA_D3 78,81
N9 VDD DQL6 G2 FBA_D14 78,81 R1 VDD DQL7 H7 FBA_D4 78,81
R1 VDD DQL7 H7 FBA_D10 78,81 R9 VDD
R9 VDD DQU0 D7 FBA_D25 78,81
DQU0 D7 FBA_D22 78,81 A1 VDDQ DQU1 C3 FBA_D31 78,81
A1 VDDQ DQU1 C3 FBA_D17 78,81 A8 VDDQ DQU2 C8 FBA_D24 78,81
A8 VDDQ DQU2 C8 FBA_D23 78,81 C1 VDDQ DQU3 C2 FBA_D30 78,81
C1 VDDQ DQU3 C2 FBA_D16 78,81 C9 VDDQ DQU4 A7 FBA_D26 78,81
C9 A7 FBA_D20 78,81 D2 A2 FBA_D28 78,81
VDDQ DQU4 VDDQ DQU5
D2 VDDQ DQU5 A2 FBA_D18 78,81 E9 VDDQ DQU6 B8 FBA_D27 78,81
E9 VDDQ DQU6 B8 FBA_D21 78,81 F1 VDDQ DQU7 A3 FBA_D29 78,81
F1 VDDQ DQU7 A3 FBA_D19 78,81 H2 VDDQ
H2 H9 C7 FBA_DQS3 78,81
VDDQ VDDQ DQSU
H9 VDDQ DQSU C7 FBA_DQS2 78,81 DQSU# B7 FBA_DQSN3 78,81
B7 FBA_DQSN2 78,81 81 VRAM3_VREFD H1
DQSU# VREFDQ
81 VRAM3_VREFD H1 VREFDQ 81 VRAM3_VREFC M8 VREFCA DQSL F3 FBA_DQS0 78,81
M8 F3 VRAM_ZQ1 L8 G3
81 VRAM3_VREFC VREFCA DQSL FBA_DQS1 78,81 ZQ DQSL# FBA_DQSN0 78,81
VRAM_ZQ2 L8 G3
ZQ DQSL# FBA_DQSN1 78,81

2
K1 FBA_CMD0 78,81
ODT
2

ODT K1 FBA_CMD0 78,81 DY_VRAM_B


78,81,83,84 FBA_CMD9 N3 A0
DY_VRAM_B 78,81,83,84 FBA_CMD9 N3 R8206 P7
A0 78,81,83,84 FBA_CMD24 A1
R8204 P7 243R2F-L1-GP P3 L2
78,81,83,84 FBA_CMD24 A1 78,81,83,84 FBA_CMD10 A2 CS# FBA_CMD1 78
243R2F-L1-GP P3 L2 N2 T2
78,81,83,84 FBA_CMD10 A2 CS# FBA_CMD1 78 78,81,83,84 FBA_CMD13 A3 RESET# FBA_CMD20 78,81,83,84

1
78,81,83,84 FBA_CMD13 N2 A3 RESET# T2 FBA_CMD20 78,81,83,84 78,81,83,84 FBA_CMD26 P8 A4
1

78,81,83,84 FBA_CMD26 P8 78,81,83,84 FBA_CMD22 P2


A4 A5
78,81,83,84 FBA_CMD22 P2 A5 78,81,83,84 FBA_CMD21 R8 A6
78,81,83,84 FBA_CMD21 R8 78,81,83,84 FBA_CMD5 R2 L9
A6 A7 NC#L9
78,81,83,84 FBA_CMD5 R2 A7 NC#L9 L9 78,81,83,84 FBA_CMD8 T8 A8 NC#L1 L1
78,81,83,84 FBA_CMD8 T8 L1 78,81,83,84 FBA_CMD23 R3 J9
A8 NC#L1 A9 NC#J9
C
78,81,83,84 FBA_CMD23 R3 A9 NC#J9 J9 78,81,83,84 FBA_CMD28 L7 A10/AP NC#J1 J1 C
78,81,83,84 FBA_CMD28 L7 A10/AP NC#J1 J1 78,81,83,84 FBA_CMD4 R7 A11
78,81,83,84 FBA_CMD4 R7 A11 78,81,83,84 FBA_CMD7 N7 A12/BC#
78,81,83,84 FBA_CMD7 N7 A12/BC# 78,81,83,84 FBA_CMD14 T3 A13 VSS A9
78,81,83,84 FBA_CMD14 T3 A13 VSS A9 78,81,83,84 FBA_CMD12 T7 A14 VSS B3
78,81,83,84 FBA_CMD12 T7 A14 VSS B3 M7 NC#M7 VSS E1
M7 NC#M7 VSS E1 VSS G8
G8 78,81,83,84 FBA_CMD29 M2 J2
VSS BA0 VSS
78,81,83,84 FBA_CMD29 M2 BA0 VSS J2 78,81,83,84 FBA_CMD6 N8 BA1 VSS J8
78,81,83,84 FBA_CMD6 N8 BA1 VSS J8 78,84 FBA_CMD30 M3 BA2 VSS M1
78,84 FBA_CMD30 M3 BA2 VSS M1 VSS M9
VSS M9 VSS P1
P1 78,81 FBA_CLK0 J7 P9
VSS CK VSS
78,81 FBA_CLK0 J7 CK VSS P9 78,81 FBA_CLK0# K7 CK# VSS T1
78,81 FBA_CLK0# K7 T1 T9
CK# VSS VSS
VSS T9 78,81 FBA_CMD3 K9 CKE
78,81 FBA_CMD3 K9 CKE VSSQ B1
B1 B9
VSSQ VSSQ
B9 78,81 FBA_DQM3 D3 D1
VSSQ DMU VSSQ
78,81 FBA_DQM2 D3 DMU VSSQ D1 78,81 FBA_DQM0 E7 DML VSSQ D8
78,81 FBA_DQM1 E7 DML VSSQ D8 VSSQ E2
VSSQ E2 VSSQ E8
VSSQ E8 78,81,83,84 FBA_CMD25 L3 WE# VSSQ F9
78,81,83,84 FBA_CMD25 L3 WE# VSSQ F9 78,81,83,84 FBA_CMD15 K3 CAS# VSSQ G1
78,81,83,84 FBA_CMD15 K3 G1 78,81,83,84 FBA_CMD11 J3 G9
CAS# VSSQ RAS# VSSQ
78,81,83,84 FBA_CMD11 J3 RAS# VSSQ G9

H5TC4G63AFR-11C-GP
H5TC4G63AFR-11C-GP 72.05463.D0U
B 78,81,83,84 FBA_D[63..0] B
72.05463.D0U

FOR VRAM4
1D5V_VGA_S0

FOR VRAM3
1D5V_VGA_S0
1D5V_VGA_S0 1D5V_VGA_S0

DY_VRAM_B DY_VRAM_B DY_VRAM_BDY_VRAM_B DY_VRAM_B


DY_VRAM_B
DY_VRAM_B
1

C8215 C8209 C8204 C8205 C8206


DY_VRAM_BDY_VRAM_B DY_VRAM_B
DY_VRAM_B
DY_VRAM_B
1

C8201 C8203
C8212 C8213 C8214
SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

1
C8210 C8211
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
2

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
2

2
1D5V_VGA_S0 1D5V_VGA_S0

Wistron Confidential document, Anyone can not


DY_VRAM_B DY_VRAM_B Duplicate, Modify, Forward or any other purpose
1

A A
C8217 C8216 Brook_BH application without get Wistron permission
SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM3,4 (2/4)
Size Document Number Rev
Custom
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 82 of 106
5 4 3 2 1
5 4 3 2 1

VRAM_A
1D5V_VGA_S0 VRAM_A
VRAM5
1D5V_VGA_S0
VRAM6
B2 VDD DQL0 E3 FBA_D34 78,84
D9 VDD DQL1 F7 FBA_D38 78,84 B2 VDD DQL0 E3 FBA_D44 78,84
G7 VDD DQL2 F2 FBA_D35 78,84 D9 VDD DQL1 F7 FBA_D43 78,84
K2 VDD DQL3 F8 FBA_D39 78,84 G7 VDD DQL2 F2 FBA_D45 78,84
K8 VDD DQL4 H3 FBA_D32 78,84 K2 VDD DQL3 F8 FBA_D40 78,84
N1 VDD DQL5 H8 FBA_D36 78,84 K8 VDD DQL4 H3 FBA_D47 78,84
N9 VDD DQL6 G2 FBA_D33 78,84 N1 VDD DQL5 H8 FBA_D42 78,84
R1 VDD DQL7 H7 FBA_D37 78,84 N9 VDD DQL6 G2 FBA_D46 78,84
R9 VDD R1 VDD DQL7 H7 FBA_D41 78,84
D
DQU0 D7 FBA_D59 78,84 R9 VDD
D
A1 VDDQ DQU1 C3 FBA_D62 78,84 DQU0 D7 FBA_D52 78,84
A8 VDDQ DQU2 C8 FBA_D58 78,84 A1 VDDQ DQU1 C3 FBA_D50 78,84
C1 VDDQ DQU3 C2 FBA_D63 78,84 A8 VDDQ DQU2 C8 FBA_D55 78,84
C9 VDDQ DQU4 A7 FBA_D57 78,84 C1 VDDQ DQU3 C2 FBA_D51 78,84
D2 VDDQ DQU5 A2 FBA_D60 78,84 C9 VDDQ DQU4 A7 FBA_D53 78,84
E9 VDDQ DQU6 B8 FBA_D56 78,84 D2 VDDQ DQU5 A2 FBA_D48 78,84
F1 VDDQ DQU7 A3 FBA_D61 78,84 E9 VDDQ DQU6 B8 FBA_D54 78,84
H2 VDDQ F1 VDDQ DQU7 A3 FBA_D49 78,84
H9 VDDQ DQSU C7 FBA_DQS7 78,84 H2 VDDQ
DQSU# B7 FBA_DQSN7 78,84 H9 VDDQ DQSU C7 FBA_DQS6 78,84
VRAM7_VREFD H1 B7
VREFDQ DQSU# FBA_DQSN6 78,84
VRAM7_VREFC M8 F3 VRAM7_VREFD H1
VREFCA DQSL FBA_DQS4 78,84 VREFDQ
VRAM_ZQ7 L8 G3 VRAM7_VREFC M8 F3
ZQ DQSL# FBA_DQSN4 78,84 VREFCA DQSL FBA_DQS5 78,84
VRAM_ZQ8 L8 G3
ZQ DQSL# FBA_DQSN5 78,84
2

K1 FBA_CMD16 78,84
VRAM_A ODT

2
R8301
78,81,82,84 FBA_CMD7 N3 A0 ODT K1 FBA_CMD16 78,84
243R2F-L1-GP
78,81,82,84 FBA_CMD10 P7 A1 VRAM_A 78,81,82,84 FBA_CMD7 N3 A0
P3 L2 R8304 P7
78,81,82,84 FBA_CMD24 A2 CS# FBA_CMD18 78 78,81,82,84 FBA_CMD10 A1
N2 T2 243R2F-L1-GP P3 L2
78,81,82,84 FBA_CMD6 A3 RESET# FBA_CMD20 78,81,82,84 78,81,82,84 FBA_CMD24 A2 CS# FBA_CMD18 78
1

78,81,82,84 FBA_CMD22 P8 A4 78,81,82,84 FBA_CMD6 N2 A3 RESET# T2 FBA_CMD20 78,81,82,84

1
P2 1D5V_VGA_S0 P8
78,81,82,84 FBA_CMD26 A5 78,81,82,84 FBA_CMD22 A4
78,81,82,84 FBA_CMD5 R8 A6 78,81,82,84 FBA_CMD26 P2 A5
78,81,82,84 FBA_CMD21 R2 A7 NC#L9 L9 78,81,82,84 FBA_CMD5 R8 A6

1
78,81,82,84 FBA_CMD8 T8 A8 NC#L1 L1 78,81,82,84 FBA_CMD21 R2 A7 NC#L9 L9
78,81,82,84 FBA_CMD4 R3 A9 NC#J9 J9 VRAM_A 78,81,82,84 FBA_CMD8 T8 A8 NC#L1 L1
L7 J1 R8302 R3 J9
78,81,82,84 FBA_CMD25 A10/AP NC#J1 1K33R2F-GP 78,81,82,84 FBA_CMD4 A9 NC#J9
78,81,82,84 FBA_CMD23 R7 A11 78,81,82,84 FBA_CMD25 L7 A10/AP NC#J1 J1
78,81,82,84 FBA_CMD9 N7 A12/BC# 78,81,82,84 FBA_CMD23 R7 A11

2
C C
78,81,82,84 FBA_CMD12 T3 A13 VSS A9 84 VRAM7_VREFD 78,81,82,84 FBA_CMD9 N7 A12/BC#
T7 B3 VRAM7_VREFD T3 A9
78,81,82,84 FBA_CMD14 A14 VSS 78,81,82,84 FBA_CMD12 A13 VSS
M7 E1 78,81,82,84 FBA_CMD14 T7 B3
NC#M7 VSS VRAM_A A14 VSS

1
VSS G8 C8318 M7 NC#M7 VSS E1

1
78,81,82,84 FBA_CMD29 M2 BA0 VSS J2 VRAM_A SCD01U50V2KX-L-GP VSS G8
N8 J8 R8303 M2 J2
78,81,82,84 FBA_CMD13 BA1 VSS 1K33R2F-GP 78,81,82,84 FBA_CMD29 BA0 VSS
78,81 FBA_CMD27 M3 BA2 VSS M1 78,81,82,84 FBA_CMD13 N8 BA1 VSS J8

2
VSS M9 78,81 FBA_CMD27 M3 BA2 VSS M1

2
VSS P1 VSS M9
78,84 FBA_CLK1 J7 CK VSS P9 VSS P1
78,84 FBA_CLK1# K7 CK# VSS T1 78,84 FBA_CLK1 J7 CK VSS P9
T9 1D5V_VGA_S0 K7 T1
VSS 78,84 FBA_CLK1# CK# VSS
78,84 FBA_CMD19 K9 CKE VSS T9
VSSQ B1 78,84 FBA_CMD19 K9 CKE

1
B9 B1 VRAM7_VREFD
VSSQ VSSQ
78,84 FBA_DQM7 D3 DMU VSSQ D1 VRAM_A VSSQ B9
VRAM_A
E7 D8 R8323 D3 D1
78,84 FBA_DQM4 DML VSSQ 78,84 FBA_DQM6 DMU VSSQ C8317

1
E2 1K33R2F-GP E7 D8
78,84 FBA_DQM5

SCD01U50V2KX-L-GP
VSSQ DML VSSQ
VSSQ E8 VSSQ E2

2
78,81,82,84 FBA_CMD28 L3 WE# VSSQ F9 VSSQ E8

2
K3 G1 84 VRAM7_VREFC VRAM7_VREFC L3 F9
78,81,82,84 FBA_CMD15 CAS# VSSQ 78,81,82,84 FBA_CMD28 WE# VSSQ
78,81,82,84 FBA_CMD11 J3 RAS# VSSQ G9 78,81,82,84 FBA_CMD15 K3 CAS# VSSQ G1
1

78,81,82,84 FBA_CMD11 J3 G9
VRAM_A RAS# VSSQ

1
VRAM_A
R8324 C8322
1K33R2F-GP

SCD01U50V2KX-L-GP
H5TC4G63AFR-11C-GP 2
72.05463.D0U H5TC4G63AFR-11C-GP
2

72.05463.D0U
B VRAM7_VREFC B

78,81,82,84 FBA_D[63..0]
VRAM_A

1
C8327

SCD01U50V2KX-L-GP
2
FOR VRAM6
1D5V_VGA_S0

FOR VRAM5
1D5V_VGA_S0

1D5V_VGA_S0 1D5V_VGA_S0

C8303 C8304 C8305


1

C8301 C8302
C8312 C8313 C8314
SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

1
C8310 C8311
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
1

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
C8315 C8309

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
2

2
SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

2
2

VRAM_A VRAM_A
VRAM_A VRAM_A VRAM_A VRAM_A
VRAM_A VRAM_A VRAM_A VRAM_A VRAM_A VRAM_A
1D5V_VGA_S0 1D5V_VGA_S0
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
A Brook_BH application without get Wistron permission A
1

C8316 C8319
Wistron Corporation
SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title
VRAM_A VRAM_A
GPU-VRAM7,8 (4/4)
Size Document Number Rev
Custom
Brook_BH -1M
Date: Wednesday, February 04, 2015 Sheet 83 of 106
5 4 3 2 1
5 4 3 2 1

DY_VRAM_B
DY_VRAM_B 1D5V_VGA_S0
VRAM8
1D5V_VGA_S0
VRAM7
B2 VDD DQL0 E3 FBA_D43 78,83
B2 VDD DQL0 E3 FBA_D38 78,83 D9 VDD DQL1 F7 FBA_D44 78,83
D9 VDD DQL1 F7 FBA_D34 78,83 G7 VDD DQL2 F2 FBA_D40 78,83
G7 VDD DQL2 F2 FBA_D39 78,83 K2 VDD DQL3 F8 FBA_D45 78,83
K2 VDD DQL3 F8 FBA_D35 78,83 K8 VDD DQL4 H3 FBA_D41 78,83
K8 VDD DQL4 H3 FBA_D37 78,83 N1 VDD DQL5 H8 FBA_D46 78,83
N1 VDD DQL5 H8 FBA_D33 78,83 N9 VDD DQL6 G2 FBA_D42 78,83
N9 VDD DQL6 G2 FBA_D36 78,83 R1 VDD DQL7 H7 FBA_D47 78,83
R1 VDD DQL7 H7 FBA_D32 78,83 R9 VDD
R9 VDD DQU0 D7 FBA_D50 78,83
D
DQU0 D7 FBA_D62 78,83 A1 VDDQ DQU1 C3 FBA_D52 78,83 D
A1 VDDQ DQU1 C3 FBA_D59 78,83 A8 VDDQ DQU2 C8 FBA_D51 78,83
A8 VDDQ DQU2 C8 FBA_D63 78,83 C1 VDDQ DQU3 C2 FBA_D55 78,83
C1 VDDQ DQU3 C2 FBA_D58 78,83 C9 VDDQ DQU4 A7 FBA_D49 78,83
C9 VDDQ DQU4 A7 FBA_D61 78,83 D2 VDDQ DQU5 A2 FBA_D54 78,83
D2 VDDQ DQU5 A2 FBA_D56 78,83 E9 VDDQ DQU6 B8 FBA_D48 78,83
E9 VDDQ DQU6 B8 FBA_D60 78,83 F1 VDDQ DQU7 A3 FBA_D53 78,83
F1 VDDQ DQU7 A3 FBA_D57 78,83 H2 VDDQ
H2 VDDQ H9 VDDQ DQSU C7 FBA_DQS6 78,83
H9 VDDQ DQSU C7 FBA_DQS7 78,83 DQSU# B7 FBA_DQSN6 78,83
DQSU# B7 FBA_DQSN7 78,83 83 VRAM7_VREFD H1 VREFDQ
83 VRAM7_VREFD H1 VREFDQ 83 VRAM7_VREFC M8 VREFCA DQSL F3 FBA_DQS5 78,83
M8 F3 VRAM_ZQ6 L8 G3
83 VRAM7_VREFC VREFCA DQSL FBA_DQS4 78,83 ZQ DQSL# FBA_DQSN5 78,83
DY_VRAM_B VRAM_ZQ5 L8 G3
ZQ DQSL# FBA_DQSN4 78,83
DY_VRAM_B ODT K1 FBA_CMD16 78,83
2

2
R8401 243R2F-L1-GP K1 N3
ODT FBA_CMD16 78,83 78,81,82,83 FBA_CMD9 A0
78,81,82,83 FBA_CMD9 N3 A0 R8402 78,81,82,83 FBA_CMD24 P7 A1
78,81,82,83 FBA_CMD24 P7 A1 243R2F-L1-GP 78,81,82,83 FBA_CMD10 P3 A2 CS# L2 FBA_CMD17 78
78,81,82,83 FBA_CMD10 P3 A2 CS# L2 FBA_CMD17 78 78,81,82,83 FBA_CMD13 N2 A3 RESET# T2 FBA_CMD20 78,81,82,83
78,81,82,83 FBA_CMD13 N2 A3 RESET# T2 FBA_CMD20 78,81,82,83 78,81,82,83 FBA_CMD26 P8 A4
1

1
78,81,82,83 FBA_CMD26 P8 A4 78,81,82,83 FBA_CMD22 P2 A5
78,81,82,83 FBA_CMD22 P2 A5 78,81,82,83 FBA_CMD21 R8 A6
78,81,82,83 FBA_CMD21 R8 A6 78,81,82,83 FBA_CMD5 R2 A7 NC#L9 L9
78,81,82,83 FBA_CMD5 R2 A7 NC#L9 L9 78,81,82,83 FBA_CMD8 T8 A8 NC#L1 L1
78,81,82,83 FBA_CMD8 T8 A8 NC#L1 L1 78,81,82,83 FBA_CMD23 R3 A9 NC#J9 J9
78,81,82,83 FBA_CMD23 R3 A9 NC#J9 J9 78,81,82,83 FBA_CMD28 L7 A10/AP NC#J1 J1
78,81,82,83 FBA_CMD28 L7 A10/AP NC#J1 J1 78,81,82,83 FBA_CMD4 R7 A11
78,81,82,83 FBA_CMD4 R7 A11 78,81,82,83 FBA_CMD7 N7 A12/BC#
C 78,81,82,83 FBA_CMD7 N7 A12/BC# 78,81,82,83 FBA_CMD14 T3 A13 VSS A9 C
78,81,82,83 FBA_CMD14 T3 A13 VSS A9 78,81,82,83 FBA_CMD12 T7 A14 VSS B3
78,81,82,83 FBA_CMD12 T7 A14 VSS B3 M7 NC#M7 VSS E1
M7 NC#M7 VSS E1 VSS G8
VSS G8 78,81,82,83 FBA_CMD29 M2 BA0 VSS J2
78,81,82,83 FBA_CMD29 M2 BA0 VSS J2 78,81,82,83 FBA_CMD6 N8 BA1 VSS J8
78,81,82,83 FBA_CMD6 N8 BA1 VSS J8 78,82 FBA_CMD30 M3 BA2 VSS M1
78,82 FBA_CMD30 M3 BA2 VSS M1 VSS M9
VSS M9 VSS P1
VSS P1 78,83 FBA_CLK1 J7 CK VSS P9
78,83 FBA_CLK1 J7 CK VSS P9 78,83 FBA_CLK1# K7 CK# VSS T1
78,83 FBA_CLK1# K7 CK# VSS T1 VSS T9
VSS T9 78,83 FBA_CMD19 K9 CKE
78,83 FBA_CMD19 K9 CKE VSSQ B1
VSSQ B1 VSSQ B9
VSSQ B9 78,83 FBA_DQM6 D3 DMU VSSQ D1
78,83 FBA_DQM7 D3 DMU VSSQ D1 78,83 FBA_DQM5 E7 DML VSSQ D8
78,83 FBA_DQM4 E7 DML VSSQ D8 VSSQ E2
VSSQ E2 VSSQ E8
VSSQ E8 78,81,82,83 FBA_CMD25 L3 WE# VSSQ F9
78,81,82,83 FBA_CMD25 L3 WE# VSSQ F9 78,81,82,83 FBA_CMD15 K3 CAS# VSSQ G1
78,81,82,83 FBA_CMD15 K3 CAS# VSSQ G1 78,81,82,83 FBA_CMD11 J3 RAS# VSSQ G9
78,81,82,83 FBA_CMD11 J3 RAS# VSSQ G9

H5TC4G63AFR-11C-GP
H5TC4G63AFR-11C-GP 72.05463.D0U
72.05463.D0U
78,81,82,83 FBA_D[63..0]
B B

FOR VRAM8
1D5V_VGA_S0

FOR VRAM7
1D5V_VGA_S0
1D5V_VGA_S0 1D5V_VGA_S0

DY_VRAM_B DY_VRAM_B
1

C8404 C8405 C8406


1

C8415 C8409 C8401 C8403


C8412 C8413 C8414
SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
DY_VRAM_B

1
C8410 C8411
SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
DY_VRAM_B

DY_VRAM_B

DY_VRAM_B

DY_VRAM_B

DY_VRAM_B

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
2

DY_VRAM_B

DY_VRAM_B

DY_VRAM_B

DY_VRAM_B
2

2
1D5V_VGA_S0
1D5V_VGA_S0
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
A DY_VRAM_B Brook_BH application without get Wistron permission A
1

DY_VRAM_B C8417
1

C8416
SC10U6D3V3MX-L-GP

Wistron Corporation
SC10U6D3V3MX-L-GP

2
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM7,8 (4/4)
Size Document Number Rev
Custom
Brook_BH -1M
Date: Wednesday, February 04, 2015 Sheet 84 of 106
5 4 3 2 1
5 4 3 2 1

19V_DCBATOUT PWR_DCBATOUT_VGA_CORE
PG8501
1 2

GAP-CLOSE-PWR
PG8502
1 2

GAP-CLOSE-PWR
PG8503
1 2
D GAP-CLOSE-PWR D
PG8504 PWR_DCBATOUT_VGA_CORE
1 2

GAP-CLOSE-PWR
PG8505 PX PX
1 2 PX

1
PC8508 PC8509
GAP-CLOSE-PWR PC8520

SC10U25V5KX-GP

SC10U25V5KX-GP
PG8506 SCD1U25V2KX-L-GP

2
1 2

GAP-CLOSE-PWR
PG8507 PU8503 2 PU8504 2
1 2 3 3
1 4 1 4
GAP-CLOSE-PWR 10 10
PG8508 19V_DCBATOUT 9 9
1 2 5V_S0 7 7
8 6 8 6
GAP-CLOSE-PWR 5 5

1
1
DY PR8523
PC8514 2D2R3F-L-GP -8=#:;#,:2:*#;:2:&#%:??
ST15U25VDM-1-GP FDMS3600-02-RJK0215-COLAY-GP FDMS3600-02-RJK0215-COLAY-GP
PX
2

1st = 84.00920.037 1st = 84.00920.037 @3,A:(:?)"?

2
VGA_PVCC
2nd = 084.07321.0037 2nd = 084.07321.0037 #$%:A:&,):F:#&8':A: ;) 1V_VGA_CORE_S0
PC8502 PX DY PL8501

1
SCD1U25V2KX-L-GP IND-D24UH-2-GP
2 1PWR_VGA_CORE_TON_1 PC8507 3rd = 84.08S36.037 3rd = 84.08S36.037 1 2 PX
PU8501 PX SCD1U16V2KX-L-GP
68.R2410.101

2
PX RT8812AGQW-GP 2nd = 68.R2410.20A
74.08812.073 PR8518

18
C C
1 2PWR_VGA_CORE_UGATE1_R
PR8501
PR8502

PVCC
499KR2F-1-GP 0R3J-L1-GP PX Design Current
PWR_DCBATOUT_VGA_CORE 2 1 1 2
2D2R3F-L-GP PX PWR_VGA_CORE_TON 9 2 PWR_VGA_CORE_UGATE1 = 26A
TON UGATE1
PX PC8511 OCP> 39A
SCD1U25V2KX-L-GP
13 1 PWR_VGA_CORE_BOOT1
1 2 PWR_VGA_CORE_BOOT1_1
2 1
15,24,86 DGPU_PWROK PGOOD BOOT1 PR8510 PWR_DCBATOUT_VGA_CORE
0R3J-L1-GP PX PX
PWR_VGA_CORE_EN 3 20 PWR_VGA_CORE_PHASE1
EN PHASE1

79 VGA_CORE_PSI 4 PX 19 PWR_VGA_CORE_LGATE1
PSI LGATE1
79 VGA_CORE_VID 1 PR8507 2 PX PX PX

1
0R0402-PAD-1-GP 1 PR8524 2 PX PC8512 PC8513
%$#$%&''()F PC8521

SC10U25V5KX-GP

SC10U25V5KX-GP
1 2DY 9K31R2F-GP SCD1U25V2KX-L-GP

2
PC8503 PWR_VGA_CORE_VID 5 14 PWR_VGA_CORE_UGATE2
1 2 PWR_VGA_CORE_UGATE2_R PU8505 2 PU8506 2
SC1KP50V2KX-L-1-GP VID UGATE2 PR8519 3 3
DY 0R3J-L1-GP PX 1 4 1 4
PWR_VGA_CORE_RGND 1 2 PWR_VGA_CORE_VREF 8 15 PWR_VGA_CORE_BOOT2 1 2 10 10
PC8501 SCD1U16V2KX-L-GP VREF BOOT2 PR8511 9 9

PWR_VGA_CORE_BOOT2_1
0R3J-L1-GP PX 7 7
1

PWR_VGA_CORE_REFIN7 16 PWR_VGA_CORE_PHASE2 8 6 8 6
PR8506 REFIN PHASE2
5 5
20KR2F-L3-GP
PX PWR_VGA_CORE_REFADJ
6 REFADJ 17 PWR_VGA_CORE_LGATE2 -8=#:;#,:2:*#;:2:&#%:??
LGATE2
2

PR8522
FDMS3600-02-RJK0215-COLAY-GP FDMS3600-02-RJK0215-COLAY-GP
2

20KR2F-L3-GP @3,A:(:?)"?
PWR_VGA_CORE_SS 11 12 PWR_VGA_CORE_VSNS 1st = 84.00920.037 1st = 84.00920.037
PX SS VSNS
2nd = 084.07321.0037 2nd = 084.07321.0037
#$%:A:&,):F:#&8':A: ;)
PR8508
1

PC8505 PL8502
PX DY
1

1
1 2PWR_VGA_CORE_VREF_R 21 10 PWR_VGA_CORE_RGND PC8506 IND-D24UH-2-GP PX
B
2KR2F-L1-GP SC1KP50V2KX-L-1-GP GND RGND B

SCD1U25V2KX-L-GP
1 2
3rd = 84.08S36.037 3rd = 84.08S36.037
2

PX DY 68.R2410.101

2
2nd = 68.R2410.20A
PX
1

PC8523
SC2700P50V2KX-1-GP
2

PX 1V_VGA_CORE_S0
PWR_VGA_CORE_RGND
1

1
PR8509 77.53371.18L PT8507 PT8508
18KR2F-GP 2nd = 79.3371V.6CL 77.53371.18L
2

SE330U2D5VM-8-GP

SE330U2D5VM-8-GP
PX PC8504 2nd = 79.3371V.6CL

2
DY SCD01U50V2KX-L-GP
2

PX PX
1 PR8521 2
0R0402-PAD-1-GP NVVDD_SENSE 76
PWR_VGA_CORE_RGND

PWR_VGA_CORE_RGND

PC8522
1

DY SC47P50V2JN-3GP
PC8519
2

3D3V_VGA_S0 SC47P50V2JN-3GP
2

20141216 -1 1 PR8520 2
0R0402-PAD-1-GP NVGND_SENSE 76
PX PX
RN8512
1

1 4 DGPU_PWROK PC8517
2 3 PWR_VGA_CORE_EN PWR_VGA_CORE_EN 87 DY SC47P50V2JN-3GP Wistron Confidential document, Anyone can not
2

Duplicate, Modify, Forward or any other purpose


1

SRN10KJ-L-GP application without get Wistron permission


A A
86 DGPU_PWR_EN 1 2 DGPU_PWR_EN_D1
1 PC8525
PR8560 DY SCD1U25V2KX-L-GP Brook_BL
2

0R3J-L1-GP 3
PX
2
DY 1V_VGA_CORE_S0 1
RN8515
4 PWR_VGA_CORE_VSNS Wistron Corporation
2 3 PWR_VGA_CORE_RGND 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PD8501 Taipei Hsien 221, Taiwan, R.O.C.
BAW56-5-GP SRN100J-3-GP
20141216 -1 Title
PX RT8812A_VGA_CORE
Size Document Number Rev
Custom

Wednesday, February 04, 2015


Brook_BL -1M
Date: Sheet 85 of 106
5 4 3 2 1
5 4 3 2 1

19V_DCBATOUT PWR_VGA_DCBATOUT_1D5V PWR_VGA1D5V 1D5V_VGA_S0


RT8231A for VGA_1D5V(For VRAM DDR3) VGA_CORE&1D05V_VGA_S0 Discharge Circuit

PG8601 PG8604
1 2 1 2

GAP-CLOSE-PWR GAP-CLOSE-PWR
PG8602 PG8605
+.+
1 2 1 2
F3F(G(I(FJ$2$*>1B+
GAP-CLOSE-PWR GAP-CLOSE-PWR
PG8606 F3F(G(F36$$2$*>L+
1 2 PR8601
5D1R2F-GP
GAP-CLOSE-PWR PWR_VGA1D5V_VID 2 1 5V_S0
PG8607
PX

1
D 1 2 PC8601 D
SC1U10V2KX-L1-GP
GAP-CLOSE-PWR
PX

2
PG8608 PWR_VGA_DCBATOUT_1D5V
1 2
%$#$%&''()F
GAP-CLOSE-PWR
PX PX PX

1
PC8608 PC8609 PC8607
PWR_VGA1D5V_CS PWR_VGA1D5V_VDD

SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP

SCD1U25V2KX-L-GP
1 PR8602 2 5V_S0
0R0402-PAD-1-GP

2
1
5V_S0 PR8622

1
DY 324KR2F-1-GP PC8602
PX PX SC1U10V2KX-L1-GP

1
PR8606 PU8602

5
6
7
8
10KR2F-L1-GP SM3319NSQAC-TRG-GP

D
D
D
D
084.03319.0A37
2ND = 84.07410.A37
3RD = 84.08067.A37 PX

2
PU8601
RT8231AGQW-GP 4

G
13

11

12
074.08231.0073

S
S
S
PC8603

CS

VID

VDD

3
2
1
PWR_VGA_DCBATOUT_1D5V SCD1U25V2KX-L-GP
PR8603
PWR_VGA1D5V_BOOT PWR_VGA1D5V_BOOT_A
PR8608 PWR_VGA1D5V_PG BOOT
18 1 2 2 1 +&%(F)$$,--&)'$=$/!
10
PGOOD
620KR2F-GP
PWR_VGA1D5V_TON PWR_VGA1D5V_HG
2D2R3F-L-GP
PX PX %$#$=$1$!
PX 2 1 9
TON UGATE
17
PX
DGPU_CORE_PWROK 8 PL8601 PWR_VGA1D5V
S5
1 PR8605 2 S3R 7
PX 16 PWR_VGA1D5V_PH
IND-1UH-282-GP
1 2
S3 PHASE
0R0402-PAD-1-GP 068.1R010.1111
19
VLDOIN 2nd = 68.1R010.20R
PWR_VGA1D5V_LG
LGATE
15 PU8603
PX PX PX PX PX PX

5
6
7
8
3()&G:'):)*'I*':%8I:IJK(F:K)' SM3319NSQAC-TRG-GP

1
D
D
D
D
JK&J$G:)+:'"G:)*'I*':%8I 084.03319.0A37 PC8610 PC8615 PC8611 PC8612 PC8613 PC8614
2ND = 84.07410.A37

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SC22U6D3V5MX-L3-GP

SCD1U25V2KX-L-GP
1
VTTGND PGND
14 3RD = 84.08067.A37

2
PG8610
C GAP-CLOSE-PWR 4
PX C

G
PWR_VGA1D5V_VDDQ

S
S
S
5 1 2 PWR_VGA1D5V
VDDQ

3
2
1
20 6 PWR_VGA1D5V_FB
VTT FB
2
VTTSNS

VTTREF

1
DY

GND

GND
PR8609

1
#9
24K9R2F-L-GP PC8606
SC18P50V2JN-1-GP

21

4
PX

2
PWR_1D0V_VTTREF
#=

1
PR8610
20KR2F-L3-GP
PX
+3,'$4&''()F
+3,'$$2$+-&B$H$D$9$/$#91#=$E

2
1
PC8605
PX 2 SCD033U16V2KX-GP
$$$$$$$2$*>A1B$H$D$9$/$=/>C"$1$=*"E
$$$$$$$2$9>B9B$+

+.+$8%$+-&B$NOA4&
+.+$F3F(G(I(FJ$2J$+-&B$2$*>A1B$+
+.+$F3F(G(F36$$2J$+-&B$2$$*>1B$+
)3'&>$+-&B$GO)$3)4:$A&$GJO)F&;$B3-U$
*>A1B8$'3$*>1B8$OB'&-$936&-(3)

B B

3D3V_S0 to 3D3V_VGA_S0
1D05V_S0 to 1D05V_VGA_S0
1D05V_VGA_S0 3D3V_S0 3D3V_AON_S0
1D05V_S0
PG8615 Non-GC6 3D3V_VGA_S0
PR8619
1D05V_VGA_OUT2 1 2
PX PX 2 1
PX
1

GAP-CLOSE-PWR C8606 C8614 0R2J-L-GP


1

C8602
SCD1U16V2KX-L-GP SCD1U16V2KX-L-GP
SC1U10V2KX-L1-GP
3D3V_S0 PX GC6_20
2

U8604
2

U8601
GC6_20 PX
1

1
C8608 5 1 C8609
15 SC4D7U6D3V3KX-L-GP VIN VOUT SC1U10V2KX-L1-GP
GND 2
1 14 GND GC6_PWRCTL
VIN1#1 VOUT1#14 4 3
2 13 VIN EN
2

2
5V_S0 DGPU_PWROK_R VIN1#2 VOUT1#13 VTT_CT_105VC_2 3D3V_AON_S0
3 12

1
ON1 CT1
4 11 AP2821KTR-G1-GP
DGPU_PWR_EN VBIAS GND VTT_CT_3VC_1 R8603
5 10
6
ON2 CT2
9 PG8619 74.02821.07F 0R0402-PAD-1-GP
VIN2#6 VOUT2#9 3D3V_VGA_OUT1
7 8 1 2
VIN2#7 VOUT2#8

2
1

PX DY DY
SC330P50V2KX-3GP

SC330P50V2KX-3GP

GAP-CLOSE-PWR 79 GPIO5_GC6_PWR_EN
1

C8604 TPS22966DPUR-GP C8605 C8603 PX


1

SC1U10V2KX-L1-GP 2nd = 74.03523.A73 C8607


2

SCD1U16V2KX-L-GP
2

PR8611 Non-GC6
0R2J-L-GP
1 2
3D3V_S0
GC6_20
D8601
A A
1 PR8618 2 DGPU_PWROK_R 1
15,24,85 DGPU_PWROK
1

0R0402-PAD-1-GP
R8605 3 DGPU_CORE_PWROK
DGPU_CORE_PWROK 87
10KR2F-L1-GP Wistron Confidential document, Anyone can not
Q8605 2
PX 20,79 GC6_FB_EN Duplicate, Modify, Forward or any other purpose
1

1 PR8816 2 DGPU_PWR_EN_G G R8613 application without get Wistron permission


15,87 DGPU_PWR_EN#
2

0R0402-PAD-1-GP BAT54C-12-GP GC6_20 Brook_BH


D DGPU_PWR_EN
DGPU_PWR_EN 85 100KR2J-4-GP
S Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


2N7002K-2-GP Taipei Hsien 221, Taiwan, R.O.C.
2nd = 84.2N702.031
PX Title

DISCRETE VGA POWER


Size Document Number Rev
Custom

Thursday, February 05, 2015


Brook_BH -1M
Date: Sheet 86 of 106
5 4 3 2 1
5 4 3 2 1

1D05V_VGA_S0
GC6_20 Q8701
220R3F-1-GP 1 R8701 2 1D05V_VGA_S0_DIS 3 4
1V_VGA_CORE_S0
PWR_VGA_CORE_EN# 2 5 PWR_VGA_CORE_EN# GC6_20
1 6 1V_VGA_CORE_S0_DIS 1 R8702 2
D D
2N7002KDW-GP
84.2N702.A3F 220R3F-1-GP
2nd = 75.00601.07C
3rd = 84.2N702.F3F 3D3V_S0

GC6_20

2
R8705
100KR2J-4-GP

Q8703 GC6_20

1
85 PWR_VGA_CORE_EN PWR_VGA_CORE_EN G

D PWR_VGA_CORE_EN#

S
C C
2N7002K-2-GP
2nd = 84.2N702.031
GC6_20

1D5V_VGA_S0
GC6_20R8703 220R3F-1-GP Q8702 3D3V_S0
2 1 1D5V_VGA_S0_DIS 3 4

DGPU_CORE_PWROK 2 5 3D3V_S0_DIS
86 DGPU_CORE_PWROK
R8704
1 6 1 2

2N7002KDW-GP 100KR2J-4-GP
84.2N702.A3F
B 2nd = 75.00601.07C GC6_20 B

3rd = 84.2N702.F3F

GC6_20

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
Brook_BH application without get Wistron permission

Wistron Corporation
A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, A
Taipei Hsien 221, Taiwan, R.O.C.

Title

DISCHARGE
Size Document Number Rev
A4
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 87 of 106
5 4 3 2 1
5 4 3 2 1

1 AFTP57

Check test point


1 AFTP54 33 SD_CLK 1 AFTP86 1 AFTP144
29 AUD_HP1_JD#_R 65 EC_TP_CLK_C 60 SATA_TX_ODD_P1
1 AFTP87 1 AFTP160
1 AFTP100 65 EC_TP_DATA_C 60 SATA_TX_ODD_N1
1 AFTP94 33 SD_CMD
29 AUD_HP1_JACK_R1
1 AFTP88 1 AFTP162
1 AFTP97 65 I2C1_DATA_TP 60 SATA_RX_ODD_N1
1 AFTP55 33 SD_WP 1 AFTP89 1 AFTP163
29 AUD_HP1_JACK_L1 65 I2C1_CLK_TP 60 SATA_RX_ODD_P1
3D3V_S0 1 AFTP1
1 AFTP130
1 AFTP95 33 SD_CD# 1 AFTP90 1 AFTP164
29 RING2_R 65 TP_IN#_R 60 PRSNT#
3D3V_AUX_S5 1 AFTP7
1 AFTP98
1 AFTP56 33 SD_DATA0 1 AFTP91 1 AFTP165
29 SELEEVE_R 65 TP_LID_CLOSE# 60 DA#
3D3V_S5 1 AFTP8
1 AFTP131
1 AFTP96 33 SD_DATA1 3D3V_TP_S3 1 AFTP92 5V_ODD_S0 1 AFTP166
29 AUD_HP1_JD#_TYPE
5V_S5 1 AFTP9
1 AFTP99
33 SD_DATA2 1 AFTP93 1 AFTP161
1 AFTP10
17,20,24 PM_PWRBTN# 1 AFTP132
1 AFTP11
33 SD_DATA3
1 AFTP147
TP connector ODD connector
4 H_CPUPWRGD 3D3V_CARD_S0

D
24,40 S5_ENABLE#
1 AFTP12
Comobo JACK 1 AFTP148
D
17,24,31,37,40,61,63,68,91 PLTRST#_PCH 1 AFTP13
SD Cardeaader
USB CONNECTOR
KROW0 1 AFTP104
19V_AD_JK 1 AFTP38 24,65 KROW[0..17]
KROW1 1 AFTP105
19V_AD_JK 1 AFTP39 24,65 KCOL[0..7] 1 AFTP182
KROW2 1 AFTP106 35 USB30_TX_CON_P1
Test Point Dimm Door 1 AFTP40
KROW3
KROW4
1 AFTP107 35 USB30_TX_CON_N1
1 AFTP183
1 AFTP108
1 AFTP41 KROW5 1 AFTP184
1 AFTP109 35 USB_CON_PN0
1 AFTP185
KROW6 1 AFTP110 35 USB_CON_PP0
KROW7 1 AFTP111
DCIN1 connector KROW8 1 AFTP112 16,35 USB30_RX_CPU_P1
1
1
AFTP186
AFTP187
KROW9 1 AFTP113 16,35 USB30_RX_CPU_N1
5V_USB30_CHARGER 1 AFTP194
KROW10 1 AFTP114
KROW11 1 AFTP115
1 AFTP146 1 AFTP198
61 WIFI_RF_EN_CON KROW12 1 AFTP116
1 AFTP188
1 AFTP14 KROW13 1 AFTP117 35 USB30_TX_CON_P2
65 KB_BL_DET_R 1 AFTP101 1 AFTP68 1 AFTP189
16,61 USB_CPU_PP4 KROW14 1 AFTP118 35 USB30_TX_CON_N2
1 AFTP69
16,61 USB_CPU_PN4 KROW15 1 AFTP119
65 KB_LED_PWM_D 1 AFTP102 1 AFTP190
KROW16 1 AFTP120 35 USB_CON_PN1
1 AFTP70 1 AFTP191
1 AFTP16 16,61 PCIE_TX_WLAN_P4 KROW17 1 AFTP121 35 USB_CON_PP1
5V_S0 1 AFTP103 1 AFTP71
5V_S0 16,61 PCIE_TX_WLAN_N4 KCOL0 1 AFTP122
KCOL1 1 AFTP192
26 FAN_TACH1_C 1 AFTP17 1 AFTP123 16,35 USB30_RX_CPU_P2
1 AFTP72 1 AFTP193
16,61 PCIE_RX_CPU_P4 KCOL2 1 AFTP124 16,35 USB30_RX_CPU_N2
1 AFTP73
FAN1 connector LEDKB connector
16,61 PCIE_RX_CPU_N4 KCOL3
KCOL4
1
1
AFTP125
AFTP126 5V_USB30 1 AFTP196
1 AFTP74
18,61 WLAN_CLK_CPU KCOL5 1 AFTP127
1 AFTP75 1 AFTP197
18,61 WLAN_CLK_CPU# KCOL6 1 AFTP128
KCOL7 1 AFTP129
1 AFTP76
61 WLAN_RST#
1 AFTP157 1 AFTP200
24,64,65 KBC_PWRBTN#
1 AFTP18 1 AFTP77 1 AFTP201
29 AUD_SPK1_L-_CON 61 CLK_WLAN
1 AFTP42 1 AFTP158
1 AFTP19
24,43,44 BAT_IN#
61 BT_EN 1 AFTP78 KB connector 5V_USB30_CHARGER 1 AFTP195
29 AUD_SPK1_L+_CON 1 AFTP43 1 AFTP199
24,43,44 BAT_SCL 5V_USB30
1 AFTP20
29 AUD_SPK1_R-_CON 1 AFTP44
24,43,44 BAT_SDA
1 AFTP21 1 AFTP80
29 AUD_SPK1_R+_CON 15,18,61 WLAN_CLKREQ_CPU#
1 AFTP45
43 BI
1 AFTP81
61 PCIE_WAKE#R
C
SPK connector 1 AFTP46 1 AFTP82 57 HDMI_DATA_CON_P0
1
1
AFTP167
AFTP168 57 HDMI_CLK_CON
1
1
AFTP177
AFTP178 C
12V_BT+_connector 3D3V_IOAC 57 HDMI_DATA_CON_N0 57 HDMI_DATA_CON
12V_BT+_connector 1 AFTP47 3D3V_IOAC 1 AFTP83
1 AFTP169
1 AFTP84 57 HDMI_DATA_CON_P1
1 AFTP48 1 AFTP170 1 AFTP179
1 AFTP85 57 HDMI_DATA_CON_N1 57 HDMI_DET_CON
1 AFTP22
1 AFTP49
WLAN connector 1 AFTP171
66 USB_CON_PN2_C 57 HDMI_DATA_CON_P2
1 AFTP24
BAT1 connector 57 HDMI_DATA_CON_N2
1 AFTP172
1 AFTP180
66 USB_CON_PP2_C 5V_HDMI_S0
1 AFTP23 1 AFTP173
66 USB_CON_PN3_C 57 HDMI_CLK_CON_P3 AFTP174 AFTP181
1 1
AFTP25 57 HDMI_CLK_CON_N3
1
66 USB_CON_PP3_C
5V_USB 1 AFTP26
USB BOARD 1 AFTP27
HDMI CONNECTOR
1 AFTP28 1 AFTP50 1 AFTP141
55 eDP_AUX_CON_P 55 eDP_TX_CON_N2
1 AFTP51 1 AFTP142
55 eDP_AUX_CON_N 55 eDP_TX_CON_P2
5V_USB 1 AFTP29
1 AFTP52 1 AFTP139
55 eDP_TX_CON_P0 55 eDP_TX_CON_N3
1 AFTP53 1 AFTP140
55 eDP_TX_CON_N0 55 eDP_TX_CON_P3
H5 HS4
1 AFTP58 1 AFTP133 H1 1
55 eDP_TX_CON_P1 55 USB_CON_PP6
1 AFTP59 1 AFTP134 1
55 eDP_TX_CON_N1 55 USB_CON_PN6
1 STF217R115H101-GP
1 AFTP60 1 AFTP135 34.4Y802.011
55 eDP_HPD_CON 55 TS_USB_CON_N
1 AFTP136 HT9X9B9X9R33-S-GP 2nd = 34.4Y802.101
1 AFTP30 55 TS_USB_CON_P
32 RJ45_1 1 AFTP61 HT9X9B9X9R33-S-GP H6
55 eDP_BLEN_CON
1 AFTP137 H2 HS5
1 AFTP31 55 3D3V_CAMERA_S0
32 RJ45_2 1 AFTP62 1 1
55 eDP_BLCTRL_CON H22
1 AFTP138 1
1 AFTP32 55 TS_S0
32 RJ45_3 19V_DCBATOUT_LCD 1 AFTP63 STF217R115H101-GP
19V_DCBATOUT_LCD 1 AFTP64 HT9X9B9X9R33-S-GP 34.4Y802.011 1
1 AFTP33
32 RJ45_4 1 AFTP143 HT9X9B9X9R33-S-GP H7 2nd = 34.4Y802.101
55 TOUCH_S_RST#_R
1 AFTP65
1 AFTP34 55 3D3V_LCDVDD_PWR
32 RJ45_5 1 AFTP159 H3 1 HS3
55 TOUCH_DETR# HOLE
1 AFTP66 1 1
1 AFTP35
32 RJ45_6 1 AFTP67 1 AFTP145
55 TOUCH_INTR#
HOLE355X355R111-S1-GP HT9X9B9X9R33-S-GP STF217R115H101-GP
1 AFTP36 H21
32 RJ45_7 H8 34.4Y802.011
B
32 RJ45_8 1 AFTP37 eDP connector H4 1
2nd = 34.4Y802.101
1
B

HS1
1
RJ1 connector HT9X9B9X9R33-S-GP 1
HOLE
H20
19V_DCBATOUT SCD1U25V2KX-L-GP 1 2EC4401 19V_DCBATOUT SCD1U25V2KX-L-GP 1 2EC4408 HT9X9B9X9R33-S-GP H9
1 STF236R128H101-2-GP

SCD1U25V2KX-L-GP 1
PX 1
19V_DCBATOUT 2EC4402 19V_DCBATOUT SCD1U25V2KX-L-GP 1 2EC4409 HOLE355X355R111-S1-GP HS2

AFTP79 1
56 CRT_DDCDATA_CON 1 SCD1U25V2KX-L-GP 1 HOLE
19V_DCBATOUT 2EC4403 19V_DCBATOUT SCD1U25V2KX-L-GP 1 2EC4410 HS7
AFTP152 1
56 CRT_DDCCLK_CON 1 STF236R128H101-2-GP SPR1

56 CRT_RED_CON 1 AFTP149 19V_DCBATOUT SCD1U25V2KX-L-GP 1 2EC4404 19V_DCBATOUT SCD1U25V2KX-L-GP 1 2EC4411 STF217R134H152-1-GP PX HS6
1

56 CRT_GREEN_CON 1 AFTP153
SCD1U25V2KX-L-GP 1 DY DY SPRING-57-GP
19V_DCBATOUT 2EC4405 19V_DCBATOUT SCD1U25V2KX-L-GP 1 2EC4412 1
AFTP150 SPR2
56 CRT_BLUE_CON 1
1
19V_DCBATOUT SCD1U25V2KX-L-GP 1 2EC4406 19V_DCBATOUT SCD1U25V2KX-L-GP 1 2EC4413 STF236R128H101-2-GP
1 AFTP154
56 CRT_VSYNC_CON DY SPRING-57-GP
1 AFTP151
56 CRT_HSYNC_CON 19V_DCBATOUT SCD1U25V2KX-L-GP 1 2EC4407 19V_DCBATOUT SCD1U25V2KX-L-GP 1 2EC4414
5V_CRT_S0 1 AFTP155

1 AFTP156 19V_DCBATOUT SCD1U25V2KX-L-GP 1 2EC4415


CRT connector

5V_USB30 SCD1U25V2KX-L-GP 1 2EC3501 5V_USB30_CHARGER SCD1U25V2KX-L-GP 1 2EC3505 5V_S0 SCD1U25V2KX-L-GP 1 2EC4001 5V_USB SCD1U25V2KX-L-GP 1 2EC6601 3D3V_CARD_S0 SCD1U25V2KX-L-GP 1 2EC3301 1D35V_S3 SCD1U25V2KX-L-GP 1 2EC4912

5V_S5 SCD1U25V2KX-L-GP 1 2EC4512 1D35V_S3 SCD1U25V2KX-L-GP 1 2EC4913


5V_USB30 SCD1U25V2KX-L-GP 1 2EC3502 5V_USB30_CHARGER SCD1U25V2KX-L-GP 1 2EC3506 5V_S0 SCD1U25V2KX-L-GP 1 2EC4002 5V_USB SCD1U25V2KX-L-GP 1 2EC6602
5V_S5 SCD1U25V2KX-L-GP 1 2EC4513 1D35V_S3 SCD1U25V2KX-L-GP 1 2EC4914
A A

5V_USB30_CHARGER SCD1U25V2KX-L-GP 1 2EC3508 5V_S0 SCD1U25V2KX-L-GP 1 2EC4003 5V_S0 SCD1U25V2KX-L-GP 1 2EC4012 1D35V_S3 SCD1U25V2KX-L-GP 1 2EC4915
5V_USB30 SCD1U25V2KX-L-GP 1 2EC3503 5V_USB SCD1U25V2KX-L-GP 1 2EC6603
5V_S0 SCD1U25V2KX-L-GP 1 2EC4013 1D35V_S3 SCD1U25V2KX-L-GP 1 2EC4916
5V_USB30_CHARGER SCD1U25V2KX-L-GP 1 2EC3507 5V_S0 SCD1U25V2KX-L-GP 1 2EC4004
5V_USB30 SCD1U25V2KX-L-GP 1 2EC3504 5V_USB SCD1U25V2KX-L-GP 1 2EC6604 3D3V_S0 SCD1U25V2KX-L-GP 1 2EC4014 1D35V_S3 SCD1U25V2KX-L-GP 1 2EC4917
<Core Design>
5V_S0 SCD1U25V2KX-L-GP 1 2EC4005 1D5V_S0 SCD1U25V2KX-L-GP 1 2EC5101 1D35V_S3 SCD1U25V2KX-L-GP 1 2EC4918
SCD1U25V2KX-L-GP 1 2EC5701 SCD1U25V2KX-L-GP 1 2EC5601
5V_HDMI_S0 5V_CRT_S0
SCD1U25V2KX-L-GP 1
19V_DCBATOUT SCD1U25V2KX-L-GP 1 2EC4911 1D35V_S3 SCD1U25V2KX-L-GP 1 2EC4919 Wistron Corporation
5V_S0 2EC4006 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
5V_HDMI_S0 SCD1U25V2KX-L-GP 1 2EC5702 1D35V_CPU_VDDQ_S3 SCD1U25V2KX-L-GP 1 2EC403 Taipei Hsien 221, Taiwan, R.O.C.
3D3V_S0 SCD1U25V2KX-L-GP 1 2EC4015
1D35V_CPU_VDDQ_S3 SCD1U25V2KX-L-GP 1 2EC402 Title

UNUSED PARTS/EMI Capacitors


Size Document Number Rev
A2
Brook_BH
Thursday, February 05, 2015
-1M
Date: Sheet 89 of 106
5 4 3 2 1
5 4 3 2 1

D 3D3V_S0 D

3D3V_S5 3D3V_S0 3D3V_S0

1
TPM TPM TPM TPM DY
2

2
R9103
C9101 C9102 C9103 C9104 4K7R2J-L-GP

2
SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
1

2
R9105 R9106 TPM_PP
0R2J-L-GP 0R2J-L-GP

1
DY TPM TPM
R9104

1
3D3V_S0 4K7R2J-L-GP
TPM

2
U9101

10 VDD SDA/GPIO0/XOR_OUT 1
C 19 VDD SCL/GPIO1 2 C
24 VDD GPX/GPIO2 6
GPIO3/BADD 9
VSBD 5 15
VSB CLKRUN#/SINT#/GPIO4 PM_CLKRUN#_EC 17,24
7 TPM_PP
PP

18,24,68 LPC_FRAME#_CPU 22 LFRAME#/SCS# TEST 8


19,20,24 INT_SERIRQ 27 SERIRQ
1 R9102 2 LPCPD# 28 3
17 PM_SUS_STAT# LPCPD# NC#3
18 LPC_CLK_TPM DY0R2J-L-GP 21 LCLK/SCLK NC#12 12
17,24,31,37,40,61,63,68,89 PLTRST#_PCH 16 LRESET#/SPI_RST#/SRESET# NC#13 13
NC#14 14
18,24,68 LPC_AD_CPU_P0 26 LAD0/MISO
18,24,68 LPC_AD_CPU_P1 23 LAD1/MOSI
18,24,68 LPC_AD_CPU_P2 20 LAD2/SPI_IRQ# GND 4
18,24,68 LPC_AD_CPU_P3 17 LAD3 GND 11
GND 18
GND 25

B NPCT650AA0WX-GP B

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
Brook_BH application without get Wistron permission

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
TPM (NPCT650)
Size Document Number Rev
A4
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 91 of 106
5 4 3 2 1
5 4 3 2 1

I!4C FF$#%C #$[#$4 @[ &$ $+.!0#!-

.)'&4(#36&-$[9$4&G,&)G&

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B+Y$I!#0 #Y &

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//
-2
B+Y4B1L+L+Y4B 3D3V_S5 -1
3V_5V_EN & DL+L+Y4BE
L+YB+Y#%"
L+L+Y![<
3D3V_AUX -5
#-Y4F#Y4[4
N#4B9==B
L+L+Y4[4 3V_5V_POK
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!+/ 4C.N$I +.&
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B+Y![<
-4
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5V_CHARGER_EN
& DB+Y4BE
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+$ 3V_5V_EN -2
cN/ I#!*===/
cO''&-: -6
#-Y#C#cN&L /L $JO-F&-
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// GPC4 0# *
C #-Y4F#Y!L C

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B B
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A
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L+L+Y4B

9>*B+NNY#C#0+
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4b +%[N
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& +.& +.&
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5V_S5
5 )B
.-+#Y#C#0+ )A

#$IY#C#%" $Y#-Y4F#Y4LL N#4==CAA 5V_S0


A A
4C.N$I /*
4b
3D3V_S5
IY$#[#C#0+
5
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!FFY4,4N -Y#C#0+
4,4Y#C#0+ 4C.N$I /* Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
#FNY#4NL Brook_BH

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Sequence
Size Document Number Rev
A1
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 102 of 106
5 4 3 2 1
5 4 3 2 1

!;O9'&- +$c!N%[N
D D
/!+
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N#$$)9L9

$#[Y$%# 9+LB+Y4L 9+*B+Y4* 9+Y+0!$%# Y4* 9+B+Y+0!Y4*


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L+L+Y4*
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C
N#4B9==B$#["# 9+*B+Y+0!Y4* L+L+Y!%&Y4* C

B+Y4B L+L+Y4B

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N#4=B//# 4,A=))+!!$ 4,A=))+!!$ N#4==CAA+#[#$

B+Y[4cL* B+Y[4cL>* L+L+Y4[4 L+L+Y4L L+L+Y.%!$ 9+B+Y4*


B+Y[4c=>* B+Y4* L+L+Y4*
$I!#0 #
53-$+4L 53-$#N# 53-$.%!$

B B

0B=/c #NC1=/0c

L+L+Y+0!Y4* F$++++

53-$0$A Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
A Brook_BH application without get Wistron permission A

Power Shape Wistron Corporation


21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Regulator LDO Switch
Title

Power Block Diagram


Size Document Number Rev
A3
Brook_BH -1M
Date: W ednesday, February 04, 2015 Sheet 103 of 106
5 4 3 2 1
A B C D E

#$I$4-c,%$c43Gh$+(OF-OU "c$$4-c,%$c43Gh$+(OF-OU

L+L+Y4B L+L+Y4*

1 1
L+L+Y4*
L+L+Y4*

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4-cY$F" #$IY4-c$F"
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4$F
#$IY4-c+!N!
4+!
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4-F9Y+!N!
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#$IY4-c$F"
4$F c!NY4$F c!N!Y4$FY9
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3
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4 4

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
Brook_BH application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

SMBUS BLOCK DIAGRAM


Size Document Number Rev
A2
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 104 of 106
A B C D E
A B C D E

NJ&-UO4$c43Gh$+(OF-OU !,;(3$c43Gh$+(OF-OU

1 1
![+Y4#"9YF(
4#"(%[N(F(
4#"(%[N(F/
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Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
4 application without get Wistron permission 4
Brook_BH

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
THERMAL/AUDIO BLOCK DIAGRAM
Size Document Number Rev
Custom
Brook_BH
Wednesday, February 04, 2015
-1M
Date: Sheet 105 of 106
A B C D E

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