Other gate types

By
Dr. Nermeen Talaat
Lecture 10

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Logic gates types
Logic circuits for digital systems may be:
1- Combinational circuits
2- Sequential circuits
 Combinational circuits

Circuits in which all outputs at any given time

depend only on the inputs at that time are
called combinational logic circuits.
A combinational circuit performs an operation
that can be specified logically by a set of
Boolean functions
No feedback paths or memory elements

inputs Combinational outputs

:: ::
Logic

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 Sequential circuits
Sequential circuits employ storage elements in
addition to logic gates. Their outputs are a function of
the inputs and the state of the storage elements.
The state of storage elements, in turn, is a function of
previous inputs.
As a consequence, the outputs of a sequential circuit
depend not only on present values of inputs, but also
on past inputs, and the circuit behavior must be
specified by a time sequence of inputs and internal
state.

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 Examples of combinational circuits

 So far have seen

 AND
 OR
 NOT
 There are some other basic gates besides these

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 Examples of combinational circuits

 The Buffer F=X

 The buffer is used when the signal needs redriven
 The Tri-State Buffer or 3-State Buffer
 Useful for busses where there are multiple drivers

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More basic gates – Very popular
 NAND – Not AND

 NOR – Not OR

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Complex Logic Gates
 XOR – Exclusive OR
 F = XY’ + X’Y
 =XY

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Complex Logic Gates
 XNOR – Exclusive NOR
 F = XY + X’Y’
 =XY

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More complex logic gates
 AND-OR-INVERT (AOI)
 F=(AB+CD)’

 OR-AND-INVERT (OAI)
 F = ( (W+X)(Y+Z) )’ W
F=((W+X)(Y+Z))’
X

Z 10
And some more complex gates
 AND-OR
 F = AB + CD

 OR-AND
 F = (W+X)(Y+Z) W
X
F=(W+X)(Y+Z)
Y

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Identities of the XOR operation
 The following identities apply to the XOR
operation:
 X 0 = X X  1 = X’
 XX=0 X  X’ = 1
 X  Y’ = (X  Y)’
 X’  Y = (X  Y)’

 Any or all of these can be proven by truth table

or algebraic manipulation
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Another XOR relationship
 Show XNOR is the compliment of XOR.
 (X  Y)’ = X  Y
 (XY’ + X’Y)’ = XY + X’Y’
 Use DeMorgans
 (XY’)’(X’Y)’ = XY + X’Y’
 (X’+Y)(X+Y’) = XY + X’Y’
 X’X + X’Y’ + XY + YY’ = XY + X’Y’
 0 + XY + X’Y’ + 0  XY + X’Y’
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XOR K-maps
 2-variable map
 Z = XY’+YX’
 Z=XY

 3-variable map
 Z=X Y Z

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XOR K-maps (continued)
 4-variable map
 Z=W X Y Z

 Note that function is a

one for an odd number
of 1’s on the inputs

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Binary additon &
subtraction

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Iterative Circuits
 The concept – Create a functional block and
create the circuit for doing the multiple bit
operation by simply repeating it.

 Another concept to be introduced – circuit

contraction where you fix the value of some
inputs and then can simplify the resulting
circuit. Examples are incrementing,
decrementing or multiplying by a constant.
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Iterative Circuit
 Consider an iterative circuit that operates on
two binary vectors.
 Base unit

 Iterative connection.

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Iterative circuit area
 A lot in arithmetic area of application.
 Adders
 Subtractors
 Incrementors
 Decrementors
 Multiplication circuits

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 Half Adder
 Design procedure: Design circuit to calculate 1+0
1) State Problem
Example: Build a Half Adder to add two bits
2) Determine and label the inputs & outputs of circuit.
Example: Two inputs and two outputs labeled, as
follows:

X Y C S
X Half S 0 0 0 0
Adder
0 1 0 1
Y C 1 0 0 1
(X + Y) 1 1 1 0
3) Draw truth table.
 Half Adder
4) Obtain simplified Boolean function. X Y C S
0 0 0 0
Example: C = X.Y 0 1 0 1
S = X'.Y + X.Y' = XY 1 0 0 1
1 1 1 0
5) Draw logic diagram.
X
S
Y
Half Adder

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Half Adder
The half adder is an example of a simple, functional
digital circuit built from two logic gates.
A half adder adds two one-bit binary numbers A
and B (two inputs). It has two outputs ,S and C (the
value theoretically carried on to the next addition);
The simplest half-adder design, shown in fig. 3,
incorporates an XOR gate for S and an AND gate for
C. S Sum, C carry
Half adders cannot be used compositely, given their
incapacity for a carry-in bit.

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 Half Adder

Fig. 3 Implementation of half adders

C=xy S=x’y+xy’=
X AND y
x XOR y

The easiest way to build the adder is to combine

XOR and AND logic gates

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Half-Adder

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 Full Adder
 Half-adder adds up only two bits.
 To add two binary numbers, we need to add 3 bits
(including the carry).
 Example: carry
1 1 1
0 0 1 1 X
+ 0 1 1 1 Y
1 0 1 0 S
 Need Full Adder (so called as it can be made from
two half-adders).
X
Full S
Y
Z
Adder C
(X + Y + Z) 25
 Full Adder
 Truth table:
X Y Z C S Note:
0 0 0 0 0
0 0 1 0 1 Z - carry in (to the current
0 1 0 0 1 position)
0 1 1 1 0 C - carry out (to the next position)
1 0 0 0 1
1 0 1 1 0 C
YZ
1 1 0 1 0 X
00 01 11 10
1 1 1 1 1 0 1

 Using K-map, simplified SOP 1 1 1 1

form: YZ
S
X
00 01 11 10
C = X.Y + X.Z + Y.Z 0 1 1
S = X'.Y'.Z + X'.Y.Z'+X.Y'.Z'+X.Y.Z
1 1 1
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 Full Adder
 Alternative formulae using algebraic manipulation:
C = X.Y + X.Z + Y.Z
= X.Y + (X + Y).Z
= X.Y + ((XY) + X.Y).Z
= X.Y + (XY).Z + X.Y.Z
= X.Y + (XY).Z

S = X'.Y'.Z + X'.Y.Z' + X.Y'.Z' + X.Y.Z

= X‘.(Y'.Z + Y.Z') + X.(Y'.Z' + Y.Z)
= X'.(YZ) + X.(YZ)'
= X(YZ) or (XY)Z

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 Full Adder
 Circuit for above formulae:
C = X.Y + (XY).Z
S = (XY)Z

X (XY)
Y S

(XY)

Z
Full Adder made from two Half-Adders (+ OR gate).
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 Full Adder
 Circuit for above formulae:
C = X.Y + (XY).Z
Block diagrams.
S = (XY)Z

X (XY)
X Sum X
Y Y Sum S
Y
Half Half
Adder Adder
(X.Y)
Carry Carry
C

Z
Full Adder made from two Half-Adders (+ OR gate).

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The full adder
 Have just seen a full adder implemented from the
structural connection of two half adders and an OR
gate.
 Can do a direct implementation. It will end up with
the same number and type of gates.
 For a multibit implementation need a symbol for the
unit.

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Multibit use
 And then can use that symbol in multibit or
hierarchical representations.
1 0 1 1

 A 2 bit example 0
1 11 (A)
0 1 01 (B)
------
0 0 1 00
 In this adder the final output carry is
generated in the final stage after the carry
inputs to all the previous stages has settled.
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Carry ripple
 So the carry ripples from the lsb to msb  A
ripple carry adder.

 All inputs, As,Bs, and C0 arrive – C1 becomes

valid – C2 becomes valid – C3 becomes valid –
C4 becomes valid -
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Binary Subtraction
 Have previously looked at the subtraction operation. A
quick review.
 Just like subtraction in any other base
 Minuend 10110
 Subtrahend - 10010
 Difference 00100
 And when a borrow is needed. Note that the borrow gives
us 2 in the current bit position.

 .
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And a full example
 And more ripple -

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In General
 When there is no borrow into the msb
position, then the subtrahend in not larger
than the minuend and the result is positive and
correct. lsb
msb

 If a borrow into the msb does occur, then the

subtrahend is larger than the minuend.
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Consider
 Now do the operation 4 – 6

 Correct difference is -2 or -0010

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1’s Complement
 1’s complement of N is defined as (2n -1)-N.
 If n=4 have (2n -1) being 1 0000 - 1 = 1111
 So for n=4 would subtract any 4-bit binary
number from 1111.
 This is just inverting each bit.
 Example: 1’s compliment of 1011001
 is 0100110
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2’s complement
 The 2’s complement is defined as 2n-N
 Can be done by subtraction of N from 2n or
adding 1 to the 1’s complement of a number.
 For 6 = 0110
 The 1’s complement is 1001
 The 2’s complement is= 1001+ 1 = 1010

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Operation with 2’s complement
 Add 4 and -6
 Will use the 2’s complement of -6 or 1010
 4 0100
 -6 1010
 1110
 And taking the 2’s complement of 1110 get
0001 + 1 = 0010

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A 2’s complement table for 4 bits
 Listing the
values
represented.

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Half subtractor
 The half-subtractor is a combinational circuit which
is used to perform subtraction of two bits. It has two
inputs, X (minuend) and Y (subtrahend) and two
outputs D (difference) and B (borrow).
Minuend (X) 10110
Subtrahend - (Y) 10010

Difference (D) 00100

 Full Subtractor
The full-subtractor is a combinational circuit which is used to perform subtraction of three bits.
It has three inputs, X (minuend) and Y (subtrahend) and Z (subtrahend) and two outputs D
(difference) and B (borrow).
A circuit that does +/-
 A general adder subtractor
 OP=0 for addition/ =1 for subtraction

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Overflow
 When adding 2 n-bit numbers it is possible to
get a n+1 bit result if there is a carry out.
 On paper it is easy just add another bit.
 In 2’s complement add a msb 0 for a positive
or a msb 1 for a negative.

 In a computer the number of bits that can be

used is fixed.
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Overflow indication.
 In 8-bit 2’s complement notation the range
that can be represented is -127 to +127.
 Then the operation to add +70 to +80 is
 Carries 0 1
 +70 0 100 0110
 +80 0 101 0000
 +150 1 001 0110
 Also look at the addition of -70 and -80
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The other addition
 The addition of -70 and -80
 Carries 1 0
 -70 1 011 1010
 -80 1 011 0000
 -150 0 110 1010
 The rule – if the carry into the msb position differs from
the carry out from the msb position then an overflow has
occurred.
 The circuit

 .
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Incrementer
 Often just want to increment the value by 1
and that is the only operation needed.
 An incrementer is a circuit that is much
simpler than an adder.
 Start with the equations:
 SUM = A xor B xor Cin
 Cout = AB +Cin (A xor B )

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Incrementer
 Often we just want a circuit to create the value
+1 each time.
 The circuit is a significant simplification.
 Start with the equations for general addition
 Sum = A  B  Cin
 Cout = AB +Cin (A xor B )
 Now if B = 0 these reduce to
 IncSum = A  Cin
 Inc Carry= Cout = A*0 +Cin (A xor 0 )= ACin

 A Half Adder!!!
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Implementation
 A increment unit

 Note that hardware can be simplified if you

have a unit that always increments.
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A Decrementer
 Want to subtract 1 from the input
 What are the equations
General
 Difference D=ABBorin
 Borrow-out Bout= Borin (AB)+ A’B
Put B=0
 reduces to D=ABorin
 Reduces to Bout = A’Borin

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The circuit
 And again can do a dedicated circuit

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