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Combinational and
Sequential Circuit
1
Topics
• Combinational Circuit and Sequential
Circuit Criterions
• Some Examples of Combinational Circuit:
Parallel Adder, Decoder, etc
• Some Examples of Sequential Circuits:
Flip-flop, Register, Serial Adder, etc.
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Combinational vs Sequential Circuit
Combinational Circuit A
A
Sequential Circuit
B
- output determined by inputs F
AND previous outputs
C
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Combinational Circuit
• Combinational Logic circuit contains logic gates where its
output is determined by the combination of the current
input, regardless of the output or the prior combination of
input.
• Basically, combinational circuit can be depicted by
Diagram 1 below:
m output
n input sequential
logic
circuit memory
elements
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Designing a Circuit for Half Adder
For s For c
y y
x 0 1 x 0 1
0 1 0
1 1 1 1
_ _
s=xy+xy c=xy
=xy
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6. A logic circuits for Half Adder (HA)
x _ _
s = xy + xy
y
c = xy
OR
x
xy=s
y
xy = c
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A Block Diagram for HA is as below:
x s
input HA output
y c
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Designing a Circuit for Full Adder (FA)
The same method used to design HA.
1. Problem: Build logic circuit for the addition
of 3 bits data
2. Number of input : 3
Number of output : 2
3. Variables for input: x , y and ci
Variables for output : s (sum) and co (carry)
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4. The truth table for the problem :
INPUT OUTPUT
x y ci s co
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
x
s
input y FA output
co
ci
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To construct a 4-bit parallel adder, 3 FA and 1 HA are required like
the diagram below with the input as X = x3x2x1x0 and Y = y3y2y1y0
(X and Y are binary numbers 4-bit) and the output (addition result)
is s3s2s1s0.
x3 y3 x2 y2 x1 y1 x 0 y0
INPUT
FA FA FA HA
c2 c1 c0
OUTPUT c 3 s3 s2 s1 s0
or x3 y 3 x2 y2
INPUT x1 y1 x0 y0 0
FA FA FA FA
c2 c1 c0
OUTPUT c3 s3 s2 s1 s0
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Some Examples of Sequential Circuits: Flip-flop,
Register, Serial Adder, etc.
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• Table 1 shows symbolic graphic and feature table for three
types of flip-flop that are S‑R, J‑K and D flip‑flops.
• Flip-flop is a form of memory element used to construct
sequential circuits that are more complex, such as registers
etc. Sequential circuits can be divided into:
1. Synchronous
2. Asynchronous
• In synchronous sequential circuit, all flip‑flops are moved
by the same clock pulse so that all flip‑flops involved
change simultaneously.
• In asynchronous circuit, the change of flip‑flop condition
depends on the change that occurs on the input and the
late time that is in the circuit.
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Table 1: Basic Flip-flops
Name Graphical Symbol Feature Table
S R Qn+1
S Q
S-R 0 0 Qn
Clock
0 1 0
R Q
1 0 1
1 1 -
J K Qn+1
J Q
0 0 Qn
J-K
Clock
0 1 0
K Q 1 0 1
1 1 Change
condition
D Q
D D Qn+1
Clock
0 0
Q
1 1
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S‑R Flip‑flop
• S‑R flip‑flop has 2 inputs, S (set) and R (reset) like Diagram 3
below. In the diagram below, (also for JK and D flip-flops),
they used another input called clock. It is to control the
movement of input that is input will only occur when given a
clock pulse (synchronous circuit)
• The features of S‑R flip‑flop can be depicted S R Qn Qn+1
in Table 2 below. It can be summarized that:
0 0 0 0
1. If the value of both S and R are 0, the 1
flip‑flop will remain in its present condition 0 0 1 1
(either 0 or 1). 0 1 0 0
2
2. If S = 0 and R = 1 (reset), then the flip‑flop
condition will change to 0 (its output, Q = 0). 0 1 1 0
3. If S = 1 (set) and R = 0, then the flip‑flop 1 0 0 1
3
condition will change to 1 (output, Q = 1). 1 0 1 1
4. This circuit does not allow combinational
1 1 0 -
input of input S = 1 and R = 1. 4
1 1 1 -
Table 2 : Feature table of S-R Flip-flop
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S
Q
Q
R
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J-K Flip-flop
• J-K flip-flop also has 2 inputs, J and K. The function of clock is same
as S‑R flip‑flop. Unlike S‑R flip‑flop, J‑K flip‑flop allows all
combination of inputs.
• It can be observed that J‑K flip-flop is built to address the input
problem of S = R = 1 in S‑R flip-flop. Features 1 till 3 are same as S‑R
flip-flop.
• Table 3 shows the features of J‑K flip‑flop. J K Qn Qn+1
From the table, it can be summarized that: 0 0 0 0
1. If J = 0 and K = 0, it will maintain the 1
0 0 1 1
flip‑flop condition like before
0 1 0 0
2. If J = 0 and K = 1, it will cause flip‑flop 2
0 1 1 0
to change to condition 0 (reset).
3. If J = 1 and K = 0, it will cause flip‑flop 1 0 0 1
3
to change to condition 1 (set). 1 0 1 1
4. If J = 1 and K = 1, it will change the 1 1 0 1
4
flip‑flop condition, that is it will 1 1 1 0
become complementary to the initial or Table 3: Features table of J-K flip-flop
prior condition 22
The logic circuit for J-K flip-flop is shown in Diagram 4 below.
J
Q
Clock
Q
K
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D Flip‑flop
• Logic circuit for D flip‑flop is shown in
Diagram 5. This flip‑flop only has one D Qn Qn+1
input that is D.
0 0 0
• The clock function is same as S‑R and J-
K flip‑flops. The features of D flip‑flop 0 1 0
can be illustrated by Table 4. 1 0 1
• From the table, it can be seen that this
1 1 1
flip‑flop produces the same output as its
input regardless of the condition of the Table 4 : Feature table of D Flip-
flop
stated flip-flop.
• This feature is very suitable to be used
as memory element and this flip-flop is
mostly used to make registers and
computer memory (RAM)
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Q
clock
D Q
Diagram 5 : D Flip-flop
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Examples of Flip-flop (Sequential Circuit) usage
• As priory stated, flip-flop is an example of the
simplest form of sequential circuit. It is also a
form of memory element where a flip-flop can
store 1 bit of data. In this section, examples of
sequential circuits that use flip-flop will be
given:
1. Register
2. Adder
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Register
• Register is an important component in the computer. Generally,
it can be categorized into:
1. Storage Register (or Parallel Register)
2. Shift Register (or Serial Register)
• Parallel register is made up of a set of 1-bit (flip-flop) that can be
written on and read simultaneously.
• This register is used to store data (output=input). The amount of
flip-flop used depends on the size of the register that is to be built.
• If a parallel register that can store 8 bits of data is to be built, then
8 flip-flops are needed.
• Diagram 6 below is a 4 bit parallel register that uses flip-flop D.
(Note: all kinds of flip-flop can be used to build storage register, but its circuit
will differ because every flip-flop has its own features)
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• Diagram 6 below is a 4 bit parallel register that uses flip-flop D.
(Note: all kinds of flip-flop can be used to build storage register, but its circuit will
differ because every flip-flop has its own features)
I1 I2 I3 I4
D Q D Q D Q D Q
_ _ _ _
Clock Q Clock Q Clock Q Clock Q
Clock
Pulse
Q1 Q2 Q3 Q4
Note: observe and understand the data movement in the stated circuit after every
clock pulse is given.
X Register
Ai Si
A3 A2 A1 A0
Full
Adder
Bi
B3 B2 B1 B0 Ci+1
Ci
Y Register
Diagram 8 : 4-bit Serial Adder
D flip-flop
Carry
Clock Pulse
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