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Discovery kit with STM32H747XI MCU
Introduction
The STM32H747I-DISCO Discovery kit is a complete demonstration and development
platform for the STMicroelectronics Arm® Cortex®-M7 and -M4 dual-core-based
STM32H747XIH6 microcontroller with four I2C, six SPIs with two multiplexed full-duplex I2S
interfaces, SDIO3.0, SDIO2.0, four USARTs, four UARTs, two FD-CANs, three 16-bit ADCs,
two 12-bit DACs, four SAIs, USB HS OTG and USB FS OTG, Ethernet MAC, FMC interface,
MIPI DSISM host controller, Quad-SPI interface, and JTAG and ETM debugging support.
The STM32H747I-DISCO Discovery kit, shown in Figure 1 and Figure 2, is used as a
reference design for user application development before porting to the final product.
STM32H747I-DISC1, presented in Figure 3, is the subset of STM32H747I-DISCO without
the LCD display module.
The full range of hardware features available on the board helps users improve application
development by an evaluation of all the peripherals (USB OTG2 HS, Ethernet, microSD™
card, SAI Audio DAC stereo with audio jack input and output, MEMS digital microphone,
SDRAM, Quad-SPI Flash, DCMI connector, MIPI DSISM interface, and others). ARDUINO®
Uno V3 and Pmod™/STMod+ connectors provide easy connection to extension shields or
daughterboards for specific applications.
An STLINK-V3E is integrated into the board, as the embedded in-circuit debugger and
programmer for the STM32 MCU and the USB Virtual COM port bridge.
Contents
1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Product marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Codification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 Development environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1 Development toolchains . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.2 System requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.3 Demonstration software . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Delivery recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
6 Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.1 USB OTG HS Micro-AB connector CN1 . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.2 STLINK-V3E USB Micro-B connector CN2 . . . . . . . . . . . . . . . . . . . . . . . 23
6.3 SPDIF input RCA connector CN3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.4 STLINK-V3E MCU programming header CN4 . . . . . . . . . . . . . . . . . . . . . 23
6.5 ARDUINO® Uno V3 connectors CN5, CN6, CN8 and CN9 . . . . . . . . . . . 24
6.6 Ethernet RJ45 connector CN7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.7 Audio blue jack (Line In) connector CN10 . . . . . . . . . . . . . . . . . . . . . . . . 25
6.8 Audio green jack (Line Out) connector CN11 . . . . . . . . . . . . . . . . . . . . . . 26
6.9 microSD card connector CN12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
6.10 STDC14 connector CN13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6.11 External 5 V USB Micro-B connector CN14 . . . . . . . . . . . . . . . . . . . . . . . 29
6.12 DSI LCD connector CN15 (MIPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6.13 TAG connector CN16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.14 Audio connector CN17 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.15 Camera module connector P1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
6.16 STMod+ connector P2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
6.17 Pmod connector P3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
7 Schematic diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
List of tables
List of figures
1 Features
a. Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere.
2 Ordering information
– MB1248
STM32H747I-DISCO STM32H747XIH6U – With LCD module
– MB1166(1)
STM32H747I-DISC1 – MB1248 STM32H747XIH6U – No LCD module
1. LCD extension board.
2.2 Codification
The meaning of the codification is explained in Table 2.
The order code is mentioned on a sticker placed on the top side of the board.
3 Development environment
a. On Windows only
b. macOS® is a trademark of Apple Inc., registered in the U.S. and other countries.
4 Delivery recommendations
Before the first use, make sure that no damage occurred to the board during shipment and
no socketed components are not firmly fixed in their sockets or loose in the plastic bag.
In particular, pay attention to the following component:
• DSISM display MB1166 daughterboard in the CN15 connector if requested
For product information related to the STM32H747XIH6 microcontroller, visit the
www.st.com website.
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5.1 STLINK-V3E
The STLINK-V3E facility for the debug and programming of the STM32H747XIH6 is
integrated on the STM32H747I-DISCO Discovery kit. It supports the following features:
• Self-powered through a USB connector (Micro-B)
• USB 2.0 high-speed compatible interface
• Direct firmware update support (DFU)
• SWD and serial wire viewer (SWV) communication support
• Drag-and-drop Flash programming
• Two color LEDs: communication and power
USB connector CN2 can be used to power the STM32H747I-DISCO regardless of the
STLINK-V3E facility used for debugging or programming the STM32H747XIH6. This holds
also when the STLINK-V3E stand-alone tool is connected to connector CN13 or CN16 and
used for debugging or programming the STM32H747XIH6. Section 5.2: Power supply
provides more detail about powering the STM32H747I-DISCO.
Refer to www.st.com for details about STLINK-V3E.
Table 3: Power-supply related jumper and solder bridge settings describes the settings of all
jumpers related to powering the STM32H747I-DISCO and extension board. VDD_MCU is
STM32H747XIH6 digital supply voltage line. It can be connected to a fixed 3.3 V supply.
of its USB port when the excessive current demand from STM32H747I-DISCO is
detected. This causes an operating failure of STM32H747I-DISCO.
3. The host PC is not capable of supplying 300 mA (the enumeration fails). The STLINK-
V3E does not supply the rest of the STM32H747I-DISCO from its USB port VBUS line.
Table 3 details jumper and solder bridge settings used for the configuration of the power
supply of STM32H747I-DISCO.
Default setting.
STM32H747I-DISCO is supplied
through the CN2 Micro-B USB
receptacle. Depend on host PC USB
port's powering capability declared in
67ON 89 +6 (9 &+JU the enumeration.
STM32H747I-DISCO is supplied
through the CN14 Micro-B USB
receptacle.
67ON 89 +6 (9 &+JU
STM32H747I-DISCO is supplied
JP6
through the CN1 Micro-AB USB
Power source selector
receptacle.
67ON 89 +6 (9 &+JU
STM32H747I-DISCO is supplied
through the pin 8 of CN8 (marked VIN).
STM32H747I-DISCO is supplied
through the CN2 Micro-B USB
receptacle.
Setting for powering the board through
CN2 using USB charger.
67ON 89 +6 (9 &+JU
Default setting.
SB16 SB16 ON
VBAT is connected to +3V3.
VBAT connection
SB16 OFF VBAT is not connected to +3V3.
Default setting.
VDD_USB (VDDUSB terminal of
SB10 SB10 ON
STM32H747XIH6) is connected to
VDD_USB connection VDD_MCU.
SB10 OFF VDD_USB is not connected to VDD_MCU.
Default setting.
VDD_MCU (VDD terminals of
STM32H747XIH6) is connected to fixed
+3.3 V.
JP3
VDD_MCU connection
VDD_MCU (VDD terminals of
STM32H747XIH6) is not connected to
fixed +3.3 V
5.5 Audio
A WM8994 codec is connected to the SAI interface of the STM32H747XIH6. It supports the
TDM feature of the SAI port. The TDM feature enables the STM32H747XIH6 to
simultaneously stream two independent stereo audio channels to two separate stereo
analog audio outputs. The codec communicates with the STM32H747XIH6 via the I2C4
bus, which is shared with the DSISM LCD, camera module, ARDUINO® Uno connectors,
and STMod+ connector.
SB45, SB21 open, The PDM clock for the digital microphone is provided by
SB44, SB22 closed the WM8994 codec.
SB45, SB21,
SB44, SB22 Default setting.
SB45, SB21 closed,
The PDM clock for the digital microphone is provided by
SB44, SB22 open
the STM32H747XIH6 MCU.
SB41 closed, The power supply of the digital microphone is generated
SB42 open by the WM8994 codec.
SB42, SB41 SB41 open,
Default setting.
SB42 closed
The power supply of the digital microphone is +3V3.
U5V, the user must pay attention that the power source delivers a sufficient amount of
current for the complete STM32H747I-DISCO board setup.
When a USB host connection to the CN1 Micro-AB USB connector of STM32H747I-DISCO
is detected, the STM32H747I-DISCO board starts behaving as a USB device. Depending
on the powering capability of the USB host, the board can take power from the VBUS
terminal of CN1. In the board schematics, the corresponding power voltage line is called
HS.
Refer to Section 5.2: Power supply on page 14 for the related jumper setting.
5.7 Ethernet
The STM32H747I-DISCO board supports 10 Mbps / 100 Mbps Ethernet communication
with the U18 LAN8742A-CZ-TR PHY from MICROCHIP and CN7 integrated RJ45
connector. The Ethernet PHY is connected to the STM32H747XIH6 MCU via the RMII
interface.
The 25 MHz clock for the PHY is generated by oscillator X2. The 50 MHz clock for the
STM32H747XIH6 is provided by the RMII_REF_CLK of the PHY.
With the default setting, the Ethernet feature is not working because of a conflict between
ETH_MDC and SAI4_D1 of the MEMs digital microphone. Table 5 shows the possible
settings of all solder bridges or resistor associated with the Ethernet on the board.
Default setting.
SB8 open,
STM32H747XIH6 port PC1 is connected to MEMs. digital
SB21 closed
SB8, SB21 microphone DOUT.
SB8 closed, STM32H747XIH6 port PC1 is connected to Ethernet
SB21 open ETH_MDC.
Default setting.
R87 closed,
STM32H747XIH6 port PE2 is connected to MEMs. digital
SB17 open
SB17, R87 microphone CLK.
R87 open, STM32H747XIH6 port PE2 is connected to Ethernet
SB17 closed ETH_nINT.
5.8 SDRAM
The U7 8M x 32bit SDRAM (IS42S32800G-6BLI) is connected to SDRAM Bank1 of
STM32H747XIH6 FMC interface.
6 Connectors
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1 VBUS 4 ID
2 DM 5 GND
3 DP - -
06Y9
1 VBUS (power) 4 NC
2 DM 5 GND
3 DP - -
1 3V3 3 GND
2 SWCLK (PA14) 4 SWDIO (PA13)
Note: The STLINK-V3E MCU programming header is not populated by default. Its use is reserved
to advanced users.
Before using any ARDUINO® Uno V3 shield, it is important to refer to Section 5.2.1:
Supplying the board through STLINK-V3E USB port on page 15 for a correct configuration
of JP6.
Caution: The I/Os of the STM32 microcontroller are +3V3 compatible instead of 5 V for ARDUINO®
Uno V3.
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1 TX+ 7 CT
2 TX- 8 CT
3 RX+ 9 K, yellow LED
4 CT 10 A, yellow LED
5 CT 11 K, green LED
6 RX- 12 A, green LED
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1 NC NA
2 NC NA
3 GND GND
4 OUT_Right SPK_R (33 ohm typ.)
5 NC NA
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3 VDD 4 SWDIO/TMS (PA13)
5 GND 6 SWDCLK/TCK (PA14)
7 GND 8 SWO/TDO (PB3)
9 KEY 10 TDI (PA15)
11 GND 12 RESET#
13 VCP_RX (PA10) 14 VCP_TX (PA9)
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2 NC 5 GND
3 NC - -
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GND - 1 2 - -
DSI_CK_P - 3 4 PK7 DSI_INT
DSI_CK_N - 5 6 - GND
GND - 7 8 GND RFU(1)
DSI_D0_P - 9 10 GND RFU(1)
DSI_D0_N - 11 12 - GND
GND - 13 14 GND RFU(1)
DSI_D1_P - 15 16 GND RFU(1)
DSI_D1_N - 17 18 - GND
GND - 19 20 - -
BLVDD (5V) - 21 22 - -
BLVDD (5V) - 23 24 - -
- - 25 26 - -
BLGND - 27 28 - -
BLGND - 29 30 - -
- - 31 32 - -
- - 33 34 - -
SCLK/MCLK PE5 35 36 - 3.3 V
LRCLK PE4 37 38 - -
I2S_DATA PE6 39 40 PD13 I2C_SDA
- - 41 42 - -
- - 43 44 PD12 I2C_SCL
CEC_CLK PA8 45 46 - -
CEC PB6 47 48 - -
DSI_TE PJ2 49 50 - -
- 51 52 - -
DSI_BL_CTRL PJ12 53 54 - -
- - 55 56 - -
DSI_RST PG3 57 58 - -
- - 59 60 - 1.8 V
1. Reserved for future use.
1 GND 2 +3V3
3 DFSDM_CKOUT (PD3) 4 DFSDM_CKOUT (PD3)
5 DFSDM_DATIN3 (PC7) 6 DFSDM_DATIN7 (PB9)
7 DFSDM_DATIN1 (PC3) 8 DFSDM_DATIN2 (PB14)
9 NC 10 DETECTn (PC6)
11 NC 12 MEMS_LED (PJ13)
13 NC 14 NC
15 NC 16 NC
17 NC 18 NC
19 +3V3 20 GND
06Y9
1 GND 16 GND
2 NC 17 DCMI_HSYNC (PA4)
3 NC 18 NC
4 DCMI_D0 (PC6) 19 DCMI_VSYNC (PB7)
5 DCMI_D1 (PC7) 20 3V3
6 DCMI_D2 (PG10) 21 Camera_CLK (OSC_24M)
7 DCMI_D3 (PC9) 22 NC
8 DCMI_D4 (PC11) 23 GND
9 DCMI_D5 (PD3) 24 NC
10 DCMI_D6 (PB8) 25 DCMI_PWR_EN (PJ14)
11 DCMI_D7 (PB9) 26 RESET#
12 NC 27 DCMI_SDA (PD13)
13 NC 28 DCMI_SCL (PD12)
14 GND 29 GND
15 DCMI_PIXCK (PA6) 30 3V3
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That this connector shares many GPIOs with other functions on the board. For more
detailed information, refer to Appendix B: STMod+ GPIO sharing and multiplexing.
In addition, to have a quick look at STMod+ GPIO sharing and multiplexing, and to get a
quick view on other Alternate functions available on its pins, please refer to Appendix B:
STMod+ GPIO sharing and multiplexing.
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Pmod™ also shares GPIOs with other functions of the board. For more detailed information,
refer to Appendix B: STMod+ GPIO sharing and multiplexing.
7 Schematic diagrams
This chapter provides design schematics for the STM32H747I-DISCO key features to help
users to implement these features in application designs:
• Figure 20: Overall schematics for the board on page 36
• Figure 21: STM32H747I-DISCO MCU on page 37
• Figure 22: Power supply on page 38
• Figure 23: SDRAM memory device on page 39
• Figure 24: Audio codec device on page 40
• Figure 25: DSI LCD and camera connector on page 41
• Figure 26: Ethernet on page 42
• Figure 27: Quad-SPI Flash memory devices on page 43
• Figure 28: Physical control peripherals and microSD™ card on page 44
• Figure 29: Pmod, STMod+ and audio connectors on page 45
• Figure 30: TAG debug connector on page 46
• Figure 31: ARDUINO® Uno connector on page 47
• Figure 32: STLINK-V3E module on page 48
• Figure 33: STLINK-V3E power on page 49
• Figure 34: USB_OTG_HS port on page 50
Schematic diagrams
U_MCU U_Memory
MCU.SchDoc Same length Memory.SchDoc
R131 1K5
+3V3 I2C4_SCL A[0..15] A[0..15]
R130 1K5
I2C4_SDA D[0..31] D[0..31]
U_Audio 90MHz clock
SDCLK SDCLK
Audio.SchDoc
SDNE1 SDNE1
I2C4_SCL SAI1_SCKA SAI1_SCKA SDNRAS SDNRAS
I2C4_SDA SAI1_FSA SAI1_FSA SDNCAS SDNCAS
SAI1_SDA SAI1_SDA SDNWE SDNWE
SAI1_SDB SAI1_SDB SDCKE1 SDCKE1
SAI1_MCLKA SAI1_MCLKA FMC_NBL0 FMC_NBL0
SAI4_CK1 SAI4_CK1 FMC_NBL1 FMC_NBL1
SAI4_D1 SAI4_D1 FMC_NBL2 FMC_NBL2
FMC_NBL3 FMC_NBL3
SPDIF_RX0 SPDIF_RX0
U_QSPI
Audio_INT Audio_INT
QSPI.SchDoc
133MHz clock
QSPI_CLK QSPI_CLK
U_LCD&Camera Connectors
QSPI_BK1_NCS QSPI_BK1_NCS
LCD&Camera Connectors.SchDoc
QSPI_BK1_IO0 QSPI_BK1_IO0
I2C4_SCL SCLK/MCLK QSPI_BK1_IO1 QSPI_BK1_IO1
I2C4_SDA LRCLK QSPI_BK1_IO2 QSPI_BK1_IO2
I2S QSPI_BK1_IO3 QSPI_BK1_IO3
500MHz clock
DSI_CK_P DSI_CK_P QSPI_BK2_IO0 QSPI_BK2_IO0
DSI_CK_N DSI_CK_N QSPI_BK2_IO1 QSPI_BK2_IO1
U_Power
DSI_D0_P DSI_D0_P QSPI_BK2_IO2 QSPI_BK2_IO2
Power.SchDoc
DSI_D0_N DSI_D0_N QSPI_BK2_IO3 QSPI_BK2_IO3
DSI_D1_P DSI_D1_P
DSI_D1_N DSI_D1_N
Same length U_Peripherals
DSI_TE DSI_TE
Peripherals.SchDoc
DSI_RESET DSI_RESET
LCD_BL_CTRL LCD_BL_CTRL SDIO1_CLK SDIO1_CLK
CEC CEC SDIO1_D0 SDIO1_D0
25MHz clock
CEC_CLK CEC_CLK SDIO1_D1 SDIO1_D1
TOUCH_INT TOUCH_INT SDIO1_D2 SDIO1_D2
SDIO1_D3 SDIO1_D3
DCMI_PIXCK DCMI_PIXCK SDIO1_CMD SDIO1_CMD
DCMI_HSYNC DCMI_HSYNC uSD_Detect uSD_Detect
DCMI_VSYNC DCMI_VSYNC
RESET# DCMI_D[0..7] DCMI_D[0..7] JOY_SEL JOY_SEL
DCMI_PWR_EN DCMI_PWR_EN JOY_UP JOY_UP
24MHz clock
OSC_24M JOY_DOWN JOY_DOWN
JOY_LEFT JOY_LEFT
JOY_RIGHT JOY_RIGHT
WAKEUP WAKEUP
UM2411 Rev 4
U_USB_OTG
USB_OTG .SchDoc Same length
LED1 LED1
ULPI_D[0..7] ULPI_D[0..7] LED2 LED2
60MHz clock
ULPI_CK ULPI_CK LED3 LED3
ULPI_DIR ULPI_DIR LED4 LED4
OSC_24M ULPI_STP ULPI_STP
ULPI_NXT ULPI_NXT
U_Ethernet
RESET# OTG_HS_OverCurrent OTG_HS_OverCurrent
Ethernet.SchDoc
RMII_REF_CLK RMII_REF_CLK
U_Arduino Connectors
RMII_RXD0 RMII_RXD0
Arduino Connectors.SchDoc
RMII_RXD1 RMII_RXD1
ARD_D15 ARD_A0 ARD_A0 RMII_CRS_DV RMII_CRS_DV
ARD_D14 ARD_A1 ARD_A1 RMII_TXD0 RMII_TXD0
ARD_A2 ARD_A2 RMII_TXD1 RMII_TXD1
ARD_A3 ARD_A3 RMII_TX_EN RMII_TX_EN
ARD_A4 ARD_A4 ETH_MDC ETH_MDC
ARD_A5 ARD_A5 ETH_MDIO ETH_MDIO
25MHz clock
OSC_25M OSC_25M
ARD_D0 ARD_D0 ETH_nINT ETH_nINT
ARD_D1 ARD_D1 RESET#
ARD_D2 ARD_D2
ARD_D3 ARD_D3
ARD_D4 ARD_D4
U_STLink_V3E_Module U_STLink_V3E_PWR
ARD_D5 ARD_D5
STLink_V3E_Module.SchDoc STLink_V3E_PWR.SchDoc
ARD_D6 ARD_D6
ARD_D7 ARD_D7 TDI
ARD_D8 ARD_D8 TRST
ARD_D9 ARD_D9 TMS/SWDIO T_SWDIO T_PWR_EN T_PWR_EN
ARD_D10 ARD_D10 TCK/SWCLK T_SWCLK T_PWR_EXT T_PWR_EXT
ARD_D11 ARD_D11 TDO/SWO T_SWO
ARD_D12 ARD_D12 RESET# T_NRST
NRST ARD_D13 ARD_D13
USART1_TX T_VCP_TX
USART1_RX T_VCP_RX
U_PMOD_STMod+ connector
PMOD_STMod+ connector .SchDoc
U_DEBUG
PMOD#1-NSS PMOD#1-NSS
DEBUG.SchDoc
PMOD#2-MOSIp PMOD#2-MOSIp
PMOD#2-TX PMOD#2-TX TDI
PMOD#3-MISOp PMOD#3-MISOp TRST
PMOD#3-RX PMOD#3-RX TMS/SWDIO
PMOD#4-SCK PMOD#4-SCK TCK/SWCLK
PMOD#7-SCL PMOD#1-CTS PMOD#1-CTS TDO/SWO
PMOD#8-MOSIs PMOD#8-MOSIs RESET#
PMOD#9-MISOs PMOD#9-MISOs
PMOD#10-SDA PMOD#4-RTS PMOD#4-RTS
PMOD#11-INT PMOD#11-INT
PMOD#12-RST PMOD#12-RST
PMOD#13-ADC PMOD#13-ADC
PMOD#14-PWM PMOD#14-PWM
PMOD#17-DF-D3 PMOD#17-DF-D3
PMOD#18-DF-CKOUT PMOD#18-DF-CKOUT
PMOD#19-DF-D7 PMOD#19-DF-D7
PMOD#20-DF-CK7 PMOD#20-DF-CK7
Title: MB1248
UM2411
Project: STM32H7-DK
Size: A3 Reference: MB1248 Revision: D.2
Date: 1/21/2019 Sheet: 1 of 15
Figure 21. STM32H747I-DISCO MCU
UM2411
U6A U6B
PA0 N5 D13 R182 33 PD0 D2 A10PG0 R55 33 T8 A16 R90 33 PI0 D24
PMOD#1-CTS PA0 PD0 PG0 PI0
PA1 N4 E12 R180 33 PD1 D3 A11PG1 R54 33 U8 A15 R92 33 PI1 D25
RMII_REF_CLK PA1 PD1 PG1 PI1
PA2 N3 D12 PD2 A12PG2 R172 33 H16 B15 R91 33 PI2 D26
ARD_A0 ETH_MDIO PA2 PD2 SDIO1_CMD PG2 PI2
ULPI_D0 PA3 U2 B12 DCMI_D5 PD3 PG3 R82 33 H15 C14 R195 33 PI3 D27
DCMI_HSYNC PA3 PD3 PMOD#18-DF-CKOUT DSI_RESET PG3 PI3
SB3 PA4 U3 A12 PD4 A14 PG4 R168 33 H14 A4 PI4
PMOD#13-ADC PA4 PD4 PMOD#4-RTS PG4 PI4 FMC_NBL2
SB4 PA5 T3 A11 PD5 A15 PG5 R169 33 G14 A3 PI5
ARD_D5 ULPI_CK PA5 PD5 PMOD#2-TX PG5 PI5 FMC_NBL3
PA6 R3 B11 PD6 PG6 R176 33 G15 A2 R187 33 PI6 D28
DCMI_PIXCK PA6 PD6 PMOD#3-RX QSPI_BK1_NCS PG6 PI6
PA7 R5 C11 PD7 PG7 F16 B3 R188 33 PI7 D29
RMII_CRS_DV PA7 PD7 SPDIF_RX0 SAI1_MCLKA PG7 PI7
PA8 E15 U16 R59 33 PD8 D13 PG8 R179 33 F15 E4 PI8
CEC_CLK PA8 PD8 SDCLK PG8 PI8 uSD_Detect
PA9 D15 T17 R62 33 PD9 D14 PG9 R181 33 A10 E2 R200 33 PI9 D30
USART1_TX PA9 PD9 QSPI_BK2_IO2 PG9 PI9
PA10 D14 T16 R60 33 PD10 D15 DCMI_D2 PG10 A9 F3 R201 33 PI10 D31
USART1_RX PA10 PD10 PG10 PI10
PA11 E17 R15 R157 33 PD11 PG11 R93 33 B9 F4 PI11
PMOD#1-NSS PA11 PD11 QSPI_BK1_IO0 RMII_TX_EN PG11 PI11 ULPI_DIR
PA12 E16 R16 PD12 PG12 R193 33 C9 H1 PI12
PMOD#4-SCK PA12 PD12 I2C4_SCL RMII_TXD1 PG12 PI12 LED1
PA13 C15 R17 PD13 PG13 R194 33 D9 H2 PI13
TMS/SWDIO PA13 PD13 I2C4_SDA RMII_TXD0 PG13 PI13 LED2
PA14 B14 P16 R67 33 PD14 D0 PG14 R178 33 D8 H3 PI14
TCK/SWCLK PA14 PD14 QSPI_BK2_IO3 PG14 PI14 LED3
PA15 A14 P15 R65 33 PD15 D1 PG15 R189 33 D6 P5 PI15
TDI PA15 PD15 SDNCAS PG15 PI15 LED4
4 3
D13
2 1
ESDA7P60-1U1M
D[0..31]
D[0..31]
A[0..15]
A[0..15]
ULPI_D[0..7]
ULPI_D[0..7]
Schematic diagrams
DCMI_D[0..7]
DCMI_D[0..7]
Title: MCU
Project: STM32H7-DK
Size: A3 Reference: MB1248 Revision: D.2
Date: 1/21/2019 Sheet: 2 of 15
37/61
Figure 22. Power supply
38/61
Schematic diagrams
U6C U19 H1 H7 H5 H3
E6 A1 VIN LD1117S50TR E5V
VDD_MCU VDD VSS
E9 A17 3 2
VDD VSS Vin Vout
E11 B2 4
VDD VSS Tab
F5 B6 C143
VDD VSS C146
G5 C10 10uF(25V)
VDD VSS
1
10uF
G13 C13
VDD VSS
LDO mode: SB1, SB12, SB49 mounted, SB2, H5 C16
SB11, SB19, SB46, SB48 removed VDD VSS
H13 G7 H8 H2 H6 H4
SMPS mode (default): SB2, SB11, SB19, SB46, VDD VSS
J13 G8
SB48 mounted, SB1, SB12, SB49 removed VDD VSS
K5 G9
SB14, SB15 are backup VDD VSS
K13 G10
VDD VSS
L5 G11 SB9
VDD VSS
L13 G16
VDD VSS
M5 H7
VDD VSS
VDD_MCU M13 H8
VDD VSS
N7 H9 JP6
VDD VSS
VDD_SDC L7 N8 H10
VDD VSS 5V_USB_STLK 1 2
BEAD(FBMJ1608HM180NTR) N10 H11
VDD VSS 5V_USB_PWR 3 4
SB19 N11 J3
VDD VSS VBUS_HS 5 6
N12 J7 TP3
C152 VDD VSS E5V 7 8
C26 J8 CHGR 5V LD8
10uF VSS 5V_USB_CHGR 9 10
10uF(GRM155R60G106ME44) F1 J9 +5V Green +3V3 VDD_MCU
VDDSMPS VSS R101 JP3
J10 Shunt Fitted 1-2 1 2
GND-SD VSS
C153 220pF J11 1K
VSS
GND-SD L3 E1 K7
VLXSMPS VSS
SMPS GND 2.2uH(LQM2MPN2R2NG0) G2 K8
VFBSMPS VSS
Place near L3 SB46 K9
VSS
F2 K10 TP4
GND-SD VSSSMPS VSS
C15 4.7uF[N/A] SB14 K11 +3V3 TP1 TP5
VSS
C39 4.7uF SB2 L7 +5V U11 +3V3 Ground Ground
UM2411 Rev 4
VSS
C33 4.7uF SB11 L8 3 2
VSS VI VO
C16 2.2uF SB1 U11 L9
VCAP VSS C54 C69
C32 2.2uF SB12 D17 L10 1 C65
VCAP VSS 4.7uF NC TPSR106K006R1000
C40 2.2uF[N/A] SB15 A7 L11 4 100nF
GND
GND
VCAP VSS NC
N16 5
VSS NC
SB48 A6 R4
VDD_SDC VDDLDO VSS
SB49 C17 R8
VDD_MCU VDDLDO VSS
7
VDD_MCU U12 T12
VDDLDO VSS
U1 ST1L05APU33R 5V_USB_PWR
VSS
L6 U17 CN14
VSS
BEAD(FCM1608KF-601T03) 1
VBUS
G17 P1 GND-SD 2
VDD50USB VSSA DM
USB_Micro-B receptacle
VDD_MCU N1 3
VREF- DP
SB10 F17 4
VDD33USB ID
VDDA P17 5
C28 VDDDSI VDD_MCU GND
DSI_VDD12
1uF_X5R_0603 N17 6
R158 VCAPDSI Shield
7
0 Shield C75
L1 J16 8
VDDA VSS C19 C20 C21 Shield 100nF
M1 J17 9
VREF+ VREF+ VSS 100nF 2.2uF [N/A] Shield
K15 10
VSSDSI EXP
L15 11
VSSDSI EXP
SB16 B1 M15
+3V3 VBAT VSSDSI
Ceramic capacitor (Low ESR <600m ohm) USB_uB_105017-0001
STM32H747XIH6U Only one 2.2uF required on board
VDD_MCU TP2
U8 1V8
+3V3 LD1117S18TR +1V8
C96 C118 C93 C100 C102 C95 C97 C104 C107 C94 C36 3 2
4.7uF Vin Vout
100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 4
Tab
C42
1
10uF
VDD_MCU VREF+ VDDA
UM2411
Date: 1/21/2019 Sheet: 3 of 15
Figure 23. SDRAM memory device
UM2411
D[0..31]
D[0..31]
A[0..15] U7
A[0..15]
A12 H3
A12
A11 H9 E2 D31
A11 DQ31
A10 G7 D3 D30
A10 DQ30
A9 J3 D2 D29
A9 DQ29
A8 H2 B1 D28
A8 DQ28
A7 H1 C2 D27
A7 DQ27
A6 G3 A1 D26
A6 DQ26
A5 G2 C3 D25
A5 DQ25
A4 G1 A2 D24
A4 DQ24
A3 F3 A8 D23
A3 DQ23
A2 F7 C7 D22
A2 DQ22
A1 G9 A9 D21
A1 DQ21
A0 G8 C8 D20
A0 DQ20
B9 D19
DQ19
A15 H8 D8 D18
BA1 DQ18
A14 J7 D7 D17
BA0 DQ17
E8 D16
DQ16
PH5 K8
SDNWE WE#
PG15 K7 R2 D15
SDNCAS CAS# DQ15
PF11 J9 N3 D14
SDNRAS RAS# DQ14
PH6 J8 R1 D13
SDNE1 CS# DQ13
PH7 R47 0 J2 N2 D12
SDCKE1 CKE DQ12
PG8 J1 P1 D11
SDCLK CLK DQ11
M2 D10
UM2411 Rev 4
DQ10
PI5 F2 M3 D9
FMC_NBL3 DQM3 DQ9
PI4 F8 L2 D8
FMC_NBL2 DQM2 DQ8
PE1 K1 L8 D7
FMC_NBL1 DQM1 DQ7
PE0 K9 M7 D6
FMC_NBL0 DQM0 DQ6
M8 D5
DQ5
E3 P9 D4
NC DQ4
E7 N8 D3
NC DQ3
R9 D2
DQ2
H7 N7 D1
NC DQ1
K3 R8 D0
NC DQ0
K2
NC
B2 B3
+3V3 VDDQ VSSQ
B7 B8
VDDQ VSSQ
C9 C1
VDDQ VSSQ
D9 D1
VDDQ VSSQ
E1 E9
VDDQ VSSQ
L1 L9
VDDQ VSSQ
M9 M1
VDDQ VSSQ
N9 N1
VDDQ VSSQ
P2 P3
VDDQ VSSQ
P7 P8
VDDQ VSSQ
A7 A3
VDD VSS
F9 F1
VDD VSS
L7 L3
VDD VSS
R7 R3
VDD VSS
+3V3 IS42S32800G-6BLI
IS42S32160D-6BLI
C121
C119
Schematic diagrams
C38
C35
C24
C41
C45
C29
C37
C25
C30
C27
C23
C44
SDRAM
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
100nF
Title: SDRAM
Place close SDRAM
Project: STM32H7-DK
Size: A4 Reference: MB1248 Revision: D.2
Date: 1/21/2019 Sheet: 4 of 15
39/61
Figure 24. Audio codec device
40/61
Schematic diagrams
+3V3 U12
E9 D6
LDO1VDD AGND Default I2C Address:0011010
+3V3 D9 E7
AVDD1 AGND
B2 E8
SPKVDD1 AGND
+1V8 C2 A1
SPKVDD2 SPKGND1
D8 C1
AVDD2 SPKGND2
G9 H9
+1V8 CPVDD CPGND
+3V3 F1 E2
DCVDD DGND
D2 F7
DBVDD HP2GND
D1
+1V8 LDO2VDD
F3 R105 0 PD13
100nF C59
C70
100nF C68
C64
100nF C56
C60
100nF C57
C62
C58
SDA I2C4_SDA
R99 4K7 D4 H1 R103 0 PD12
+3V3 LDO1ENA SCLK I2C4_SCL
D5 G2 R108 [N/A]
LDO2ENA CS/ADDR +3V3
4.7uF
4.7uF
4.7uF
C46 1uF E6 A4
1uF
1uF
VREFC CIFMODE
D3 PG7
MCLK1 SAI1_MCLKA
C6 E1
DMICCLK GPIO2/MCLK2
PE5 G1 A3
SAI1_SCKA BCLK1 SPKMODE
PE4 E3 A5
SAI1_FSA LRCLK1 REFGND
PE6 E4
SAI1_SDA DACDAT1
PE3 F2 A7
SAI1_SDB ADCDAT1 MICBIAS1
PJ15 G3 B6
Audio_INT ADCLRCLK1/GPIO1 MICBIAS2
PC1 C9
SAI4_D1 VMIDC Jack out Green
H2 F9 C67 C73 C74
GPIO3/BCLK2 HPOUT2N 4.7uF 4.7uF 4.7uF
F4 F8
GPIO4/LRCLK2 HPOUT2P
PE2 H3 3 CN11
SAI4_CK1 GPIO5/DACDAT2
E5 G5 6
GPIO7/ADCDAT2 HPOUT1FB
G4 G6
GPIO6/ADCLRCLK2 HPOUT1R
SB45 SB44 SB21 H6 4
HPOUT1L
F6
100nF C51
100nF C50
GPIO11/BCLK3 PJ3028B-3-GR
LEFT SELECTION H5
Jack in blue GPIO10/LRCLK3
SB43 H4
UM2411 Rev 4
GPIO8/DACDAT3
F5 C5
MIC_DATA
GPIO9/ADCDAT3 LINEOUT1N
MIC_CLK
R213 10K B5
CN10 LINEOUT1P R97 R98
3 C8 C4
IN1LP LINEOUT2N
6
U21 RIGHT 6 Left C71 D7 B4 20 20
IN1LN LINEOUT2P D4
1 2 1uF A6
VDD LR LINEOUTFB
C150
3 4 Right B8 ESDA6V1BC6
CLK IN2LP/VRXN
5 4 PJ3028B-3-BE B9 JP2
GND DOUT IN2LN/DMICDAT1
B1
SPKOUTLN SPK Left
MP34DT05-A C7 A2
100nF
IN1RP SPKOUTLP
5
2
C72 B7 JP5
IN1RN
MP34DT05-A for replacement 1uF C3
SPKOUTRN SPK Right
A8 B3
IN2RP/VRXP SPKOUTRP
A9
IN2RN/DMICDAT2
SB22 G8
CPCA
H8
CPCB
C47 2.2uF
H7
CPVOUTN
G7 C49 2.2uF
CPVOUTP
C48 2.2uF
WM8994ECS/R
SB41 MICBIAS1
+3V3
UM2411
Date: 1/21/2019 Sheet: 5 of 15
Figure 25. DSI LCD and camera connector
UM2411
DSI LCD DCMI_D[0..7]
DCMI_D[0..7]
CN15 P1
1
1 2
2 Camera Connector 1
2
3 4 PK7
DSI_CK_P 3 4 TOUCH_INT 3
5 6 DCMI_D0
DSI_CK_N 5 6 4
7 8 DSI_D2_P SB29 DCMI_D1
7 8 5
9 10 DSI_D2_N SB28 DCMI_D2
DSI_D0_P 9 10 6
11 12 DCMI_D3
DSI_D0_N 11 12 7
13 14 DSI_D3_P SB27 DCMI_D4
13 14 8
15 16 DSI_D3_N SB26 DCMI_D5
DSI_D1_P 15 16 9
17 18 DCMI_D6
DSI_D1_N 17 18 10
19 20 DCMI_D7
19 20 11
21 22
+5V 21 22 12
L5 23 24
C3 23 24 13
BEAD(FCM1608KF-601T03) C76 25 26
10uF 25 26 14
100nF 27 28 PA6
27 28 DCMI_PIXCK 15
29 30
29 30 16
L4 BEAD(FCM1608KF-601T03) 31 32 PA4
31 32 DCMI_HSYNC 17
33 34
33 34 18
PE5 35 36 PB7
SCLK/MCLK 35 36 +3V3 DCMI_VSYNC 19
PE4 37 38
LRCLK 37 38 +3V3 20
PE6 39 40 PD13 C9 Camera_CLK
I2S 39 40 I2C4_SDA OSC_24M 21
41 42 100nF
41 42 22
43 44 PD12
43 44 I2C4_SCL 23
PA8 45 46
CEC_CLK 45 46 24
PB6 47 48 PJ14
CEC 47 48 DCMI_PWR_EN 25
PJ2 49 50
DSI_TE RESET#
UM2411 Rev 4
49 50 26
51 52 PD13 R5 100
51 52 27
PJ12 53 54
LCD_BL_CTRL 53 54 28
55 56 PD12 R4 100
55 56 29
PG3 57 58
DSI_RESET 57 58 +3V3 30
59 60
R123 59 60 +1V8 C8
C79
+3V3 10uF 31
10K 61 C10 100nF
61 32
62 100nF
62
63 FPU330ZH-BT1D3-CA
63
64
64
QSH-030-01-F-D-A-K-TR
Schematic diagrams
Title: LCD&Camera Connectors
Project: STM32H7-DK
Size: A4 Reference: MB1248 Revision: D.2
Date: 1/21/2019 Sheet: 6 of 15
41/61
Figure 26. Ethernet
42/61
Schematic diagrams
+3V3
L8
BEAD(FCM1608KF-601T03)
U17
+3V3 1 6
I/O1 I/O4
2 5
R167 R161 GND Vbus
3 4
R74 R75 R68 50 50 I/O2 I/O3
C103
10K 10K 10K USBLC6-4SC6 100nF
R170 R164 U5
Diff Pair 100ohm 50 50 TD_P 1 16 CN7
TD+ TX+
U18 i Diff Pair 100ohm 2 15 1
CT CT TX+
PG11 16 21 i TD_N 3 14 2
UM2411 Rev 4
R81
0
R177 [N/A]
+3V3
ETH_nINT
Title: Ethernet
Project: STM32H7-DK
Size: A4 Reference: MB1248 Revision: D.2
UM2411
Date: 1/21/2019 Sheet: 7 of 15
Figure 27. Quad-SPI Flash memory devices
UM2411
Twin Quad SPI Flash
U3 U14
SB47 6 11 6 11
NC NC NC NC
PG6 NCS2 7 10 NCS2 7 10
QSPI_BK1_NCS CS# Vss CS# Vss
PF9 R20 33 8 9 R1 33 PF7 BK2_IO1 8 9 BK2_IO2
QSPI_BK1_IO1 DQ1 W#/Vpp/DQ2 QSPI_BK1_IO2 DQ1 W#/Vpp/DQ2
R134 33 R124 33
R8 MT25QL512ABB8ESF-0SIT MT25QL512ABB8ESF-0SIT
10K
+3V3
Two QSPI Flash solution
One Twin Quad SPI Fllash U3:MT25TL01GHBB8ESF-0SIT U14:NA R3/R6/R18/R19, SB47 ON R124/R125/R134/R135, SB25, C84 OFF
Schematic diagrams
Two Quad SPI Fllash (default) U3:MT25QL512ABB8ESF-0SIT U14:MT25QL512ABB8ESF-0SIT R124/R125/R134/R135, SB25, C84 ON R3/R6/R18/R19, SB47 OFF
Title: QSPI
Project: STM32H7-DK
Size: A4 Reference: MB1248 Revision: D.2
Date: 1/21/2019 Sheet: 8 of 15
43/61
Figure 28. Physical control peripherals and microSD™ card
44/61
Schematic diagrams
Buttons LEDs
+3V3
LD1
R216 +3V3 Green +3V3
100 1 2 R203 PI12
LED1
MICRO SD
510
4 (TF) Card
1
LD2 R115 R118 R119 R116 R117
B2 Orange 47K 47K 47K 47K 47K
C151 USER 1 2 R204 PI13
LED2
[N/A] 680
LD3 PC9
SDIO1_D1
3
Red PC8
R215 R205 SDIO1_D0
PC13 1 2 PI14 PC11
WAKEUP LED3 SDIO1_D3
1
A6
A5
A4
A3
A2
A1
B2
B3
B4
2
ESDA7P60-1U1M
U13
O1
O5
O3
O6
O4
O2
GND
GND
GND
EMIF06-HSD03F3
VCC
DET
UM2411 Rev 4
I6
I5
I4
I3
I2
I1
C1
B1
C5
C3
B5
C6
C4
C2
+3V3
Joystick +3V3
C149
100nF
B3
5
2
6
7
8
5 7 CN12
COMMON GND
8 PJS008-2000
GND
SMS064FF or SMS128FF
2
Selection
PK2
JOY_SEL
PK3 3 +3V3
SW2
SW1
JOY_DOWN DOWN
PK4 1
JOY_LEFT LEFT
PK5 4
JOY_RIGHT RIGHT
PK6 6
JOY_UP UP
9
10
R121
MT-008A [N/A]
1
D9 PI8 R122
ESDA6V1-5SC6 uSD_Detect
0
input pin with pull-up
2
Title: Peripherals
Project: STM32H7-DK
Size: A4 Reference: MB1248 Revision: D.2
UM2411
Date: 1/21/2019 Sheet: 9 of 15
Figure 29. Pmod, STMod+ and audio connectors
UM2411
PMOD
P3
PMOD#1 PMOD#11
1 7
PMOD#2 PMOD#12
2 8
PMOD#3
3 9
PMOD#4
4 10
+3V3
5 11
6 12
SSW-106-02-F-D-RA
ATOM FH254206C-1600
STMod+
+5V
PA11 SB32
PMOD#1-NSS
PA0 SB31 PMOD#1 P2
PMOD#1-CTS
PC3 SB34 PMOD#11 PC6
PMOD#2-MOSIp 1 11 PMOD#11-INT
PD5 SB33 PMOD#2 PMOD#12 PJ13
PMOD#2-TX PMOD#12-RST
UM2411 Rev 4
2 12
PC2 SB36 PMOD#3 PA4
PMOD#3-MISOp 3 13 PMOD#13-ADC
PD6 SB35 PMOD#4 PMOD#14 PF8
PMOD#3-RX 4 14 PMOD#14-PWM
PA12 SB38
PMOD#4-SCK 5 15
PD4 SB37
PMOD#4-RTS 6 16
PD12 PMOD#17 PC7
PMOD#7-SCL 7 17 PMOD#17-DF-D3
PB15 PMOD#18 PD3
PMOD#8-MOSIs 8 18 PMOD#18-DF-CKOUT
PB14 PMOD#9 PMOD#19 PB9
PMOD#9-MISOs 9 19 PMOD#19-DF-D7
PD13 PB8
PMOD#10-SDA 10 20 PMOD#20-DF-CK7
SQT-110-01-F-D-RA
ATOM FH200210C-12000
Audio Connector
+3V3
CN17
1 2
DFSDM_CKOUT PMOD#18 SB40 PD3 PMOD#18 DFSDM_CKOUT
3 4
DFSDM_DATIN3 PMOD#17 PC7 PB9 PMOD#19 DFSDM_DATIN7
5 6
DFSDM_DATIN1 PMOD#2 PC3 PB14 PMOD#9 DFSDM_DATIN2
7 8
PC6 PMOD#11 DETECTn
9 10
PJ13 PMOD#12 MEMS_LED
11 12
13 14
15 16
Schematic diagrams
17 18
19 20
FHCS44-210
+3V3 Receptacle 10X2 TH VT 1.27mm
Schematic diagrams
+3V3
CN16
1 10
R208 22 PA13 2 9
TMS/SWDIO
3 8
R207 22 PA14 4 7
TCK/SWCLK
5 6
TC2050-IDC-NL
Fitted: NO
5
D12 D11
2
2
ESDALC6V1W5 ESDALC6V1W5
UM2411
Date: 1/21/2019 Sheet: 12 of 15
Figure 31. ARDUINO® Uno connector
UM2411
LD6
Arduino uno connector
R46 1 2
+3V3
510 T1 ARD_D15 I2C4_SCL
BSN20BK R45
ARD_D14 I2C4_SDA
D3
Green 1M
VREF+
G
1 SB5 R43 [N/A]
2 S
E5V
+5V +3V3 CN5 C18
PD12 [N/A]
R120 SCL/D15 10
PD13
1K CN8 SDA/D14 9
AVDD 8
1 GND 7
PK0
2 IOREF SCK/D13 6 ARD_D13 SPI5_SCK
NRST PJ11
NRST 3 NRST MISO/D12 5 ARD_D12 SPI5_MISO
PJ10
4 3V3 PWM/MOSI/D11 4 ARD_D11 TIM1_CH2N, SPI5_MOSI
POWER
PK1
5 5V PWM/CS/D10 3 ARD_D10 TIM1_CH1, SPI5_NSS
PJ6
6 GND PWM/D9 2 ARD_D9 TIM8_CH2
PJ5
ARD_D8
UM2411 Rev 4
7 GND D8 1
8 VIN
SSW-110-22-x-S-VS
WARNING voltage applied to VIN <11.5V
VIN SSW-108-22-x-S-VS CN6
CN9 PJ0
D7 8 ARD_D7
ADC12_IN4 PA4 PJ7
ARD_A0 1 A0 PWM/D6 7 ARD_D6 TIM8_CH2N
ADC3_IN8 PF10 PA6
ARD_A1 2 A1 PWM/D5 6 ARD_D5 TIM3_CH1
ADC12_IN0 PA0_C PJ4
ARD_A2 3 A2 D4 5 ARD_D4
AIN
ADC12_IN1 PA1_C PF8
ARD_A3 4 A3 PWM/D3 4 ARD_D3 TIM13_CH1
PJ3
5 A4 D2 3 ARD_D2
PJ8
6 A5 TX/D1 2 ARD_D1 UART8_TX
PC2_C SB23 PJ9
ADC3_IN0 ARD_A4 RX/D0 1 ARD_D0 UART8_RX
SAMTEC SSW-106-22-x-S-VS
PD13 SB24 SSW-108-22-x-S-VS
I2C4_SDA
PC3_C SB6
ADC3_IN1 ARD_A5
PD12 SB7
I2C4_SCL
Schematic diagrams
Title: Arduino connectors
Project: STM32H7-DK
Size: A4 Reference: MB1248 Revision: D.2
Date: 1/21/2019 Sheet: 13 of 15
47/61
Figure 32. STLINK-V3E module
48/61
Schematic diagrams
5V_USB_CHGR
CN2 USB U1 USB Impedance Constraint [Min = 85.00 Max = 95.00 ]
1 i 4 3 i Matched Net Lengths [Tolerance = 0.2mm]
VBUS NC GND
2 USB_DEV_HS_CN_N 5 2 USB_DEV_HS_N T_NRST
DM D-in D-out T_NRST
USB_Micro-B receptacle
3 USB_DEV_HS_CN_P 6 1 USB_DEV_HS_P
DP D+in D+out
4 JP4
ID i i
5 ECMF02-2AMX6 T_SWDIO
GND T_SWDIO
USB USB T_SWCLK
T_SWCLK
1
6 Fitted: NO T_SWO
Shield T_SWO
7
Shield C6
8 T_VCP_TX
Shield T_VCP_TX
9 100nF T_VCP_RX
Shield T_VCP_RX
10 D3
EXP
11
EXP
2
Fitted: NO ESDA7P60-1U1M LD10
USB_uB_105017-0001 Closed to Pin1 of Mirco-B Red T_PWR_EXT
T_PWR_EXT
T_PWR_EN
R113 T_PWR_EN
1 2 LED_STLK
330
4 3 R114
3V3_STLK
330
Must be on a border or the PCB.
Silkscreen = Reserved Green
CN4 LD_BICOLOR_CMS
Header 4x1
1
2
3
4
U9A
3V3_STLK
Fitted: NO STLK_SWDIO A15 R3 T_SW_DIR
STLK_SWDIO/PA13 T_SW_DIR/PA7
STLK_SWCLK A14 N12 T_SWDIO_IN R96 100
UM2411 Rev 4
STLK_SWCLK/PA14 T_SWDIO_IN/PH7
L2 T_SWDIOa
T_SWDIO_OUT/PF9
USB_DEV_HS_N R14 M11 T_SWCLKa
USB_DEV_HS_N/PB14 T_SWCLK/PH6
USB_DEV_HS_P R15 D12 T_SWOa
USB_DEV_HS_P/PB15 T_SWO/PD2
3V3_STLK X4
4 3 R102 100 G1 C10 STLK_VCP_RX
VDD OUT OSC_IN/PH0 VCP_STLK_RX/PG9
H1 A7 STLK_VCP_TX
R110 OSC_OUT/PH1 VCP_STLK_TX/PG14
1 2 +3V3
EN GND R83 4K7
10K J1 K13 GNDDetect T_VCC
JP1 C52 NRST GNDDetect/PG5
C61 NZ2520SB-25.00M N3
100nF R112 T_VCC AIN/PA0
D6 R4 T_PWR_EXT R86 4K7
BOOT0 T_PWR_EXT/PB1
100nF Fitted: NO 10K R5 T_PWR_EN
T_PWR_ENn/PB0
C6
PDR_ON
D15 LED_STLK
R111 LED_STLK/PA10
E1
3V3_STLK OSC32_IN/PC14
10K F1 F15 R104 100 MCO
OSC32_OUT/PC15 MCO/PA8
C43 2.2uF J14 P4 T_NRSTa C55
V12_OTGPHY/PG7 T_NRST/PA5 20pF
R100 3K J15
REXT_OTGPHY/PG6
D4 Fitted: NO
HW_TYP_0/PI4
C4
HW_TYP_1/PI5
STDC14 Receiver
T_VCC must be to connected to VDD_MCU of the Target ST-LINKV3E_SWD
CN13
+3V3
1 2
T_VCC T_SWDIO R217 22 T_SWDIOa D14 D15
3 4
T_SWCLK R218 22 T_SWCLKa
5 6
T_SWO R219 22 T_SWOa T_NRST 5 STLK_SWDIO 5
7 8
9 10
R95 100 GNDDetect T_NRST R220 22 T_NRSTa T_SWDIO 4 STLK_SWCLK 4
11 12
R222 22 T_VCP_RX T_VCP_TX R221 22 STLK_VCP_RX 2 2
13 14
T_SWCLK 3 T_VCP_TX 3
FTSH-107-01-L-DV-K
FTSH-105-01-L-DV-K soldered centrally on the 14-pin footprint T_SWO 1 T_VCP_RX 1
STLK_VCP_TX
ESDALC6V1W5 ESDALC6V1W5
Title: STLink_V3E_Module
Project: STM32H7-DK
Size: A4 Reference: MB1248 Revision: D.2
UM2411
Date: 1/21/2019 Sheet: 11 of 15
Figure 33. STLINK-V3E power
UM2411
3.3 Volts ST-LINK
D7
VBUS_HS
5V_USB_CHGR U20 LDK120M33R 3V3_STLK
5 Volts ST-LINK BAT60JFILM 1 Vin Vout 5
R109 D6
E5V
100K 3 INH
C53 LD9 BAT60JFILM GND BYPASS C144
R106 LED Curr=4mA, Lum=25% D8 C145 100nF
5V_USB_PWR
4
820 C148 C147
1uF RED 5V_USB_STLK BAT60JFILM 100nF C142 1uF
U10 D5 1uF 10nF
5V_USB_CHGR
5 1 SB18
IN OUT BAT60JFILM
T_PWR_EN 4 3
EN FAULT C63
R107 GND 100nF
10K STMPS2151STR
2
3V3_STLK
F10
G6
G7
G8
G9
T_PWR_EN
F6
F7
F8
F9
T_PWR_EN
U9B
+5V 3V3_STLK N10 H6 ST-LINKV3E_SWD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDD VSS
G13 H7
UM2411 Rev 4
VDD VSS
C5 H8
R85 VDD VSS
K4 H9
2K7 VDD VSS
SB13 G3 H10
VDD VSS
T_PWR_EXT N8 J6
T_PWR_EXT VDD VSS
N9 J7
R84 VDD VSS
J13 J8
4K7 VDD VSS
H13 J9
VDD VSS
C8 J10
VDD VSS
C7 K6
VDD VSS
F3 K7
VDD VSS
J12 K8
VDD VSS
C9 K9
VDD VSS
R1 K10
VDDA VSS
P1 F12
VREF+ VSS
C1 D5
VBAT VSS
L4 G2
BYPASS-REG VSS
M8
R94 VSS
M10 M1
10K VCAP1 VSSA
F13 N1
VCAP2 VREF-
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C127 C136
2.2uF 2.2uF
G10
D9
H12
F2
D7
D8
G12
M9
Ceramic capacitor (Low ESR)
Schematic diagrams
3V3_STLK 3V3_STLK 3V3_STLK
C131 C132 C134 C135 C130 C133 C66 C140 C124 C126 C129 C125 C138 C139 C141 C137 C123 C128 C122 Title: STLink_V3E_PWR
100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 100nF 4.7uF 1uF 100nF
Project: STM32H7-DK
Size: A4 Reference: MB1248 Revision: D.2
Date: 1/21/2019 Sheet: 15 of 15
49/61
Figure 34. USB_OTG_HS port
50/61
Schematic diagrams
+3V3
R7 0 PJ1 R71
OTG_HS_OverCurrent
330
+3V3
R13
1
3K3
R11 LD5 LD7
2 1 R17 Green
10K
2
620
U2
3
2 3 Red
GND FAULT R66 T5
5 1 1
+5V IN OUT 9013
4 C7 47K
EN
U4 4.7uF
2
PH4 R36 0 2 17 +5V STMPS2151STR
ULPI_NXT NXT CPEN
PI11 R28 0 31 21 C12 100nF R61
ULPI_DIR DIR VBAT
PC0 R26 0 29 24 L2 22K
ULPI_STP STP RBIAS
PA5 R35 33 1 R10 8K06_1% BLM18PG121SN1D VBUS_HS CN1
ULPI_CK CLKOUT
22 R12 820 1
VBUS VBUS
PB5
USB_Micro-AB receptacle
ULPI_D[0..7] ULPI_D7 R21 0 13 19 2
ULPI_D[0..7] D7 DM DM
PB13 ULPI_D6 R27 0 10 18 3
D6 DP DP
PB12 ULPI_D5 R29 0 9 23 4
D5 ID ID
PB11 ULPI_D4 R42 0 7 5
D4 GND
R24 51 PB10 ULPI_D3 R40 0 6 12
OSC_24M D3 NC
A2
A1
A2
A1
PB1 ULPI_D2 R39 0 5 6
UM2411 Rev 4
D2 Shield
PB0 ULPI_D1 R38 0 4 8 REFSEL0 7
D1 REFSEL0 Shield
PA3 ULPI_D0 R37 0 3 11 REFSEL1 D1 D2 8
D0 REFSEL1 Shield
14 REFSEL2 [N/A] [N/A] 9
REFSEL2 Shield
+3V3 X1 25 USB_VDDIO 10
XO
B1
B1
EXP
B2
B2
4 3 OSC_24M R23 51 26 32
VDD OUT REFCLK VDDIO
+3V3 USB_VDDIO L1 475900001
R9 1 2 20 C1 C4 C5 C2 BLM18PG121SN1D
EN GND VDD3.3
10K 15 30
R136 R137 SPK_L VDD1.8 +1V8 C82
NZ2520SB-24.00M 16 28 C83 100nF100nF100nF100nF
[N/A] 4K7 SPK_R VDD1.8 2.2uF
C85 100nF
C11 SB30 27 33 100nF
RESET# RESETB GNDPAD
100nF
SB30 closed if reset is R138 USB3320C-EZK
controlled by hardware 100K
+3V3 +3V3 T3
S
4 STT4P3LLH6[N/A]
1 T4
USB_VDDIO R34 2 STS5PF30L
[N/A] 3 R58 T1_D 1 3 T1_G
S
1K 2
G
R41 R25 R16 5
0 0 0
G
R33 0 T1_D 5 4 T1_G 6
D
REFSEL0 REFSEL1 REFSEL2 6
7
R30 R22 R14 8 T2
3
[N/A] [N/A] [N/A] 9013
1 R32 10K
C14 +1V8
100nF
2
R31 10K
Title: USB_OTG_HS
Project: STM32H7-DK
Size: A4 Reference: MB1248 Revision: D.2
UM2411
Date: 1/21/2019 Sheet: 14 of 15
UM2411 STM32H747I-DISCO I/O assignment
A1 VSS -
A10 PG9 QSPI_BK2_IO2
A11 PD5 PMOD#2- USART2_TX
A12 PD4 PMOD#4- USART2_RTS
A13 PC10 SDIO1_D2
A14 PA15 JTDI
A15 PI1 FMC_D25
A16 PI0 FMC_D24
A17 VSS -
A2 PI6 FMC_D28
A3 PI5 FMC_NBL3
A4 PI4 FMC_NBL2
A5 PB5 ULPI_D7
A6 VDDLDO -
A7 VCAP -
A8 PK5 JOY_RIGHT
A9 PG10 DCMI_D2
B1 VBAT -
B10 PJ15 Audio_INT
B11 PD6 PMOD#3- USART2_RX
B12 PD3 PMOD#18_DFSDM_CKOUT/DCMI_D5
B13 PC11 SDIO1_D3 || DCMI_D4
B14 PA14 JTCK-SWCLK
B15 PI2 FMC_D26
B16 PH15 FMC_D23
B17 PH14 FMC_D22
B2 VSS -
B3 PI7 FMC_D29
B4 PE1 FMC_NBL1
B5 PB6 HDMI_CEC
B6 VSS -
B7 PB4 NJTRST
B8 PK4 JOY_LEFT
B9 PG11 ETH_/TX_EN/TX_EN
C1 PC15-OSC32_OUT OSC32_OUT
C10 VSS -
C11 PD7 SPDIF_RX0
C12 PC12 SDIO1_CK
C13 VSS -
C14 PI3 FMC_D27
C15 PA13 JTMS-SWDIO
C16 VSS -
C17 VDDLDO -
C2 PC14-OSC32_IN OSC32_IN
C3 PE2 ETH_nINT || SAI4_CK1
C4 PE0 FMC_NBL0
C5 PB7 DCMI_VSYNC
C6 PB3 JTDO/TRACESWO
C7 PK6 JOY_UP
C8 PK3 JOY_DOWN
C9 PG12 ETH_/TXD1/TXD1
D1 PE5 SAI1_SCK_A
D10 PJ14 DCMI_PWR_EN
D11 PJ12 BL_CTRL
D12 PD2 SDIO1_CMD
D13 PD0 FMC_D2
D14 PA10 VCP-USART1_RX
D15 PA9 VCP-USART1_TX
D16 PH13 FMC_D21
D17 VCAP -
D2 PE4 SAI1_FS_A
D3 PE3 SAI1_SD_B
D4 PB9 PMOD#19_DFSDM-DATA7 || DCMI_D7
D5 PB8 PMOD#20_DFSDM-CK7 || DCMI_D6
D6 PG15 FMC_SDNCAS
D7 PK7 TOUCH_INT
D8 PG14 QSPI_BK2_IO3
D9 PG13 ETH_/TXD0/TXD0
E1 VLXSMPS -
E10 PJ13 PMOD#12_GPIO
E11 VDD -
E12 PD1 FMC_D3
E13 PC8 SDIO1_D0
E14 PC9 SDIO1_D1 || DCMI_D3
E15 PA8 CEC_CK || MCO1
E16 PA12 PMOD#4-SPI2_SCK/2_CK
E17 PA11 PMOD#1-SPI2_NSS/2_WS
E2 PI9 FMC_D30
E3 PC13 TAMP_1/WKUP2
E4 PI8 uSD_Detect
E5 PE6 SAI1_SD_A
E6 VDD -
E7 PDR_ON -
E8 BOOT0 -
E9 VDD -
F1 VDDSMPS -
F13 PC7 PMOD#17_DFSDM_DATA3/DCMI_D1
F14 PC6 PMOD#11_INT/DCMI_D0
F15 PG8 FMC_SDCLK
F16 PG7 SAI1_MCLK_A
F17 VDD33USB -
F2 VSSSMPS -
F3 PI10 FMC_D31
F4 PI11 ULPI_DIR
F5 VDD -
G1 PF2 FMC_A2
G10 VSS -
G11 VSS -
G13 VDD -
G14 PG5 FMC_BA1
G15 PG6 QSPI_BK1_NCS
G16 VSS -
G17 VDD50USB -
G2 VFBSMPS -
G3 PF1 FMC_A1
G4 PF0 FMC_A0
G5 VDD -
G7 VSS -
G8 VSS -
G9 VSS -
H1 PI12 LED1
H10 VSS -
H11 VSS -
H13 VDD -
H14 PG4 FMC_BA0
H15 PG3 DSI_Reset
H16 PG2 FMC_A12
H17 PK2 JOY_SEL
H2 PI13 LED2
H3 PI14 LED3
H4 PF3 FMC_A3
H5 VDD -
H7 VSS -
H8 VSS -
H9 VSS -
J1 PH1 - OSC_OUT OSC_OUT
J10 VSS -
J11 VSS -
J13 VDD -
J14 PK0 ARD_D13-SPI5_SCK
J15 PK1 ARD_D10-SPI5_NSS || TIM1_CH1
J16 VSS -
J17 VSS -
J2 PH0 - OSC_IN OSC_IN
J3 VSS -
J4 PF5 FMC_A5
J5 PF4 FMC_A4
J7 VSS -
J8 VSS -
J9 VSS -
K1 NRST NRST
K10 VSS -
K11 VSS -
K13 VDD -
K14 PJ11 ARD_D12-SPI5_MISO
K15 VSSDSI -
K16 DSI_D1P -
K17 DSI_D1N -
K2 PF6 QSPI_BK1_IO3
K3 PF7 QSPI_BK1_IO2
K4 PF8 PMOD#14_PWM || ARD_D3-TIM13_CH1
K5 VDD -
K7 VSS -
K8 VSS -
K9 VSS -
L1 VDDA -
L10 VSS -
L11 VSS -
L13 VDD -
L14 PJ10 ARD_D11-SPI5_MOSI || TIM1_CH2N
L15 VSSDSI -
L16 DSI_CKP -
L17 DSI_CKN -
L2 PC0 ULPI_STP
L3 PF10 ARD_A1
L4 PF9 QSPI_BK1_IO1
L5 VDD -
L7 VSS -
L8 VSS -
L9 VSS -
M1 VREF+ -
M13 VDD -
P3 PH4 ULPI_NXT
P4 PH5 FMC_SDNWE
P5 PI15 LED4
P6 PJ1 OTG_HS_OverCurrent
P7 PF13 FMC_A7
P8 PF14 FMC_A8
P9 PE9 FMC_D6
R1 PC2_C ARD_A4
R10 PE12 FMC_D9
R11 PE15 FMC_D12
R12 PJ5 ARD_D8
R13 PH9 FMC_D17
R14 PH12 FMC_D20
R15 PD11 QSPI_BK1_IO0
R16 PD12 PMOD#7/ARD_D15-I2C4_SCL
R17 PD13 PMOD#10/ARD_D14-I2C4_SDA
R2 PC3_C ARD_A5
R3 PA6 ARD_D5-TIM3_CH1 || DCMI_PIXCLK
R4 VSS -
R5 PA7 ETH_/RX_DV/CRS_DV/SYNC
R6 PB2 QSPI_CLK
R7 PF12 FMC_A6
R8 VSS -
R9 PF15 FMC_A9
T1 PA0_C ARD_A2
T10 PE13 FMC_D10
T11 PH6 FMC_SDNE1
T12 VSS -
T13 PH8 FMC_D16
T14 PB12 ULPI_D5
T15 PB15 PMOD#8-SPI2_MOSI/2_SDO
T16 PD10 FMC_D15
T17 PD9 FMC_D14
T2 PA1_C ARD_A3
T3 PA5 ULPI_CK
T4 PC4 ETH_/RXD0/RXD0/RXD
T5 PB1 ULPI_D2
T6 PJ2 DSI_TE
T7 PF11 FMC_SDNRAS
T8 PG0 FMC_A10
T9 PE8 FMC_D5
U1 VSS -
U10 PE14 FMC_D11
U11 VCAP1 -
U12 VDDLDO -
U13 PH7 FMC_SDCKE1
U14 PB13 ULPI_D6
U15 PB14 PMOD#9-SPI2_MISO/2_SDI
U16 PD8 FMC_D13
U17 VSS -
U2 PA3 ULPI_D0
PMOD#13_ADC || ARD_A0 ||
U3 PA4
DCMI_HSYNC
U4 PC5 ETH_/RXD1/RXD1
U5 PB0 ULPI_D1
U6 PJ3 ARD_D2
U7 PJ4 ARD_D4
U8 PG1 FMC_A11
U9 PE7 FMC_D4
UM2411
Table 23. STMod+ GPIO sharing and multiplexing
Shared or exclusive functions STMod+(1) Shared or exclusive functions
DFSDM ARD Pmod™ Some other Alternate Functions(2) Basic SB Port Pins Port SB Basic Some other Alternate Functions(2) Pmod™ ARD DFSDM DCMI
CK2 - - TIM1_CH3N, TIM8_CH3N, TIM12_CH2, USART1_RX MOSI2 - PB15 8 18 PD3* - GPIO - - - CKOUT D5
UM2411 Rev 4
DATA2 - - TIM1_CH2N, TIM8_CH2N, TIM12_CH1, USART1_TX MISO2 - PB14 9 19 PB9 - GPIO TIM4_CH4, TIM17_CH1, CAN1_TX, I2C1_SDA - - DATA7 D7
- SDA4 - TIM4_CH2 SDA4 - PD13 10 20 PB8* - GPIO TIM4_CH3, TIM16_CH1, CAN1_RX, I2C1_SCL - - CK7 D6
Legend:
= DFSDM = ARDUINO® Uno = Pmod™ = Alternate Functions = STMod+ = CAM = DCMI = Supply = GND
1. Table 23 gives the description of the signals available on the STMod+ connector.
It also shows which signal is shared with other board connector or function.
The I2C bus on pins 19 / 20 might be shared with built-in Discovery slave devices. Check the slave address of any new device when adding it to the bus.
Revision history
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