Int. J. Electron. Commun.

(AEÜ) 139 (2021) 153927

Contents lists available at ScienceDirect

International Journal of Electronics and Communications

journal homepage: www.elsevier.com/locate/aeue

Regular paper

Efficient quad-band RF energy harvesting rectifier for wireless

power communications
Surajo Muhammad a, *, Jun Jiat Tiang a, Sew Kin Wong a, Amor Smida b, c, Mohamed I. Waly b,
Amjad Iqbal a, *
a
Centre For Wireless Technology, Faculty of Engineering, Multimedia University, Cyberjaya 63100, Malaysia
b
Department of Medical Equipment Technology, College of Applied Medical Sciences, Majmaah University, 11952 AlMajmaah, Saudi Arabia
c
Microwave Electronics Research Laboratory Department of Physics Faculty of Mathematical, Physical and Natural Sciences of Tunis, Tunis ElManar University, Tunise
2092, Tunisia

A R T I C L E I N F O A B S T R A C T

Keywords: This work presents a compact quad-band rectifier implemented using a multi-stub impedance matching network
RF energy harvesting (RFEH) (IMN). The IMN comprises three blocks of multiple stub tuning connected via a meandered line (MDL) to achieve
Impedance matching network (IMN) multiple frequency susceptance blocks. The proposed rectifier is designed to operate at (1.82 GHz, 2.1 GHz, 2.4
Power conversion efficiency (PCE)
GHz, and 2.67 GHz) for GSM/1800, UMTS/2100, Wi-Fi, and LTE/2600 frequency bands. The rectifier occupies a
Rectifier
Meandered line (MDL)
total area of 0.45λg × 0.25λg on the RT/Duroid 5880 PCB board using full ground architecture. The fabricated
rectifier achieved RF-to-dc (radio frequency direct current) power conversion efficiency (PCE) of (31.7%, 23.5%,
25.4%, 15.5%) across the four operating frequencies for an input power of − 20 dBm, respectively. The proposed
quad-band rectifier realized a peak RF-to-dc PCE of 86.8% from the four-tones RF input power at 3 dBm. The
rectifier can also attain over 55% RF-to-dc PCE along 1.7 GHz to 2.4 GHz frequency range, and at 2.67 GHz for
0 dBm input power levels. An ambient output dc voltage of 0.433 V for multi-tone input signals is realised by the
proposed rectifier. The rectifier operates a bq25504-674 power management module (PMM). An output dc
voltage of 1.271 V is achieved through the PMM connection. Hence, with proper management of the proposed
rectifier, the harvested ambient RF signals can activate a number of low-powered devices.

1. Introduction often called an RFEH system [4,7,10].

The current advancement in applications technology contributes
immensely to the rising numbers of wireless devices and equipment in
our daily life activits [1–5]. Wireless communication technology is
governed by various standards at different operating frequencies [6,7].
These standards are deployed in (1) GSM/2G, UMTS/3G, LTE/4G, and
5G communications, and (2) Bluetooth/Wi-Fi, internet of things (IoT)
devices, and wireless sensor nodes in device-to-device (D2D) commu­
nications [5,8,9]. Precise frequency channels are allocated to each fre­
quency band for various regions and countries [10,11]. The increasing
number of radio frequency (RF) and microwave devices enriches the
environment with a resourceful and recyclable electromagnetic (EM)
energy sources [12,13]. The energy can be transformed into a usable DC
source [14,15]. The transfer of energy is achieved by a rectifying an­
tenna (rectenna) module [16,17]. The rectenna comprises a receiving
antenna, an IMN, a rectifying diode, a dc-pass filter, and a terminal load,
RFEH rectifier comprises four elements of the rectenna without the
antenna unit [18]. The rectifier is a critical segment of the RFEH module
because the signal from the receiving antenna is of low energy level
between (− 40 dBm to − 15 dBm) [14,19,20]. Hence, a conditioning
circuit is required to ensure maximum transfer of power to the load
terminal [14,21–23]. Various types of research work on rectenna and
rectifiers have been reported based on single-band [14,24], dual-band
[16,20,25], and multi-band [4,5,26,27] operating frequency. Efforts
have been made from the researchers over the years to design a rectifier
with an improved PCE. The authors in [20] presented a dual-band RF
harvester operating a GSM/1800 and UMTS/2100. The design achieved
a maximum RF-to-dc PCE of 40% PCE and an output dc voltage of 224
mV for 455 μWm2 dual-tone input power density. The authors in [25]
presented a dual-band planar rectifier to harvest RF signals from GSM/
900 and Wi-Fi/2.45 frequency bands. The rectifier attained a maximum
PCE of 77.2% and 73.5% from the two operating frequencies for an input

* Corresponding authors.
E-mail addresses: doguwa_2002@yahoo.com (S. Muhammad), aiqbal@ieee.org (A. Iqbal).

https://doi.org/10.1016/j.aeue.2021.153927
Received 17 June 2021; Accepted 3 August 2021
Available online 9 August 2021
1434-8411/© 2021 Elsevier GmbH. All rights reserved.
S. Muhammad et al. AEUE - International Journal of Electronics and Communications 139 (2021) 153927

54.4 Parameters:
jBT3 @ f2 TL8 TL15 = 1.2, 2.3
jBT1 @ f1 TL16 = 1.0, 4.5
TL13 TL14

TL7
TL4 TL17 = 1.5, 0.6
TL5

MC1
MC6 = 0.7, 2.2

TL3
MDL3

TL15
MDL4 TL9 D RL
MDL1 TL16

TL1
TL10 C TL17
MC3 Via TL2
Via
TL Via TL6

jBT2 @ f3 and f4
TL12 Meandered line (MDL) = W, L, R
30.3

Microstrip curve bend (MC) = W, R, θ

Via Transmission line (TL) = W, L

Unit: mm MDL2

Fig. 1. Proposed topology of the quad-band rectifier.

[32] presented a quad-band (1.3 GHz, 1.7 GHz, 2.4 GHz, and 3.6 GHz)
1.82 GHz : 0dBm 2.10 GHz : 0 dBm 2.40 GHz : 0 dBm
80 2.67 GHz : 0 dBm 1.82 GHz : -10 dBm 2.10 GHz : -10 dBm rectifier using a T-section distributed matching network (MN). The work
2.40 GHz : -10 dBm 2.67 GHz : -10 dBm 1.82 GHz : -20 dBm is reported to achieved a peak PCE of 54% at 1.7 GHz for an input power
2.10 GHz : -20 dBm 2.40 GHz : -20 dBm 2.67 GHz : -20 dBm
70 of 10 dBm. The rectifier design frequencies by the authors in [30] at (2
0 dBm GHz and 3.5 GHz), [31] at 1.95 GHz, and [32] at (1.3 GHz and 3.6 GHz)
60 has an insignificant amount of input power to be extracted for practical
energy harvesting. A four-band (0.89 GHz, 1.27 GHz, 2.02 GHz, and
50
2.38 GHz) rectifier is reported by the authors in [33]. The design
Efficiency (%)

40 recorded an RF-to-dc PCE of 47.8%, 33.5%, 49.7%, and 36.2%, at each

-10 dBm
30
20 -20 dBm
10
0 However, most of the reported work from the literature is built on an
0.5 2.5 4.5 6.5 8.5 10.5 12.5 14.5 16.5 18.5
RL(kΩ)
Fig. 2. Performance of the proposed rectifier as a function of load terminal (RL )
at input power of 0 dBm, − 10 dBm, and − 20 dBm across the various operating
frequencies, respectively.
power of 14.5 dBm, respectively. The rectifier circuit presented in
[25,26,28] are suitable for high powered RFEH application. To enhance
the overall PCE in the rectifier from the available RF power in the sur­
rounding. The authors in [29] reported a triple-band rectifier operating
at 0.85 GHz, 1.77 GHz, and 2.07 GHz. The rectifier achieved a peak RF-
to-dc PCE of 61.9%, 71.5%, and 60.5% for an input power of 0 dBm,
respectively. A triple-band RFEH circuit that achieved a maximum PCE
of 53%, 31%, and 15.56% for an input power of − 7 dBm is reported in
[30]. The circuit operates at 2 GHz, 2.5 GHz, and 3.5 GHz. The work uses
a dual-antenna architecture to improve the total PCE for low input
power. The authors in [31] presented a triple-band (0.94 GHz, 1.95 GHz,
and 2.44 GHz) rectifier with 4-stage single dual-diode architecture. The
RFEH harvester realized a maximum RF-to-dc PCE of 80%, 46%, and
42% for an input power of 10 dBm at the three operating frequencies,
respectively. An RFEH module operating at multi-band frequencies is
reported to have an improved RF-to-dc PCE. Because of the RF power-
tone contributions at each operating frequency [4]. The authors in
respective frequencies for an input power of − 10 dBm. The authors in
[26] reported a quad-band (0.95 GHz, 1.83 GHz, 2.45 GHz, and 2.62
GHz) rectifier using a pair-branch of the 4-stage voltage doubler. The
rectifier achieved peak RF-to-dc PCE of 44.8%, 27.5%, 28%, and 24.2%
for an input power of 10 dBm, respectively. The designs reported by the
authors in [26–32], is suitable for a high-powered RFEH module besides
additional parasitic capacitance that degrades the circuit performance.
operating frequency with fewer RF signal contributions from the avail­
able ambient power density. Besides, the use of additional circuitry that
limited the rectifier performance.
In this paper, a quad-band rectifier with the ability to harvest a low-
powered RF signal with an improved RF-to-dc PCE is proposed. The
rectifier is matched to a 3.5 kΩ load terminal at 1.82 GHz, 2.1 GHz, 2.4
GHz, and 2.67 GHz using a multi-stub IMN. The proposed design ar­
chitecture is a potential candidate for harvesting RF signals in an
ambient environment. Because of the rectifier ability to extract available
ambient power density at − 30 dBm. The contributions of this research
work includes:
• A unique IMN that employs the concept of an MDL to improve the
rectifier performance while maintaining a low junction capacitance
because of the reduced circuit complexity. Consequently,the fabri­
cated rectifier prototype attains an RF-to-dc PCE of over 55% from
1.7 GHz to 2.4 GHz frequency bands for an input power of 0 dBm.
• To the best of our knowledge, we proposed a compact RF-rectifier for
quad-band operation compared to the state-of-the-art rectifiers pre­
sented in the literature.
The paper is prepared as follows: Section 2 describes the configura­
tion and circuit layout of the proposed rectifier. Section 3 presents

2
S. Muhammad et al.
Fig. 3. Input impedance (Zin ) simulation setup at four operating frequencies.
ZT1, θT1 ZT2, θT2
jBT
(a)
ZT1, θT1
(c)
Fig. 4. Susceptance circuit topology at three different configuration settings. (a) Shorted-shorted stub. (b) Open-shorted stub. (c) Open-open stub.
performance evaluation for both the simulated and the fabricated circuit
layout. The paper is concluded in section 4.
2. Rectifier design
Fig. 1 presents the proposed design architecture of the quad-band
rectifier. The rectifier module is a combination of an IMN, a high fre­
quency rectifying diode, a dc-pass filter, and a load terminal (RL ). The
circuit model is designed and fabricated on a 1.575 mm thick RT/Duroid
5880 substrate (with a dielectric constant of 2.2 and a minimal loss
tangent of 0.0009). The rectifier is linked via a transmission line to the
50 Ω source. The load terminal is complex and primarily a frequency-
dependent. A source pull simulation is carried out at the four oper­
ating frequencies using advance design system (ADS). A harmonic bal­
ance solver is applied in the simulation to determine the approximate
value of the load terminal. The simulation is conducted because of RL
significant contributions to RF-to-dc PCE. For a given input power and
operating frequency, the results in Fig. 2 show that the rectifier attains a
3
AEUE - International Journal of Electronics and Communications 139 (2021) 153927
ZT1, θT1 ZT2, θT2
jBT
(b)
ZT2, θT2
jBT
peak RF-to-dc PCE across a 3.5 kΩ load terminal. A rectifying diode for
RFEH operation with a low input power at high frequency requires an RF
rectifier with a reliable power response and the ability to handle power
with minimal dissipation [34,35]. Single diode rectifier appears to be
more efficient for low power operation, compares to single-or multi-
stage fullwave rectifiers with series/shunt topology [20–29,36]. Single
diode rectifiers have fewer losses at low input power, as related to full-
wave or multi-stage rectifiers. Because of minimal junction capacitance
across the rectifier circuit. The proposed rectifier is designed using a
single HSMS-2850 schottky diode with a SOT-323 circuit layout. The
diode is a potential candidate for low-powered RF applications with a
minimum junction capacitance of 0.18 pF and a low sensitive voltage of
150 mV [5–14,20–29]. The junction capacitance (C) of the rectifier is
regulated by the operating frequency (fc ) and the input voltage (Vin ) for
a period of time (t). This can be expressed in Eq. (1).
dt
C = I⋅ (1)
dV
S. Muhammad et al. AEUE - International Journal of Electronics and Communications 139 (2021) 153927

Table 1
Dimensions of the multi-stub microstrip line.
Zin = f (fc , Pin , Rd , RL ) (2)

Parameters Width/Length (mm) Parameters Width/Length (mm) where fc = operating frequency(ies), Pin = input power, Rd = diode
TL 18.5/7.6 TL7 2.9/4.0 nonlinear resistance, and RL = load terminal.
TL1 0.7/1.2 TL8 4.5/5.9 Eq. (3) presents the antenna AC reactive power that is received and
TL2 0.6/1.6 TL9 1.6/4.3
transmitted into the rectifier as Pin [41].
TL3 0.6/4.2 TL10 0.6/2.0
TL4 0.6/1.0 TL11 0.8/1.1 VS = VSMAX sinωt (3)
TL5 10.5/4.7 TL12 1.0/2.5
TL6 0.7/1.0 TL13 0.6/0.5
TL14 1.9/3.3 – –
where VS is the equivalent input voltage from the antenna. VSMAX gives
the maximum amplitude of the received RF power density at the output
Parameters Width/Radius (mm) (θ = Parameters Width/Length/Radius
of the MN operating at angular frequency ω.
90◦ ) (mm)
To address those challenges, a multi-stub IMN, combine with an
MC1 0.6/1.1 MDL1 0.6/11.1/1.4 MDL, is proposed to match the rectifier at the four operating frequencies.
MC2 0.6/1.1 MDL2 1/32.5/1.0 The proposed IMN is a cascaded topology containing three blocks for
MC3 0.6/1.0 MDL3 1.0/12.3/2
multiple stubs tuning. Fig. 1 presents the topology of the overall circuit
MC4 3.3/5.2 MDL4 0.6/23.6/2.0
MC5 2.2/3.6 using three pairs of transmission line stubs. The stubs comprise a
microstrip line (MLIN), microstrip cross-junction (MCROSO), a micro­
strip curve bend (MCURVE), and a microstrip T-junction (MTEE). Each
where C is the capacitance of the capacitor with current I passing pair of the impedance transformer block comprises a short-circuited,
through junction diode at the rate of non linear voltage “V”. and an open-circuited transmission line (TL) stubs. The connection is
ADS simulates the rectifier model without a MN in the first design provided to ensure a frequency-dependent response. The IMN of the
phase, comprising only a rectifying diode, dc-pass capacitor filter, and proposed rectifier has four degrees of freedom from each block to cancel
terminal load. The rectifier is designed to achieve high-performance out the imaginary part of the input impedance at the point of connec­
output at low-input power for the four operating frequencies (1.82 tion. Fig. 4 presents the three common types of susceptance circuit
GHz, 2.1 GHz, 2.4 GHz, and 2.67 GHz). A dc-pass capacitor filter (C) is
designed to block the higher-order harmonics from entering the terminal 0
load [36,37]. A 1200 pF shunt capacitor is added to the load terminal to -2
smooth the peaks from the output of the diode. The 1200 pF capacitor
-4
equivalent with GRM1885C1H122JA01D part number and 0603 circuit
-6
layout from muRata is added into the design in ADS.
-8
The diode input impedance is evaluated, at each operating fre­
quency, upon designing the terminal load and the dc-pass filter. Fig. 3 -10
S11 (dB)

provides the simulation setup. The input impedance (Zin = Rin + jXin ) Ω -12
of the rectifier model at the four operating frequencies (1.82 GHz, 2.1 -14
GHz, 2.4 GHz, and 2.67 GHz) for an input power of − 10 dBm is given as -16
(44.1-j341.0 Ω, 36.5-j291.84 Ω, 31.10-j251.02 Ω, and 27.80-j221.51 Ω), -18
Simulated Measured
respectively. A − 10 dBm reference point is taken into considerations -20
because for a given RF link loss, the average input power of the standard 1.70 1.90 2.10 2.30 2.50 2.70
transceiver is under the level of − 10 dBm [38–40]. The input impedance Frequency (GHz)
of the rectifier is then matched to 50 Ω transmission line from the an­
tenna input source. Designing an IMN is a challenging task because Zin Fig. 6. Simulated and measured reflection coefficient of the proposed rectifier
depends on four variables factors, as expressed in Eq. (2) [14,36]. at − 20 dBm.
HSMS2850

3.5 kΩ
Output terminal

SMA port C
Via
Via
Via

Via

Fig. 5. Fabricated prototype of the proposed rectifier.

4
S. Muhammad et al. AEUE - International Journal of Electronics and Communications 139 (2021) 153927

1.6 1.6
Sim: 1.82 GHz Meas: 1.82 GHz
Sim: 2.4 GHz Meas: 2.4 GHz
1.4 Sim: 2.1 GHz Meas: 2.1 GHz 1.4
Sim: 2.67 GHz Meas: 2.67 GHz
1.2 1.2
Output voltage (Vdc) in V

Output voltage (Vdc) in V

1.0 1.0
0.8 0.8
0.6 0.6
0.4 0.4
0.2 0.2
0.0 0.0
-30 -25 -20 -15 -10 -5 0 5 -30 -25 -20 -15 -10 -5 0 5
Pin(dBm) Pin(dBm)

(a) (b)
Fig. 7. Simulated and measured output dc voltage (Vdc ) of the proposed rectifier versus (Pin ) at (a) 1.82 GHz, 2.1 GHz. (b) 2.40 GHz, 2.67 GHz.

Sim: 0 dBm Meas: 0 dBm Sim: -10 dBm

BT (fi ) = − YT1 cotθT1 (fi ) − YT2 cotθT2 (fi ), shorted − shorted stub (6)
Meas: -10 dBm Sim: -20 dBm Meas: -20 dBm
Sim: -30 dBm Meas : -30 dBm BT (fi ) = YT1 tanθT1 (fi ) − YT2 cotθT2 (fi ), open − shorted stub (7)
80
70 BT (fi ) = YT1 tanθT1 (fi ) + YT2 tanθT2 (fi ), open − open stub (8)
60
Efficiency (%)

Untunable and unrealistic characteristic impedance is avoided dur­

50
ing the design process through careful selection of ZT and θT . The use and
40 combination of multiple stubs (such as stepped-impedance, joint
30 MCURVE, and MDL) is intended to reduce the fabrication constraints.
20 Which also helps in achieving multiples frequency susceptance blocks
10 (jBT1 , jBT2 , and jBT3 ). An MDL, in combination with TL stubs, connects
0 the three pairs of susceptance blocks to the rectifying diode. The jB
1.5 1.7 1.9 2.1 2.3 2.5 2.7 blocks provide a real part transformation of the input impedance to
Frequency (GHz) gradually matched the 50 Ω transmission line from the antenna source.
MDL is integrated into the design because of its inductive property. This
Fig. 8. Simulated and measured RF-to-dc PCE sweep against frequency at helps to improve the input power passing through the rectifying diode
different RF input power levels (Pin ).
and the dc-pass filter.
During the design process, the initial parameters of the proposed
connection topology. The susceptance of every single stub is expressed rectifier are computed based on the Eqs. (4)–(8). The jBT1 and jBT3
by Eq. 4 and 5. susceptance blocks control the rectifier operating frequency at f1 and f2 ,
BT (fi ) = − YT cotθT (fi ), short − circuited stub (4) respectively. The centered susceptance block jBT2 operates at f3 , and the
use of shorted-meandered line MDL2 in the block results in an additional
BT (fi ) = YT tanθT (fi ), open − circuited stub (5) operating frequency that resonates at f4 . The length of the meandered
line MDL2 was first computed at λ/2 of f4 as 37.9 mm, which is then
where ZT and θT denote the characteristic impedance and electrical tuned and optimized at 32.5 mm in ADS. Thus, f1 , f2 , f3 , and f4 corre­
length of the transmission line stub. BT and YT represent the stub sus­ spond to the respective rectifier operating frequencies at 1.82 GHz, 2.10
ceptance and admittance operating at a frequency fi , respectively. GHz, 2.40 GHz, and 2.67 GHz. TL connects the multi-stub IMN and
The combinations of the three different susceptances distribution in matches the antenna with the rectifying diode, dc-pass filter, and the
Fig. 4 can be expressed as: terminal load, (which are regarded as the rectification section). Stubs
TL2, TL7, and TL13 are shortened by Vias to the ground to deliver dc

80 80
Sim: 1.82 GHz Sim: 2.4 GHz
70 Meas: 1.82 GHz 70 Meas: 2.41 GHz
60 Sim: 2.1 GHz 60 Sim: 2.67 GHz
50 Meas: 2.1 GHz 50 Meas: 2.66 GHz
Efficiency(%)
Efficiency(%)

40 40
30 30
20 20
10 10
0 0
-30 -25 -20 -15 -10 -5 0 5 -30 -25 -20 -15 -10 -5 0 5
Pin(dBm) Pin(dBm)

(a) (b)
Fig. 9. Simulated and measured RF-to-dc PCE against input power (Pin ) at: (a) 1.82 GHz, and 2.1 GHz (b) 2.4 GHz, and 2.67 GHz.

5
S. Muhammad et al. AEUE - International Journal of Electronics and Communications 139 (2021) 153927

2.5
Sim: (1.8+2.1) GHz
90
80

Output voltage (Vdc) in V

2.0 Meas: (1.8+2.1) GHz
Sim: (1.8+2.1+2.4) GHz 70
Meas: (1.8+2.1+2.4) GHz 60
1.5

Efficiency(%)
Sim: (1.8+2.1+2.4+2.67) GHz
50
Meas: (1.8+2.1+2.4+2.66) GHz Sim: (1.8+2.1) GHz
1.0 40 Meas: (1.8+2.1) GHz
30 Sim: (1.8+2.1+2.4) GHz
0.5 20 Meas: (1.8+2.1+2.41) GHz
Sim: (1.8+2.1+2.41+2.67) GHz
10
Meas: (1.8+2.1+2.41+2.66) GHz
0.0 0
-30 -25 -20 -15 -10 -5 0 5 -30 -25 -20 -15 -10 -5 0 5
Pin(dBm) Pin(dBm)

(a) (b)
Fig. 10. Simulated and measured: [(a) Output dc voltage (Vdc ), (b) RF-to-dc PCE,] as a function input power (Pin ) of the proposed quad-band rectifier per generator
using two, three, and four signal tones.

Integrating the multi-stub IMN through TL with the corresponding

80 transmission lines in the rectification section results in further para­
metric tuning to meet the design objective. The overall multi-stub IMN
70
parameters (TL1 to TL14, MC1 to MC5, and MDL1 to MDL4) are then
60 optimized in ADS to match the input impedance of the rectifier at the
50 four operating frequencies. Table 1 presents the optimized parameters of
Efficiency (%)

the proposed multi-stub IMN from the circuit layout in Fig. 1.

40
30 3. Results and discussion
20
Sim: 1.82 GHz Meas: 1.82 GHz Sim: 2.1 GHz Fig. 5 presents the rectifier fabricated prototype. A pair of crocodile
10 Meas: 2.1 GHz Sim: 2.4 GHz Meas: 2.41 GHz clips connect the rectifier across the load terminal to measure the output
Sim: 2.67 GHz Meas: 2.66 GHz
0 performance. The total dimension of the rectifier is 54.4 mm × 37 mm.
0.5 2.5 4.5 6.5 8.5 10.5 12.5 14.5 16.5 18.5 Fig. 6 shows the simulated and measured reflection coefficient (S11 ) of
RL(kΩ) the proposed rectifier at the four operating frequencies. The measure­
ment is carried out through a vector network analyzer (VNA) E5062A
Fig. 11. Simulated and measured RF-to-dc PCE of the proposed rectifier against from Agilent Technologies. The measured S11 of the rectifier is achieved
load terminal RL for an input power of 0 dBm. at (1.82 GHz, 2.1 GHz, 2.41 GHz, and 2.66 GHz) which shows good
agreement between the measured and simulated results.
The RF-to-dc conversion efficiency of the proposed rectifier over a
Table 2
range of frequency, input power level, and terminal load RL is deter­
Received ambient power from various public telecommunication bands.
mined and evaluated. Because of the nonlinearity attributed to the
Band Operating Received power Average received
rectifying diode. Large signal S-parameter (LSSP) and a harmonic bal­
Frequency (GHz) level* (dBm) power (dBm)
ance (HB) simulation modules that coexist in ADS are applied through
GSM900 0.88–0.915 − 45 to − 26.5 − 27.8 parameter sweep to evaluate the rectifier performance. Measurement of
(MTX )
the RF-to-dc PCE is achieved by connecting the rectifier input source to a
GSM900 0.925–0.960 − 40 to − 17.5 − 21.2
(BTX )
12 GHz (APSIN12G) signal generator to deliver low power into the
circuit at a particular frequency. The input power is then swept from
GSM1800 1.710–1.785 − 47 to − 40 − 42.7
(MTX ) − 30 dBm to 5 dBm at the four operating frequencies. Similarly, the same
GSM1800 1.805–1.880 − 35 to − 14 − 15.3 measuring setup is repeated by frequency sweeping from 1.7 GHz to 2.8
(BTX ) GHz for an input power of 0 dBm, − 10 dBm, − 20 dBm, and − 30 dBm,
3G(MTX ) 1.920–1.980 − 44 to − 25.5 − 26.7 respectively. Throughout the measurement process, a digital multi-
3G(BTX ) 2.110–2.170 − 43 to − 20.1 − 22.5 meter (DMM) connects the rectifier output across the 3.5 kΩ load ter­
ISM1400 2.305–2.400 − 45 to − 29.7 − 30.1 minal to record the output dc voltage. Fig. 7***a, and b presents the
Wi-Fi1450 2.400–2.500 − 35 to − 15 − 17.7 simulated and measured output dc voltage (Vdc ) against input power Pin
LTE2600 2500–2690 − 45 to − 19.5 − 23.8 of the proposed quad-band rectifier.
*
The site is located within range of 10 m to 190 m. Each sample point is The RF-to-dc PCE of the rectifier is determined from the measure­
diagonally recorded at an interval of 10 m and 1.8 m high from the close-by cell- ment by:
tower BS. The measurement is repeated at four different location of the BS (90◦
apart). Pdc V2 1
ηPCE % = × 100% = ( dc ) × ( ) × 100% (9)
Pin RL Pin
into the rectifier. The initial results of all the computed parameters in the
where ηPCE is the PCE in %, Pin represents the input power to the rectifier.
proposed circuit are transferred into ADS to ensure appropriate
Pdc is the dc output power across the terminal load RL , Vdc denotes the
cancellation of susceptance through the three blocks. The parameter
output dc voltage.
dimensions interconnecting each of the susceptance blocks are tuned to
Fig. 8 presents the simulated and measured RF-to-dc PCE of the
match the impedance of the transmission line (TL) at 50 Ω to the con­
proposed rectifier sweep against frequency at four different input power
jugate of the rectification section seen from the diode to the load (RL ).
levels. The rectifier achieved peak measured PCE of (10.5%, 8.7%, 7.5%,

6
S. Muhammad et al. AEUE - International Journal of Electronics and Communications 139 (2021) 153927

Output voltage
(APSIN12G )
Generator
Signal
VNA Output
terminal
Port Port DMM
Rectifier Anti-static foam
S11 measurement setup RF-DC measurement setup
Cell tower (BS)

RF spectrum analyzer
Testing
antenna

Rectifier

bq25504-
674 EVM
Output
voltage

Connecting terminal
Ambiance measurement Ambiance measurement
setup without EVM setup with bq25504-674
Fig. 12. Measurement setups for the proposed rectifier.

Table 3
Comparison of the proposed quad-band rectifier with the related work.
Ref Electrical size (λg ) PCE(%)@Pin (dBm) Frequency (GHz) Harvested Vdc in (V) Matching technique (MN)

[11] [0.30 × 0.12]+[0.40 × 0.20] 57.5 @ − 5, 49.2 @ − 10 0.9/1.8 0.36–1.6 Single stub.
[26] 1.23 × 0.51 (44.8, 27.5, 28, 24.2) @ 0 0.9/1.8/2.1/2.45 NA Pair of microstrip stubs.
[29] 0.29 × 0.11 (61.9, 71.5, 60.5) @ 0 0.85/1.77/2.07 NA Open and short-circuited stubs
[30] 1.43 × 0.61 (53, 31, 15.56) @ − 7 2/2.5/3.5 NA Pair of microstrip stubs
[31] 0.11 × 0.14 (80, 46, 42) @ 10 0.94/1.95/2.44 NA L-Section + inductor branch
[32] 0.82 × 0.53 15 @ − 13 1.3/1.7/2.4/3.6 NA Resonant
[33] 0.64 × 0.44 (47.8, 33.5, 49.7, 36.2) @ − 10 0.89/1.2/2.02/2.38 NA Cross-shape + Stepped line impedance
[37] NA (Circuit design only) 60 @ 0 0.9 NA L-Section
[42] NA 70 @ 5 0.9 0.256 L-Section + microstrip stubs
[43] NA 30 @ 0 0.8/0.9 1.25 L-Section
This work 0.45 × 0.25 (31.7, 23.5, 25.4, 15.5) @ − 20 1.82/2.1/2.4/2.66 1.27 Multi-stub IMN

*λg , is the wave-length at the lowest operating frequency (fc ).

NA: Not available.

and 5%) for an input power of − 30 dBm across four operating fre­ ambient environments. Similarly, the proposed rectifier realized a
quencies, respectively. − 20 dBm input power level is considered as a peak measured PCE of (31.7%, 23.5%, 25.4%, and 15.5%) for an input
reference point to demonstrate the rectifier ability in low-powered power of − 20 dBm.

7
S. Muhammad et al.
Fig. 9a, and b provide the simulated and measured efficiencies of the
proposed rectifier against the input power level at the four operating
frequencies. From the measured results, the rectifier achieved RF-to-dc
PCE greater than 50% for an input power of − 12 dBm, − 6 dBm, − 11
dBm, and 0 dBm across the respective operating frequencies. The
measured results show a good agreement with the simulation at the four
operating frequencies for low power operation. A dropped in the RF-to-
dc PCE at 2.66 GHz is attributed to the impedance mismatched and
higher losses in the rectifying diode, besides additional parasitic and
phase shift at high-frequency.
The performance of the proposed quad-band rectifier is also inves­
tigated using the four signal tones. The first set of the measurement is
conducted for the dual-tone signal with the help of two signal generators
and a power combiner with model number ZFRSC 42. The rectifier were
supplied with the two equal-power tones from the generator at 1.8 GHz
and 2.1 GHz. The power from the generator is then varied from − 30
dBm to 5 dBm for an interval of 2 dBm. The signals are summed up by
the power combiner and fed to the input of the rectifier. The equivalent
input power from the two-tone is considered as the input power into the
rectifier. The measurement setups were repeated for the three-tone (1.8
GHz + 2.1 GHz + 2.41 GHz) and four-tone (1.8 GHz + 2.1 GHz + 2.41
GHz + 2.66 GHz) RF input power, respectively. Fig. 10a, and b present
the simulated and measured output dc voltage, and RF-to-dc PCE against
input power of the proposed quad-band rectifier from the two, three,
and four tones RF input power, respectively. The proposed quad-band
rectifier achieved a maximum RF-to-dc PCE of 86.8% from the four-
tone RF tones for an input power of 3 dBm. Similarly, the proposed
designed realized a peak RF-to-dc PCE of 13.8% from the four-tones
signal for an input power of − 30 dBm.
Fig. 11 presents the RF-to-dc PCE of the proposed rectifier against
load terminal RL for an input power of 0 dBm. The rectifier realized a
peak PCE within 3 kΩ to 3.5 kΩ range across the operating frequencies.
A trade-off is made at 3.5 kΩ for optimal circuit operation.
The RF-rectifier performance in ambiance environment is carried in
Multimedia University, Cyberjaya campus. The setup connection uses a
commercial whip antenna from ABRACON (with 700 MHz–2700 MHz
operational bandwidth and a 5 dBi peak gain). A 6 GHz RF spectrum
analyzer from Aim (TTiPSA6005) was used to record the received RF
power from various telecommunications company in the area. The
received RF power ranges and the average received RF power for GSM/
900, GSM/1800, UMTS/2100, Wi-Fi/2.45, and LTE2600 is reported in
Table 2. The table provides a summary of extensive RF-spectral survey in
the university. The proposed rectifier achieved 0.433 V output dc
voltage. The ambient RF signal intercepted by the antenna have variable
power levels. The received multi-tone signals from the output of the
rectifier varies across the range of designed frequencies [44]. PMM is
added into the output terminal of the rectifier for power buffering
[27–45]. This work integrates the proposed rectifier with a low-powered
PMM (bq25504-674 EVM) from Texas Instruments. The device has a
built-in MPPT algorithm and a dc-dc converter to boost and smoothing
the output dc voltage from the rectifier [42–46]. The module has a low
startup input voltage of 130 mV and 330 mV for a cold-start and a hot-
start at 330 nA quiescent current, respectively. The module can enhance
the input voltage from the rectifier through the dc-dc converter up to
3.1 V. bq25504-674 requires − 30 dBm as the minimum cold-start input
power to start and managed the output duty cycle through the battery
management module. The proposed rectifier realized an output dc
voltage 0f 1.271 V through the EVM module.
Fig. 12 provides the proposed rectifier measurement setups. The
measurement setups are for S11 , RF-dc output dc voltage, ambiance
performance with and without PMM, respectively.
A comparison between the proposed quad-band rectifier and the
other related work in the literature is presented in Table 3. The authors
in [29,31] achieved compactness at three operating frequencies. But, the
proposed quad-band rectifier in this paper offers a better improvement
at low input power. The rectifier operational frequencies in [30] at (2
8
AEUE - International Journal of Electronics and Communications 139 (2021) 153927
GHz and 3.5 GHz), [31] at 1.95 GHz, and [32] at (1.3 GHz and 3.6 GHz)
contributes less practical power for extraction in an ambient environ­
ment as compared to our proposed design. The design presented by the
authors in [26,31,32,43] suffers degradation in the overall PCE at low
input power, making them suitable for high-powered RFEH applica­
tions. Also, integrating lumped elements with distributed MN to match a
voltage multiplier reported in [43], and[42] lowers the performance of
the circuit. Despite the large electrical length reported by the authors in
[26,30,32,33]. The authors in[37] rely on the analytical simulation of an
RF-rectifier circuit comprising a series of five-stage voltage multipliers
without using any substrate. Apart from the circuit complexity presented
by the authors in [11] comprising 16-port rectifiers, the design can only
attain a voltage range of 0.36 V to 1.6 V. It can be seen that our proposed
design achieved higher RF-to-dc PCE across the four operating fre­
quencies. The rectifier attained a peak RF-to-dc PCE of 86.8% from the
four-tones signal for an input power of 3 dBm. The proposed design here
in this paper also shows compactness as compared to most of the work
reported in the literature.
4. Conclusion
This paper proposed the design of a compact quad-band rectifier. To
match the input impedance of the rectifier to the 50 Ω transmission line.
A multi-stub IMN comprising three blocks of multiple stubs tuning
linked through a meandered line is applied. The fabricated prototype
shows a significant RF-to-dc PCE improvement at low input power
levels. The proposed rectifier achieved RF-to-dc PCE of (10.5%, 8.7%,
7.5%, and 5.0%) for an input power of − 30 dBm for GSM/1800, UMTS/
2100, Wi-Fi/2.45, and LTE/2600 operations. Similarly, the simulated
and measured results of the proposed rectifier realized an RF-to-dc PCE
>55% within the frequency range of 1.7 GHz to 2.4 GHz, and 2.66 GHz
for an input power of 0 dBm. The rectifier realized a peak RF-to-dc PCE
of 86.8% from the four-tones RF signal for an input power of 3 dBm. The
proposed rectifier generates an output dc voltage of 1.271 V with
bq25504-674 EVM and 0.433 V in the ambient environment. The total
size of the rectifier on the PCB board is 0.45λg × 0.25λg . The rectifier
shows compactness with an improved RF-to-dc PCE. Thus, with proper
management of the quad-band rectifier, the harvested ambient RF
power can be used to activate a variety of low-power devices.
Funding
This work was supported by TM R&D Malaysia under project number
MMUE/190001.
Declaration of Competing Interest
The authors declare that they have no known competing financial
interests or personal relationships that could have appeared to influence
the work reported in this paper.
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