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Generalized analysis of multi-phase

interleaved boost converter
a a a
Hwi-Beom Shin , Jong-Gyu Park , Sung-Dong Chang & Hyun-
b
Chil Choi
a
Division of Electrical and Electronic Engineering , Engineering
Research Institute, Gyeongsang National University , 900 Gazwa-
dong, Chinju, Gyeongnam, 660-701, Republic of Korea
b
Department of Electronic Engineering , Inje University , 607
Obang-dong, Kimhae, Gyeongnam, 621-749, Republic of Korea
c
Division of Electrical and Electronic Engineering , Engineering
Research Institute, Gyeongsang National University , 900 Gazwa-
dong, Chinju, Gyeongnam, 660-701, Republic of Korea E-mail:
Published online: 21 Aug 2006.

To cite this article: Hwi-Beom Shin , Jong-Gyu Park , Sung-Dong Chang & Hyun-Chil Choi (2005)
Generalized analysis of multi-phase interleaved boost converter, International Journal of
Electronics, 92:1, 1-20, DOI: 10.1080/00207210412331332943

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 International Journal of Electronics,
Vol. 92, No. 1, January 2005, 1–20

Generalized analysis of multi-phase interleaved boost converter

HWI-BEOM SHINy*, JONG-GYU PARKy, SUNG-DONG CHANGy

and HYUN-CHIL CHOIz
yDivision of Electrical and Electronic Engineering, Engineering Research Institute,
Gyeongsang National University, 900 Gazwa-dong, Chinju, Gyeongnam,
660-701, Republic of Korea
zDepartment of Electronic Engineering, Inje University, 607 Obang-dong, Kimhae,
Gyeongnam, 621-749, Republic of Korea

(Received 5 June 2004; in final form 13 November 2004)

Downloaded by [University Of Maryland] at 16:16 19 October 2014

This paper presents the generalized and explicit expressions for evaluating the
performance of the multi-phase interleaved converters, such as conversion ratio,
efficiency and the ripples of input and inductor currents. Especially, the output
voltage ripple is analysed in depth. Furthermore, the generalized transfer
functions of interest are presented and the dynamic characteristics are analysed.
The generalized analysis of converter performance is verified through the
experimental and simulation results.

1. Introduction

Recently, the interleaved boost converter (IBC) has been studied for the application
to power factor correction circuits and interface between the fuel cell, photovoltaic
array, or battery source and the dc bus of AC inverter (Miwa et al. 1992, Newton et
al. 2000, Garg et al. 1999). The IBC is composed of several identical boost converters
connected in parallel. The converters are controlled by the interleaved switching
signals, which have the same switching frequency and the same phase shifting. By
virtue of paralleling the converters, the input current can be shared among the cells
or phases, so that high reliability and efficiency in power electronic systems can be
obtained. In addition, it is possible to improve the system characteristics such as
maintenance, repairing, fault-tolerance, and low-heat dissipation. As a consequence
of the interleaving operation, the IBC exhibits both lower current ripple at the input
side and lower voltage ripple at the output side. Therefore, the size and losses of the
filtering stages can be reduced, and the switching and conduction losses as well as
EMI levels can be significantly decreased (Chang and Knights 1993, Perreault and
Kassakian 1997, Dahono et al. 1999, Lee et al. 2000, Veerachary et al. 2001,
Veerachary 2003).
However, more phases in the IBC increase the number of components like induc-
tors, active and passive switches. The dimension of state and control input also
becomes higher and it is more difficult to analyse and investigate the operating

*Corresponding author. Email: hbshin@gsnu.ac.kr

International Journal of Electronics

ISSN 0020–7217 print/ISSN 1362–3060 online # 2005 Taylor & Francis Ltd
http://www.tandf.co.uk/journals
DOI: 10.1080/00207210412331332943
 2 H.-B. Shin et al.

characteristics at both steady and transient states. The multi-phase IBC has been
modelled and analysed by using a signal flow graph at steady state in Veerachary
et al. (2001). Some useful expressions such as conversion ratio and efficiency are also
presented. Using the signal flow graph model, it is, however, difficult to analyse
the unbalance in current sharing and the ripples in input current and output voltage.
The graphical model of IBC becomes more complex as the number of phases increase
and the interleaved switching pattern becomes restrictive. The equation for
some transfer functions seems to be wrong and the transfer function for the duty
cycle is incomplete. It was shown that increasing the number of phases in IBC
could significantly reduce the input current ripple (Chang and Knights 1993).
The output voltage ripple was calculated for the buck converter case in Dahano
et al. (1999). The conditions of the duty cycles for minimizing the current ripples
were found. For the two-phase IBC, some converter performance expressions
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and transfer functions have been derived when the inductors are coupled
(Veerachary 2003). In addition, good current sharing could be naturally achieved
by operating the two-phase IBC with direct coupled inductors in discontinuous
inductor current (Lee et al. 2000).
Unfortunately, there are no generalized analytical expressions for steady-state
and transfer functions for the multi-phase IBC in the literature. Whenever the
number of phases change in the IBC, the converter performance expressions and
the transfer functions should be derived again in a similar way. This job is very
tedious and complex, and it tends to introduce error into the results.
In this paper, the averaged state-space model of the multi-phase IBC is presented
in the continuous inductor current mode, and we present the generalized and explicit
expressions for converter performance such as the conversion ratio, efficiency and the
ripples of input and inductor currents. Especially, the output voltage ripple is analysed
in depth. Furthermore, the generalized transfer functions of interest are derived and
the dynamic characteristics are analysed. The generalized expression and analysis for
converter performance are verified through experimental and simulation results.

2. General averaged state equation of multi-phase IBC

Figure 1 shows the N-cell or N-phase IBC, in which N boost converters are con-
nected in parallel. Each converter consists of an inductor, active switch and diode.

Figure 1. N-phase interleaved boost converter.

 Analysis of interleaved boost converter 3

The active switches are switched with a sequence of S1, S2, . . . , SN, during the PWM
(pulse width modulation) period and the control signals are equally shifted with each
other. Assuming that the converter operates in the continuous inductor current
mode, the inductor current ik in the kth phase is governed by

dik 1

¼
rk ik
s0k vo þ Vg ð1Þ
dt Lk

where s0k ¼ 1
sk, k ¼ 1, 2, . . . , N, Lk is the inductance of the kth phase converter,

rk is the effective series resistance of the kth inductance, sk is the switching function
of the kth active switch, and Vg , vo are the input and output voltages, respectively. If
sk ¼ 1, the corresponding active switch Sk is turned on. If sk ¼ 0, Sk is turned off. The
capacitor or output voltage equation can be written as
!
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dvo 1 X N
0 vo
¼ s i
ð2Þ
dt C k¼1 k k R

where C is the output filter capacitance and R is the load resistance.

The nonlinear state equation of the N-phase IBC can be expressed from (1)
and (2) as

x_ ¼ Ax þ Bu ð3Þ

where
 T
x ¼ i 1    i N vo , u ¼ Vg
2 3 2 3

r1 =L1 0  0
s01 =L1 1=L1
6 .. .. 7 6 .. 7
6 7 6 . 7
6 0
r2 =L2 . . 7 6 7
6 7
A¼6 .. .. ..7, B ¼ 6 7
6 ... 7:
6 . . 0 .7 6 7
6 7 6 7
6 7 4 N5
0 1=L
4 0  0
rN =LN
sN =LN 5
s01 =C   s0N =C
1=RC 0

It is noted that the switching function s0k in the system matrix is time-varying.
In order to derive the averaged state-space model of the N-phase IBC, the
averaging operator is defined as
Z t
1
y
ðtÞ  yð
Þ d
: ð4Þ
Ts t
Ts

The duty cycle function dðtÞ can then be defined as

Z t
1
dðtÞ  s
ðtÞ ¼ sð
Þ d
: ð5Þ
Ts t
Ts

The average state equation of the N-phase IBC can be expressed, from (3) and (4), as

x_
¼ A
x
þ B
u
ð6Þ
 4 H.-B. Shin et al.

where
 T
x
¼ i
1    i
N v
o , u
¼ Vg , B
¼ B
2 3

r1 =L1 0  0
d10 =L1
6 .. .. 7
6 0
r2 =L2 . . 7
6 7

6 .. .. .. 7
A¼6 7:
6 . . 0 . 7
6 7
4 0  0
rN =LN
dN0 =LN 5
d10 =C     d 0 N =C
1=RC

3. Steady-state analysis

The generalized output voltage and inductor currents in steady state can be easily
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derived from (6) as

Vg XN
D0j
Vo ¼ ð7Þ
N j¼1 rj
!
Vg 1 1 X N
D0j ðD0j
D0k Þ
Ik ¼ þ ð8Þ
rk N R j¼1 rj
where XN
N ¼ 1=R þ j¼1
D02
j =rj ;
k ¼ 1, . . . , N and Dj denotes the steady-state value of duty cycle function dj ðtÞ.
The input current of the converter Ig is given by
X
N
Ig ¼ Ik : ð9Þ
k¼1
If N phases of the IBC are symmetrical such as rj ¼ r, Dj ¼ D for j ¼ 1, . . . , N, the
inductor currents can be written from (8) as
Vg
Ik ¼ , k ¼ 1, . . . , N: ð10Þ
r þ ND02 R
The output voltage and efficiency can be expressed from (7) as
ND0 R
Vo ¼ Vg ð11Þ
r þ ND02 R
V 2 =R 1
¼ 0 ¼ : ð12Þ
V g Ig 1 þ r=ND02 R
It can be seen that efficiency becomes higher as the number of phases increases.
When the inductor resistance r is large, the efficiency is much improved especially
by increasing the number of phases in the middle range of duty cycle.
If the inductors are loss-less and all the duty cycles have a same value such as
rj ¼ 0, Dj ¼ D for j ¼ 1, . . . , N, the output voltage and the inductor current can be
written from (11) and (12) as
1 1
Vo ¼ 0 Vg ¼ V ð13Þ
D 1
D g
Vg 1 Vo
Ik ¼ ¼ : ð14Þ
ND02 R N D0 R
 Analysis of interleaved boost converter 5

The output voltage of the N-phase IBC has the identical expression of the single
phase boost converter regardless of the number of phases and the current is equally
shared among N phases of the IBC in an ideal case.

3.1. Current unbalance due to parameter mismatch

If the parameters of N-paralleled converters are not identical, the load current is not
equally shared, which causes current unbalance among the phases of IBC. The
current unbalance becomes serious when there is mismatch in the inductor resis-
tances and duty cycle functions, especially. Let the current unbalance be defined as
Ik ¼ Ik
I1 : ð15Þ
The current unbalance in the kth phase can then be written, from (8), as
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(   X  )
N
Vg 1 1 1 D0j ðD0j
D0k Þ ðD0j
D01 Þ
Ik ¼
þ
: ð16Þ
N R rk r1 r
j¼1 j
rk r1

To investigate the effect of the inductor resistance mismatch on current

unbalance, consider the conditions
Dk ¼ D
ð17Þ
r1 ¼ r, rk ¼ r þ rk , k ¼ 1, 2, . . . , N:
Then, the current unbalance in (16) can be simplified as
 
Vg 1 1 1
Ik ¼
: ð18Þ
N R r k r 1
The ratio of current unbalance to the inductor current in the first phase can be
written as
 
Ik 1 1 r r
¼r
¼
k 
k: ð19Þ
I1 rk r rk r
It can be seen that the magnitude of current unbalance is directly proportional to the
mismatch of the corresponding inductor resistance rk .
The N-phase converters should have the same control signal for equally sharing
the load current among the phases. However, there can be the mismatch of hardware
circuits in the PWM generator or in the phase-shifting circuits, which leads to the
duty cycle mismatch. To investigate the effect of the duty cycle on current unbalance,
let the parameters concerned be defined as
D1 ¼ D, Dk ¼ D þ Dk
ð20Þ
rk ¼ r, k ¼ 1, 2, . . . , N:
The current unbalance over the first phase current can be expressed from (16) as
P
Ik D0k N 0
j¼1 Dj R
¼ PN  ND0 Dk : ð21Þ
I1 r=R þ j¼1 D0j ðD0j
D01 Þ r
It can be seen that the current unbalance is larger at lower duty cycle and smaller
inductance resistance. In addition, the current unbalance due to the duty cycle
mismatch becomes more serious as the number of phases increase.
 6 H.-B. Shin et al.

3.2. Inductor and input current ripples

The generalized and analytical expressions for current and voltage ripples are
derived under the following assumptions:

(i) switching elements of the converter are ideal;

(ii) the inductor resistances are negligible;
(iii) the effective series resistance of capacitor and stray capacitance are neglected;
(iv) the converters in parallel are operated in the continuous inductor current
mode.
The control signals have same duty cycle D in steady state. Figure 2 shows the
steady-state current waveforms of the four-phase IBC as an example. There are N
(for this example, N ¼ 4) repetitive sub-periods in a PWM period Ts and the inductor
currents have the same waveforms with phase shift of
ð¼ Ts =NÞ as shown in
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figure 2(a). Only one active switch is switched during a sub-period
and the
following relation is thus satisfied

N ¼ NON þ NOFF þ 1 ð22Þ

where NON and NOFF denote the number of active switches which are always ON
and OFF states during the sub-period, respectively. As shown in figure 2(a), it is
convenient to consider only the sub-period for deriving the current and voltage
ripples in steady state. The ON-duration of an active switch during a PWM period,
TON ¼ ðD Ts Þ, can be expressed as

TON ¼ NON 
þ
ON ð23Þ

Figure 2. Current waveforms of four-phase IBC: (a) inductor currents, (b) input current,
(c) output current.
 Analysis of interleaved boost converter 7

where
ON represents the ON-duration of an active switch in transition during a

sub-period. Let the new duty cycle q be defined in the sub-period as


q ¼ ON : ð24Þ


Then, substituting (24) into (23) yields
N D ¼ NON þq ð25Þ
0 0
N D ¼ NOFF þ q ð26Þ
where q0 ¼ 1
q. These relations are useful in deriving the current and voltage
ripples.
As shown in figure 2(a), the slopes of the inductor current can be written,
according to the ON or OFF state of the corresponding active switch, as
8
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> di V
< ON ¼ g during DTs
dt L ð27Þ
> di
: OFF ¼
D 0
V g during D T s
dt D0 L
Therefore, the magnitude of the kth inductor current ripple can be expressed as
1 diON Vg
ik ¼ DTs ¼ DTs : ð28Þ
2 dt 2L
The following inequality should be satisfied for the continuous inductor current
mode
Ik > ik : ð29Þ
Hence, the condition for the continuous inductor current can be written, from the
average inductor current in (14), as
K > Kcrit, L ð30Þ
where
2L
K¼ , Kcrit, L ðDÞ ¼ NDD02 : ð31Þ
RTs
It can be seen from (31) that Kcrit, L has the maximum value at D ¼ 1=3 such as
4
Kcrit, L, max ¼ N: ð32Þ
27
As shown in figure 2(b), the input current has a periodic waveform with
and it
is, therefore, convenient to consider the sub-period in which only one active switch
is transferred from ON to OFF state. During
ON , the numbers of switches in ON
and OFF state are ðNON þ 1Þ and NOFF , respectively. Hence, the slope of the input
current can be written as
dig di di
¼ ðNON þ 1Þ ON þ NOFF OFF : ð33Þ
dt dt dt
Substituting (27) into (33) yields
dig NON þ 1
ND Vg
¼ ð34Þ
dt D0 L
 8 H.-B. Shin et al.

and the slope of input current during
ON can be expressed from (25) and (34) as
dig q0 Vg
¼ 0 : ð35Þ
dt D L
Hence, the magnitude of the input current ripple can be derived as
1 Vg qq0 Ts
ig ¼ : ð36Þ
2 L D0 N
Since the average input current is a sum of N average inductor currents in (14), the
relative input current ripple can be written as
ig 1 RTs 0 0
¼ D q q: ð37Þ
Ig N 2L
The duty cycle q can also be represented, from (25), as
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q ¼ N D
trunc ðN DÞ ð38Þ
where trunc ðÞ denotes the integer part. Figure 3 shows the input current ripple for
the N-phase IBC. Increasing the number of phases can much reduce the input
current ripple over a wider range of the duty cycle. The input current ripple in
(37) is minimized when q ¼ 0, namely ND is an integer. The effect of increasing
the number of phases is significant in the middle range of the duty cycle as shown
in figure 3.
The condition for the continuous input current mode can be derived from the
inequality
Ig > ig ð39Þ
which gives the condition such as
K > Kcrit ð40Þ
where
D0 q0 q
Kcrit ðDÞ ¼ : ð41Þ
N

Figure 3. Input current ripple of N-phase IBC (VgTs/2L).

 Analysis of interleaved boost converter 9

Figure 4. Conditions of continuous current mode, dashed line: Kcrit, L, solid line: Kcrit.
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Figure 5. Converter output current waveform.

It can be shown from (41) that Kcrit, max ¼ 4=27 in case of the single-phase
pffiffiffi
boost converter (Erickson and Maksimovic 2001) and Kcrit, max ¼ 3=18 for
two-phase IBC. Figure 4 shows Kcrit and Kcrit, L for several numbers of phases.
It can be seen that the number of phases expands the range of the continuous
input current mode, so that a smaller value of inductance can be used. The
continuous range becomes wider at the duty cycles at which the current
ripple is minimized as shown in figure 4. Alternatively, the range for the
continuous inductor current mode is reduced as the number of phases
increase. The value of inductance in the N-phase IBC should be larger than that
in the single phase boost converter so as to be operated in the continuous inductor
current mode.

3.3. Output voltage ripple

The converter output current of the N-phase IBC has a repetitive waveform with the
sub-period as shown in figure 2(c). The output current is composed of the inductor
currents in the phases whose active switches are in the OFF state. The output current
is depicted again in figure 5 with the average load current Io . During q
and q0
, the
output capacitor is connected to NOFF and ðNOFF þ 1Þ phases, respectively, among N
 10 H.-B. Shin et al.
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Figure 6. Inductor currents linked to output capacitor for calculating the output voltage
ripple.

phases of IBC through the diodes. Using (27), the slopes of the output current shown
in figure 5 can, therefore, be written as
D Vg
1 ¼
 NOFF ð42Þ
D0 L
D Vg
2 ¼
0 ðNOFF þ 1Þ: ð43Þ
D L
The average load current Io can be placed in one of the following three intervals as
shown in figure 5:
9
Io  I2, min =
I1, max  Io < I2, min ð44Þ
;
Io < I1, max

where
Vo
Io ¼ : ð45Þ
R
The output voltage ripple should be derived according to three conditions for the
load current in (44) and thus the maximum and minimum currents in both q
and q0

intervals are calculated above all in what follows.
Figure 6 shows ðNOFF þ 1Þ inductor currents among N phases of the IBC,
which flow out to the converter output stage. During q0
interval, the decline of
the inductor current, , can be calculated from (27) and (28) as
D Vg 0 2q0
¼ q
¼ i : ð46Þ
D0 L ND0 k
The offset between the inductor currents, , can be represented as
 
2 q0 2
¼ 1
ik ¼ i : ð47Þ
NOFF ND0 ND0 k
 Analysis of interleaved boost converter 11

During q0
interval, the average value of the mth phase current can be expressed as
Im, ave ¼ I1, ave
ðm
1Þ
N þ2 2 ð48Þ
¼ Ik þ OFF 0 ik
i m:
ND ND0 k
The sum of ðNOFF þ 1Þ average currents, Id, ave , becomes
Xþ1
NOFF
Id, ave ¼ Im, ave ¼ ðNOFF þ 1ÞIk : ð49Þ
m¼1

Hence, I2, min in figure 6 can be calculated as

 
I2, min ¼ ðNOFF þ 1Þ Ik
: ð50Þ
2
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Substituting (14) and (46) into (50) yields


Vg 1 q0 D
I2, min ¼ ðNOFF þ 1Þ
: ð51Þ
ND0 R D0 K
On the one hand, I2, max can be expressed as
I2, max ¼ I2, min þ ðNOFF þ 1Þ


Vg 1 q0 D ð52Þ
¼ ðNOFF þ 1Þ þ :
ND0 R D0 K
The maximum and minimum currents during q0
interval, I1, max and I1, min can be
derived, in a similar way, as


Vg 1 qD
I1, max ¼ NOFF þ ð53Þ
ND0 R D0 K


Vg 1 qD
I1, min ¼ NOFF
ð54Þ
ND0 R D0 K
Now, the output voltage ripple is derived according to the conditions of average
output current given in (44).
(1) Io  I2, min
Using (45) and (52), this inequality can be rewritten as a function of the
duty cycle D such that
p1 ðDÞ  q0 DD0 ðND0 þ qÞ
qK  0: ð55Þ
The charge Q flowing into the capacitor during q01
, as shown in figure 5,
can be expressed as
1

Q ¼ q01
I2, max
Io ð56Þ
2
where
1

q01
¼ I2, max
Io : ð57Þ
2
Then, the charge Q can be calculated as

2
L 1 1 q ðq þ ND0 Þq0 D
Q ¼ þ : ð58Þ
2R2 N 2 ðND0 þ qÞD D0 K
 12 H.-B. Shin et al.

When the duty cycle D satisfies the condition p1 ðtÞ in (55), the output voltage
ripple can, therefore, be expressed as
Q
vo ¼
2C
 0 0 0
2 ð59Þ
Ts Vo 1 q DD ðND þ qÞ þ qK
¼ :
2RC 4K N 2 ðND0 þ qÞDD02

(2) I1, max  Io I2, min

The inequality in the right-hand side can be expressed as

p1 ðDÞ  q0 DD0 ðND0 þ qÞ
qK < 0: ð60Þ

The inequality in the left-hand side can also be rewritten as a function of duty
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cycle as

p2 ðDÞ  qDD0 ðND0
q0 Þ
q0 K  0: ð61Þ

When the duty cycle satisfies the conditions in both (60) and (61), the
following voltage ripple is, therefore, valid

Ts Vo qq0
vo ¼ : ð62Þ
2RC N 2 D0
The voltage ripple in (62) is the same equation as the boost converter in
(Erickson and Maksinovic).
(3) Io I1, max
The above inequality can be rewritten as

p2 ðDÞ  qDD0 ðND0
q0 Þ
q0 K < 0: ð63Þ

In this case, the output voltage ripple can be derived, in a similar way, as
 0 0 0 0
2
T Vo 1 qDD ðND
q Þ þ q K
vo ¼ s : ð64Þ
2RC 4K N 2 ðND0
q0 ÞDD02

Figure 7(a) shows the output voltage ripple of the N-phase IBC when K is
sufficiently large so that the inductor current may flow continuously. The equation
of the voltage ripple in (62) is only utilized because the inductor currents are almost
constant in this case. It can be seen from figure 7(a) that the voltage ripple also has a
minimum value at the duty cycles where the current ripple is minimized (q ¼ 0). Also,
the maximum voltage ripple is smaller as the IBC has more phases. The output
voltage ripple of the N-phase IBC is plotted in figure 7(b) when the critical condition
of the continuous inductor current is applied (K ¼ Kcrit, L, max ). It can be seen that the
voltage ripple in the critical condition is deviated from that with large K at small
duty cycle. Increasing the number of phases significantly reduces the output voltage
ripple in middle range of the duty cycle. With two and three phases, the output
voltage ripple can be reduced up to 20% and 10% value of the single-phase boost
converter, respectively. However, the reduction of voltage ripple may be saturated
and aggravated at some duty cycle even though the number of phases increase.
 Analysis of interleaved boost converter 13
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Figure 7. Relative output voltage ripple (Ts/2RC) of N-phase IBC: (a) with large K for
full continuous inductor current mode, (b) with small K for critical continuous inductor
current mode.

4. Small-signal ac analysis

Assuming that rk ¼ r, Lk ¼ L, dk ¼ d, the small-signal state equation for obtaining the

control-to-output transfer function can be written, from (6) as
x_~ ¼ A~ x~ þ B~ u~ ð65Þ
where
 T h i
x~ ¼ i~1    i~N v~o , u~ ¼ d~
2 3 2 3

r=L 0    0
D0 =L Vo =L
6 .. .. .. 7 6 .. 7
6 0 . . . 7 6 . 7
6 7 6 7
~ 6 . . . 7 ~ 6 .. 7
A¼6 . .. .. 7, B¼6 . 7:
6 . 0 7 6 7
6 7 6 7
4 0    0
r=L
D0 =L 5 4 Vo =L 5
D0 =C   D0 =C
1=RC
NIk =C
The output equation can be expressed as
y~ ¼ E x~ ð66Þ
 14 H.-B. Shin et al.

where E~ ¼ ½ 0    0 1 . The control-to-output

 transfer function Gvd (s) is given by
v~o ðsÞ 
1
Gvd ðsÞ ¼  ¼ E~ sI
A~ B~ : ð67Þ
d~ðsÞ  v~g ¼0
i~load ¼0

Utilizing the software MathematicaÕ , the transfer function Gvd (s) can be found as


NVg
s þ ND02 R
r =L
Gvd ðsÞ ¼ ð68Þ
ðr þ ND02 RÞC ðs þ ðr=LÞÞðs þ ð1=RCÞÞ þ ðND02 =LCÞ
It can be seen that the transfer function is second-order even though N converters are
connected in parallel, and it has a right half-plane zero, which has a larger positive
value as the number of phases increase.
In a similar way, the line-to-output transfer function Gvg (s) and the output
impedance Zo(s) can be expressed as

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v~o ðsÞ ND0 =LC

Gvg ðsÞ ¼  ¼ ð69Þ
v~g ðsÞd~¼0 ðs þ ðr=LÞÞðs þ ð1=RCÞÞ þ ðND02 =LCÞ
i~ ¼0
 load
v~ ðsÞ  1 s þ r=L
Zo ðsÞ ¼ o  ¼ :
i~o ðsÞ d~¼0 C ðs þ ðr=LÞÞðs þ ð1=RCÞÞ þ ðND02 =LCÞ
v^g ¼0

Figure 8 shows the root locus of the control-to-output transfer function as the duty
cycle varies. The zero lies in the left-half plane and the poles are well damped where
the duty cycle has a value near D ¼ 1. As the duty cycle decreases, the transfer
function has a pair of complex conjugate poles and a zero in the right-half plane.
Hence, the system becomes more oscillatory and unstable. It can be seen from (68)
that increasing the number of phase accelerates the oscillatory behaviour and makes
the system faster.

5. Experimental and simulation results

The generalized analysis in the previous sections is verified through the experi-
mental results for single-, two-, and four-phase IBC. The parameters used in the
experiment are
rk  0:24 , Lk  800 mH, k ¼ 1, . . . , 4, C ¼ 22 mF, ESR of C ¼ 0:3 
R ¼ 40 , Vg ¼ 7:5 V, Ts ¼ 50 m sec :

Figure 8. Locus of poles and zero as duty cycle decreases.

 Analysis of interleaved boost converter 15
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Figure 9. Experimental results of output voltage (upper trace, 10 V/div), inductor

currents (middle trances, 0.5 A/div), and input current (lower trace, 1 A/div):
(a) single phase, (b) two-phase, (c) four-phase.

Figure 9 shows the experimental waveforms when the duty cycle D is 0.33. The
inductor currents of the first and second phases are measured in the case of the four-
phase IBC. It can be seen that the input current is well distributed among the phase
inductors and the dynamics of the inductor current and output voltage become
faster as the number of phases increases. Figure 10 shows the ripple components
in steady state. As the number of phases increase, the ripple magnitudes of output
voltage and input current are largely reduced and the ripple frequency becomes
 16 H.-B. Shin et al.
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Figure 10. Experimental results of output voltage (upper trace, 1 V/div), inductor ripple
currents (middle trances, 1 A/div), and input ripple current (lower trace, 0.1 A/div): (a) single
phase, (b) two-phase, (c) four-phase.

higher. However, the inductor current ripple is not changed regardless to the number
of phases.
Figure 11 shows the measured ripple magnitudes of the input current and the
output voltage. The curve shapes for the measured ripples in figure 11 are well
matched with the theoretical results in figures 3 and 7. The ripple components can
be largely reduced by increasing the number of phases.
The simulated Bode plots of the control-to-output, line-to-output, and output
impedance transfer functions are shown in figures 12–14. The simulator PSpiceÕ
 Analysis of interleaved boost converter 17
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Figure 11. Experimental results: (a) input current ripples. (b) output voltage ripples.

Figure 12. Simulation results of control-to-ouptput transfer function.

 18 H.-B. Shin et al.
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Figure 13. Simulation results of line-to-output transfer function.

Figure 14. Simulation results of output impedance.

 Analysis of interleaved boost converter 19

is utilized. It can be seen from figure 12 that the bandwidth of the control-to-output
transfer function becomes wider but the damping decreases as the number of phases
increase. With higher duty cycle, the higher low-frequency gain can be obtained but
the bandwidth is reduced. The slope of the gain roll-off is
40 dB/decade but the slope
is smaller at higher frequency, which is caused by the effective series resistance of the
output capacitor. The number of phases has little effect on the disturbance rejection
for the input voltage ripple at low frequency as shown in figure 13. However, the load
variation can be alleviated by increasing the number of phase at low frequency as
shown in figure 14.

6. Conclusions
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The multi-phase interleaved boost converter operated in the continuous inductor

current mode has been analysed in steady state. The general and analytical expres-
sions for efficiency, the inductor and input current ripples, and the output voltage
ripple were derived from the averaged state-space model presented. Furthermore,
the generalized transfer functions of interest were derived and the dynamic
characteristics were analysed. The generalized expressions and analysis for converter
performance were verified through the experimental and simulation results.
As the number of phases increase, the steady state performance such as efficiency,
input current and output voltage ripples can be largely improved and a wider range
for the continuous input current mode can be obtained with a small amount of
inductors. The bandwidth of the control-to-output transfer function becomes
wider but the damping decreases. The load disturbance or variation can also be
alleviated at low frequency. However, a larger number of inductors is needed to
operate the converter in the continuous inductor current mode. It is expected that
this work would be helpful to design other multi-phase interleaved converters.

Acknowledgment
This work was supported by University IT Research Center Project from the
Ministry of Information and Communication.

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