Circuits, Systems, and Signal Processing

https://doi.org/10.1007/s00034-020-01375-0

Analog Circuit Fault Detection by Impulse Response-Based

Signature Analysis

Manas Parai1 · Supriyo Srimani1 · Kasturi Ghosh1 · Hafizur Rahaman1

Received: 20 May 2019 / Revised: 10 February 2020 / Accepted: 12 February 2020

© Springer Science+Business Media, LLC, part of Springer Nature 2020

Abstract
This paper presents a method for the detection of parametric faults in linear filters
with the help of impulse response which is studied on the basis of cross-correlation, a
statistical metric. Impulse input is generated with delay flip flops and R–C circuit with
minimum circuit complexity. Cross-correlation of impulse responses of the faulty
and non-faulty circuits is fitted with Gaussian function. Component tolerances are
mapped to statistical metric spaces in terms of Gaussian fitting parameters by Monte
Carlo simulation. The proposed method is validated with simulated (using UMC-
180 nm technology in CADENCE Virtuoso platform) as well as experimental results.
Two benchmark analog filter circuits, second-order Sallen–Key band-pass filter and
fourth-order Chebyshev low-pass filter, are considered as test circuits. The present
method requires minimum circuit complexity and computational effort. The proposed
fault detection technique is applicable for any linear analog circuit.

Keywords Parametric fault · Impulse response · Cross-correlation · Gaussian fitting ·

Component tolerance

1 Introduction

In advanced mixed-signal system on chip (SoC), around 5% of the overall chip area
is occupied by the analog circuitry. However, test cost of such small analog part

B Kasturi Ghosh
kasturighosh@rediffmail.com
Manas Parai
manasparai.rs2016@vlsi.iiest.ac.in
Supriyo Srimani
supriyosrimani.rs2016@vlsi.iiests.ac.in
Hafizur Rahaman
hafizur@vlsi.iiest.ac.in

1 School of VLSI Technology, Indian Institute of Engineering Science and Technology, Shibpur,
Howrah, West Bengal 711103, India
 Circuits, Systems, and Signal Processing

is more than 50% of the total test cost of the chip. With the advent of technology,
difficulties related to testing of analog circuits are increasing tremendously, and major
portion of test cost is due to qualitative analysis. Specification-based functional testing
is highly recommended, but requirement of sophisticated test equipment and large
product development cycles make the direct measurement costly. The abstraction of
parametric faults from the physical level to functional levels of analog circuits allows
simulating a fault mechanism effectively with less computational complexity as the
variation of circuit parameters. Process variation introduces stochastic effects into the
system. The parametric fault detection problem in analog circuits can be viewed as to
identify whether the stochastic system fulfills certain criteria. Since testing of analog
circuits plays vital role in electronic industry, it has drawn immense attention in last
few decades.
To address the problems of analog circuit testing, several test techniques were
proposed by researchers [1–25]. Savir et al. proposed the detection of parametric faults
in analog circuits by co-efficient-based test where linear time-invariant systems were
accurately analyzed using autoregressive model [19]. Papakostas and Hatzopoulos [16]
proposed fault detection technique where the RMS value and the magnitude and phase
components of the power supply current were used as test metric. They successfully
improved the efficiency of the test method by introduction of a discrimination factor.
Choice of input test stimuli is an important issue in analog circuit testing. Kalpana et al.
reported the method of detecting catastrophic and parametric faults with the application
of piecewise linear (PWL) signal as input test pattern [8]. However, specification
bounds were considered very high in that case. Badar-ud-din et al. showed the use of
asymmetrical periodic signals as test stimulus to detect the fault in analog circuits [3].
However, generation of such precise signals is a challenging job. As reported by the
authors, a set of faulty components could show the same result during observation.
Pseudorandom bit sequences, which are a popular input test pattern for digital circuits,
can also be used as input test stimuli for analog circuits, where analog circuit is
converted to digital one by inserting it in between an ADC and a DAC [1, 15]. In the
present work, impulse input is used as test stimulus since a linear system can be fully
characterized by impulse response. Moreover, impulse input can be generated with
minimum circuitry.
Use of correlations is a powerful technique for testing of linear time-invariant (LTI)
systems. AI-Qutayri and Shepherd [2] reported mixed-signal circuit testing with the
help of auto-correlation of the output responses and cross-correlation between output
and the input signals where pseudorandom binary sequences were used as input. In
the test technique proposed by Pan et al., impulse response, constructed from cross-
correlation of input and output random sequences, was used as signature [15]. Yong
et al. showed the use of fractional correlation model to prepare fault signature of analog
circuits for diagnosis of soft faults [25].
In this work, a new method of parametric fault detection in linear analog circuits has
been proposed where Gaussian fitting of the cross-correlation of impulse responses
between the fault-free and faulty circuits has been used. Parametric deviation forces
the fitting parameters to deviate from their nominal values. The tolerance range of
the circuit parameters is mapped into the Gaussian fitting parameters by Monte Carlo
simulation. Use of impulse as input reduces complexity and area overhead of the chip.
Circuits, Systems, and Signal Processing

Fig. 1 Block-level representation of impulse response-based proposed test method

Fig. 2 Schematic of the on-chip implementation of impulse generation to test the CUT

The methodology of the proposed technique is illustrated in Sect. 2. Validation of the

proposed method is demonstrated with simulation and experimental results in Sects. 3
and 4, respectively.

2 Methodology

Impulse response defines the dynamic characteristics of a LTI system. The time-
domain response y(t) of such system is represented by the convolution of the arbitrary
input signal x(t) and the impulse response h(t), as shown in Eq. (1).

α α
y(t)  x(t)h(t − λ)dλ  x(t − λ)h(t)dλ x(t) × h(t) (1)
−α −α

For continuous time systems, the impulse is modeled as Dirac delta function,
δ(t). Theoretically, it is a short duration pulse with infinitely high peak. As impulse
consists of all possible excitation frequencies, it is suitable for using it as a test signal.
In this work, the differentiator output of a unit step function has been considered
as the impulse function. It is one of the simple methods to generate the impulse
function [21]. The block diagram of the proposed test method is depicted in Fig. 1.
The schematic of the on-chip implementation of impulse response generation to test
the CUT is shown in Fig. 2.
Impulse response of a circuit is very sensitive to the circuit components. Any
variation in the value of the circuit components causes the impulse response to vary
accordingly. Instead of using the performance parameters directly, impulse response
 Circuits, Systems, and Signal Processing

is considered as the signature to segregate the defective circuits. Cross-correlation,

which is a quantitative measure of similarity between the pair of signals, is computed
between impulse responses of the circuit for nominal and faulty condition. The peak
2
of the cross-correlation is fitted with Gaussian function f (x)  ae− [x−b] c where
a, b and c are constants. A bell-shaped curve is obtained from this equation. The
center is located at the position x  b. In this case, ‘a’ denotes height of the peak
indicating the degree of similarity between the two-impulse responses of faulty
and fault-free circuit. The constant ‘b’ represents location of the peak indicating
the time-shift required in the faulty response to achieve maximum match with the
response for nominal (fault-free) condition of the circuit. The constant ‘c’ represents
standard deviation from the peak value. These fitting parameters are extracted from
the Gaussian fitted cross-correlation function.
Let ‘m’ is total number of components in an analog circuits. If α i is the tolerance
limit (in fraction) of i-th component with nominal value E i , then the component’s
tolerance range can be represented as (1 − α i ) E i ≤ E i ≤ (1 + α i ) E i . The circuit is con-
sidered fault-free when the values of all the circuit components are within the tolerance
range. With the help of Monte Carlo simulation, 1000 instances (within tolerance limit)
of each circuit component have been generated. Gaussian fitting parameters (FPj for
j  1 to 3) are computed (where FP1  a, FP2  b and FP3  c) for each value of
the each circuit parameters (generated by Monte Carlo simulation). The upper and
j j
lower value of fitting parameters FPi(lower) and FPi(upper) for each circuit component
is computed. The extreme values (i.e., bounds) of the fitting parameter are determined
as follows:

j
j
FPmax  max FPi(upper) for j  1 to 3
i0,1,...m
j j
FPmin  min FPi(lower) for j  1 to 3 (2)
i0,1,...m

 
j j
Obtaining the limits of FP j FPmax and FPmin is illustrated in Fig. 3. If
   
j j j j
FPi(lower) > FPmin or FPi(upper) < FPmax , then the fault in i-th component
cannot be identified due to the range of the value of i-th component
 which corre-
j j
sponds to the value of the fitting parameters within the range FPi(lower) − FPmin
 
j j
or FPmax − FPi(upper) . The range of fault in i-th component, which cannot be
detected, is shown as green area in Fig. 3. In the fault detection stage, calculated
fitting
 parameters are compared
 with their corresponding maximal and minimal val-
j j
ues FPmax and FPmin . If the value of any fitting parameter is out of bound, then the
circuit is declared faulty.
The proposed method is validated with simulation as well as experimental results
in Sects. 3 and 4, respectively. When mapping the tolerances of the circuit parame-
ters to Gaussian fitting parameter spaces, faults in OPAMP due to process variation
are considered for the validation with simulation but not for experimental valida-
tion.
Circuits, Systems, and Signal Processing

Fig. 3 Obtaining the bounds of Gaussian fitting parameters

3 Simulation Results

To validate the proposed method, two benchmark circuits, second-order Sallen–Key

band-pass filter and fourth-order low-pass Chebyshev filter, have been considered as
test circuits. The schematic of second-order Sallen–Key band-pass filter and fourth-
order low-pass Chebyshev filter circuits is shown in Figs. 5 and 11, respectively.
Simulations of the test circuits are performed in Cadence Virtuoso environment using
UMC-180 nm technology, and the outputs are processed by MATLAB. In this work,
impulse is generated by differentiating step signal. Step signal generator and differ-
entiator circuit are implemented by a D flip flop and an R–C circuit, respectively, [21]
as shown in Fig. 2. The layout of this impulse generator circuit is presented in Fig. 4.

3.1 Results of Second-Order Sallen–Key Band-Pass Filter

The second-order Sallen–Key band-pass filter is simulated with the supply voltage
± 1.8 V. The simulated central frequency (f 0 ) is found 24 kHz for nominal component
value (Fig. 5). In the present work, parametric faults in the filter circuit are detected not
only for the variation of resistances and capacitances but also for the variation of width
(W ) of the transistors of the OPAMP due to process variation (Fig. 6). Figure 7 shows
the frequency response of the filter circuit for Monte Carlo simulation of R1. Impulse
responses are obtained for Monte Carlo simulation of each of the components of the
circuit within tolerance limits which are considered as ± 5% from the corresponding
nominal value, in this case. Figure 8 shows the impulse response of Sallen–Key band-
pass filter circuit for nominal value of circuit components, Monte Carlo variation of
R3 (within tolerance limit) and two injected faults in R3.
Cross-correlation is performed between output for nominal component value and all
individual output obtained from Monte Carlo simulation of each circuit components.
Figure 9 shows all the cross-correlations performed between output for nominal value
 Circuits, Systems, and Signal Processing

Fig. 4 Layout of impulse generator circuit

Fig. 5 Second-order Sallen–Key band-pass filter circuit

of circuit components and all individual output obtained from Monte Carlo simula-
tion on R4. The peaks of the cross-correlations are fitted with Gaussian function, and
fitting parameters are obtained. As the fitting is performed with first degree Gaussian
polynomial, the goodness of fit statistic is also measured for that range. R2 , i.e., the
square of the correlation between the response values and the predicted response val-
ues is 0.9957, and adjusted R2 is 0.9957 which is closed to 1. The root mean squared
Circuits, Systems, and Signal Processing

Fig. 6 Schematic of operational amplifier used in simulation of filter circuits

Fig. 7 Frequency response of second-order Sallen–Key band-pass filter for Monte Carlo simulation of R1

error (RMSE) is 0.0257 which is negligibly small. The values of the statistical param-
eters signify that Gaussian function can satisfactorily characterize the exhibited trend
of the cross-correlation of impulse responses. Figure 10 shows the cross-correlation
between nominal impulse response and an injected fault on which first degree Gaussian
polynomial has been fitted.
The maximum and minimum values of the fitting parameters (a, b and c) for
the ± 5% tolerance of individual circuit components and the width (W ) of the tran-
sistors of the OPAMP in the Sallen–Key band-pass filter circuit are given in Table 1.
 Circuits, Systems, and Signal Processing

Fig. 8 Impulse response of the second-order Sallen–Key band-pass filter circuit (Fig. 5) for nominal value
of circuit components, Monte Carlo variation of R3 (within tolerance limit) and two injected faults in R3

Fig. 9 Cross-correlations between the impulse responses with nominal value of circuit components and
Monte Carlo simulation on R4 of second-order Sallen–Key band-pass filter. (Lag is in µs)

From the data of this table, the bounds of ‘a,’ ‘b’ and ‘c’ are identified and marked
bold. The detectability of the proposed method for representative set of injected single
and multiple faults in the filter circuit is listed in Table 2.

3.2 Results of Fourth-Order Low-Pass Chebyshev Filter Circuit

The bandwidth of the fourth-order low-pass Chebyshev filter circuit (simulated

with ± 2.5 V supply voltage) for nominal component value (Fig. 11) is found to be
868.2 Hz. Figure 12 shows the impulse response of fourth-order low-pass Chebyshev
Circuits, Systems, and Signal Processing

Fig. 10 Cross-Correlation curve (along with Gaussian fitting) between nominal impulse response and an
injected fault in C2 of second-order Sallen–Key band-pass filter. (lag is in µs)

Table 1 Bounds of fitting parameters (a, b and c) for ± 5% tolerance of individual circuit components and
the width (W ) of the transistors of the OPAMP in second-order Sallen–Key band-pass filter circuit (Fig. 5)

Component a b c

Min Max Min Max Min Max

R1 (± 5%) 15.0896 16.0085 − 1.88896 20.3185 617.6913 625.9877

R2 (± 5%) 14.6804 16.464 − 15.6492 28.0756 618.8452 622.6115
R3 (± 5%) 14.289 16.7213 − 46.7322 53.0727 615.671 634.403
R4 (± 5%) 14.3235 16.9291 − 10.0408 15.3302 615.114 626.0241
R5 (± 5%) 14.4284 16.8258 − 10.0307 15.2302 614.114 627.0243
C1 (± 5%) 14.8159 16.1245 − 43.8779 52.6467 618.5957 631.8206
C2 (± 5%) 14.593 16.3706 − 30.9714 46.9276 614.825 629.4452
W1O1 (± 5%) 15.4156 15.6718 − 4.76354 13.6427 612.2397 631.2802
W2O1 (± 5%) 15.4271 15.6664 − 4.8078 13.6066 611.6726 632.191
W3O1 (± 5%) 15.4214 15.6758 − 4.75529 13.7496 611.2098 631.2203
W4O1 (± 5%) 15.4183 15.6643 − 4.72103 13.8235 620.7235 632.1958
W5O1 (± 5%) 15.3767 15.6827 − 0.00779 9.93453 618.0344 622.2429
W6O1 (± 5%) 15.4874 15.579 − 0.12753 9.80452 618.1154 623.0079
W7O1 (± 5%) 15.4904 15.5748 − 0.59138 10.4489 618.0587 623.1708
W8O1 (± 5%) 15.3355 15.6905 0.02446 9.91916 617.0188 623.9614
Extreme bounds of a, b and c are given in bold

filter circuit for nominal value of circuit components, Monte Carlo variation of R4
(within tolerance limit) and two injected faults in R4. Figure 13 shows the fitted Gaus-
sian curve in the cross-correlation obtained from nominal output and a fault in C4.
 Circuits, Systems, and Signal Processing

Table 2 Test results of second-order Sallen–Key band-pass filter circuit for representative set of injected
single and multiple faults

Component variation a b c OBS*

R1 7% ↓ 16.14658053 − 9.562233949 605.1963492 c

R2 8% ↓ 13.78901299 36.10597047 622.5917582 a
C2 8% ↓ 12.80926365 13.83998256 615.9605658 a
C1 10% ↑ 17.32284416 − 115.5076464 586.039405 a, b, c
R3 7% ↑ 17.07412561 − 28.06463713 620.2373309 a
W7 7% ↑ 16.96282473 − 56.33993096 610.7559976 a, b, c
W8 8% ↓ 16.60727134 97.81751231 644.4995294 b, c
W6 7% ↑ + W5 9% ↓ 13.78273717 − 61.11915239 602.4975848 a, b, c
R4 10% ↑ + C2 8% ↓ 15.59361595 − 0.843756456 637.8891486 c
R1 8% ↓ + C2 8% ↑ 15.19717433 4.812366047 616.0816553 ×
R3 7% ↓ + C1 7% ↑ + C2 7% ↑ 15.72382134 10.8906227 623.1353156 ×
R1 9% ↓ + C1 6% ↓ + C2 7% ↓ 14.4435492 − 74.51094454 600.8317014 b, c
*OBS out of bound signature

Fig. 11 Fourth-order Chebyshev low-pass filter circuit

The maximum and minimum values of the fitting parameters (a, b and c) for the
± 5% tolerance of individual circuit components and the width (W ) of the transistors of
the OPAMP in the fourth-order Chebyshev low-pass filter circuit are given in Table 3.
From the data of this table, the bounds of ‘a,’ ‘b’ and ‘c’ are identified and marked
bold. The detectability of the proposed method for representative set of injected single
and multiple faults in the filter circuit is listed in Table 4.
A comparison of fault coverage of proposed technique with functional testing (con-
sidering gain and bandwidth) and another test method [10] for two filter circuits is
shown in Table 5. It is evident that our proposed method is more efficient in comparison
with other two methods.

4 Experimental Results

The experimental setup for demonstrating our technique is displayed in Fig. 14.
Second-order Sallen–Key band-pass filter is constructed using the OPAMP IC
Circuits, Systems, and Signal Processing

Fig. 12 Impulse response of the fourth-order Chebyshev low-pass filter circuit (Fig. 11) for nominal value
of circuit components, Monte Carlo variation of R4 (within tolerance limit) and two injected faults in R4

Fig. 13 Cross-correlation curve (along with Gaussian fitting) between nominal impulse response and an
injected fault in C4 of fourth-order Chebyshev low-pass filter. (Lag is in µs)

TLV2762CD. The power supply used for the circuit is ± 1.8 V from standard regulated
DC power supply (Agilent E3620A) to correlate with Cadence simulation environment
(since Cadence simulation of second-order Sallen–Key band-pass filter is performed
using UMC-180 nm technology and ± 1.8 V power supply). The circuit has been
excited with pulse signal from Keysight 81160A waveform generator. The circuit
response has been captured with Agilent MSO-X-3104A.
Mixed-signal storage oscilloscope (MSO). The data has been collected by the
USB port of the MSO for next stage calculation. The circuit of the OPAMP in IC
 Circuits, Systems, and Signal Processing

Table 3 Bounds of fitting parameters (a, b and c) for ± 5% tolerance of individual circuit components and
the width (W ) of the transistors of the OPAMP in fourth-order low-pass Chebyshev filter

Component a b c

Min Max Min Max Min Max

R1 (± 5%) 1879.1271 1892.2186 − 18.3029 18.53603 1224.6306 1240.6276

R2 (± 5%) 1876.5499 1895.5987 − 26.2348 25.62509 1221.2062 1246.8395
R3 (± 5%) 1876.9437 1893.5545 − 8.0577 7.96817 1224.7269 1245.4478
R4 (± 5%) 1871.2923 1899.1846 − 14.7467 14.44635 1227.9257 1242.1641
C1 (± 5%) 1873.5759 1899.5763 − 30.5926 29.6858 1223.7442 1245.2394
C2 (± 5%) 1879.2192 1892.3055 − 15.0265 15.1173 1223.7207 1245.4533
C3 (± 5%) 1872.5074 1898.6302 − 15.9635 16.5626 1222.4635 1241.3091
C4 (± 5%) 1876.8631 1896.1103 − 6.3935 7.25228 1223.1582 245.6015
W1O2 (± 5%) 1876.5108 1895.1721 − 0.36311 0.37162 1227.5342 1240.9704
W2O2 (± 5%) 1876.5616 1895.9714 − 0.3244 0.36604 1227.6402 1241.476
W3O2 (± 5%) 1876.5172 1896.2993 − 0.3973 0.45157 1227.4716 1241.855
W4O2 (± 5%) 1876.1007 1895.7063 − 0.3709 0.39231 1227.2581 1241.3533
W5O2 (± 5%) 1875.9901 1896.1146 − 0.0655 0.06836 1224.3014 1240.4583
W6O2 (± 5%) 1874.834 1895.2676 − 0.00497 0.0107 1223.2121 1241.5457
W7O2 (± 5%) 1875.4051 1896.6727 − 0.1645 0.17743 1224.3303 1245.4304
W8O2 (± 5%) 875.9041 1896.2058 − 0.06965 0.08484 1222.1458 1246.6377
Extreme bounds of a, b and c are given in bold

Table 4 Test results of fourth-order low-pass Chebyshev filter circuit for representative set of injected single
and multiple faults

Component variation a b c OBS

R1 9% ↑ 1873.200774 34.16704649 1245.989027 b

R1 8% ↓ 1866.9378 − 0.235711351 1214.451585 a, c
R3 10% ↓ 1886.327602 0.159274639 1254.860898 c
R2 8% ↑ 1886.39764 0.015320093 1234.644929 ×
R4 8% ↓ 1899.08568 − 14.48774263 1216.322689 a, c
C1 8% ↓ 1826.579273 − 36.18868772 1269.715047 a, b, c
C2 7% ↑ 1836.24947 − 30.94447392 1263.595579 a, b, c
C3 9% ↓ 1895.292156 − 31.63973236 1225.097577 b
C4 8% ↑ 1847.770824 − 15.45767724 1257.084051 a, c
W7 7% ↑ 1838.638158 41.20061611 1259.424054 a, b, c
W8 8% ↓ 1862.026414 − 23.33247717 1247.333258 a, c
W6 8% ↑ 1956.365239 − 50.4403054 1201.205617 a, b, c
R3 10% ↓ + C3 9% ↓ 1894.766975 21.31015632 1235.972806 ×
R4 10% ↓ + C4 8% ↓ 1860.516457 − 28.81858048 1247.899742 a, c
R4 7% ↓ + R3 8% ↓ 1918.503892 12.03591798 1216.555501 a, c
Circuits, Systems, and Signal Processing

Table 5 Comparison of fault coverage (in terms of number of detected/injected faults) of proposed technique
with functional testing (considering gain and bandwidth) and another test method for two filter circuits

CUT Gain Bandwidth Earlier work [10] Proposed work

Sallen–Key band-pass filter 23/50 25/50 41/50 45/50

Chebyshev low-pass filter 28/50 35/50 35/50 42/50

Fig. 14 Experimental setup for demonstration of the proposed approach with second-order Sallen–Key
band-pass filter as benchmark circuit

Table 6 Bounds of fitting parameters (a, b and c) for ± 5% tolerance of individual circuit components for
second-order Sallen–Key band-pass filter circuit (constructed with IC TLV2762)

Component a b c

Min Max Min Max Min Max

R1 (± 5%) 0.13917 0.15353 0.1377 − 0.0606 12.147 12.1892

R2 (± 5%) 0.1462 0.14623 0.0084 − 0.0088 12.2121 12.2075
R3 (± 5%) 0.1448 0.14753 − 0.0817 0.07700 12.174 12.2434
R4 (± 5%) 0.1433 0.14906 − 0.0825 0.07393 12.1882 12.2251
R5 (± 5%) 0.1492 0.14353 0.0775 − 0.07932 12.225 12.1884
C1 (± 5%) 0.1444 0.14775 − 0.1131 0.10966 12.1751 12.2624
C2 (± 5%) 0.1600 0.13347 0.2856 − 0.07978 12.0377 12.2013
Extreme bounds of a, b and c are given in bold

TLV2762CD is different than our considered OPAMP (Fig. 6). Thus, SPICE simu-
lation is performed further for the real circuit (containing IC TLV2762CD) with the
impulse input, and the bounds of the parameters ‘a,’ ‘b’ and ‘c’ are computed (shown
in Table 6) by Monte Carlo simulation (as described in Sect. 2).
Figure 15 shows SPICE simulated and experimental (data taken from MSO)
impulse responses of the second-order Sallen–Key band-pass filter (constructed with
IC TLV2762CD) for nominal circuit components. It is observed that the experimental
results satisfactorily follow the simulated results. In the testing stage, R and C values
 Circuits, Systems, and Signal Processing

Fig. 15 Comparison between SPICE simulated and experimental impulse response of the second-order
Sallen–Key band-pass filter circuit considering nominal value of circuit components

Fig. 16 Impulse response of the Sallen–Key band-pass filter (constructed with TLV2762CD) circuit consid-
ering nominal component value and with components deviated from nominal value

of the circuit are changed within the tolerance limit and beyond the tolerance limit.
The proposed methodology is applicable for detecting parametric faults in any passive
and active components of a linear circuit. It is difficult to find an OPAMP IC with
known parametric fault. Thus, detection of parametric faults is demonstrated in our
experiment for R and C only.
Figure 16 shows the experimental impulse response of the real circuit (containing
IC TLV2762CD) with nominal value of circuit components and with component val-
ues deviated from nominal value. Value of the parameters ‘a,’ ‘b’ and ‘c’ is computed
from the cross-correlation of the impulse responses of the circuit with nominal value
of circuit components and with component value deviated from nominal value. Exper-
Circuits, Systems, and Signal Processing

Table 7 Test results of Component a b c OBS

second-order Sallen–Key variation
band-pass filter (constructed
with IC TLV2762) R1 7% ↓ 0.1564020 0.217783 12.10107 c
R2 8% ↑ 0.1462130 − 0.0131904 12.2081 a
C2 10% ↓ 0.1600880 0.286203 12.03893 a
C1 9% ↑ 0.1475903 0.1017500 12.26455 a, b, c
R3 8% ↑ 0.1482756 0.1183505 12.25947 a
R4 7% ↑ 0.1501981 0.1013978 12.22867 ×
R5 10% ↓ 0.1524746 0.159547 12.238160 b, c
R3 10% ↑ + 0.259749 − 9.82264 19.44699 a, b, c
R5 10% ↓
R1 8% ↓ + C1 0.146452 − 6.59997 13.77003 b, c
10% ↓

imentally detected test results of second-order Sallen–Key band-pass filter circuit for
faults in R and C are shown in Table 7.

5 Conclusion

It is important to reduce the test cost as well as test time of analog part of a mixed-
signal IC to decrease the production test cost of the chip. Impulse response-based
fault detection method for testing of linear analog circuits, reported in this work,
is easy to apply and thus significantly reduces test cost and complexity associated
with functional testing. The achieved fault coverage of the proposed method is about
87% which is satisfactorily high. In most of the practical cases, the internal nodes
are not accessible. The inaccessibility to the internal nodes is not a hindrance for the
proposed approach since it requires the measurement of voltage at the output node only.
Experimental verification has also been performed to establish the proposed method.
Since the proposed test technique requires the minimum add-on circuit complexity, it
is applicable to different types of linear analog circuits including BIST architecture.

Acknowledgements This work is supported by Special Manpower Development Program for Chips to
System Design (SMDP-C2SD) of Ministry of Electronics & Information Technology, Government of India.
S. Srimani thankfully acknowledges Visvesvaraya PhD Scheme of Ministry of Electronics & Information
Technology, Government of India, for his fellowship for pursuing Ph.D.

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