Ux425ug Ux425ug Ux425ug Ux425ug Ux425ug Ux425ug

5 4 3 2 1
D D
C C
B B
A A
Huaqin Telecom Technology Com.,Ltd.
Page name: Block Diagram
Size: Project REV:

A4 Name: UX425UG V1.0
Date: Friday, February 05, 2021 Sheet: of 64
5 4 3 2 1
5 4 3 2 1
NB2567 V4 POWER MAP

D D
Type-C Type-C
65W 65W
+VADP
+VADP
BQ24781
TO EC
+V3P3A +V1P8A
SY8443
V3P3A_PGOOD
V3P3A_PGOOD
EN
PG
V1P8A_PGOOD
PG +V3P3A_LDO
TO CPU
+VSYS LDO_OUT
SLP_S3_S0A3#
RT6256B
+V3P3A
3P3VA_EN EN
EN
+V3P3A +V3P3S
EN
G2898
EN_LDO_3V5V(+VSYS)
+V5P0A +V5P0S
+VSYS
EN
POWER NET
EN SLP_S3_S0A3#
+VSYS +V5P0A
RT6258C
PG
V3P3A_PGOOD +V5P0A +V1P8S
EN SY8443 CONTROL NET
VDDP_PGOOD(Reserve) V5P0A_PGOOD
TO EC SLP_S3_S0A3# EN
C
PG C
+V5P0A
SLP_S3_S0A3#
EN SWITCH IC
+VDDP
+V1P8A G2898 +V1P8S
V1P8A_PGOOD EN
SLP_S3_S0A3#
EN
+VSYS +VDDP_ALW
SY8286A LOAD SWITCH
PG
V1P0A_PGOOD
+VSYS reg CONTROLLER IC
SLP_S5#
+V_VDDQ_VTT
EN
+VSYS +V1P2U_VDDQ
TPS51486RJER
PG
SLP_S3_S0A3# EN
VCC_DDR_PWROK
TO EC
B B
+VDDCR_VDD
ALLSYSPWRGD
EN
+VSYS +VDDCR_SOC
RT3663BMGQW
PG
EC_IMVP_PCH_PWRGD
TO EC
A A
Page name: Power Map
Size: Project REV:

Date: Friday, February 05, 2021
Sheet: of 64
5 4 3 2 1
5 4 3 2 1
FP6
216NOPNFP6
U29A
BYTE0 MEMORY A
BYTE1 MA_ADD0/RSVD AK26

MAA_DATA8 K27 MA_DATA0/MAA_DATA8 MA_ADD1/RSVD AG24
14 MAA_DATA8 MAA_DATA9 L26 MA_DATA1/MAA_DATA9 MA_ADD2/MAB_CA0 AG23 15 MAB_CA0
14 MAA_DATA9 MAA_DATA13
OUT
N26 MA_DATA2/MAA_DATA13 MA_ADD3/MAA_CA4 AG26 14 MAA_CA4
OUT
D N27 MA_DATA3/MAA_DATA12 MA_ADD4/MAA_CA5 AG27 14 MAA_CA5 D
OUT
G27 MA_DATA4/MAA_DATA11 MA_ADD5/MAA_CA3 AF21 14 MAA_CA3
OUT
H27 MA_DATA5/MAA_DATA10 MA_ADD6/MAA_CA2 AF22 14 MAA_CA2
OUT
M27 MA_DATA6/MAA_DATA15 MA_ADD7/RSVD AF25
14 MAA_DATA15 MAA_DATA14 N24 MA_DATA7/MAA_DATA14 MA_ADD8/RSVD AF24
14 MAA_DATA14
MA_ADD9/RSVD AE21
MAA_DATA0 L23 MA_DATA8/MAA_DATA0 MA_ADD10/MAB_CS_L1 AL21 15 MAB_CS1
OUT
N21 MA_DATA9/MAA_DATA1 MA_ADD11/MAA_CKE1 AF27 14 MAA_CKE1
OUT
T21 MA_DATA10/MAA_DATA5 MA_ADD12/MAA_CKE0 AE23 14 MAA_CKE0
OUT
T22 MA_DATA11/MAA_DATA4 MA_ADD13_BANK2/RSVD AM23
14 MAA_DATA4 MAA_DATA7 M22 MA_DATA12/MAA_DATA7 MA_WE_L_ADD14/MAB_CKE1 AM21 15 MAB_CKE1
OUT
L24 MA_DATA13/MAA_DATA6 MA_CAS_L_ADD15/RSVD AL27
14 MAA_DATA6 MAA_DATA2 R21 MA_DATA14/MAA_DATA2 MA_RAS_L_ADD16/MAB_CKE0 AL24 15 MAB_CKE0
OUT
R23 MA_DATA15/MAA_DATA3
14 MAA_DATA3
MAA_DATA17 P24 MA_DATA16/MAA_DATA17 MA_BANK0/MAB_CS_L0 AL22 15 MAB_CS0
OUT
R26 MA_DATA17/MAA_DATA16 MA_BANK1/MAB_CA1 AK27 15 MAB_CA1
OUT
T27 MA_DATA18/MAA_DATA21
14 MAA_DATA21 MAA_DATA20 V27 MA_DATA19/MAA_DATA20 MA_BG0/MAA_CS_L1 AE27 14 MAA_CS1
OUT
P25 MA_DATA20/MAA_DATA19 MA_BG1/MAA_CS_L0 AE26 14 MAA_CS0
OUT
P27 MA_DATA21/MAA_DATA18
14 MAA_DATA18 MAA_DATA23 V23 MA_DATA22/MAA_DATA23 MA_ACT_L/RSVD AD22
14 MAA_DATA23 MAA_DATA22 T25 MA_DATA23/MAA_DATA22
14 MAA_DATA22
MA_DM0/MAA_DM1 L27 14 MAA_DM1
OUT
MAA_DATA30 W22 MA_DATA24/MAA_DATA30 MA_DM1/MAA_DM0 N23 14 MAA_DM0
OUT
Y23 MA_DATA25/MAA_DATA31 MA_DM2/MAA_DM2 R27 14 MAA_DM2
OUT
AC24 MA_DATA26/MAA_DATA26 MA_DM3/MAA_DM3 Y24 14 MAA_DM3
OUT
AC23 MA_DATA27/MAA_DATA27 MA_DM4/MAB_DM2 AP27 15 MAB_DM2
OUT
V21 MA_DATA28/MAA_DATA28 MA_DM5/MAB_DM3 AW23 15 MAB_DM3
OUT
C W21 MA_DATA29/MAA_DATA29 MA_DM6/MAB_DM1 AT21 15 MAB_DM1 C
OUT
AA24 MA_DATA30/MAA_DATA24 MA_DM7/MAB_DM0 AV18 15 MAB_DM0
OUT
AA22 MA_DATA31/MAA_DATA25 RSVD_52 W24
14 MAA_DATA25
MAB_DATA17 AP26 MA_DATA32/MAB_DATA17 MA_DQS_H0/MAA_DQS_H1 M25 14 MAA_DQS_H1 MAA_DQS_H1
15 MAB_DATA17 MAB_DATA16
OUT
MAA_DQS_L1
AN24 MA_DATA33/MAB_DATA16 MA_DQS_L0/MAA_DQS_L1 M24 14 MAA_DQS_L1
OUT
MAA_DQS_H0
AR25 MA_DATA34/MAB_DATA21 MA_DQS_H1/MAA_DQS_H0 P22 14 MAA_DQS_H0
OUT
MAA_DQS_L0
AU26 MA_DATA35/MAB_DATA20 MA_DQS_L1/MAA_DQS_L0 P21 14 MAA_DQS_L0
OUT
MAA_DQS_H2
AN25 MA_DATA36/MAB_DATA19 MA_DQS_H2/MAA_DQS_H2 T24 14 MAA_DQS_H2
OUT
MAA_DQS_L2
AN27 MA_DATA37/MAB_DATA18 MA_DQS_L2/MAA_DQS_L2 R24 14 MAA_DQS_L2
OUT
MAA_DQS_H3
AR27 MA_DATA38/MAB_DATA23 MA_DQS_H3/MAA_DQS_H3 AA21 14 MAA_DQS_H3
OUT
MAA_DQS_L3
AU27 MA_DATA39/MAB_DATA22 MA_DQS_L3/MAA_DQS_L3 Y21 14 MAA_DQS_L3
15 MAB_DATA22 OUT
MAB_DQS_H2
MA_DQS_H4/MAB_DQS_H2 AP23 15 MAB_DQS_H2
OUT
MAB_DATA30 AV25 MA_DATA40/MAB_DATA30 MA_DQS_L4/MAB_DQS_L2 AP24 15 MAB_DQS_L2 MAB_DQS_L2
15 MAB_DATA30 MAB_DATA31 AW25
OUT
MAB_DQS_H3
MA_DATA41/MAB_DATA31 MA_DQS_H5/MAB_DQS_H3 AW22 15 MAB_DQS_H3
15 MAB_DATA31 MAB_DATA26 AV20
OUT
MAB_DQS_L3
MA_DATA42/MAB_DATA26 MA_DQS_L5/MAB_DQS_L3 AV22 15 MAB_DQS_L3
OUT
MAB_DQS_H1
MA_DATA43/MAB_DATA27 MA_DQS_H6/MAB_DQS_H1 AT20 15 MAB_DQS_H1
15 MAB_DATA27 MAB_DATA28 AV27
OUT
MAB_DQS_L1
MA_DATA44/MAB_DATA28 MA_DQS_L6/MAB_DQS_L1 AR20 15 MAB_DQS_L1
OUT
MAB_DQS_H0
MA_DATA45/MAB_DATA29 MA_DQS_H7/MAB_DQS_H0 AR18 15 MAB_DQS_H0
15 MAB_DATA29 MAB_DATA24 AU21
OUT
MAB_DQS_L0
MA_DATA46/MAB_DATA24 MA_DQS_L7/MAB_DQS_L0 AT18 15 MAB_DQS_L0
OUT
MA_DATA47/MAB_DATA25 RSVD_58 Y26
15 MAB_DATA25
RSVD_59 Y27
MAB_DATA11 AT22 MA_DATA48/MAB_DATA11
15 MAB_DATA11 MAB_DATA10 AP21 MA_DATA49/MAB_DATA10 MA_CLK_H0/MAA_CKT AJ25 14 MAA_CKT
OUT
AN19 MA_DATA50/MAB_DATA14 MA_CLK_L0/MAA_CKC AJ24 14 MAA_CKC
OUT
AN18 MA_DATA51/MAB_DATA15 MA_CLK_H1/MAB_CKT AJ22 15 MAB_CKT
OUT
AU23 MA_DATA52/MAB_DATA12 MA_CLK_L1/MAB_CKC AJ21 15 MAB_CKC R9965 R9966 R9967 R9968 R9969 R9970 R9971 R9972
OUT
AR22 MA_DATA53/MAB_DATA13
15 MAB_DATA13 MAB_DATA9 AN20 MA_DATA54/MAB_DATA9
B 15 MAB_DATA9 MAB_DATA8 B
AP19 MA_DATA55/MAB_DATA8
15 MAB_DATA8
MAB_DATA6 AT19 453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2
MA_DATA56/MAB_DATA6
15 MAB_DATA6 MAB_DATA7 AW18 MA_DATA57/MAB_DATA7 MA_CS_L0/MAB_CA2 AL25 15 MAB_CA2 R9973 R9974 R9975 R9976 R9977 R9978 R9979 R9980
15 MAB_DATA7 MAB_DATA2 AU16
OUT
MA_DATA58/MAB_DATA2 MA_CS_L1/MAB_CA5 AM26 15 MAB_CA5
15 MAB_DATA2 OUT
15 MAB_DATA3
MAB_DATA3 AW16
MAB_DATA4 AW19
MA_DATA59/MAB_DATA3
MA_DATA60/MAB_DATA4
FOR LPDDR4X
15 MAB_DATA4
15 MAB_DATA5
MAB_DATA5 AU19
MAB_DATA1 AP16
MA_DATA61/MAB_DATA5
Change From +V1P1U_VDDQ_SOC to +V1P1U_VDDQ 453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2
15 MAB_DATA1 MAB_DATA0 AT16
MA_DATA62/MAB_DATA1
MA_DATA63/MAB_DATA0
20201102-zhiqiang
15 MAB_DATA0
MA_CKE0/MAA_CA1 AD24 14 MAA_CA1
OUT
W27 RSVD_54 MA_CKE1/MAA_CA0 AD25 14 MAA_CA0 +V1P1U_VDDQ
OUT
W25 RSVD_53 CLOSE TO RAM
AC26 RSVD_68
AC27 RSVD_69
V26 RSVD_49 MA_ODT0/MAB_CA3 AM24 15 MAB_CA3
OUT
R79
V24 RSVD_48 MA_ODT1/MAB_CA4 AM27 15 MAB_CA4
OUT
AA27 RSVD_63 PDG
+V1P1U_VDDQ
AA25 RSVD_62
change to 453ohm 08/27
MA_TEST 1K/F_2
MA_ALERT_L/TEST31A AE24 1 TP316
公版不接 AK24 MA_PAROUT/RSVD
MA_EVENT_L AK23 MA_EVENT_L MA_EVENT_L is an optional signal.

R0301 AN21 M_DDR4 MA_RESET_L AD27 14,15 MA_RESET_L
OUT
0R/J_2 AN22 M_LPDDR4 FP6 REV 0.92 控制2颗RAM
PART 1 OF 13
STRAP
AMD request 08/27
A A
Page name: RN-DDR4(CHA)
Size: Project REV:

Change From +V1P1U_VDDQ_SOC to +V1P1U_VDDQ
Date: Sheet: of
20201102-zhiqiang Friday, February 05, 2021 64
5 4 3 2 1
5 4 3 2 1
FP6
216NOPNFP6
U29I
MEMORY B
MB_ADD0/RSVD AM29
BI
MBA_DATA8 16 C27 MB_DATA0/MBA_DATA8 MB_ADD1/RSVD AH31
BI
MBA_DATA9 16 A28 MB_DATA1/MBA_DATA9 MB_ADD2/MBB_CA0 AJ30 17 MBB_CA0
OUT
D BI
MBA_DATA13 16 F29 MB_DATA2/MBA_DATA13 MB_ADD3/MBA_CA4 AH29 16 MBA_CA4
OUT D
BI
MBA_DATA12 16 F31 MB_DATA3/MBA_DATA12 MB_ADD4/MBA_CA5 AG32 16 MBA_CA5
OUT
BI
MBA_DATA11 16 B27 MB_DATA4/MBA_DATA11 MB_ADD5/MBA_CA3 AG30 16 MBA_CA3
OUT
BI
MBA_DATA10 16 D27 MB_DATA5/MBA_DATA10 MB_ADD6/MBA_CA2 AG31 16 MBA_CA2
OUT
BI
MBA_DATA15 16 E32 MB_DATA6/MBA_DATA15 MB_ADD7/RSVD AF30
BI
MBA_DATA14 16 F30 MB_DATA7/MBA_DATA14 MB_ADD8/RSVD AG29
MB_ADD9/RSVD AF29
BI
MBA_DATA0 16 H31 MB_DATA8/MBA_DATA0 MB_ADD10/MBB_CS_L1 AM30 17 MBB_CS1
OUT
BI
MBA_DATA1 16 H30 MB_DATA9/MBA_DATA1 MB_ADD11/MBA_CKE1 AF31 16 MBA_CKE1
OUT
BI
MBA_DATA5 16 K31 MB_DATA10/MBA_DATA5 MB_ADD12/MBA_CKE0 AE32 16 MBA_CKE0
OUT
BI
MBA_DATA4 16 L30 MB_DATA11/MBA_DATA4 MB_ADD13_BANK2/RSVD AP30
BI
MBA_DATA7 16 G30 MB_DATA12/MBA_DATA7 MB_WE_L_ADD14/MBB_CKE1 AP31 17 MBB_CKE1
OUT
BI
MBA_DATA6 16 H29 MB_DATA13/MBA_DATA6 MB_CAS_L_ADD15/RSVD AP29
BI
MBA_DATA2 16 K30 MB_DATA14/MBA_DATA2 MB_RAS_L_ADD16/MBB_CKE0 AN29 17 MBB_CKE0
OUT
BI
MBA_DATA3 16 K29 MB_DATA15/MBA_DATA3
BI
MBA_DATA21 16 N32 MB_DATA16/MBA_DATA21 MB_BANK0/MBB_CS_L0 AN31 17 MBB_CS0
OUT
BI
MBA_DATA22 16 N29 MB_DATA17/MBA_DATA22 MB_BANK1/MBB_CA1 AM32 17 MBB_CA1
OUT
BI
MBA_DATA20 16 P30 MB_DATA18/MBA_DATA20
BI
MBA_DATA19 16 L32 MB_DATA19/MBA_DATA19 MB_BG0/MBA_CS_L1 AD29 16 MBA_CS1
OUT
BI
MBA_DATA17 16 L31 MB_DATA20/MBA_DATA17 MB_BG1/MBA_CS_L0 AD31 16 MBA_CS0
OUT
BI
MBA_DATA16 16 M30 MB_DATA21/MBA_DATA16
BI
MBA_DATA18 16 L29 MB_DATA22/MBA_DATA18 MB_ACT_L/RSVD AD30
BI
MBA_DATA23 16 N31 MB_DATA23/MBA_DATA23
MB_DM0/MBA_DM1 C30 16 MBA_DM1

OUT
BI
MBA_DATA30 16 R30 MB_DATA24/MBA_DATA30 MB_DM1/MBA_DM0 H32 16 MBA_DM0
OUT
BI
MBA_DATA31 16 R32 MB_DATA25/MBA_DATA31 MB_DM2/MBA_DM2 M29 16 MBA_DM2
OUT
BI
MBA_DATA26 16 V30 MB_DATA26/MBA_DATA26 MB_DM3/MBA_DM3 T29 16 MBA_DM3
OUT
BI
MBA_DATA27 16 V32 MB_DATA27/MBA_DATA27 MB_DM4/MBB_DM2 AU30 17 MBB_DM2
OUT
C
BI
MBA_DATA28 16 P29 MB_DATA28/MBA_DATA28 MB_DM5/MBB_DM3 BD28 17 MBB_DM3
OUT
C
BI
MBA_DATA29 16 P31 MB_DATA29/MBA_DATA29 MB_DM6/MBB_DM1 BB23 17 MBB_DM1
OUT
BI
MBA_DATA25 16 U31 MB_DATA30/MBA_DATA25 MB_DM7/MBB_DM0 BD20 17 MBB_DM0
OUT
BI
MBA_DATA24 16 U29 MB_DATA31/MBA_DATA24 RSVD_57 W31
MBB_DATA16 17 AT29 MB_DATA32/MBB_DATA16 MB_DQS_H0/MBA_DQS_H1 E29 16 MBA_DQS_H1 MBA_DQS_H1

BI OUT
MBB_DATA17 17 AU32 MB_DATA33/MBB_DATA17 MB_DQS_L0/MBA_DQS_L1 D28 16 MBA_DQS_L1 MBA_DQS_L1
BI OUT
MBB_DATA21 17 AW31 MB_DATA34/MBB_DATA21 MB_DQS_H1/MBA_DQS_H0 J31 16 MBA_DQS_H0 MBA_DQS_H0
BI OUT
MBB_DATA20 17 AW30 MB_DATA35/MBB_DATA20 MB_DQS_L1/MBA_DQS_L0 J29 16 MBA_DQS_L0 MBA_DQS_L0
BI OUT
MBB_DATA19 17 AR30 MB_DATA36/MBB_DATA19 MB_DQS_H2/MBA_DQS_H2 N30 16 MBA_DQS_H2 MBA_DQS_H2
BI OUT
MBB_DATA18 17 AT31 MB_DATA37/MBB_DATA18 MB_DQS_L2/MBA_DQS_L2 M31 16 MBA_DQS_L2 MBA_DQS_L2
BI OUT
MBB_DATA23 17 AV30 MB_DATA38/MBB_DATA23 MB_DQS_H3/MBA_DQS_H3 T30 16 MBA_DQS_H3 MBA_DQS_H3
BI OUT
MBB_DATA22 17 AW29 MB_DATA39/MBB_DATA22 MB_DQS_L3/MBA_DQS_L3 T31 16 MBA_DQS_L3 MBA_DQS_L3
BI OUT
MB_DQS_H4/MBB_DQS_H2 AU29 17 MBB_DQS_H2 MBB_DQS_H2
OUT
MBB_DATA29 17 AY29 MB_DATA40/MBB_DATA29 MB_DQS_L4/MBB_DQS_L2 AU31 17 MBB_DQS_L2 MBB_DQS_L2
BI OUT
MBB_DATA28 17 AY32 MB_DATA41/MBB_DATA28 MB_DQS_H5/MBB_DQS_H3 BA27 17 MBB_DQS_H3 MBB_DQS_H3
BI OUT
MBB_DATA24 17 BC27 MB_DATA42/MBB_DATA24 MB_DQS_L5/MBB_DQS_L3 BB27 17 MBB_DQS_L3 MBB_DQS_L3
BI OUT
MBB_DATA25 17 BB26 MB_DATA43/MBB_DATA25 MB_DQS_H6/MBB_DQS_H1 BC23 17 MBB_DQS_H1 MBB_DQS_H1
BI OUT
MBB_DATA27 17 BC25 MB_DATA44/MBB_DATA27 MB_DQS_L6/MBB_DQS_L1 BA23 17 MBB_DQS_L1 MBB_DQS_L1
BI OUT
MBB_DATA26 17 BA25 MB_DATA45/MBB_DATA26 MB_DQS_H7/MBB_DQS_H0 BC20 17 MBB_DQS_H0 MBB_DQS_H0
BI OUT
MBB_DATA30 17 BB30 MB_DATA46/MBB_DATA30 MB_DQS_L7/MBB_DQS_L0 BA20 17 MBB_DQS_L0 MBB_DQS_L0
BI OUT
BI
MBB_DATA31 17 BA28 MB_DATA47/MBB_DATA31 RSVD_61 Y32
RSVD_60 Y30
BI
MBB_DATA11 17 BA24 MB_DATA48/MBB_DATA11
BI
MBB_DATA10 17 BC24 MB_DATA49/MBB_DATA10 MB_CLK_H0/MBA_CKT AJ31 16 MBA_CKT
OUT
BI
MBB_DATA14 17 BC22 MB_DATA50/MBB_DATA14 MB_CLK_L0/MBA_CKC AK30 16 MBA_CKC
OUT
BI
MBB_DATA15 17 BA22 MB_DATA51/MBB_DATA15 MB_CLK_H1/MBB_CKT AK32 17 MBB_CKT
OUT
BI
MBB_DATA12
MBB_DATA13
17
17
BB25
BD25
MB_DATA52/MBB_DATA12
MB_DATA53/MBB_DATA13
MB_CLK_L1/MBB_CKC AL31 17 MBB_CKC
OUT FOR LPDDR4X R9981 R9982 R9983 R9984 R9985 R9986 R9987 R9988
B BI B
BI
MBB_DATA9 17 BB22 MB_DATA54/MBB_DATA9
BI
MBB_DATA8 17 BD22 MB_DATA55/MBB_DATA8
453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2

BI
BI
MBB_DATA5 17 BC21 MB_DATA57/MBB_DATA5 MB_CS_L0/MBB_CA2 AN30 17 MBB_CA2
OUT
R9989 R9990 R9991 R9992 R9993 R9995 R9994 R9996
BI
MBB_DATA2 17 BC18 MB_DATA58/MBB_DATA2 MB_CS_L1/MBB_CA5 AR31 17 MBB_CA5
OUT
BI
BI
BI 453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2
BI
BI
MB_CKE0/MBA_CA1 AC31 16 MBA_CA1

OUT
W30 RSVD_56 MB_CKE1/MBA_CA0 AC29 16 MBA_CA0
OUT
W29 RSVD_55
+V1P1U_VDDQ
AA30 RSVD_65
AB29 RSVD_67
V29 RSVD_50 MB_ODT0/MBB_CA3 AP32 17 MBB_CA3
OUT
V31 RSVD_51 MB_ODT1/MBB_CA4 AR29 17 MBB_CA4
OUT
R899
AA29 RSVD_64
AA31 RSVD_66
change to 453ohm 08/27
MB_ALERT_L/TEST31B AE30 MB_TEST 1 TP317 1K/F_2
AM31 MB_PAROUT/RSVD
MB_EVENT_L AL30
MB_RESET_L AC32 16,17 MB_RESET_L
OUT
FP6 REV 0.92
PART 9 OF 13
Change From +V1P1U_VDDQ_SOC to +V1P1U_VDDQ
20201102-zhiqiang
A A
Page name: RN-DDR4(CHB)
Size: Project REV:

5 4 3 2 1
5 4 3 2 1
D D
FP6
216NOPNFP6
U29B
PCIE
PCIE4_GPU_RX0_DP G13 P_GFX_RXP0 P_GFX_TXP0 F4 PCIE4_GPU_TX0_DP GPU

C1107电容_220nF_0201_X5R_6.3V_M PCIE4_GPU_TX0_C_DP
20 PCIE4_GPU_RX0_DP PCIE4_GPU_RX0_DN F13 F2 PCIE4_GPU_TX0_DN PCIE4_GPU_TX0_C_DN PCIE4_GPU_TX0_C_DP 20
20 PCIE4_GPU_RX0_DN P_GFX_RXN0 P_GFX_TXN0 GPU
C1108电容_220nF_0201_X5R_6.3V_M
PCIE4_GPU_TX0_C_DN 20
PCIE4_GPU_RX1_DP J14 P_GFX_RXP1 P_GFX_TXP1 F3 PCIE4_GPU_TX1_DP GPU
20 PCIE4_GPU_RX1_DP PCIE4_GPU_RX1_DN H14 E4 PCIE4_GPU_TX1_DN PCIE4_GPU_TX1_C_DN PCIE4_GPU_TX1_C_DP 20
20 PCIE4_GPU_RX1_DN P_GFX_RXN1 P_GFX_TXN1 GPU
C1106电容_220nF_0201_X5R_6.3V_M
PCIE4_GPU_TX1_C_DN 20
PCIE4_GPU_RX2_DP G15 E1 PCIE4_GPU_TX2_DP GPU
GPU 20 PCIE4_GPU_RX2_DP PCIE4_GPU_RX2_DN F15
P_GFX_RXP2
P_GFX_RXN2
P_GFX_TXP2
P_GFX_TXN2 C1 PCIE4_GPU_TX2_DN C1104 GPU电容_220nF_0201_X5R_6.3V_M PCIE4_GPU_TX2_C_DN PCIE4_GPU_TX2_C_DP 20 GPU
20 PCIE4_GPU_RX2_DN PCIE4_GPU_TX2_C_DN 20
PCIE4_GPU_RX3_DP J15 P_GFX_RXP3 P_GFX_TXP3 D5 PCIE4_GPU_TX3_DP C1101 GPU电容_220nF_0201_X5R_6.3V_M PCIE4_GPU_TX3_C_DP
20 PCIE4_GPU_RX3_DP PCIE4_GPU_RX3_DN PCIE4_GPU_TX3_DN C1103电容_220nF_0201_X5R_6.3V_M PCIE4_GPU_TX3_C_DN PCIE4_GPU_TX3_C_DP 20
K15 P_GFX_RXN3 P_GFX_TXN3 E6 GPU
20 PCIE4_GPU_RX3_DN PCIE4_GPU_TX3_C_DN 20
H16 P_GFX_RXP4 P_GFX_TXP4 C6
J16 P_GFX_RXN4 P_GFX_TXN4 D6
C F18 P_GFX_RXP5 P_GFX_TXP5 B6 C

G18 P_GFX_RXN5 P_GFX_TXN5 C7
J18 P_GFX_RXP6 P_GFX_TXP6 D8

K18 P_GFX_RXN6 P_GFX_TXN6 B8
H19 P_GFX_RXP7 P_GFX_TXP7 C8

G19 P_GFX_RXN7 P_GFX_TXN7 A8
G11 L3 GPP_M2_TX0_C_DP C103 220nF/6.3V/X5R/M_2

28 GPP_M2_RX0_DP P_GPP_RXP0 P_GPP_TXP0 GPP_M2_TX0_DP 28
F11 L1 GPP_M2_TX0_C_DN C114 220nF/6.3V/X5R/M_2
28 GPP_M2_RX0_DN P_GPP_RXN0 P_GPP_TXN0 GPP_M2_TX0_DN 28
J10 L4 GPP_M2_TX1_C_DP C115 220nF/6.3V/X5R/M_2
28 GPP_M2_RX1_DP P_GPP_RXP1 P_GPP_TXP1 GPP_M2_TX1_DP 28
H10 L2 GPP_M2_TX1_C_DN C116 220nF/6.3V/X5R/M_2
28 GPP_M2_RX1_DN P_GPP_RXN1 P_GPP_TXN1 GPP_M2_TX1_DN 28
G8 M4 GPP_M2_TX2_C_DP C117 220nF/6.3V/X5R/M_2
28 GPP_M2_RX2_DP P_GPP_RXP2/SATA0_RXP P_GPP_TXP2/SATA0_TXP GPP_M2_TX2_DP 28
F8 M2 GPP_M2_TX2_C_DN C118 220nF/6.3V/X5R/M_2 Nvme
28 GPP_M2_RX2_DN P_GPP_RXN2/SATA0_RXN P_GPP_TXN2/SATA0_TXN GPP_M2_TX2_DN 28
G6 N3 GPP_M2_TX3_C_DP C119 220nF/6.3V/X5R/M_2
28 GPP_M2_RX3_DP P_GPP_RXP3/SATA1_RXP P_GPP_TXP3/SATA1_TXP GPP_M2_TX3_DP 28
F7 N1 GPP_M2_TX3_C_DN C120 220nF/6.3V/X5R/M_2
28 GPP_M2_RX3_DN P_GPP_RXN3/SATA1_RXN P_GPP_TXN3/SATA1_TXN GPP_M2_TX3_DN 28
CPU To CAP need >=12.7mm

M9 P_GPP_RXP4 P_GPP_TXP4 T2
M8 P_GPP_RXN4 P_GPP_TXN4 T4
GPP_SD_RX_DP L7 P_GPP_RXP5 P_GPP_TXP5 R1 R0501 0R/J_2 GPP_SD_TX_DP

42 GPP_SD_RX_DP GPP_SD_RX_DN L6 R3 GPP_SD_TX_DN GPP_SD_TX_DP 42
P_GPP_RXN5 P_GPP_TXN5 R0502 0R/J_2
42 GPP_SD_RX_DN GPP_SD_TX_DN 42
K7 P2
K8
P_GPP_RXP6
P_GPP_RXN6
P_GPP_TXP6
P_GPP_TXN6 P4 add 0ohm for TX ,reserve for tx capacity 0827
H6 N2 GPP_WLAN_TX_C_DP C123 100nF/6.3V/X5R/K_2
32 GPP_WLAN_RX_DP P_GPP_RXP7 P_GPP_TXP7 GPP_WLAN_TX_DP 32
H7 N4 GPP_WLAN_TX_C_DN C124 100nF/6.3V/X5R/K_2
32 GPP_WLAN_RX_DN P_GPP_RXN7 P_GPP_TXN7 GPP_WLAN_TX_DN 32
B B
L9 P_GPP_RXP8/SATA2_RXP P_GPP_TXP8/SATA2_TXP K2
L10 P_GPP_RXN8/SATA2_RXN P_GPP_TXN8/SATA2_TXN K4
K11 P_GPP_RXP9/SATA3_RXP P_GPP_TXP9/SATA3_TXP J4

J11 P_GPP_RXN9/SATA3_RXN P_GPP_TXN9/SATA3_TXN J2
J12 P_GPP_RXP10 P_GPP_TXP10 H3

H12 P_GPP_RXN10 P_GPP_TXN10 H1
J13 P_GPP_RXP11 P_GPP_TXP11 H4

K13 P_GPP_RXN11 P_GPP_TXN11 H2
FP6 REV 0.92

PART 2 OF 13
A A
Page name: RN-(GFX/GPP)
Size: Project REV:

5 4 3 2 1
5 4 3 2 1
+V1P8A
+V1P8S +V3P3S
R158 4.7K/J_2 APU_RST# eDP Level Shift
R159 4.7K/J_2 APU_PWROK DP0 lanes to eDP is better for power consumption
FP6 R93
+V3P3S 216NOPNFP6
1
U29C
G
DISPLAY/SVI2/JTAG/TEST 2.2K/J_2
R177 1K/F_2 APU_PROCHOT#_C D11 A22 eDP_BLON_R eDP_PWM_R 2 3
D
30 DP0_TX0_DP DP0_TXP0 DP_BLON
eDP_DIGON_R EDP_BKLT_PWM 31
R179 1K/F_2 30 DP0_TX0_DN B11 DP0_TXN0 DP_DIGON D23 1.8V Level
THERMALTRIP# eDP_PWM_R
DP_VARY_BL C23
R180 1K/F_2 APU_ALERT# Q1 WNM2046C-3/TR
30 DP0_TX1_DP C11 DP0_TXP1
D +V1P8S +V3P3S D
R181 1K/F_2 APU_SID A11 D12
30 DP0_TX1_DN DP0_TXN1 DP0_AUXP
DP0_DDC_SCL 30
DP0_AUXN B12 HDMI
R182 1K/F_2 APU_SIC HDMI DP0_DDC_SDA 30
30 DP0_TX2_DP D10 DP0_TXP2 DP0_HPD C12 DP0_HPD
B10 DP0_HPD 30
30 DP0_TX2_DN DP0_TXN2
DP1_AUXP J20 R94
EDP_AUX_SOC_DP 31
D9 K20
30 DP0_TX3_DP DP0_TXP3 DP1_AUXN
EDP_AUX_SOC_DN 31
1
B9 L21
30 DP0_TX3_DN DP0_TXN3 DP1_HPD
EDP_HPD 31 mount Q3 08/27
R7128
G
G23 L19 10K/J_2
31 EDP_TX0_SOC_DP DP1_TXP0 DP2_AUXP
DP2_AUXP 34 eDP_DIGON_R 2 3
H23 M19
D
31 EDP_TX0_SOC_DN DP1_TXN0 DP2_AUXN
DP2_AUXN 34 EDP_VDD_EN 31
M20 ns
eDP DP2_HPD
DP2_HPD_P0 34
F22
31 EDP_TX1_SOC_DP DP1_TXP1 Q2 WNM2046C-3/TR
31 EDP_TX1_SOC_DN G22 DP1_TXN1 DP3_AUXP M14 100K/J_2
L14 DP3_AUXP 34 ns
DP3_AUXN R92 0R/J_2
G21 DP1_TXP2 DP3_HPD L16
DP3_AUXN 34 ns
DP3_HPD_P1 34
H21 DP1_TXN2 +V3P3S +V3P3S
DP_STEREOSYNC B23 DP_STEREOSYNC
F20 DP1_TXP3
G20 DP1_TXN3
R96
R95
+V3P3S
modify 0328
2.2K/J_2
G
Q6 10K/J_2
S0 POWER DOMAIN L2N7002SLT1G EDP_BKLT_EN 31,33
1
APU_SIC S 2 3D
APU_EC_SCLK 33,38,56
3
Q4
3D
D Q3 CR1
R249 ns 0R/J_2 2N7002 2 2 1 1
BB6 APU_TEST4 1 T20 WNM2046C-3/TR G PLT_RST_N 7,20,28,32,42,43
TEST4 eDP_BLON_R 1 G
BD5 APU_TEST5 1 T21 1
+V3P3S TEST5
2
AG12 TEST6 1 T3115 S
TEST6
2
G
Q7
S
TEST14 G25 APU_TEST14 1 T16
L2N7002SLT1G TEST15 K25 APU_TEST15 1 T17
100K/J_2
1
APU_TEST16 R0601
C APU_SID TEST16 F25 1 T18 C
S 2 3D F26 APU_TEST17 1 T19
APU_EC_SDATA 33,38,56 TEST17
Add 100k PD 08/27
R250 0R/J_2 TEST31 H26 APU_TEST31 1 T22
ns
TEST41 AK9 APU_TEST41 1 T23
T4 1 AP3 TDI ANALOGIO_0 AK21 APU_TEST470 1 T234

43 APU_TDI T5 1 AU1 AG21 APU_TEST471 1 T235
TDO ANALOGIO_1
43 APU_TDO T6 1 AR2 TCK
43 APU_TCK T7 1 AU3 +VDDP
TMS
43 APU_TMS T8 1 AR4 TRST_L
43 APU_TRST# T9 1 AT2 DBREQ_L
43 APU_REQ#
APU_RST# AW3 RESET_L SMU_ZVDD P3 SMU_ZVDD R170 196R/F_2

34,43 APU_RST# APU_PWROK AW4 Power suggest mount R7117 & R7116
PWROK
43,49 APU_PWROK 20201030-zhiqiang
APU_SIC B22 SIC
APU_SID D22 SID
APU_ALERT# C22 ALERT_L VDDP_S5_SENSE AK7 APU_VDDP_S5_SENSE R7117 0R/J_2
APU_VDDP_SENSE APU_VDDP_S5_SEN_H 50
THERMALTRIP# AN9 THERMTRIP_L VDDP_SENSE AK12 1 T10 R7116 0R/J_2 APU_VDDP_SEN_H 50
R178 0R/J_2 APU_PROCHOT#_C B25 PROCHOT_L VDDCR_SOC_SENSE J23 1 T11
33,49 APU_PROCHOT# VDDCR_SOC_VCC_SENSE 49
VDDCR_SENSE K22 1 T12
VDDCR_VCC_SENSE 49
VDDIO_MEM_S3_SENSE J21 0201 R1855
R160 0R/J_2 APU_SVC_R D25 SVC0 1 2
49 APU_SVC APU_SVD_R
0201nsR183
1 2
VDDCR_SOC_VSS_SENSE 49
R161 0R/J_2 C25 SVD0 VSS_SENSE_A J22 VSS_SENSEA 1 0201nsR185
2 1 T14
VDDCR_VSS_SENSE 49
49 APU_SVD
1 2
R162 0R/J_2 APU_SVT_R A25 SVT0 FP6 REV 0.92 VSS_SENSE_B AJ12VSS_SENSEB 1 2 1 T15
49 APU_SVT 1
ns 2
APU_VDDP_S5_SEN_L 50
PART 3 OF 13
+V1P8A SVID RESERVE

B B
+V1P8S
ns ns ns
Boot-VID Code
1K/F_2
1K/F_2
+V1P8S R186
R167
R168
1K/F_2
R169
SVC SVD Boot Voltage 1K/F_2

APU_SVC
APU_SVD
APU_SVT
0 0 1.1V APU_TEST14 R188ns 10K/J_2 DP_STEREOSYNC
0 1 1.0V APU_TEST15 R189ns 10K/J_2

20PF/50V/COG/J_4
20PF/50V/COG/J_4
20PF/50V/COG/J_4
R187
APU_TEST16 R191ns 10K/J_2 ns
1
1
1 0 0.9V
C9941
C245
C246
APU_TEST17 R192ns 10K/J_2

ns ns ns
1 1 0.8V
2
2
1K/F_2
+V3P3A
RU220
A 20K/J_2 A
DU3
46 PROCHOT_SOC_N APU_PROCHOT#
LRB500V-40T1G
RU219 0R/J_2
ns
Page name: RN(DP/DEBUG)
Size: Project REV:

5 4 3 2 1
5 4 3 2 1
Reserve TouchPAD_INT_N Pull up to +V3P3A

RSMRST_L Connected to 10-ms RC-delay circuit on VDD_18_S5 power rail.
PCIE_RST1_L/EGPIO27 will be cleared by every
FP6 supports four SATA ports but only two DEVSLP pins. 20201021
PCIE_RST event regardless of the setting of DEVSLP[0] can be used for SATA Port 0 or2.
corresponding IOMUX registers. It is not recommended to
use this signal as a GPIO unless this condition can be tolerated.
DEVSLP[1] can be used for SATA Port 1 or 3.
+V3P3A
+V1P8A
R132 R1030
ns
FP6 电阻_10K_0201_1/20 W_J(±5%)
+V3P3A 216NOPNFP6
22K/F_2
U29D
RSMRST_C
D D
SFH_IPIO271 AM3 TOUCHPAD_INT_N
R134 AT4
SFH_IPIO272
C159 ACPI/AUDIO/I2C/GPIO/MISC SFH_IPIO273 AM1
SFH_IPIO274 AJ8
1uF/6.3V/X5R/M_2 SFH_IPIO39 AW7
10K/J_2 +V3P3S
6,20,28,32,42,43 PLT_RST_N SFH_IPIO41 AU2 Reserve +V3P3S S0 Power
R97 33R/F_2 PCIE_RST0_R AP6
PCH_GPU_RST_N M_DGPU_HOLD_RST
PCIE_RST0_L/EGPIO26
External PU AGPIO86
R1011 VGA@ 0R/J AT13 AP14
1 1 2 2 RSMRST_C AR8
PCIE_RST1_L/EGPIO27
RSMRST_L
I2C0_SCL/EGPIO145
I2C0_SDA/EGPIO146 AN14 used as SMI--AMD suggest

33 RSMRST_N 20210115-zhiqiang
CR2 R133 ns 0R/J_2
PWR_BTN#_C AT12 AP2 R2905
+V3P3A +V3P3S 33 PM_PWRBTN_R_N
PWR_BTN_L/AGPIO0 I2C1_SCL/EGPIO147
1 1 2 2 SYS_PWRGD AW2 PWR_GOOD I2C1_SDA/EGPIO148 AN3 100K/J_2
13 SYS_RST# CR3 AL2 SYS_RESET_L/AGPIO1
ns
R86 ns 0R/J_2 PCIE_WAKE_R AW12 WAKE_L/AGPIO2 I2C2_SCL/EGPIO113/SMBUS0_I2C_SCL AN12
28 PCIE_SSD_WAKE_N
R87 R262 R91 0R/J_2 I2C2_SDA/EGPIO114/SMBUS0_I2C_SDA AP12
9,32 WLAN_WAKE_N SLP_S3# EC_SMI_N
R609 0R/J_2 AT11 SLP_S3_L
42 SD_WAKE_N SLP_S5# AV11 AM9
ns 33,48 SLP_S5#
SLP_S5_L I2C3_SCL/AGPIO19/SMBUS1_I2C_SCL
I2C_TP_SOC_CLK 41
I2C3_SDA/AGPIO20/SMBUS1_I2C_SDA AM10 I2C_TP_SOC_SDA 41
10K/J_2 10K/J_2 S0A3_S0I2 AW13 S0A3_GPIO/AGPIO10
SFH1_SCL D24 +V3P3A

SYS_PWRGD BA8 AC_PRES/AGPIO23 SFH1_SDA B24
33,34 PM_AC_PRESENT AV6
PCIE_WAKE_R 33 PM_BATLOW_N
LLB_L/AGPIO12
PLT_RST_N VGA@
AGPIO3 BB7 M_DGPU_PWR_EN R0731 0R/J_2 GPU_PWREN
AW8 EGPIO42 AGPIO4/SATAE_IFDET BA6 R1009
42 V3P3IN_SD_EN SSD1_DET 28
C131
ns 电阻_10K_0201_1/20 W_J(±5%)
1
AGPIO5/DEVSLP0 AK10
电容_150pF_0201_X7R_50 V_K(±10%) AGPIO6/DEVSLP1 BC6 SATA1_DEVSLP 28
SATA_ACT_L/AGPIO130 AW15
T3130 TOUCHPAD_INT_N 41 GPU_PWREN 9,20
ns AG6 AU4
AGPIO40_RST_N 28
ACP_WOV_CLK/ACP_IPIO28 AGPIO9
42 PCH_DMIC1_CLK0
AG7 ACP_WOV_MIC0_MIC1_DATA/ACP_IPIO29 AGPIO40 AP7 ns
42 PCH_DMIC1_DATA0 AJ6 ACP_WOV_MIC2_MIC3_DATA/ACP_IPIO30 AGPIO69 AV13 T_DGPU_HOLD_RST R0733 0R/J_2 PCH_GPU_RST_N R1012
AGPIO86/SPI_CLK2 BB12 SMI 1 2 ns 电阻_10K_0201_1/20 W_J(±5%)
HDA_BCLK_R R98 33R/F_2 HDA_BCLK_R AN6 AZ_BITCLK/TDM_BCLK_MIC
1
ns 2
EC_SMI_N 33
42 HDA_BCLK HDA_SDI_R
R99 0R/J_2 AL6 AZ_SDIN0/CODEC_GPI 0201 R190
HDA_SDI_R 42 HDA_SDI T26
T37
ns1 AM7 AZ_SDIN1/SW_DATA1B/TDM_BCLK_PLAYBACK INTRUDER_ALERT AU7 1 ns MS+GC6
C AJ9 AZ_SDIN2/SW_DATA2/TDM_DATA_PLAYBACK/ACP_WOV_MIC4_MIC5_DATA SPKR/AGPIO91 AR11 BOARD ID0 Umount R0732 for GC6_FB_EN to CPU C
R100 33R/F_2 HDA_RST_N_R AM6 AZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MIC BLINK/AGPIO11 AW11 BOARD ID2 20201128-zhiqiang
42 HDA_RST_N HDA_SYNC_R AN8
R101 33R/F_2 ns
33pF/25V/C0G/J_2
33pF/25V/C0G/J_2
AZ_SYNC/TDM_FRM_MIC
42 HDA_SYNC HDA_SDO_R AK6
R102 33R/F_2 AZ_SDOUT/TDM_FRM_PLAYBACK GENINT1_L/AGPIO89 AV15 B_GC6_FB_EN R0732 0R/J_2
42 HDA_SDO FB_GC6_EN_R 20 +V3P3S
GENINT2_L/AGPIO90 AU14
GPU_EVENT_N 20
C132
C133
AM4 SW_MCLK/TDM_BCLK_BT
AL3
C3285
C3286
C3287
C3288
C3289
SW_DATA0/TDM_DOUT_BT
AM2 AGPIO7/FCH_ACP_I2S_SDIN_BT FANIN0/AGPIO84 AT10 M_DGPU_PWROK R0730 0R/J_2
GPU_PWROK 8,20
BOARD ID4 AL4 AGPIO8/FCH_ACP_I2S_LRCLK_BT FANOUT0/AGPIO85 AU10 BOARD ID1
FP6 REV 0.92 VGA@ VGA@
R2902
ns ns PART 4 OF 13 10K/J_2
33pF/25V/C0G/J_2
33pF/25V/C0G/J_2
33pF/25V/C0G/J_2
33pF/25V/C0G/J_2
33pF/25V/C0G/J_2
Change AGPIO31 to AGPIO84 For NC SMT
HDA_RST_N_R 20201119-zhiqiang
HDA_SYNC_R PCH_GPU_RST_N 20
+V3P3A +V3P3A
Reserve For MS C1001
33pF/25V/C0G/J_2
33pF/25V/C0G/J_2
R2903 VGA@
ns 100K/J_2 电容_10nF_0201_X5R_25 V_K(±10%)
R261
C134
C135
U10
74LVC1G08GW
1 2.2K/J_2 S0A3_S0I2
ns ns 5 B
ns
VCC 2 ns SLP_S3#
4 A
HDA_SDO_R 31,33,50,52 SLP_S3_S0A3#
R135 0R/J_2
Y
ns
3
SYS_PWRGD GND
33pF/25V/C0G/J_2
R7101 SLP_S3_S0A3# R246 0R/J_2 SLP_S3#

C136
100K/J_2
SLP_S3_S0A3# 1 1 2 2 SYS_PWRGD
B CR4 ns B
ns
1 1 2 2
33 SYS_PWROK
CR5 ns
0201 R297
1 2
1
ns 2
Board ID
LPDDR4X ID0 ID1ID2ID3 ID4
ID0ID1ID2
+V3P3A +V3P3A
Micron 8GB 00 0 +V3P3S
Hynix 8GB 010
Hynix 16GB R196 R198 R200 R204

001
Reserve SYS_RST# ns
Micron 16GB 011
10K/J_2 10K/J_2 10K/J_2 10K/J_2
xx 100 BOARD ID0
1
BOARD ID1 ns ns ns
JUMP1 xx BOARD ID2
ns 001
BOARD ID4
2
xx 001
xx 001
R197 R199 R201 R205
A ns A
10K/J_2 10K/J_2 10K/J_2 10K/J_2
xx 1
xx 0
Page name: RN(AUDIO/GPIO/MIS)
Size: Project REV:

5 4 3 2 1
5 4 3 2 1
C272 15pF/25V/C0G/J_2 48M_OCS

R245 ns 33R/F_2
D D
ns
R7089 10K/J_2 LPC_CLKRUN_N
+V3P3S +V3P3S
R9999 10K/J_2
LPC_AD3_ESPI_IO_3
R9998 10K/J_2 FP6
216NOPNFP6
R9997 10K/J_2 U29E
C9935 R7084
R801 10K/J_2 CLK/LPC/EMMC/SD/SPI/eSPI/UART
电容_150pF_0201_X7R_50 V_K(±10%)
100K/J_2
AR13 CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92
28 PCIE_SSD_CLKREQ0 AP10 CLK_REQ1_L/AGPIO115
20 PCIE_GPU_CLKREQ1 AR15 CLK_REQ2_L/AGPIO116
AT14 CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131
32 PCIE_WLAN_CLKREQ3 AN11 LPC_CLK_ESPI_CLK
CLK_REQ4_L/OSCIN/EGPIO132
42 PCIE_SD_CLKREQ4 1 AN13 CLK_REQ5_L/EGPIO120
T3121
1 AN15 CLK_REQ6_L/EGPIO121 LPC_CLK0_R
T3122
22pF/25V/C0G/J_2
EGPIO70 AW14
BB13 CU217
CU218
LPC_PD_L/AGPIO21
GPP_SSD_CLK0_R_DP AF11 BA16 LPC_LAD0 EC_LPC_PD# 33
28 GPP_SSD_CLK0_DP R83 0R/J_2 GPP_CLK0P LAD0/ESPI1_DATA0/EGPIO104 R120 10R/F_2
LPC_AD0_ESPI_IO_0 33,43 ns
R84 0R/J_2 GPP_SSD_CLK0_R_DN AF12 GPP_CLK0N LAD1/ESPI1_DATA1/EGPIO105 BA15 LPC_LAD1 R104 10R/F_2
28 GPP_SSD_CLK0_DN LPC_LAD2 LPC_AD1_ESPI_IO_1 33,43
LAD2/ESPI1_DATA2/EGPIO106 BC13 R105 10R/F_2 电容_12pF_0201_C0G_25V_J
GPP_GPU_CLK1_R_DP AG4 BB14 LPC_LAD3 LPC_AD2_ESPI_IO_2 33,43
20 GPP_GPU_CLK1_DP R99692 0R/J_2 GPP_CLK1P LAD3/ESPI1_DATA3/EGPIO107 R106 10R/F_2
GPP_GPU_CLK1_R_DN AG2 BB15 LPC_CLK0_R LPC_AD3_ESPI_IO_3 33,43
20 GPP_GPU_CLK1_DN R99693 0R/J_2 GPP_CLK1N LPCCLK0/EGPIO74 R109 22R/F_2 LPC_CLK_ESPI_CLK 33
LPC_CLKRUN_L/AGPIO88 BD13
LPC_CLK1_R LPC_CLKRUN_N 33
AG3 GPP_CLK2P LPCCLK1/EGPIO75 BA12 R108 22R/F_2 LPC_CLK_PRT80 43
AG1 GPP_CLK2N SERIRQ/AGPIO87 BC15
BA13 LPC_SERIRQ 33
LFRAME_L/EGPIO109
C GPP_WLAN_CLK3_R_DP AF2 LPC_FRAME_N_ESPI_CSB 8,33,43 C
32 GPP_WLAN_CLK3_DP R89 0R/J_2 GPP_CLK3P
R90 0R/J_2 GPP_WLAN_CLK3_R_DN AF4 GPP_CLK3N LPC_RST_L/AGPIO32 BC12 R103 33R/F_2

32 GPP_WLAN_CLK3_DN LPC_RESET 33,43
R9963 0R/J_2 GPP_REFCLK_SD_R_DPAH2
AGPIO68 AU12
AP4
GPU
42 GPP_REFCLK_SD_DP GPP_CLK4P LPC_PME_L/AGPIO22
SMC_RUNTIME_SOC_SCI_N 33 +V3P3S +V3P3S
R9964 0R/J_2 GPP_REFCLK_SD_R_DNAH4 GPP_CLK4N
42 GPP_REFCLK_SD_DN
C273
AJ2
电容_150pF_0201_X7R_50 V_K(±10%
GPP_CLK5P
AJ4 GPP_CLK5N SPI_ROM_REQ/EGPIO67 BA11 SPI_ROM_REQ 1 T33
BB11 SPI_ROM_GNT 1 T34 R263 R7025
SPI_ROM_GNT/EGPIO76
AF8 GPP_CLK6P/WIFIBT_CLKP
Add 3rd Source AF9 GPP_CLK6N/WIFIBT_CLKN ESPI_RESET_L/KBRST_L/AGPIO129 AT15

BC11 EGPIO108 EC_KBRST# 33
1pF/50V/C0G_2 20201102-zhiqiang ESPI_ALERT_L/LDRQ0_L/EGPIO108 This signal must remain at a logic high through the boot process. 10K/J_2 10K/J_2
C139 48M_OCS AK1 X48M_OSC
R7027 33R/F_2 BC10 SPI_CLK APU_FLASH_SPI_CLK 3V3 LEVEL
SPI_CLK/ESPI_CLK R110 10R/F_2
SPI_DI/ESPI_DATA BA10 EC_KBRST#
R122 FLASH_SPI_MISO 27
1
Y2 BB3 X48M_X1 SPI_DO BB8

FLASH_SPI_MOSI 27 EGPIO108
2 4 1M/F_4 SPI_WP_L/ESPI_DAT2 BA9
FLASH_SPI_WP 27
SPI_HOLD_L/ESPI_DAT3 BC8
FLASH_SPI_Hold 27
48M SPI_CS1_L BD11
FLASH_SPI_CS0_N 27
3
C140 1pF/50V/C0G_2 BA5 BC9 SPI_CS2 1 T29

R7026 33R/F_2
X48M_X2 SPI_CS2_L/ESPI_CS_L/AGPIO30
ns
BB10 R5507 0R/J_2
SPI_CS3_L/AGPIO31
Need internal PD if NC LPC_FRAME_N_ESPI_CSB 8,33,43
SPI_TPM_CS_L/AGPIO29 BD8 +V3P3S
32 SUS_CLK_WLAN R121ns 0R/J_2
AG10 RSVD_71 ns
C137电容_3.9pF_C0G_50 V_C AG9 R7110 APU_FLASH_SPI_CLK 0R/J_2 R7132
RSVD_70 R7111 FLASH_SPI_CLK 13,27
SUS_CLK_WLAN_C AW10 RTCCLK

10K/J_2 10K/J_2
1
R116 XTAL_32K_SOC_IN AY1 BA17 UART0_RX 1 T31

X32K_X1 EGPIO141/UART0_RXD
B 32.768k EGPIO143/UART0_TXD BC16 UART0_TX 1 T32 B
EGPIO142/UART0_RTS_L/UART1_RXD BD15 UART1_TX 1 T3120
Y1 BC17
EGPIO140/UART0_CTS_L/UART1_TXD
20M_J_4 XTAL_32K_SOC_OUT AY4 X32K_X2 AGPIO144/SHUTDOWN_L/UART0_INTR BB16 U9710

2
V3P3A_EN_EC_N 6 1
FP6 REV 0.92
SEL B1
5 2
C138电容_3.9pF_C0G_50 V_C
PART 5 OF 13 +V3P3A_SPI
VCC GND
FLASH_SPI_CLK 4 3 APU_FLASH_SPI_CLK
A B0
+V3P3A WAS3157B-6/TR
+V3P3A_SPI IC
Add 2nd source
20201102-zhiqiang
FLASH_SPI_CLK LPC_FRAME_N_ESPI_CSB LPC_RESET
ESPI R7114 1 2 0R/J_6
SEL LOW B0 connected to A

SEL HIGH B1 connected to A
2 3
D
S
RU44 RU45 RU46
100nF/6.3V/X5R/K_2
100nF/6.3V/X5R/K_2
ns
1 G
100K/J_2 75K/F_2 75K/F_2 PPMT20V3
QW3103
CW2109
CW2108
ns +V3P3A
ns ns R7113
R7115 0R/J_2 V3P3A_EN_EC_N
33 V3P3A_EN_EC
ns ns 100K/J_2
A A
Page name: RN(CLK/SPI/LPC/GPIO)
Size: Project REV:

5 4 3 2 1
5 4 3 2 1
AGPIO pins that are capable of interrupt and wake input function.
FP6
216NOPNFP6
U29L
MS+GC6
Reserve AGPIO 269、270、271 for GPU GPIO
20201128-zhiqiang
WiFi
D
CHECK GPIO function N7
R7
AGPIO256/WIFIBT_BT_DATA
AGPIO257/WIFIBT_BT_VALID
EGPIO267/RFIC_SPI_CLK
EGPIO268/RFIC_SPI_SS
P8
R9 D
N6 AGPIO258/WIFIBT_BT_SYNC AGPIO269/RFIC_SPI_DATA R6 B_DGPU_PWR_EN R296 ns 0R/J_2
T6 GPU_PWREN 20
AGPIO259/WIFIBT_BT_CLK
R10 AGPIO260/WIFIBT_QSPI_DATA0 AGPIO270/WIFIBT_RFIC_WAKEUP P9 B_DGPU_RST#_APU R298 ns 0R/J_2

T12 T9 B_DGPU_PWROK PCH_GPU_RST_N 20
AGPIO261/WIFIBT_QSPI_DATA1 EGPIO271/WIFIBT_BUCKEN R299 ns 0R/J_2
GPU_PWROK 8,20
P12 AGPIO262/WIFIBT_QSPI_DATA2 EGPIO266/WIFIBT_FLOW T8
P11 AGPIO263/WIFIBT_QSPI_DATA3
T11 AGPIO264/WIFIBT_QSPI_CLK
P6 AGPIO265/WIFIBT_QSPI_SS
WIFIBT_DATA_RXP V7
WIFIBT_DATA_RXN V6
WIFIBT_DATA_TXP V9
WIFIBT_DATA_TXN V10
FP6 REV 0.92

PART 12 OF 13
C C
216NOPNFP6
FP6
U29J
USB
AC6 USBC0_DP/USB0_DP USBC0_TX1P/USB0_TXP/DP2_TXP2 AA1

35 USBC0_DP_USB0_DP USBC0_DP2_TXP2_DP 35
TYPE-C 35 USBC0_DN_USB0_DN
AC7 USBC0_DN/USB0_DN USBC0_TX1N/USB0_TXN/DP2_TXN2 AA3
USBC0_DP2_TXN2_DN 35
AA8 USB1_DP USBC0_RX1P/USB0_RXP/DP2_TXP3 AA2
USBC0_DP2_TXP3_DP 35
AA9 USB1_DN USBC0_RX1N/USB0_RXN/DP2_TXN3 AA4
USBC0_DP2_TXN3_DN 35 USB3 PORT 0
42 USB2_P2_CAM_DP
Y10 USB2_DP USBC0_TX2P/DP2_TXP1 AC2
USBC0_DP2_TXP1_DP 35 Type C
CAM 42 USB2_P2_CAM_DN
Y9 USB2_DN USBC0_TX2N/DP2_TXN1 AC4
Y7 USB3_DP USBC0_RX2P/DP2_TXP0 AC1
32 USB2_BT_P3_DP USBC0_DP2_TXP0_DP 35
BT 32 USB2_BT_P3_DN
Y6 USB3_DN USBC0_RX2N/DP2_TXN0 AC3
USB1_TXP AE1
B USB1_TXN AE3 B
36 USBC4_DP_USB4_DP
AC9 USBC4_DP/USB4_DP
TYPE-C 36 USBC4_DN_USB4_DN
AC10 USBC4_DN/USB4_DN USB1_RXP AD8
USB1_RXN AD9
AA11 USB5_DP
42 USB2_P5_DP
Type A DB 42 USB2_P5_DN
AA12 USB5_DN
W8 USB6_DP
W9 USB6_DN USBC4_TX1P/USB4_TXP/DP3_TXP2 V3
USBC4_TX1N/USB4_TXN/DP3_TXN2 V1
W11 USB7_DP
W12 USB7_DN USBC4_RX1P/USB4_RXP/DP3_TXP3 U4
USBC4_RX1N/USB4_RXN/DP3_TXN3 U2
USBC4_DP3_TXN3_DN 36 USB3 PORT 4
34 USBC_I2C_SCL
AL9 USBC_I2C_SCL USBC4_TX2P/DP3_TXP1 W2 USBC4_DP3_TXP1_DP 36 Type C
PD TO SOC AL8
USBC4_TX2N/DP3_TXN1 W4
USBC_I2C_SDA
34 USBC_I2C_SDA
USBC4_RX2P/DP3_TXP0 W1 USBC4_DP3_TXP0_DP 36
USBC4_RX2N/DP3_TXN0 W3
32 PCH_WLAN_OFF_N AE9 USB_OC0_L/AGPIO16
32 BT_RF_KILL_N AE10 USB_OC1_L/AGPIO17 USB5_TXP AD2

USB3_P5_TX_DP 42
R295 ns 0R/J_2 AE6 USB_OC2_L/AGPIO18 USB5_TXN AD4
7,32 WLAN_WAKE_N USB3_P5_TX_DN 42 USB3 PORT 5
AE7 USB_OC3_L/AGPIO24
34 USB_OCP_ALL#
USB5_RXP AD12
USB3_P5_RX_DP 42 Type A DB
USB5_RXN AD11
A USB3_P5_RX_DN 42 A
ns Huaqin Telecom Technology Com.,Ltd.

+V3P3A R33151 10K/J_2 FP6 REV 0.92
PART 10 OF 13 Page name: RN-(USB/WIFI)
R33153 10K/J_2
Size: Project REV:
If USB ports are not powered in S4/S5 states,
provided a diode between APU and overcurrent circuit or Date: Sheet: of
use external pull-ups to +3.3 V (S3 domain if only S3 USB Friday, February 05, 2021 64
wake supported or S0 Domain if USB wake not supported).
5 4 3 2 1
5 4 3 2 1
D D
FP6
216NOPNFP6
U29M
CAMERAS
D21 CAM0_CSI2_CLOCKP CAM0_CLK A18

A20 CAM0_CSI2_CLOCKN
CAM0_I2C_SCL C18
D18 CAM0_CSI2_DATAP0 CAM0_I2C_SDA B17
B18 CAM0_CSI2_DATAN0
CAM0_SHUTDOWN D17
C19 CAM0_CSI2_DATAP1
D20 CAM0_CSI2_DATAN1
C C
C15 CAM1_CSI2_CLOCKP CAM1_CLK A13

A15 CAM1_CSI2_CLOCKN
CAM1_I2C_SCL B13
D16 CAM1_CSI2_DATAP0 CAM1_I2C_SDA D13
CAM1_SHUTDOWN C14
D15 CAM1_CSI2_DATAP1
B15 CAM1_CSI2_DATAN1 CAM_PRIV_LED C16
CAM_IR_ILLU C13
FP6 REV 0.92
PART 13 OF 13
B B
A A
Page name: RN(CAMERA)
Size: Project REV:

5 4 3 2 1
5 4 3 2 1
+VDDCR_SOC U29F +VDDCR_VDD
+APU_VDD3_S5 POWER
+VDDCR_VDD AMD CPU statdust test 换47UF
+V3P3A +APU_VDD18 +V1P8S +VDDIO_VPH +V1P8S N16 VDDCR_SOC_1 VDDCR_1 G7
short0805 R7069 0603
N18 VDDCR_SOC_2 VDDCR_2 G10
1 R265 0402 2 1R268 2 1 2 N20 VDDCR_SOC_3 VDDCR_3 G12
1
ns 2
ns 1A 1
ns 2
2.5A P17 VDDCR_SOC_4 VDDCR_4 G14
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
47uF/6.3V/X5R/M_6
47uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
TDC:13A P19
R18
VDDCR_SOC_5
VDDCR_SOC_6
VDDCR_5
VDDCR_6
H8
H11
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
R20 H15
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
VDDCR_SOC_7 VDDCR_7
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
C192
C193
C194
C195
C196
C197
C198
C199
C200
C201
C202
C203
C204
T19 VDDCR_SOC_8 VDDCR_8 K6
U18 VDDCR_SOC_9
FP6
VDDCR_9 K12
C172
C173
C174
C166
C167
C168
C9912
C9913
C9914
U20 VDDCR_SOC_10 216NOPNFP6 VDDCR_10 K14
V19 VDDCR_SOC_11 VDDCR_11 L8
D W18 VDDCR_SOC_12 VDDCR_12 M7 D
W20 VDDCR_SOC_13 VDDCR_13 M10
+V1P1U_VDDQ Y19 VDDCR_SOC_14 VDDCR_14 N14
BO BU BO BU BO BU VDDCR_15 P7
P10
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
VDDCR_16
CU214电容_12pF_0201_C0G_25V_J
CU215电容_12pF_0201_C0G_25V_J
180pF/50V/X7R/K_2
VDDCR_17 P13
6A AC20
VDDCR_18 P15
R8
C9921
C9922
C9923
C9924
C9926
C9927
C9928
C212
C213
C214
C216
C9925
VDDIO_MEM_S3_1 VDDCR_19
AC28 VDDIO_MEM_S3_2 VDDCR_20 R14
+VCCRTC AD23 VDDIO_MEM_S3_3 VDDCR_21 R16
+VDDP_S5 +APU_VDD3 +V3P3S AD26 VDDIO_MEM_S3_4 VDDCR_22 T7
1 R264 0402 2 AD28 T10
Change From
1
ns 2
AD32 VDDIO_MEM_S3_6 VDDCR_24 T13
+V1P1U_VDDQ_SOC to AE20 T15
220nF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
AE22 T17
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
+V1P1U_VDDQ
22uF/6.3V/X5R/M_6
AE25 U14
C190
C191
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
1uF/6.3V/X5R/M_2
20201102-zhiqiang
1uF/6.3V/X5R/M_2
AE28 U16
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
C9929
C9930
AF23 V13
C9931
C9932
C9934
C9933
AF26 V15
C163
C164
C165
C175
C176
C177
C178
AF28 VDDIO_MEM_S3_13 VDDCR_31 V17
AF32 VDDIO_MEM_S3_14 VDDCR_32 W7
AG20 VDDIO_MEM_S3_15 VDDCR_33 W10
AG22 VDDIO_MEM_S3_16 VDDCR_34 W14
AG25 W16
BO BU BO BU AG28
VDDIO_MEM_S3_17
VDDIO_MEM_S3_18
VDDCR_35
VDDCR_36 Y8
AJ20 VDDIO_MEM_S3_19 VDDCR_37 Y13
AJ23 Y15
All BU
AJ26 VDDIO_MEM_S3_21 VDDCR_39 Y17
AJ28 VDDIO_MEM_S3_22 VDDCR_40 AA7
+APU_VDD18_S5 +V1P8A AJ32 VDDIO_MEM_S3_23 VDDCR_41 AA10
+VDDIO_AUDIO +V1P8A AK22 VDDIO_MEM_S3_24 VDDCR_42 AA14
1 R267 06032
1A 1
ns 2
AK25 VDDIO_MEM_S3_25 VDDCR_43 AA16
1 R239 0402 2 AK28 VDDIO_MEM_S3_26 VDDCR_44 AA18
1
ns 2
AL23 VDDIO_MEM_S3_27 VDDCR_45 AB13

AL26 AB15
22uF/6.3V/X5R/M_6
1uF/6.3V/X5R/M_2
AL28 AB17
1uF/6.3V/X5R/M_2
22uF/6.3V/X5R/M_6
AL32 AB19
1uF/6.3V/X5R/M_2
AM22 AC14
C169
C170
C171
C C
AM25 AC16
C161
C162
AM28 VDDIO_MEM_S3_33 VDDCR_51 AC18
AN28 VDDIO_MEM_S3_34 VDDCR_52 AD7
AN32 VDDIO_MEM_S3_35 VDDCR_53 AD10
AP28 AD13
BO
BU AR32 VDDIO_MEM_S3_37 VDDCR_55 AD15

AD17
1A
VDDCR_56
CU212电容_12pF_0201_C0G_25V_J
CU213电容_12pF_0201_C0G_25V_J
+VDDIO_VPH AC21 VDDIO_VPH_1 VDDCR_57 AD19
AD21 VDDIO_VPH_2 VDDCR_58 AE8
AE14
0.2A
VDDCR_59
+VDDIO_AUDIO AP9 VDDIO_AUDIO VDDCR_60 AE16
AE18
0.25A
VDDCR_61
+APU_VDD3 AL18 AF7
+VDDP VDD_33_1 VDDCR_62
AM17 VDD_33_2 VDDCR_63 AF10
AF13
2.5A
VDDCR_64
+APU_VDD18 AL20 VDD_18_1 VDDCR_65 AF15
AM19 VDD_18_2 VDDCR_66 AF17
AF19
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
1A
VDDCR_67
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
180pF/50V/X7R/K_2
+APU_VDD18_S5 AL19 VDD_18_S5_1 VDDCR_68 AG14
AM18 VDD_18_S5_2 VDDCR_69 AG16
AG18
C179
C183
C180
C181
C182
C184
C185
C186
C187
C188
C189
0.25A
VDDCR_70
+APU_VDD3_S5 AL17 VDD_33_S5_1 VDDCR_71 AH13
AM16 VDD_33_S5_2 VDDCR_72 AH15
+VDDP_S5 2A AL11 VDDP_S5_1

VDDCR_73
VDDCR_74
AH17
AH19
AL12 VDDP_S5_2 VDDCR_75 AJ7
BO BU AM12 VDDP_S5_3 VDDCR_76 AJ10
AJ14
2A
VDDCR_77
+VDDP M15 VDDP_1 VDDCR_78 AJ16
M16 VDDP_2 VDDCR_79 AJ18
M18 VDDP_3 VDDCR_80 AK13
VDDCR_81 AK15
VDDCR_82 AK17
+VDDCR_SOC AMD CPU statdust test 换47UF VDDCR_83 AK19
AJ11 VDDBT_RTC_G
FP6 REV 0.92

B PART 6 OF 13 B
47uF/6.3V/X5R/M_6
47uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
47uF/6.3V/X5R/M_6
47uF/6.3V/X5R/M_6
47uF/6.3V/X5R/M_6
47uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
47uF/6.3V/X5R/M_6
180pF/50V/X7R/K_2
1uF/6.3V/X5R/M_2
+VCCRTC
C9920
C217
C9919
C9915
C9916
C9918
C9917
C205
C206
C207
C208
C209
C210
C215
C211
R176 1K/F_2
1
JUMP2
40 RTC_RST_N
Power suggest Ummount C205 & C9917 for CD ns
2
20201030-zhiqiang
All BU
+V1P1U_VDDQ
Change From
+V1P1U_VDDQ_SOC to
+V1P1U_VDDQ
20201102-zhiqiang
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
10uF/6.3V/X5R/M_4
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
180pF/50V/X7R/K_2
10uF/6.3V/X5R/M_4
10uF/6.3V/X5R/M_4
10uF/6.3V/X5R/M_4
电容_12pF_0201_C0G_25V_J
电容_12pF_0201_C0G_25V_J
电容_12pF_0201_C0G_25V_J
电容_12pF_0201_C0G_25V_J
电容_2.2pF_0201_C0G_50V_C 电容_2.2pF_0201_C0G_50V_C
C218 C221 C223 C224
C220
C222
C227
C228
C229
C225
C226
C219
+V1P1U_VDDQ
CU172 CU173 CU176 CU177 CU180 CU181 CU184 CU185

220nF/6.3V/X5R/M_2
220nF/6.3V/X5R/M_2
220nF/6.3V/X5R/M_2
220nF/6.3V/X5R/M_2
10uF/6.3V/X5R/M_4
10uF/6.3V/X5R/M_4
180pF/50V/X7R/K_2
180pF/50V/X7R/K_2
电容_12pF_0201_C0G_25V_J
电容_12pF_0201_C0G_25V_J
电容_12pF_0201_C0G_25V_J
电容_12pF_0201_C0G_25V_J
A C335 C336 A
C234
C235
C231
C230
C232
C233
All BU CU174 CU175 CU178 CU179 CU182 CU183 CU186 CU187
For VDDIO_MEM_S3 Split

RF required Page name: RN(PWR)
Size: Project REV:

5 4 3 2 1
5 4 3 2 1
FP6 FP6 FP6
216NOPNFP6 216NOPNFP6 216NOPNFP6
U29G U29K U29H
GND GND/RSVD GND

AM20 VSS VSS K28 AR14 VSS_246 VSS_305 BD19 V5 VSS VSS AE13
A3 VSS VSS K32 AR16 VSS_247 VSS_306 BD21 V8 VSS VSS AE15
A5 VSS VSS L5 AR19 VSS_248 VSS_307 BD23 V11 VSS VSS AE17
A7 VSS VSS L13 AR21 VSS_249 VSS_308 BD26 V14 VSS VSS AE19
A10 VSS VSS L15 AR26 VSS_250 VSS_309 BD30 V16 VSS VSS AF1
D A12
A14
A16
VSS
VSS
VSS
VSS
L18
L20
L25
AR28
AT23
AU5
VSS_251
VSS_252
V18
V20
V22
VSS
VSS
VSS
VSS
AF3
AF5
AF14
D
VSS VSS VSS_253 VSS VSS
A19 VSS VSS L28 AU8 VSS_254 V25 VSS VSS AF16
A21 VSS VSS M1 AU11 VSS_255 V28 VSS VSS AF18
A23 VSS VSS M3 AU13 VSS_256 W5 VSS VSS AF20
A26 VSS VSS M5 AU15 VSS_257 W13 VSS VSS AG5
A30 VSS VSS M21 AU18 VSS_258 RSVD_46 AV8 W15 VSS VSS AG8
C3 VSS VSS M23 AU20 VSS_259 RSVD_47 BD18 W17 VSS VSS AG11
C10 VSS VSS M26 AU22 VSS_260 RSVD_45 AV3 W19 VSS VSS AG13
C32 VSS VSS M28 AU25 VSS_261 RSVD_44 AU6 W23 VSS VSS AG15
E7 VSS VSS M32 AU28 VSS_262 RSVD_43 AR6 W26 VSS VSS AG17
E8 VSS VSS N5 AV1 VSS_263 RSVD_42 AR3 W28 VSS VSS AG19
E10 VSS VSS N8 AV5 VSS_264 RSVD_41 AP1 W32 VSS VSS AH14
E11 VSS VSS N11 AV7 VSS_265 RSVD_40 AN16 Y1 VSS VSS AH16
E14 VSS VSS N17 AV14 VSS_268 RSVD_37 AM14 Y11 VSS VSS AJ1
E15 VSS VSS N22 AV16 VSS_269 RSVD_36 AM13 Y14 VSS VSS AJ3
E16 VSS VSS N25 AV19 VSS_270 RSVD_35 AL29 Y16 VSS VSS AJ5
E18 VSS VSS N28 AV21 VSS_271 RSVD_34 AL15 Y18 VSS VSS AJ13
E19 VSS VSS P1 AV23 VSS_272 RSVD_33 AL14 Y20 VSS VSS AJ15
E20 VSS VSS P5 AV26 VSS_273 RSVD_32 AL13 Y22 VSS VSS AJ17
E21 VSS VSS P14 AV28 VSS_274 RSVD_31 AK3 Y25 VSS VSS AJ19
E22 VSS VSS P16 AV32 VSS_275 RSVD_30 AJ29 Y28 VSS VSS AK5
E23 VSS VSS P18 AW5 VSS_276 RSVD_29 AJ27 AA5 VSS VSS AK8
E25 VSS VSS P20 AW28 VSS_277 RSVD_28 AF6 AA13 VSS VSS AK11
E26 VSS VSS P23 AY6 VSS_278 RSVD_27 AE12 AA15 VSS VSS AK14
E27 VSS VSS P26 AY7 VSS_279 RSVD_26 AD6 AA17 VSS VSS AK16
C F5
F19
F21
VSS
VSS
VSS
VSS
VSS
VSS
P28
P32
R5
AY8
AY10
AY11
VSS_280
VSS_281
VSS_282
RSVD_25
RSVD_24
RSVD_23
AD3
AC30
AC12
AA19
AA23
AA26
VSS
VSS
VSS
VSS
VSS
VSS
AK18
AK20
AL1
C
F23 VSS VSS R11 AY12 VSS_283 RSVD_22 AB31 AA28 VSS VSS AL5
F28 VSS VSS R13 AY13 VSS_284 RSVD_21 AA20 AA32 VSS VSS AL7
G1 VSS VSS R15 AY14 VSS_285 RSVD_20 AA6 AB2 VSS VSS AL10
G3 VSS VSS R17 AY15 VSS_286 RSVD_19 Y12 AB4 VSS VSS AL16
G5 VSS VSS R19 AY16 VSS_287 RSVD_18 W6 AB14 VSS VSS AM5
G16 VSS VSS R22 AY18 VSS_288 RSVD_17 V12 AB16 VSS VSS AM8
G26 VSS VSS R25 AY19 VSS_289 RSVD_16 R12 AB18 VSS VSS AM11
G28 VSS VSS R28 AY20 VSS_290 RSVD_15 N19 AB20 VSS VSS AM15
G32 VSS VSS T1 AY21 VSS_291 RSVD_14 N12 AC5 VSS VSS AN1
H5 VSS VSS T3 AY22 VSS_292 RSVD_13 N10 AC8 VSS VSS AN5
H13 VSS VSS T5 AY23 VSS_293 RSVD_12 N9 AC11 VSS VSS AN7
H18 VSS VSS T14 AY25 VSS_294 RSVD_11 M13 AC13 VSS VSS AN10
H25 VSS VSS T20 BB1 VSS_297 RSVD_8 M6 AC19 VSS VSS AP5
H28 VSS VSS T23 BB32 VSS_298 RSVD_7 L12 AC22 VSS VSS AP8
J19 VSS VSS T26 BD3 VSS_299 RSVD_6 K19 AC25 VSS VSS AP13
K1 VSS VSS T28 BD7 VSS_300 RSVD_5 F16 ns AD1 VSS VSS AP15
K3 VSS VSS T32 BD10 VSS_301 RSVD_4 F14 R119 0R/J_2 APU_PLLTEST0 43 AD5 VSS VSS AP18
K5 VSS VSS U13 BD12 VSS_302 RSVD_3 F12 1 T27 ns AD14 VSS VSS AP20
ns
K16 VSS VSS U15 BD14 VSS_303 RSVD_2 F10
UNNAMED_15_FP5_I216_RSVD84
R118 0R/J_2 APU_PLLTEST1 43 AD16 VSS VSS AP25
K21 VSS VSS U17 BD16 VSS_304 RSVD_1 C26 R117 0R/J_2 AD18 VSS VSS AR1
APU_DBRDY 43
K26 VSS VSS U19 AD20 VSS VSS AR5
ns
VSS V2 AE5 VSS VSS AR7
VSS V4 AE11 VSS VSS AR12
FP6 REV 0.92 FP6 REV 0.92 FP6 REV 0.92
B B
PART 7 OF 13 PART 11 OF 13 PART 8 OF 13
A A
Page name: RN(GND)
Size: Project REV:

5 4 3 2 1
5 4 3 2 1
+V1P8A +V3P3A
R172
R111
D D
10K/J_2
10K/J_2
7 SYS_RST#
8,27 FLASH_SPI_CLK
R173 PWR_GOOD deassertion does not assert SYS_RESET_L.

ns R174
ns
2K/F_2
2K/F_2
C C
STRAP FUNCTION DEFINITION
1: USE 48MHZ CRYSTAL CLOCK AND GENERATE

BOTH INTERNAL AND EXTERNAL CLOCKS(DEFAULT)
SPI_CLK
0: USE 100MHZ PCIE CLOCK AS REFERENCE CLOCK
AND GENERATE INTERNAL CLOCKS ONLY
1: NORMAL RESET MODE(DEFUALT)

B B
SYS_RST# 0: SHORT RESET MODE
A A
Page name: RN(STRAP)
Size: Project REV:

5 4 3 2 1
OK
CHA-1
+VDDQ_LP4X UD1B
+V1P1U_VDDQ K4F6E3S4HM-MGCJ
NB_BGA200_15X10X1D2_0D65
U8 A3
VDD2_1 VSS_1
U5 Y8
100nF/X5R/10V/K_2
VDD2_2 VSS_2
CD2
R12 Y5
UD1A VDD2_3 VSS_3
RD3 RD4 K4F6E3S4HM-MGCJ R8 Y1
NB_BGA200_15X10X1D2_0D65 VDD2_4 VSS_4
240R/F_2 240R/F_2 R5 W11
G11 B9 3 MAA_DATA4
VDD2_5 VSS_5
DNU_G11 DQ15_A
BI
R1 W9
MAA_ZQ1 A8 C9 3 MAA_DATA5
VDD2_6 VSS_6
NC_A8 DQ14_A
BI
N12 W4
MAA_ZQ0 A5 E9 3 MAA_DATA1
VDD2_7 VSS_7
ZQ_A DQ13_A
BI
N10 W2
MAA_CA5 3,14 J11 F9 3 MAA_DATA0
VDD2_8 VSS_8
IN CA5_A DQ12_A
BI
0
N3 V12
IN MAA_CA4 3,14 H11 F11 3 MAA_DATA6
VDD2_9 VSS_9
CA4_A DQ11_A
BI
N1 V8
+V1P1U_VDDQ IN MAA_CA3 3,14 H10 E11 3 MAA_DATA7
VDD2_10 VSS_10
CA3_A DQ10_A
BI
K12 V5
IN MAA_CA2 3,14 H9 C11 3 MAA_DATA2
VDD2_11 VSS_11
CA2_A DQ9_A
BI
K10 V1
MAA_CA1 3,14 J2 B11 3 MAA_DATA3
VDD2_12 VSS_12
CA1_A DQ8_A
IN BI
K3 T12
MAA_CA0 3,14 H2 B4 3 MAA_DATA9
VDD2_13 VSS_13
RD55
IN
CA0_A DQ7_A
BI
K1 T10
MAA_ODT_CA G2 C4 3 MAA_DATA8
VDD2_14 VSS_14
ODT_CA_A DQ6_A
BI
H12 T8
K5 E4 VDD2_15 VSS_15
0R/J_2 3 MAA_DATA11
DNU_K5 DQ5_A
BI
H8 T5
IN MAA_CS1 3,14 H3 F4 3 MAA_DATA10
VDD2_16 VSS_16
NC_H3 DQ4_A
BI
1
RD56 H5 T3
MAA_CS0 3,14 H4 F2 3 MAA_DATA14
VDD2_17 VSS_17
CS_A DQ3_A
IN BI
H1 T1
K8 E2 3 MAA_DATA13
VDD2_18 VSS_18
DNU_K8 DQ2_A
BI
0R/J_2 F8 P12
IN MAA_CKE1 3,14 J5 C2 3 MAA_DATA12
VDD2_19 VSS_19
NC_J5 DQ1_A
BI
ns F5 P10
IN MAA_CKE0 3,14 J4 B2 3 MAA_DATA15
VDD2_20 VSS_20
CKE_A DQ0_A
BI
AB9 P3
MAA_CKC 3,14 J9 D10 3 MAA_DQS_H0
VDD2_21 VSS_21
IN
IN
CK_C_A DQS1_T_A
0
AB4 P1
MAA_CKT 3,14 J8 E10 3 MAA_DQS_L0
VDD2_22 VSS_22
CK_T_A DQS1_C_A IN
IN
0
A9 N11
VDD2_23 VSS_23
1
MAA_DM0 3 C10 D3 3 MAA_DQS_H1 +V1P8U
IN DMI1_A DQS0_T_A IN
1
A4 N9
MAA_DM1 3 C3 E3 3 MAA_DQS_L1
VDD2_24 VSS_24
IN DMI0_A DQS0_C_A IN
U12 N4
IN MAA_CA5 3,14 P11 AA9 3 MAA_DATA20
VDD1_1 VSS_25
CA5_B DQ15_B
BI
U1 N2
100nF/X5R/10V/K_2
MAA_CA4 3,14 R11 Y9 3 MAA_DATA22
VDD1_2 VSS_26
CD3
IN
CA4_B DQ14_B
BI
T9 K11
MAA_CA3 3,14 R10 V9 3 MAA_DATA19
VDD1_3 VSS_27
CA3_B DQ13_B
IN BI
T4 K9
IN MAA_CA2 3,14 R9 U9 3 MAA_DATA17
VDD1_4 VSS_28
CA2_B DQ12_B
BI
2
G9 K4
IN MAA_CA1 3,14 P2 U11 3 MAA_DATA18
VDD1_5 VSS_29
CA1_B DQ11_B
BI
G4 K2
IN MAA_CA0 3,14 R2 V11 3 MAA_DATA16
VDD1_6 VSS_30
CA0_B DQ10_B
BI
F12 J12
MAA_ODT_CA T2 Y11 3 MAA_DATA21 +VDDQ_LP4X VDD1_7 VSS_31
ODT_CA_B DQ9_B
BI
F1 J10
N5 AA11 3 MAA_DATA23
VDD1_8 VSS_32
DNU_N5 DQ8_B
BI
W12 J3
IN MAA_CS1 3,14 R3 AA4 3 MAA_DATA31
VDDQ_1 VSS_33
NC_R3 DQ7_B
BI
W8 J1
100nF/X5R/10V/K_2
VDDQ_2 VSS_34
IN MAA_CS0 3,14 R4
CS_B DQ6_B
Y4 3 MAA_DATA30 BI
SWAP CD4 W5 G12
N8 V4 3 MAA_DATA29
VDDQ_3 VSS_35
DNU_N8 DQ5_B
BI
W1 G10
IN MAA_CKE1 3,14 P5 U4 3 MAA_DATA28
VDDQ_4 VSS_36
NC_P5 DQ4_B
BI
3
U10 G8
MAA_CKE0 3,14 P4 U2 3 MAA_DATA24
VDDQ_5 VSS_37
CKE_B DQ3_B
IN BI
U3 G5
IN MAA_CKC 3,14 P9 V2 3 MAA_DATA27
VDDQ_6 VSS_38
CK_C_B DQ2_B
BI
F10 G3
IN MAA_CKT 3,14 P8 Y2 3 MAA_DATA25
VDDQ_7 VSS_39
CK_T_B DQ1_B
BI
2
F3 G1
MAA_DM2 3 Y10 AA2 3 MAA_DATA26
VDDQ_8 VSS_40
IN DMI1_B DQ0_B
BI
3
SWAP D12 E12
MAA_DM3 3 Y3 V10 3 MAA_DQS_L2
VDDQ_9 VSS_41
IN DMI0_B DQS1_C_B IN
2
D8 E8
MA_RESET_L 3,15 T11 W10 3 MAA_DQS_H2
VDDQ_10 VSS_42
IN RESET_N DQS1_T_B IN
D5 E5
A1 V3 3 MAA_DQS_L3
VDDQ_11 VSS_43
DNU_A1 DQS0_C_B IN
3
D1 E1
A2 W3 3 MAA_DQS_H3
VDDQ_12 VSS_44
DNU_A2 DQS0_T_B IN
B10 D11
A11 AA1 VDDQ_13 VSS_45
100nF/X5R/10V/K_2
CD5 DNU_A11 DNU_AA1 B8 D9

A12 AA12 VDDQ_14 VSS_46
DNU_A12 DNU_AA12 B5 D4
ns VDDQ_15 VSS_47
B1 AB1
DNU_B1 DNU_AB1 B3 D2
B12 AB2 VDDQ_16 VSS_48
DNU_B12 DNU_AB2 AA10 C12
AB11 VDDQ_17 VSS_49
DNU_AB11 AA8 C8
AB12 VDDQ_18 VSS_50
DNU_AB12 AA5 C5
VDDQ_19 VSS_51
AA3 C1
VDDQ_20 VSS_52
AB10
VSS_53
AB8
VSS_54
AB5
VSS_55
AB3
VSS_56
A10
VSS_57
Y12
VSS_58
Page name:
LPDDR4 CH-A_1
Size: Project REV:
Date: Sheet: of
Friday, February 05, 2021 14 64
CHA-2
UD2B
NB_BGA200_15X10X1D2_0D65
+VDDQ_LP4X
U8 A3
100nF/X5R/10V/K_2
VDD2_1 VSS_1
CD6 U5 Y8
VDD2_2 VSS_2
R12 Y5
VDD2_3 VSS_3
R8 Y1
VDD2_4 VSS_4
R5 W11
RD5 VDD2_5 VSS_5
RD6 UD2A R1 W9
240R/F_2 240R/F_2 K4F6E3S4HM-MGCJ VDD2_6 VSS_6
NB_BGA200_15X10X1D2_0D65 N12 W4
VDD2_7 VSS_7
G11 B9 3 MAB_DATA30
BI
N10 W2
DNU_G11 DQ15_A VDD2_8 VSS_8
MAB_ZQ1 A8 C9 3 MAB_DATA27 N3 V12
NC_A8 DQ14_A BI VDD2_9 VSS_9
MAB_ZQ0 A5 E9 3 MAB_DATA25 N1 V8
ZQ_A DQ13_A BI VDD2_10 VSS_10
IN
MAB_CA5 3,15 J11 F9 3 MAB_DATA26
BI
K12 V5
CA5_A DQ12_A VDD2_11 VSS_11
+V1P1U_VDDQ
IN
MAB_CA4
MAB_CA3
3,15
3,15
H11
H10
CA4_A DQ11_A
F11
E11
3
3
MAB_DATA31
MAB_DATA29
BI 3 K10
K3
VDD2_12 VSS_12
V1
T12
IN CA3_A DQ10_A BI VDD2_13 VSS_13
IN
MAB_CA2 3,15 H9 C11 3 MAB_DATA28
BI
K1 T10
IN
MAB_CA1 3,15 J2 B11 3 MAB_DATA24
BI
H12 T8
IN
MAB_CA0 3,15 H2 B4 3 MAB_DATA23
BI
H8 T5
RD57 CA0_A DQ7_A VDD2_16 VSS_16
MAB_ODT_CA G2 C4 3 MAB_DATA21 H5 T3
ODT_CA_A DQ6_A BI VDD2_17 VSS_17
0R/J_2 K5 E4 3 MAB_DATA20
BI
H1 T1
DNU_K5 DQ5_A VDD2_18 VSS_18
IN
MAB_CS1 3,15 H3 F4 3 MAB_DATA22
BI
F8 P12
NC_H3 DQ4_A VDD2_19 VSS_19
2
RD58
IN
MAB_CS0 3,15 H4 F2 3 MAB_DATA17
BI
F5 P10
CS_A DQ3_A VDD2_20 VSS_20
K8 E2 3 MAB_DATA16
BI
AB9 P3
0R/J_2 DNU_K8 DQ2_A VDD2_21 VSS_21
IN
MAB_CKE1 3,15 J5 C2 3 MAB_DATA19
BI
AB4 P1
NC_J5 DQ1_A VDD2_22 VSS_22
ns
IN
MAB_CKE0 3,15 J4 B2 3 MAB_DATA18
BI
A9 N11
CKE_A DQ0_A +V1P8U VDD2_23 VSS_23
IN
MAB_CKC 3,15 J9 D10 3 MAB_DQS_H3
IN
A4 N9
CK_C_A DQS1_T_A VDD2_24 VSS_24
J8 E10
3 U12 N4
100nF/X5R/10V/K_2
MAB_CKT 3,15 3 MAB_DQS_L3
IN CK_T_A DQS1_C_A IN VDD1_1 VSS_25
3 IN
MAB_DM3 3 C10
DMI1_A DQS0_T_A
D3 3 MAB_DQS_H2
IN
2
CD7 U1
VDD1_2 VSS_26
N2
2 IN
MAB_DM2
MAB_CA5
3
3,15
C3
P11
DMI0_A DQS0_C_A
E3
AA9 3
3
MAB_DATA1
MAB_DQS_L2
IN
T9
T4
VDD1_3 VSS_27
K11
K9
IN CA5_B DQ15_B BI VDD1_4 VSS_28
IN
MAB_CA4 3,15 R11 Y9 3 MAB_DATA7
BI
G9 K4
CA4_B DQ14_B VDD1_5 VSS_29
IN
MAB_CA3 3,15 R10 V9 3 MAB_DATA0
BI
G4 K2
IN
MAB_CA2 3,15 R9 U9 3 MAB_DATA3
BI
F12 J12
IN
MAB_CA1
MAB_CA0
3,15
3,15
P2
R2
CA1_B DQ11_B
U11
V11
3
3
MAB_DATA6
MAB_DATA5
BI 0 +VDDQ_LP4X F1
W12
VDD1_8 VSS_32
J10
J3
IN CA0_B DQ10_B BI VDDQ_1 VSS_33
100nF/X5R/10V/K_2
MAB_ODT_CA T2 Y11 3 MAB_DATA4 W8 J1
ODT_CA_B DQ9_B BI VDDQ_2 VSS_34
CD8
N5 AA11 3 MAB_DATA2
BI
W5 G12
DNU_N5 DQ8_B VDDQ_3 VSS_35
IN
MAB_CS1 3,15 R3 AA4 3 MAB_DATA13
BI
W1 G10
NC_R3 DQ7_B VDDQ_4 VSS_36
IN
MAB_CS0 3,15 R4 Y4 3 MAB_DATA11
BI
U10 G8
CS_B DQ6_B VDDQ_5 VSS_37
N8 V4 3 MAB_DATA10
BI
U3 G5
IN
MAB_CKE1 3,15 P5 U4 3 MAB_DATA9
BI
F10 G3
NC_P5 DQ4_B VDDQ_7 VSS_39
IN
MAB_CKE0
MAB_CKC
3,15
3,15
P4
P9
CKE_B DQ3_B
U2
V2
3
3
MAB_DATA8
MAB_DATA15
BI 1 F3
D12
VDDQ_8 VSS_40
G1
E12
IN CK_C_B DQ2_B BI VDDQ_9 VSS_41
IN
MAB_CKT 3,15 P8 Y2 3 MAB_DATA14
BI
D8 E8
CK_T_B DQ1_B VDDQ_10 VSS_42
0 IN
MAB_DM0 3 Y10
DMI1_B DQ0_B
AA2 3 MAB_DATA12
BI
D5
VDDQ_11 VSS_43
E5
1 IN
MAB_DM1 3 Y3
DMI0_B DQS1_C_B
V10 3 MAB_DQS_L0
IN
D1
VDDQ_12 VSS_44
E1
3,14 MA_RESET_L
T11
A1
RESET_N DQS1_T_B
W10
V3
3 MAB_DQS_H0
IN 0 B10
B8
VDDQ_13 VSS_45
D11
D9
100nF/X5R/10V/K_2
3 MAB_DQS_L1
DNU_A1 DQS0_C_B IN VDDQ_14 VSS_46
CD9
ns
A2
A11
DNU_A2 DQS0_T_B
W3
AA1
3 MAB_DQS_H1
IN 1 B5
B3
VDDQ_15 VSS_47
D4
D2
DNU_A11 DNU_AA1 VDDQ_16 VSS_48
A12 AA12 AA10 C12
B1 AB1 AA8 C8
DNU_B1 DNU_AB1 VDDQ_18 VSS_50
B12 AB2 AA5 C5
AB11 AA3 C1
DNU_AB11 VDDQ_20 VSS_52
AB12 AB10
DNU_AB12 VSS_53
AB8
VSS_54
AB5
VSS_55
AB3
VSS_56
A10
VSS_57
Y12
VSS_58
Page name:
LPDDR4 CH-A_2
Size: Project REV:
A4 Name: V1.0
UX425UG
Date: Sheet: of
OK
CHB-1 +VDDQ_LP4X
UD3B
NB_BGA200_15X10X1D2_0D65
U8 A3
100nF/X5R/10V/K_2
RD7 RD8 UD3A
K4F6E3S4HM-MGCJ VDD2_1 VSS_1
240R/F_2 240R/F_2 NB_BGA200_15X10X1D2_0D65 CD10 U5 Y8
VDD2_2 VSS_2
G11 B9 4 MBA_DATA1
BI
R12 Y5
MBA_ZQ1 A8 C9 4 MBA_DATA6 R8 Y1
MBA_ZQ0 A5 E9 4 MBA_DATA4 R5 W11
IN
MBA_CA5 4,16 J11 F9 4 MBA_DATA3
BI
R1 W9
+V1P1U_VDDQ
IN
MBA_CA4
MBA_CA3
4,16
4,16
H11
H10
CA4_A DQ11_A
F11
E11
4
4
MBA_DATA5
MBA_DATA2
BI 0 N12
N10
VDD2_7 VSS_7
W4
W2
IN
MBA_CA2 4,16 H9 C11 4 MBA_DATA7
BI
N3 V12
IN
MBA_CA1 4,16 J2 B11 4 MBA_DATA0
BI
N1 V8
IN
MBA_CA0 4,16 H2 B4 4 MBA_DATA13
BI
K12 V5
MBA_ODT_CA G2 C4 4 MBA_DATA14 K10 V1
0R/J_2 K5 E4 4 MBA_DATA15
BI
K3 T12
IN
MBA_CS1 4,16 H3 F4 4 MBA_DATA12
BI
K1 T10
1
RD60
IN
MBA_CS0 4,16 H4 F2 4 MBA_DATA8
BI
H12 T8
K8 E2 4 MBA_DATA11
BI
H8 T5
IN
MBA_CKE1 4,16 J5 C2 4 MBA_DATA9
BI
H5 T3
ns
IN
MBA_CKE0 4,16 J4 B2 4 MBA_DATA10
BI
H1 T1
CKE_A DQ0_A VDD2_18 VSS_18
IN
MBA_CKC 4,16 J9 D10 4 MBA_DQS_H0
IN
F8 P12
IN
MBA_CKT 4,16 J8
CK_T_A DQS1_C_A
E10 4 MBA_DQS_L0
IN 0 F5
VDD2_20 VSS_20
P10
0 IN
MBA_DM0 4 C10
DMI1_A DQS0_T_A
D3 4 MBA_DQS_H1
IN
1
AB9
VDD2_21 VSS_21
P3
1 IN
MBA_DM1
MBA_CA5
4
4,16
C3
P11
DMI0_A DQS0_C_A
E3
AA9 4
4
MBA_DATA25
MBA_DQS_L1
IN
AB4
A9
VDD2_22 VSS_22
P1
N11
+V1P8U
IN
MBA_CA4 4,16 R11 Y9 4 MBA_DATA27
BI
A4 N9
IN
MBA_CA3 4,16 R10 V9 4 MBA_DATA24
BI
U12 N4
100nF/X5R/10V/K_2
IN
MBA_CA2 4,16 R9 U9 4 MBA_DATA26
BI
U1 N2
3
CD11
IN
MBA_CA1 4,16 P2 U11 4 MBA_DATA30
BI
T9 K11
IN
MBA_CA0 4,16 R2 V11 4 MBA_DATA29
BI
T4 K9
MBA_ODT_CA T2 Y11 4 MBA_DATA28 G9 K4
ODT_CA_B DQ9_B BI VDD1_5 VSS_29
N5 AA11 4 MBA_DATA31
BI
G4 K2
DNU_N5 DQ8_B VDD1_6 VSS_30
IN
MBA_CS1 4,16 R3 AA4 4 MBA_DATA22
BI
F12 J12
NC_R3 DQ7_B +VDDQ_LP4X VDD1_7 VSS_31
IN
MBA_CS0 4,16 R4 Y4 4 MBA_DATA23
BI
F1 J10
CS_B DQ6_B VDD1_8 VSS_32
N8 V4 W12 J3
100nF/X5R/10V/K_2
4 MBA_DATA20
DNU_N8 DQ5_B BI VDDQ_1 VSS_33
IN
MBA_CKE1 4,16 P5 U4 4 MBA_DATA21
BI CD12 W8 J1
IN
MBA_CKE0
MBA_CKC 4,16
4,16 P4
P9
CKE_B DQ3_B
U2
V2
4
4
MBA_DATA17
MBA_DATA16
BI 2 W5
W1
VDDQ_3 VSS_35
G12
G10
IN
MBA_CKT 4,16 P8 Y2 4 MBA_DATA19
BI
U10 G8
3 IN
MBA_DM3 4 Y10
DMI1_B DQ0_B
AA2 4 MBA_DATA18
BI
U3
VDDQ_6 VSS_38
G5
2 IN
MBA_DM2 4 Y3
DMI0_B DQS1_C_B
V10 4 MBA_DQS_L3
IN
F10
VDDQ_7 VSS_39
G3
IN
MB_RESET_L 4,17 T11
A1
RESET_N DQS1_T_B
W10
V3
4
4
MBA_DQS_H3
MBA_DQS_L2
IN 3 F3
D12
VDDQ_8 VSS_40
G1
E12
A2 W3
2 D8 E8
100nF/X5R/10V/K_2
4 MBA_DQS_H2
DNU_A2 DQS0_T_B IN VDDQ_10 VSS_42
CD13 A11 AA1 D5 E5
ns
A12 AA12 D1 E1
B1 AB1 B10 D11
B12 AB2 B8 D9
AB11 B5 D4
AB12 B3 D2
AA10 C12
VDDQ_17 VSS_49
AA8 C8
VDDQ_18 VSS_50
AA5 C5
VDDQ_19 VSS_51
AA3 C1
VDDQ_20 VSS_52
AB10
VSS_53
AB8
VSS_54
AB5
VSS_55
AB3
VSS_56
A10
VSS_57
Y12
VSS_58
Page name:
LPDDR4 CH-B_1
Size: Project REV:
A4 Name: V1.0
UX425UG
Date: Sheet: of
OK
CHB-2
UD4B
+VDDQ_LP4X +V1P1U_VDDQ K4F6E3S4HM-MGCJ
NB_BGA200_15X10X1D2_0D65
U8 A3
100nF/X5R/10V/K_2
VDD2_1 VSS_1
CD14 U5 Y8
VDD2_2 VSS_2
R12 Y5
VDD2_3 VSS_3
RD10
UD4A R8 Y1
RD9 K4F6E3S4HM-MGCJ VDD2_4 VSS_4
240R/F_2 NB_BGA200_15X10X1D2_0D65 R5 W11
240R/F_2 VDD2_5 VSS_5
G11 B9 4 MBB_DATA27
BI
R1 W9
ZQ1_CHB_1 A8 C9 4 MBB_DATA26 N12 W4
ZQ0_CHB_1 A5 E9 4 MBB_DATA24 N10 W2
IN
MBB_CA5 4,17 J11 F9 4 MBB_DATA25
BI
N3 V12
+V1P1U_VDDQ
IN
MBB_CA4
MBB_CA3
4,17
4,17
H11
H10
CA4_A DQ11_A
F11
E11
4
4
MBB_DATA28
MBB_DATA29
BI 3 N1
K12
VDD2_10 VSS_10
V8
V5
IN
MBB_CA2 4,17 H9 C11 4 MBB_DATA30
BI
K10 V1
IN
MBB_CA1 4,17 J2 B11 4 MBB_DATA31
BI
K3 T12
IN
MBB_CA0 4,17 H2 B4 4 MBB_DATA23
BI
K1 T10
MBB_ODT_CA G2 C4 4 MBB_DATA20 H12 T8
0R/J_2 K5 E4 4 MBB_DATA22
BI
H8 T5
IN
MBB_CS1 4,17 H3 F4 4 MBB_DATA21
BI
H5 T3
2
RD62
IN
MBB_CS0 4,17 H4 F2 4 MBB_DATA19
BI
H1 T1
K8 E2 4 MBB_DATA17
BI
F8 P12
IN
MBB_CKE1 4,17 J5 C2 4 MBB_DATA16
BI
F5 P10
ns
IN
MBB_CKE0 4,17 J4 B2 4 MBB_DATA18
BI
AB9 P3
CKE_A DQ0_A VDD2_21 VSS_21
IN
MBB_CKC 4,17 J9 D10 4 MBB_DQS_H3
IN
AB4 P1
IN
MBB_CKT 4,17 J8
CK_T_A DQS1_C_A
E10 4 MBB_DQS_L3
IN 3 A9
VDD2_23 VSS_23
N11
3
+V1P8U
2
IN
MBB_DM3 4 C10 D3 4 MBB_DQS_H2
IN
A4 N9
DMI1_A DQS0_T_A VDD2_24 VSS_24
2 IN
MBB_DM2 4 C3
DMI0_A DQS0_C_A
E3 4 MBB_DQS_L2
IN
U12
VDD1_1 VSS_25
N4
100nF/X5R/10V/K_2
IN
MBB_CA5 4,17 P11 AA9 4 MBB_DATA1
BI
U1 N2
CA5_B DQ15_B CD15 VDD1_2 VSS_26
IN
MBB_CA4 4,17 R11 Y9 4 MBB_DATA2
BI
T9 K11
IN
MBB_CA3 4,17 R10 V9 4 MBB_DATA5
BI
T4 K9
IN
MBB_CA2 4,17 R9 U9 4 MBB_DATA7
BI
G9 K4
IN
MBB_CA1
MBB_CA0
4,17
4,17
P2
R2
CA1_B DQ11_B
U11
V11
4
4
MBB_DATA4
MBB_DATA6
BI 0 G4
F12
VDD1_6 VSS_30
K2
J12
MBB_ODT_CA T2 Y11 4 MBB_DATA3 +VDDQ_LP4X F1 J10
ODT_CA_B DQ9_B BI VDD1_8 VSS_32
N5 AA11 W12 J3
100nF/X5R/10V/K_2
4 MBB_DATA0
DNU_N5 DQ8_B BI VDDQ_1 VSS_33
IN
MBB_CS1 4,17 R3 AA4 4 MBB_DATA15
BI CD16 W8 J1
NC_R3 DQ7_B VDDQ_2 VSS_34
IN
MBB_CS0 4,17 R4 Y4 4 MBB_DATA8
BI
W5 G12
CS_B DQ6_B VDDQ_3 VSS_35
N8 V4 4 MBB_DATA14
BI
W1 G10
IN
MBB_CKE1 4,17 P5 U4 4 MBB_DATA9
BI
U10 G8
IN
MBB_CKE0
MBB_CKC
4,17
4,17
P4
P9
CKE_B DQ3_B
U2
V2
4
4
MBB_DATA11
MBB_DATA12
BI 1 U3
F10
VDDQ_6 VSS_38
G5
G3
IN
MBB_CKT 4,17 P8 Y2 4 MBB_DATA13
BI
F3 G1
0 IN
MBB_DM0 4 Y10
DMI1_B DQ0_B
AA2 4 MBB_DATA10
BI
D12
VDDQ_9 VSS_41
E12
1 IN
MBB_DM1 4 Y3
DMI0_B DQS1_C_B
V10 4 MBB_DQS_L0
IN
D8
VDDQ_10 VSS_42
E8
4,16 MB_RESET_L
T11
A1
RESET_N DQS1_T_B
W10
V3
4
4
MBB_DQS_H0
MBB_DQS_L1
IN 0 D5
D1
VDDQ_11 VSS_43
E5
E1
A2 W3
1 B10 D11
100nF/X5R/10V/K_2
4 MBB_DQS_H1
DNU_A2 DQS0_T_B IN VDDQ_13 VSS_45
CD17 A11 AA1 B8 D9
ns
A12 AA12 B5 D4
B1 AB1 B3 D2
B12 AB2 AA10 C12
AB11 AA8 C8
AB12 AA5 C5
AA3 C1
VDDQ_20 VSS_52
AB10
VSS_53
AB8
VSS_54
AB5
VSS_55
AB3
VSS_56
A10
VSS_57
Y12
VSS_58
Page name:
LPDDR4 CH-B_2
Size: Project REV:
A4 Name: V1.0
UX425UG
Date: Sheet: of
D
V1.0
REV:
64
of
18
Sheet:
LPDDR4(DECAPS)
CD120
UX425UG
CD123
1uF/6.3V/X5R/M_2
Friday, February 05, 2021
CD37
EMC@
1uF/6.3V/X5R/M_2
CD111
1
1
+VDDQ_LP4X
CD122
EMC request
10uF/6.3V/X5R/M_4
100nF/10V/X5R/K_2
CD133
Project
Name:
CD130
1uF/6.3V/X5R/M_2
CD36
CD83
Page name:
1uF/6.3V/X5R/M_2
EMC@
CD109
1uF/6.3V/X5R/M_2
+V1P8U
Date:
A4
Size:
10uF/6.3V/X5R/M_4 10uF/6.3V/X5R/M_4
CD121
DECOUPLING CAPACITORS FOR LPDDR4x CHANNEL B
CD119
CD132
100nF/10V/X5R/K_2
CD65
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2 1uF/6.3V/X5R/M_2
10uF/6.3V/X5R/M_4
CD35
CD82
CD107
CD64
2.2pF/50V/C0G/C_2 2.2pF/50V/C0G/C_2
10uF/6.3V/X5R/M_4 10uF/6.3V/X5R/M_4
RF request
RF request
CD34
CD81
CD131
CD129
12pF/25V/C0G/J_2 12pF/25V/C0G/J_2
CD49
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
10uF/6.3V/X5R/M_4
CD106
CD33
CD63
CD80
CD48
CD93
1uF/6.3V/X5R/M_2 1uF/6.3V/X5R/M_2 1uF/6.3V/X5R/M_2 1uF/6.3V/X5R/M_2

CD
ns
10uF/6.3V/X5R/M_4 10uF/6.3V/X5R/M_4
CD105
CD32
CD62
CD79
2
2
Place as close as possible to UD?

CD104
CD31
CD47
CD61
CD78
CD92
1uF/6.3V/X5R/M_2 1uF/6.3V/X5R/M_2 1uF/6.3V/X5R/M_2 1uF/6.3V/X5R/M_2 1uF/6.3V/X5R/M_2 1uF/6.3V/X5R/M_2

CD103
CD30
CD46
CD60
CD77
CD91

CD102
CD29
CD45
CD59
CD76
CD90

CD58
+VDDQ_LP4X
CD101
+V1P1U_VDDQ
+V1P1U_VDDQ
+VDDQ_LP4X
CD28
CD44
CD75
CD89
+V1P8U
+V1P8U
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
+APU_VDDIO_SUS
+APU_VDDIO_SUS
(VDDIO_MEM_S3)
+MEM_VDDQ
+MEM_VDDQ
+MEM_1.8V
3
3
+MEM_1.8V
EMC request
CD115
CD117
1uF/6.3V/X5R/M_2 1uF/6.3V/X5R/M_2
CD118
CD27
EMC@
CD110
+VDDQ_LP4X
10uF/6.3V/X5R/M_4 1uF/6.3V/X5R/M_2
CD26
CD74
CD128
CD126
100nF/10V/X5R/K_2
10uF/6.3V/X5R/M_4
10uF/6.3V/X5R/M_4
1uF/6.3V/X5R/M_2 1uF/6.3V/X5R/M_2
CD114
CD116
EMC@
CD108
DECOUPLING CAPACITORS FOR LPDDR4x CHANNEL A
+V1P8U
CD57
CD125
1uF/6.3V/X5R/M_2 100nF/10V/X5R/K_2 1uF/6.3V/X5R/M_2
10uF/6.3V/X5R/M_4
1uF/6.3V/X5R/M_2
RD12 for LPDDR4x

RD11 for LPDDR4
CD25
CD73
CD100
CD56
4
4
2.2pF/50V/C0G/C_2 2.2pF/50V/C0G/C_2
10uF/6.3V/X5R/M_4 10uF/6.3V/X5R/M_4
RF request
RF request
CD24
CD72
CD127
CD124
12pF/25V/C0G/J_2 12pF/25V/C0G/J_2
CD43
1uF/6.3V/X5R/M_2 1uF/6.3V/X5R/M_2
+VDDQ_LP4X
10uF/6.3V/X5R/M_4
CD23
CD55
CD71
CD99
CD42
CD88
CD
ns
10uF/6.3V/X5R/M_4 10uF/6.3V/X5R/M_4
CD22
CD54
CD70
CD98
2 0.01R/F_8
nb_rtc0805
0R/J_6
2
CD21
CD41
CD53
CD69
CD87
CD97
4 4
RD12
ns
3
1uF/6.3V/X5R/M_2 1uF/6.3V/X5R/M_2 1uF/6.3V/X5R/M_2 1uF/6.3V/X5R/M_2 1uF/6.3V/X5R/M_2 1uF/6.3V/X5R/M_2 1 3
RD11
1
CD20
CD40
CD52
CD68
CD86
CD96
CD19
CD39
CD51
CD67
CD85
CD95
5
5
+V1P1U_VDDQ
+VDDQ_TX
CD94
+V1P1U_VDDQ
+V1P1U_VDDQ
+VDDQ_LP4X
CD18
CD38
CD66
CD84
CD50
+VDDQ_LP4X
+V1P8U
+V1P8U
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
D
A
5 4 3 2 1
1uF:6 pcs
4.7uF:1 pcs
U20A 10uF:2 pcs
TU117-V2-F0-S-A1 22uF:2 pcs
BGA603
COMMON
Under GPU Under GPU +1.0VGS Near GPU BOM Change
1V8_AON Enable (+V1P8_AON)

1/14 PCI_EXPRESS (below 150mils) (below 150mils) R2911 0ohm to 1K
C2918 100nf to 22nf
GP107S TU117S R2946 470k to 330k
20201025-zhiqiang
4.7uF/6.3V/X5R/M_4
TU117S GP107S
AA22 R2910 0R/J_2
100nF/X5R/10V/K_2
10uF/6.3V/X5R/M_4
10uF/6.3V/X5R/M_4
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
PEX_CVDD
AA14 PEX_DVDD 7,20 GPU_PWREN ns GPU_PWREN_18AON 22,54
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
PEX_WAKE NC
C2907
C2901
C2956
C2957
C2958
C2959
C2908
C2910
C2960
D2904
C2911
C2915
PLT_RST_VGA_N R2911 1K/J_2
1
AC7 AB23 2 1
VGA@
C2965
C2918 R2946
PEX_RST PEX_DVDD
PEX_DVDD
AC24
CLK_REQ_GPU_N AC6 AD25 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ RB521C30-2/TR
PEX_CLKREQ PEX_DVDD
PEX_DVDD
AE26 D2905 22nF/6.3V/X5R/K_2 330K_0201_1/20 W_F
GPU_PWROK 0R/J_2
2
AE8 PEX_REFCLK PEX_DVDD
AE27 2 1 R2912 VGA@
8 GPP_GPU_CLK1_DP AD8 VGA@ VGA@ VGA@
PEX_REFCLK VGA@ VGA@ VGA@
8 GPP_GPU_CLK1_DN
PEX_RST
ns
1uF:4 pcs +V1P8_AON
ns
PCIE4_GPU_RX0_C_DP AC9 +V1P8VGS
C2942电容_220nF_0201_X5R_6.3V_M
GPU PEX_TX0 4.7uF:1 pcs BOM Change
5 PCIE4_GPU_RX0_DP PCIE4_GPU_RX0_C_DN AB9 Under GPU Under GPU Umount D2905 R2912
5 PCIE4_GPU_RX0_DN
C2943电容_220nF_0201_X5R_6.3V_M
GPU PEX_TX0 10uF:2 pcs
20201025-zhiqiang
D
22uF:2 pcs (below 150mils) (below 150mils) Near GPU D
AG6
5 PCIE4_GPU_TX0_C_DP AG7
PEX_RX0
AA10 2000mA C2909
33pF/25V/C0G/J_2
5 PCIE4_GPU_TX0_C_DN PEX_RX0 PEX_HVDD
AA12
100nF/X5R/10V/K_2
10uF/6.3V/X5R/M_4
10uF/6.3V/X5R/M_4
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
4.7uF/6.3V/X5R/M_4
PCIE4_GPU_RX1_C_DP PEX_HVDD
AB10 AA13 VGA@
C2963
C2944电容_220nF_0201_X5R_6.3V_M
GPU
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
5 PCIE4_GPU_RX1_DP PCIE4_GPU_RX1_C_DN PEX_TX1 PEX_HVDD
AC10 AA16
C2904
C2905
C2912
C2913
C2916
C2914
C2917
C2961
C2906
C2945电容_220nF_0201_X5R_6.3V_M
GPU PEX_TX1 PEX_HVDD 100nF/10V/X5R/K_2
5 PCIE4_GPU_RX1_DN AA18
C2964
PEX_HVDD U2901
5
AF7 PEX_RX1 PEX_HVDD
AA19
5 PCIE4_GPU_TX1_C_DP AE7 AA20
PEX_RX1 PEX_HVDD
VCC
5 PCIE4_GPU_TX1_C_DN AA21 1 VGA@
PCIE4_GPU_RX2_C_DP PEX_HVDD 7 PCH_GPU_RST_N IN1 PLT_RST_VGA_N_RR2908 PLT_RST_VGA_N
C2946电容_220nF_0201_X5R_6.3V_M
GPU AD11 PEX_TX2 PEX_HVDD
AB22 4 0R/J_2
5 PCIE4_GPU_RX2_DP C2947电容_220nF_0201_X5R_6.3V_M
GPU PCIE4_GPU_RX2_C_DN AC11 AC23 VGA@ 2 OUT
PEX_TX2 PEX_HVDD VGA@ VGA@ VGA@ VGA@
GND
5 PCIE4_GPU_RX2_DN AD24 VGA@ ns VGA@ VGA@ VGA@ 6,7,28,32,42,43 PLT_RST_N IN2
PEX_HVDD
AE9 PEX_RX2 PEX_HVDD
AE25
5 PCIE4_GPU_TX2_C_DP AF9 AF26 VGA@
PEX_RX2 PEX_HVDD 74LVC1G08GW
5 PCIE4_GPU_TX2_C_DN
3
PEX_HVDD
AF27
PCIE4_GPU_RX3_C_DP
PEX_HVDD Enable (+V1P8VGS)
C2948电容_220nF_0201_X5R_6.3V_M
GPU AC12 PEX_TX3 C2952 C2903
5 PCIE4_GPU_RX3_DP C2949电容_220nF_0201_X5R_6.3V_M
GPU PCIE4_GPU_RX3_C_DN AB12 VGA@
5 PCIE4_GPU_RX3_DN PEX_TX3
ns ns R2909 100K/J_2
AG9 PEX_RX3 18pF/16V/X7R/K_2 100nF/16V/X5R/M_2 R2943 30K/F_2
5 PCIE4_GPU_TX3_C_DP AG10
5 PCIE4_GPU_TX3_C_DN PEX_RX3 20 1V8MAINEN_33 +V1P8VGS_EN 22,54
1
AB13 PEX_TX4 D2912 VGA@
AC13 PEX_TX4 BOM Change 2 1 R2944 0R/J_2 C2920
Umount D2912 R2944 C2920 ns 22nF/6.3V/X5R/K_2
AF10 20201025-zhiqiang ns RB521C30-2/TR ns
PEX_RX4
2
AE10 PEX_RX4
+V1P8VGS D2906
Under GPU(below 150mils) 1 2 nsR2945 ns 0R/J_2
AD14 PEX_TX5
AC14 PEX_TX5 PEX_PLL_HVDD
AA8
AA9
120mA RB521C30-2/TR
PEX_PLL_HVDD
AE12
1uF/6.3V/X5R/M_2
PEX_RX5
AF12 Use +V1P8VGS Open CLK_REQ MOS, Also reserve GPU_PWROK
C2919
PEX_RX5
AC15
20201119-zhiqiang
PEX_TX6 GPU_PWROK
AB15 PEX_TX6
VGA@ +V1P8VGS
AG12
AG13
PEX_RX6 PEX_CLKREQ Need Check
NVVDD Enable (+VGA_CORE)
PEX_RX6
AB16 PEX_TX7 R2992

AC16 R2993
PEX_TX7 0R/J_2
2.2K/J_2 +V1P8_AON +V3P3S
ns
AF13 PEX_RX7 VGA@
AE13 PEX_RX7
AD17 PEX_TX8
AC17 R2913 +V3P3A +V3P3S
PEX_TX8
10K/J_2
100nF/10V/X5R/K_2
AE15 PEX_RX8
VGA@
AF15 BOM Change
PEX_RX8 Change R2952 30K to 100K
Mount R2901 for 1VP8_AON & PEXVDD Timing
C2935
20201119-zhiqiang Change R2969 0 to 30K
AC18 PEX_TX9 Change R2954 to 120K
AB18
1
PEX_TX9 R2951 R99698 R2901 20201025-zhiqiang
PEX LANES 15 - 4 ARE DEFEATURED

D
3 2
S CLK_REQ_GPU_N 10K/J_2 10K/J_2
8 PCIE_GPU_CLKREQ1 VGA@ 10K/J_2
AG15 PEX_RX9 VGA@
AG16 VGA@ Q2901 R2952 100K/J_2
PEX_RX9 U2903
5
WNM3013 VGA@
R2914 ns VGA@ R2950
AB19 10K/J_2
VCC
PEX_TX10 10K/J_2 1
AC19 ns R2969 VGA@ D2908 RB521C30-2/TR
PEX_TX10 7,20 GPU_PWREN IN1
R2915 0R/J_2 ns 4 1 2
2 OUT EN_VGA 22,53
AF16 VGA@
GND
PEX_RX10 IN2
1
VGA@
AE16 电阻_30K_0201_1/20 W_F(±1%)
PEX_RX10 C2936
AD20 74LVC1G08GW R2979 22nF/6.3V/X5R/K_2
3D
PEX_TX11 1V8MAINEN_33 20
3
VGA@
AC20 PEX_TX11 VGA@ R2953 0R/J_2
2
G Q2906 100K/J_2
AE18 PEX_RX11 1 WNM3013
AF18
2
PEX_RX11
AC21 BOM Change VGA@ VGA@
3D
PEX_TX12 Mount R2953
AB21 R2954 120K_0201_1/20 W_F
S
PEX_TX12 VGA@ 20201025-zhiqiang
G Q2907
AG18 PEX_RX12 1 WNM3013 D2909 1 2 RB521C30-2/TR
SMB_CLK/DATA
AG19 20 1V8MAINEN +1.0VGS_EN 22,54
2
PEX_RX12
Mount R2970&D2913,Change R2970 from 100K to 2.2K VGA@
BOM Change
AD23
AE23
PEX_TX13 Unmount R2992 Unmount R2957
S
PEX_TX13 20201119-zhiqiang VGA@ C2937 R2957 20201025-zhiqiang
ns ns
3D
100K/J_2
AF19 PEX_RX13
+V1P8_AON +V1P8VGS Q2930 VGA@
C AE19 PEX_RX13
+V1P8_AON G 47nF/6.3V/X5R/K_2 C
1 WNM3013
2
AF24 PEX_TX14
AE24 PEX_TX14
PLT_RST_VGA_N
S
AE21 R2970 R2975 ns
PEX_RX14 2.2K/J_2 2.2K/J_2 0R/J_2 1V8MAINEN_33
AF21 PEX_RX14 ns R2968
VGA@
AG24 PEX_TX15 ns 0R/J_2
EC_WRST_N_G R2962
AG25 PEX_TX15 R2955 EC_WRST_N 20,33,38,40
R2916
R2917
2K/F_2
2K/F_2
AG21 PEX_RX15
ns
AG22 ns
3D
PEX_RX15 10K/J_2
Q2908
1
G
VGA@ VGA@
PEX_TERMP
AF25 PEX_TERMP R2918 Q2902 1 WNM3013
2
WNM2072
2.49K/F_2 2 3
D
20 VGA_SMB_CK2 SMB_EC_SCLK 33,42 ns
3D
3D
VGA@ ns
S
VGA@ Q2909 Q2910
R2919 0R/J_2 G G
1
1 WNM3013 1 WNM3013
20,53 NVVDD_PGOOD
2
Q2904 ns
G
WNM2072
2 3
S
20 VGA_SMB_DA2 SMB_EC_SDATA 33,42
VGA@
R2920 ns 0R/J_2 20 FB_GC6_EN PEX_DVDD Enable (+1.0VGS)
VPP eanble (+V1P8_VPP)

+V1P8_AON
R2907 VGA@ 2K/F_2

20 I2CB_SCL +V3P3S +V3P3A
R2924 VGA@ 2K/F_2
+V1P8_AON 20 I2CB_SDA
R2927 VGA@ 2K/F_2
U20M 20 I2CC_SCL
R2930 VGA@ 2K/F_2 R2971 R2973
TU117-V2-F0-S-A1
20 I2CC_SDA
R2972 BGA603
COMMON
ns
8/14 MISC1 0R/J_2 0R/J_2
R2921 VGA@ 10K/J_2
20 1V8MAINEN
OVERT_N
0R/J_2 TU117S GP107S
Internal Thermal Sensor R2923 VGA@ 10K/J_2
VGA@
1uF/6.3V/X5R/M_2
VGA@ F10 VGA@ R2922 10K/J_2

TS_AVDD R2925 100K/J_2 FB_GC6_EN_R 7
NC D9 20 VGA_AC_DET_R
I2CS_SCL VGA_SMB_CK2 20
VGA@
I2CS_SDA D8 R2928 VGA@ 10K/J_2
OVERT_N VGA_SMB_DA2 20 20,53 PSI_VGA
3D
A6 VGA@
C2955
OVERT
AE2 TS_VREF I2CC_SCL A9 Q2905
B9 I2CC_SCL 20 G
R2904 VGA@ 10K/J_2 VGA@
100nF/16V/X5R/M_2
I2CC_SDA I2CC_SDA 20 20 GPIO9 R2926 10K/J_2 1 WNM3013
2
C2921
E12 THERMDN
C9
S
I2CB_SCL I2CB_SCL 20
ns F12 THERMDP I2CB_SDA C8
I2CB_SDA 20
GND
3D
VGA@
Q2903
G
1 WNM3013
TU117S GP107S
F3 20 FB_GC6_EN
2
ADC_IN
B F4 NC
GPIO0 C6 VGA@D2902
B
ADC_IN VGA_CORE_PWM_VID 53
NC
GPIO1 B2 R2934
FB_GC6_EN 20
S
GPIO2 D6 VGA@
2 2 1 1
C7 GPU_EVENT_N_R 20
GPIO3 10K/J_2
GPIO4 F9
A3 VGA@ 1V8MAINEN 20 GND
GPIO5 PSI_VGA_R
EVENT
A4 R2932 0R/J_2 FBVDDQ_PWR_EN 22,55
GPIO6 PSI_VGA 20,53
GPIO7 B6
GPIO8 E9 +V1P8_AON +V3P3S R2933
GPIO9 20
GPIO9 F8 D2903
C5 MEM_VREF 25 VGA@
GPIO10 ns R2942 2.2K/J_2 2 2 1 1
GPIO11 E7 VGA@ R2980 0R/J_2 54 V1P0VGS_PGOOD
D7 VGA_AC_DET_R D2907 2 1 CHG_ACOK 33,46 200K/F_2
GPIO12 VGA@
GPIO13 B4 RB521C30-2/TR R2985 0R/J_2 R2959 C2922 VGA@
B3 VGA_AC_DC_N 33,46
GPIO14 R2929 10K/J_2
GPIO15 C3 10K/J_2 ns BOM Change VGA@
D5 VGA_AC_DET_R 20 Mount C2922 100nF
GPIO16 100nF/10V/X5R/K_2
D4 D2901 Change R2942 from 0ohm to 2.2K GND
GPIO17 20201025-zhiqiang
C2 2 2 1 1
GPIO18 GPIO_18_FP_FUSE 21 20 GPU_EVENT_N_R GPU_EVENT_N 7
F7
GPIO19
E6 ns
GPIO20
C4 R2906 0R/J_2
GPIO21
A7
GPIO22
GPIO23
B7 ns Need to check conn to PCH Delete VPP enable 0830
GPU_Standby 53
+V1P8_AON +V1P8VPP
VGA@
R2001 0R/J_6
OVERT
220pF/50V/X7R/K_2
PLT_RST_VGA_N R2958 56R/F_2 unstuff for NV suggestion 0830 Change VCC Power from +V1P8S to +V3P3S
Add U2902 2&3nd source
20201119-zhiqiang
C2938
VGA@
ns
G
GPU_PWROK
1
U20L OVERT_N 2 3D
100nF/10V/X5R/K_2
TU117-V2-F0-S-A1 S EC_WRST_N 20,33,38,40
1uF:3 pcs BGA603 +V3P3S
+V1P8VGS Under GPU 4.7uF:1 pcs COMMON
Q2911
Near GPU (below 150mils) 0.1uF:1 pcs WNM3013
C2939
9/14 XTAL_PLL
VGA@
Near GPU 22uF:1 pcs
L29011 2 PLLVDD 60mA L6 XS_PLLVDD
+V1P8_AON
R2990
磁珠_30 欧姆@100MHz_0402_ESR0.01 M6
45mA F11 SP_PLLVDD VGA@
100nF/16V/X5R/M_2
4.7uF/6.3V/X5R/M_4
22uF/6.3V/X5R/M_6
VGA@ GPCPLL_AVDD
N6
45mA
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
VID_PLLVDD VGA@ 0R/J_4

C2940
C2927
C2924
C2925
C2926
R2935
C2929
2.2K/J_2
ns
R2936 TU117S GP107S
VGA@ VGA@ VGA@
VGA@ XTALSSIN A10 EXT_REFCLK_FL XTALOUTBUFF C10 XTALOUT
U2902
5
XTAL_SSIN R2981 VGA@ 0R/J_2
VGA@ VGA@ 54 V1P0VGS_PGOOD
10K/F_2
VCC
VGA@ R2937 0R/J_2C11 XTALIN XTALOUT B10 R2938 0R/J_2 R2982 ns 0R/J_2 1
20,53 NVVDD_PGOOD IN1 4 GPU_PWROK_O
R2939 R2948 0R/J_2
VGA@ VGA@ 10K/F_2 2 OUT GPU_PWROK 7,8
GND
55 FBVDDQ_PG IN2 VGA@
100nF/16V/X5R/M_2
18pF/16V/X7R/K_2
VGA@ 74LVC1G08GW
3
VGA@
C2933
C2934
XTAL_IN R2940 10M/J_2 XTAL_OUT
R2949 100K/J_2
ns
Add 3rd Source VGA@ ns
VGA@
A 20201102-zhiqiang A
2
1 3 XTAL_OUT
Y2901
12pF/25V/COG/J_2
12pF/25V/COG/J_2
4
7R27000002
C2930
C2931
VGA@
VGA@ VGA@
Page name: N17S_PCIE/ CLK/ GPIO
Size: Project REV:

Sheet: of 64
5 4 3 2 1
5 4 3 2 1
U20D
TU117-V2-F0-S-A1
BGA603
COMMON
U20K
U20N 5/14 NC
TU117-V2-F0-S-A1
TU117-V2-F0-S-A1
BGA603
BGA603
COMMON COMMON
3/14 JTAG 10/14 MISC2

AA15 NC
D AB8 D
NC
JTAG_TCK AE5 1 T3001 AD10 NC
JTAG_TDI AE6 1 T3002 AD7 NC
JTAG_TDO AF6 1 T3003
ROM_CS D12 ROM_CS AE22 NC
JTAG_TMS AD6 1 T3004 VGA@ AE3 NC
JTAG_TRST AG4 R3001 10K/J_2 ROM_SI B12 AE4 NC
AD9 NVJTAG_SEL A12 ROM_SI 26 AF2
NVJTAG_SEL R3002 10K/J_2 ROM_SO NC
D1 C12 ROM_SO 26 AF22
26 STRAP0 STRAP0 ROM_SCLK ROM_SCLK 26 NC
VGA@ D2 STRAP1 AF3 NC
26 STRAP1 E4 AF4
26 STRAP2 STRAP2 NC
E3 STRAP3 AG3 NC
26 STRAP3 D3 D10
26 STRAP4 STRAP4 NC
C1 STRAP5 E10 NC
26 STRAP5
F6 NC
W5 NC
F5 NC
BUFRST D11 R3003 ns 10K/J_2
U20J
TU117-V2-F0-S-A1
BGA603
COMMON
C 4/14 IFPAB C
DVI HDMI DP
SL/DL
IFPA_L3 AC4
TXC/TXC IFPA_L3 AC3
AA6 IFPAB_RSET +V1P8_AON

TXD0/0 IFPA_L2 Y3
Y4
Add 2nd source
IFPA_L2
20201102-zhiqiang +V1P8_FP_FUSE trace width >10mil
TXD1/1 IFPA_L1 AA2 C3003 U3002 +V1P8_FP_FUSE
T3005 1 W7 IFPAB_PLLVDD IFPA_L1 AA3 电容_2.2uf_0201_6.3 V_M(±20%)
VGA@
A2 A1
AA1 VIN VOUT
TXD2/2 IFPA_L0
AB1 VGA@
电容_2.2uf_0201_6.3 V_M(±20%)
C3004 VGA@
电阻_2.2K_0201_1/20 W_J(±5%)
R3011 VGA@
IFPA_L0
GPIO_18_FP_FUSE GPIO_18_FP_FUSE_R B2
GND
20 GPIO_18_FP_FUSE EN
IFPA_AUX_SDA AA5 R3012 VGA@ R3013
IFPA_AUX_SCL AA4 电阻_0R_0201_1/20 W_J(±5%) 10K/J_2 SGM2578YG/TR
B1
VGA@
B B
IFPB_L3 AB4
TXC IFPB_L3 AB5
T3006 1 W6 IFP_IOVDD TXD0/3 IFPB_L2 AB2

IFPB_L2 AB3
T3007 1 Y6 IFP_IOVDD
TXD1/4 IFPB_L1 AD2 +V1P8_AON

IFPB_L1 AD3 +V1P8_AON
+V1P8_AON +V1P8_AON
TXD2/5 IFPB_L0 AD1 R3004 Main : HQ11122548000 Winbond R3006

10K/J_2
IFPB_L0 AE1 R3005
10K/J_2
10K/J_2
VGA@
2nd : HQ11122561000 GD VGA@
VGA@
IFPB_AUX_SDA AD5
IFPB_AUX_SCL AD4
VGA@ U3001
电阻_33R_0201_1/20W_F
ROM_CS R3008 ROM_CS_R 1 8
IFPAB 电阻_0R_0201_1/20W_J
ROM_SOR3007 ROM_SO_R 2
CS# VCC
7
A SO/SIO1 HOLD#/SIO3 电阻_33R_0201_1/20W_F A
VGA@ 3 6 ROM_SCLK_R R3009 ROM_SCLK
WP#/SIO2 SCLK 电阻_33R_0201_1/20W_F
4 5 ROM_SI_R R3010 VGA@ ROM_SI Huaqin Telecom Technology Com.,Ltd.
GND SI/SIO0
9 VGA@ Page name: N17S_DISPLAY/ STRAP/ JTAG
PAD
W25Q80EWUXIE Size: Project REV:
VGA@ A4 Name: UX425UG V1.0
5 4 3 2 1
5 4 3 2 1
1uF:8 pcs U20E

10uF:3 pcs TU117-V2-F0-S-A1
22uF:3 pcs BGA603
COMMON
+1.2VGS
Near GPU Under GPU(below 150mils) 3.5A 12/14 FBVDDQ
EMI request B26 FBVDDQ

C25 FBVDDQ
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
100nF/25V/X5R/M_4
100nF/25V/X5R/M_4
10uF/6.3V/X5R/M_4
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
E23 FBVDDQ
E26 FBVDDQ
1
F14
C3104
C3101
C3105
C3114
FBVDDQ
C3115
C3116
F21
C3106
C3102
C3103
C3107
FBVDDQ
G13 FBVDDQ
2
G14 FBVDDQ
G15 FBVDDQ
VGA@ VGA@ VGA@ VGA@ G16
VGA@ VGA@ VGA@ VGA@ FBVDDQ
VGA@ VGA@ G18
D
FBVDDQ D
G19 FBVDDQ
G20 FBVDDQ
G21 FBVDDQ
L22 FBVDDQ
L24 FBVDDQ
L26 FBVDDQ
Under GPU(below 150mils) M21 FBVDDQ
N21 FBVDDQ
R21 FBVDDQ
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
10uF/6.3V/X5R/M_4
10uF/6.3V/X5R/M_4
T21 FBVDDQ
V21 FBVDDQ
W21 FBVDDQ
H24
C3108
C3109
C3110
C3112
C3113
FBVDDQ
C3111
H26 FBVDDQ
J21 FBVDDQ
K21 FBVDDQ
VGA@ VGA@ VGA@ VGA@
VGA@ VGA@
Under GPU(below 150mils)

N18S Co-lay
+1.2VGS
电容_1uF_0201_X5R_6.3 V_M(±20%)
C3117
电容_1uF_0201_X5R_6.3 V_M(±20%)
C3118
N18S@ N18S@
C C
+1.2VGS
FB_CAL_PD_VDDQ D22 R3101 1 2 40R2/F_2
VGA@
FB_CAL_PU_GND C24 R3102 1 2 40R2/F_2
VGA@
FB_CALTERM_GND B25R3103 1 2 40R2/F_2
VGA@
Place near balls
DISCHARGE
+1.2VGS
+VGA_CORE
+V1P8_AON
R3105
+V5P0A +V5P0A R3104 10R/F_12
B B
10R/F_12
R3106 +V5P0A VGA@
51R/F_8 VGA@
VGA@ R3107
R3109
VGA@ R3108
VGA@
3D
100K/J_2
3D
3D
100K/J_2 G Q3101 VGA@
G Q3103 1 WNM3013 100K/J_2 G Q3102
1 WNM3013 FBVDDQ_PWR_EN_N WNM3013
2
1
VGA@
2
VGA@ VGA@
S
R3115
3D
3D
S
S
R3114 R3116
3D
1M/J_2
G Q3104 G Q3105
1M/J_2 WNM3013 VGA@ WNM3013 1M/J_2
G Q3106 1 1
WNM3013 VGA@ 20,53 EN_VGA 20,55 FBVDDQ_PWR_EN
1
2
20,54 GPU_PWREN_18AON VGA@ VGA@ VGA@
2
VGA@ +1.0VGS
S
S
+V1P8VGS
R3111 R3119
+V5P0A R3110 +V5P0A

51R/F_8
VGA@ 4.7R/F_8 4.7R/F_8
R3113 R3112
VGA@ VGA@
3D
3D
VGA@
VGA@ 100K/J_2 G Q3108 100K/J_2 G Q3107
+V1P8VGS_EN_N 1 WNM3013 1.0VGS_EN_N 1 WNM3013
2
A A
VGA@ VGA@
3D
3D
S
S
R3118 R3117
G Q9726 G Q3109
WNM3013 1M/J_2 WNM3013 1M/J_2
1 1
20,54 +V1P8VGS_EN VGA@ 20,54 +1.0VGS_EN
2
2
VGA@ VGA@ VGA@
S
S
Page name: N17S_DISPLAY/ STRAP/ JTAG
Size: Project REV:

5 4 3 2 1
5 4 3 2 1
U20I
TU117-V2-F0-S-A1 1uF:5 pcs U20C
BGA603 10uF:12 pcs TU117-V2-F0-S-A1
COMMON 22uF:10 pcs
+VGA_CORE +VGA_CORE BGA603
COMMON
13/14 GND
11/14 VDD 1 of 2
A2 GND GND K11 Under GPU K10 VDD
AB17 GND GND K13 K12 VDD
10uF/6.3V/X5R/M_4
10uF/6.3V/X5R/M_4
10uF/6.3V/X5R/M_4
10uF/6.3V/X5R/M_4
10uF/6.3V/X5R/M_4
10uF/6.3V/X5R/M_4
10uF/6.3V/X5R/M_4
10uF/6.3V/X5R/M_4
10uF/6.3V/X5R/M_4
10uF/6.3V/X5R/M_4
10uF/6.3V/X5R/M_4
10uF/6.3V/X5R/M_4
AC2 GND GND L10 K18 VDD
AC22 L12 L13
C3237
C9944
C3203
C3204
C3205
C3206
C3207
C3208
C3209
C3210
C9952
C3211
GND GND VDD
AC26 GND GND L14 L15 VDD
AC5 GND GND L16 M10 VDD
AC8 GND GND L18 M12 VDD
AD12 GND GND L5 M16 VDD
AD13 GND GND M11 M18 VDD
D D
A26 GND GND M13 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ N11 VDD
AD15 GND GND M15 N13 VDD
AD16 GND GND M17 EMI request N15 VDD
AD18 GND GND N10 N17 VDD
100nF/25V/X5R/M_4
100nF/25V/X5R/M_4
AD19 N12 P14
33pF/25V/C0G/J_2
GND GND VDD
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
AD21 GND GND N14 R11 VDD
1
AD22 N16 R13
C3212
C3213
C3214
C3215
C9947
C9948
GND GND VDD
C3242
C3243
AE11 GND GND N18 R15 VDD
AE14 GND GND P11 R17 VDD
2
AE17 GND GND P13 T10 VDD
AE20 GND GND P15 T12 VDD
AB11 GND GND P17 T16 VDD
AF1 P23 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ T18
GND GND VDD
AF11 GND GND P26 U13 VDD
AF14 GND GND R10 U15 VDD
AF17 GND GND R12 V10 VDD
AF23 GND GND R16 Near GPU V14 VDD
AF8 GND GND T11 V18 VDD
AG2 GND GND T13
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
AG26 GND GND T15
AB14 GND GND T17
B1 U10 F2 VCCSENSE_VGA
C3218
C3219
C3220
C3221
C3222
C3223
GND GND VDD_SENSE VCCSENSE_VGA 53
B11 GND GND U12 GND_SENSE F1 VSSSENSE_VGA
VSSSENSE_VGA 53
B14 GND GND U14
B17 GND GND U16
B20 GND GND U18
B23 GND GND U23 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
B27 GND GND U26
B5 GND GND V11 trace width: 16mils
B8 GND GND V13 differential voltage sensing.
E11 GND GND V15 differential signal routing.
E14 GND GND V17
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
33pF/25V/C0G/J_2
E17 GND GND Y2
E2 Y23
C3232
GND GND U20G
E20 Y26 For RF
C3228
C9949
C9950
C3231
GND GND TU117-V2-F0-S-A1
C E22 GND GND Y5 BGA603 C
E25 GND GND AA7 COMMON
E5 GND GND AB7 +VGA_CORE 7/14 VDD 2 of 2
E8 GND
VGA@ VGA@ VGA@ VGA@
L11 VDD
ns L17 VDD
M14 VDD
OPTIONAL GND: P10 VDD
Place near VRM 10uF:2 pcs P12 VDD
May need delete 08/30 P16 VDD
10uF/6.3V/X5R/M_4
10uF/6.3V/X5R/M_4
XVDD AREA P18 VDD
H2 GND_OPT GND_OPT P2 T14 VDD
H5 P5 U11
C3248
C3249
GND_OPT GND_OPT VDD
L2 GND_OPT GND_OPT U2 U17 VDD
GND_OPT U5 U20F
TU117-V2-F0-S-A1
BGA603
COMMON
PCB ADR/CMD
VGA@ VGA@
PWR REFERENCE
14/14 VDD18
H23 GND_OPT GND_OPT L23 GP107S TU117S
H25 GND_OPT GND_OPT L25 VDD18_NC G8
VDD18
VDD18 VDD18_NC G9 +V1P8_AON
1V8_AON G10
1V8_AON G12 1uF:5 pcs
4.7uF:3 pcs
Near
+V1P8_FP_FUSE Under
GP107S TU117S
4.7uF/6.3V/X5R/M_4
4.7uF/6.3V/X5R/M_4
4.7uF/6.3V/X5R/M_4
NC FP_FUSE_SRC AB6 FP_FUSE_SRC
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
1uF/6.3V/X5R/M_2
VGA@ R3202 U20H
电阻_0R_0201_1/20 W_J(±5%) +VGA_CORE +VGA_CORE
C3233
C3235
C3234
C9951
C9942
C3236
C9945
C9946
TU117-V2-F0-S-A1
BGA603
COMMON
6/14 XVDD
B B
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
G1 XVDD XVDD N4
G2 XVDD XVDD N5
G3 XVDD XVDD N7
G4 XVDD XVDD P3
G5 XVDD XVDD P4
G6 XVDD XVDD P6
G7 XVDD XVDD R1
H3 XVDD XVDD R2
H4 XVDD XVDD R3
H6 XVDD XVDD R4
J1 XVDD XVDD R5
J2 XVDD XVDD R6
J3 XVDD XVDD R7
J4 XVDD XVDD T1
J5 XVDD XVDD T2
J6 XVDD XVDD T3
J7 XVDD XVDD T4
K1 XVDD XVDD T5
K2 XVDD XVDD T6
K3 XVDD XVDD T7
K4 XVDD XVDD U3
K5 XVDD XVDD U4
K6 XVDD XVDD U6
K7 XVDD XVDD V1
L3 XVDD XVDD V2
L4 XVDD XVDD V3 +VGA_CORE
M1 XVDD XVDD V4
M2 XVDD XVDD V5
M3 XVDD XVDD V6
M4 XVDD XVDD V7
M5 XVDD XVDD W1
M7 W2
N1
XVDD
XVDD
XVDD
XVDD W3 Delete R3201 0830
N2 XVDD XVDD W4
N3 XVDD
A A
Page name: N17S_DISPLAY/ STRAP/ JTAG
Size: Project REV:

5 4 3 2 1
5 4 3 2 1
U20B
TU117-V2-F0-S-A1
BGA603
25 FBA_D[0..63] COMMON
2/14 FBA
FBA_D0 E18 FBA_D0
FBA_D1 F18 FBA_D1
FBA_D2 E16 FBA_D2
FBA_D3 F17 FBA_D3
FBA_D4 D20 FBA_D4
FBA_D5 D21 FBA_D5
FBA_D6 F20 FBA_D6
FBA_D7 E21 FBA_D7
FBA_D8 E15 FBA_D8
D FBA_D9 D
D15 FBA_D9
FBA_D10 F15 FBA_D10
FBA_D11 F13 FBA_D11
FBA_D12 C13 FBA_D12
FBA_D13 B13 FBA_D13
FBA_D14 E13 FBA_D14 FBA_CMD0 C27
FBA_D15 D13 C26 FBA_CMD0 25
FBA_D15 FBA_CMD1
FBA_D16 B15 E24 FBA_CMD1 25
FBA_D16 FBA_CMD2
FBA_D17 C16 F24 FBA_CMD2 25
FBA_D17 FBA_CMD3
FBA_D18 A13 D27 FBA_CMD3 25
FBA_D18 FBA_CMD4
FBA_D19 A15 D26 FBA_CMD4 25
FBA_D19 FBA_CMD5
FBA_D20 B18 F25 FBA_CMD5 25
FBA_D20 FBA_CMD6
FBA_D21 A18 F26 FBA_CMD6 25
FBA_D21 FBA_CMD7
FBA_D22 FBA_CMD8
FBA_D23 C19 G22 FBA_CMD8 25
FBA_D23 FBA_CMD9
FBA_D24 B24 G23 FBA_CMD9 25
FBA_D24 FBA_CMD10
FBA_D25 C23 G24 FBA_CMD10 25
FBA_D25 FBA_CMD11
FBA_D26 FBA_CMD12
FBA_D27 A24 G25 FBA_CMD12 25
FBA_D27 FBA_CMD13
FBA_D28 A21 G27 FBA_CMD13 25
FBA_D28 FBA_CMD14
FBA_D29 B21 G26 FBA_CMD14 25
FBA_D29 FBA_CMD15
FBA_D30 C20 M24 FBA_CMD15 25
FBA_D30 FBA_CMD16
FBA_D31 C21 M23 FBA_CMD16 25
FBA_D31 FBA_CMD17
FBA_D32 R22 K24 FBA_CMD17 25
FBA_D32 FBA_CMD18
FBA_D33 R24 K23 FBA_CMD18 25
FBA_D33 FBA_CMD19
FBA_D34 T22 M27 FBA_CMD19 25
FBA_D34 FBA_CMD20
FBA_D35 R23 M26 FBA_CMD20 25
FBA_D35 FBA_CMD21
FBA_D36 N25 M25 FBA_CMD21 25
FBA_D36 FBA_CMD22
FBA_D37 N26 K26 FBA_CMD22 25
FBA_D37 FBA_CMD23
FBA_D38 N23 K22 FBA_CMD23 25
FBA_D38 FBA_CMD24
FBA_D39 N24 J23 FBA_CMD24 25
FBA_D39 FBA_CMD25
FBA_D40 V23 J25 FBA_CMD25 25
FBA_D40 FBA_CMD26
FBA_D41 V22 J24 FBA_CMD26 25
FBA_D41 FBA_CMD27
FBA_D42 T23 K27 FBA_CMD27 25
FBA_D42 FBA_CMD28
FBA_D43 U22 K25 FBA_CMD28 25
FBA_D43 FBA_CMD29
FBA_D44 Y24 J27 FBA_CMD29 25
FBA_D44 FBA_CMD30
FBA_D45 AA24 J26 FBA_CMD30 25 +1.2VGS
FBA_D45 FBA_CMD31
FBA_D46 Y22 B19 FBA_CMD31 25
C FBA_D46 FBA_CMD32 C
FBA_D47 AA23 GP107S
F22 FBA_CMD32 25
FBA_D47 FBA_CMD33 ns FBA_CMD33 25
FBA_D48 AD27 FBA_D48
FBA_CMD34
FBA_CMD35 J22 R99696 60R4/F_2
FBA_D49 AB25 FBA_D49
FBA_D50 AD26
FBA_D51
FBA_D50
DEBUG OPTION DIFF_PAIR
FBA_D52
AC25 FBA_D51 30 OHM ESR=0.01
AA27 FBA_D52
FBA_D53 AA26 FBA_D53
FBA_D54 W26 FBA_D54
FBA_D55 Y25 FBA_D55
FBA_D56 R26 FBA_D56
FBA_D57 T25 FBA_D57
FBA_D58 N27 FBA_D58
FBA_D59 R27 FBA_D59 FBA_CLK0 D24
FBA_D60 V26 D25 FBA_CLK0_P 25
FBA_D60 FBA_CLK0
FBA_D61 V27 N22 FBA_CLK0_N 25
FBA_D61 FBA_CLK1
FBA_D62 W27 M22 FBA_CLK1_P 25
FBA_D62 FBA_CLK1
FBA_D63 W25 FBA_CLK1_N 25
FBA_D63
D19 FBA_DQM0
25 FBA_DBI0 D14 D18
25 FBA_DBI1 FBA_DQM1 FBA_WCK01
C17 C18 FBA_WCK01_P 25
25 FBA_DBI2 FBA_DQM2 FBA_WCK01
C22 GP107S
A17 FBA_WCK01_N 25
25 FBA_DBI3 FBA_DQM3 FBA_WCKB01
P24 N/A A14 FBA_WCKB01_P 25
25 FBA_DBI4 FBA_DQM4 FBA_WCKB01
W24 N/A FBA_WCKB01_N 25
25 FBA_DBI5 FBA_DQM5
AA25 FBA_DQM6 FBA_WCK23 D17
25 FBA_DBI6 FBA_WCK23_P 25
U25 FBA_DQM7 FBA_WCK23 D16
25 FBA_DBI7 FBA_WCK23_N 25
FBA_WCKB23 A23
N/A A20 FBA_WCKB23_P 25 +V1P8VGS
FBA_WCKB23
E19 N/A FBA_WCKB23_N 25
25 FBA_EDC0 FBA_DQS_WP0
C15 FBA_DQS_WP1
25 FBA_EDC1
B16 FBA_DQS_WP2 FBA_WCK45 T24
25 FBA_EDC2
磁珠_30 欧姆@100MHz_0402_ESR0.01
B22 U24 FBA_WCK45_P 25
25 FBA_EDC3 FBA_DQS_WP3 FBA_WCK45
R25 AC27 FBA_WCK45_N 25
25 FBA_EDC4 FBA_DQS_WP4 FBA_WCKB45
W23 N/A Y27 FBA_WCKB45_P 25
25 FBA_EDC5 FBA_DQS_WP5 FBA_WCKB45
N/A FBA_WCKB45_N 25
1
AB26 FBA_DQS_WP6
25 FBA_EDC6
T26 FBA_DQS_WP7
B 25 FBA_EDC7 B
FBA_WCK67 V24 L3301
V25 FBA_WCK67_P 25 VGA@
TU117S GP107S FBA_WCK67
F19 U27 FBA_WCK67_N 25
OPT_GND FBA_WCKB67
FBA_WCKB67_P 25
2
C14 FBA_DQS_RN0 N/A P27
OPT_GND FBA_WCKB67
A16 FBA_DQS_RN1 N/A FBA_WCKB67_N 25
OPT_GND
FBA_DQS_RN2
A22 OPT_GND
FBA_DQS_RN3
P25 OPT_GND
FBA_DQS_RN4
W22 OPT_GND
AB27 OPT_GND
FBA_DQS_RN5
1uF:4 pcs
FBA_DQS_RN6
T27 OPT_GND 4.7uF:2 pcs
Under GPU Near GPU
FBA_DQS_RN7
22uF:1 pcs FB_PLLAVDD
Need check FB_PLL_AVDD F16
1uF/25V/X5R/K_4
4.7uF/6.3V/X5R/M_4
22uF/6.3V/X5R/M_6
4.7uF/6.3V/X5R/M_4
FB_PLL_AVDD P22
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
C3306
C3301
C3302
C3303
C3304
H22
C3305
FB_REFPLL_AVDD
C3307
VGA@
VGA@
VGA@ VGA@ VGA@ VGA@ VGA@
0.1uf CAP PLACE NEAR BALLS

May need change to 1k 08/30
D23 FB_VREF GND
R3307
VGA@
C3390
49.9R/J_2 电容_3.9pF_C0G_50 V_C
A A
Page name: N17S_MEM Interface
Size: Project REV:

5 4 3 2 1
5 4 3 2 1
Page6: MEMORY: FBA Partition 31..0

24,25 FBA_CMD[33..0]
M1011D
K4Z80325BC-HC14 M1011C
? K4Z80325BC-HC14
24 FBA_D[0..31]
COMMON ?
+1.2VGS COMMON
M1011A
FBA_CMD0
K4Z80325BC-HC14 M1011B 0 H3 CA0_A VREFC
K1
A11 A1 9
FBA_CMD9
G11 +FBA_VREFC 25
VSS VDD ? K4Z80325BC-HC14 FBA_CMD8 CA1_A
A13 VSS VDD
A14 COMMON ? 8 G4 CA2_A
FBA_CMD32
A2 VSS VDD
E10 COMMON 32 H12 CA3_A C3438
FBA_CMD7
A4 VSS VDD
E5 7 H5 CA4_A 820pF/25V/X7R/K_2
FBA_CMD11
B1 VSS VDD
H13 NORMAL 11 H10 CA5_A
ns
FBA_CMD15
B14 VSS VDD
H2 NORMAL 15 J12 CA6_A
FBA_D0 FBA_CMD14
C10 VSS VDD
L13 A3 DQ1_A 14 J11 CA7_A
FBA_D1 FBA_CMD3
C12 VSS VDD
L2 B2 DQ3_A x16 x8 3 J4 CA8_A
FBA_D2 FBA_D24 FBA_CMD1
C3 VSS VDD
P10 B3 DQ2_A
U2 DQ3_B NC 1 J3 CA9_A
C5 VSS VDD
P5 B4 DQ0_A U3 DQ2_B NC 6 J5 CABI_A GND
D1 VSS VDD
V1 E3 DQ4_A
V3 DQ1_B NC 10 G10 CKE_A
FBA_D5 FBA_D27
D12 VSS VDD
V14 E2 DQ5_A U4 DQ0_B NC
FBA_D6 FBA_D28 SNN_FBAL_TCK_M
D14 VSS
F2 DQ6_A M2 DQ7_B NC TCK
N5 1 T3401
FBA_D7 FBA_D29 SNN_FBAL_TDI_M
D3 VSS
G2 DQ7_A P3 DQ4_B NC TDI
F10 1 T3402
FBA_D30 SNN_FBAL_TDO_M
E11 VSS
N2 DQ6_B NC TDO
N10 1 T3403
FBA_EDC0 FBA_D31 SNN_FBAL_TMS_M
E4 VSS
+1.2VGS C2 EDC0_A P2 DQ5_B NC TMS
F5 1 T3404
FBA_DBI0
F1 VSS
D2 DBI0_A FBA_EDC3
F12 VSS
T2 EDC0_B GND
FBA_DBI3 FBA_CMD4
F14 VSS VDDQ
B10 D4 WCK0_t_A R2 DBI0_B NC 4 L3 CA0_B
F3 B5 24 FBA_WCK01_P D5 12
FBA_CMD12
M11
VSS VDDQ 24 FBA_WCK01_N WCK0_c_A FBA_CMD5 CA1_B
D G1 VSS VDDQ
C1 R4 WCK0_t_B NC 5 M4 CA2_B
D
G12 C11 24 FBA_WCKB23_P R5 13
FBA_CMD13
L12
VSS VDDQ 24 FBA_WCKB23_N WCK0_c_B NC FBA_CMD7 CA3_B
G14 VSS VDDQ
C14 x16 x8 7 L5 CA4_B
G3 VSS VDDQ
C4 F13 DQ14_A NC V12 DQ9_B 11 L10 CA5_B
H11 VSS VDDQ
E1 E12 DQ12_A NC U13 DQ11_B 15 K12 CA6_B
H4 VSS VDDQ
E14 B11 DQ8_A NC U11 DQ8_B 14 K11 CA7_B
L11 VSS VDDQ
F11 G13 DQ15_A NC U12 DQ10_B 3 K4 CA8_B
L4 VSS VDDQ
F4 A12 DQ9_A NC M13 DQ15_B 1 K3 CA9_B
M1 VSS VDDQ
H1 B12 DQ10_A NC N13 DQ14_B 6 K5 CABI_B
M12 VSS VDDQ
H14 E13 DQ13_A NC P13 DQ13_B 10 M10 CKE_B R3405 121R/F_2
FBA_D15 FBA_D23 FBA_ZQ_1_A
M14 VSS VDDQ
J13 B13 DQ11_A NC P12 DQ12_B ZQ_A
J14 VGA@
FBA_ZQ_1_B
M3 VSS VDDQ
J2 ZQ_B
K14 R3406 121R/F_2
FBA_EDC1 FBA_EDC2
N1 K13 C13 T13 VGA@
电阻_10K_0201_1/20 W_J(±5%)
电阻_10K_0201_1/20 W_J(±5%)
VSS VDDQ FBA_DBI1 EDC1_A GND FBA_DBI2 EDC1_B
N12 VSS VDDQ
K2 D13 DBI1_A R13 DBI1_B
N14 VSS VDDQ
L1 +1.2VGS NC
FBA_CMD2
N3 VSS VDDQ
L14 D11 WCK1_t_A NC R11 WCK1_t_B 2 J1 RESET GND
P11 N11 24 FBA_WCKB01_P D10 24 FBA_WCK23_P R10
VSS VDDQ 24 FBA_WCKB01_N WCK1_c_A NC
24 FBA_WCK23_N WCK1_c_B
P4 N4
R1
VSS
VSS
VDDQ
VDDQ
P1 CKE_A
R12 VSS VDDQ
P14 K10 CLK_c
R14 T1 24 FBA_CLK0_N J10
VSS VDDQ 24 FBA_CLK0_P CLK_t
R3 VSS VDDQ
T11
T10 VSS VDDQ
T14 R3409 R3410
T12 VSS VDDQ
T4 Place DRAM on TOP with PIN A1 Away from GPU RFU_A
G5
T3 VSS VDDQ
U10
FBA_CMD10 RFU_B
M5 Delete this test point 0830
T5 VSS VDDQ
U5
U1 FBA_CMD26
VSS VGA@ VGA@
U14 VSS
V11 FBA_CMD2
VSS FBA_CMD18 FBA_DBI[7..0] FBA_EDC[7..0]
V13 VSS
V2 +V1P8VPP 24,25 FBA_DBI[7..0] FBA_DBI0 24,25 FBA_EDC[7..0] FBA_EDC0
电阻_10K_0201_1/20 W_J(±5%)
电阻_10K_0201_1/20 W_J(±5%)
0 0
VSS FBA_DBI1 FBA_EDC1
V4 VSS 1 1
FBA_DBI2 FBA_EDC2
2 2
VPP
A10 RESET 3
FBA_DBI3
FBA_DBI4
3
FBA_EDC3
FBA_EDC4
VPP
A5 R3411 R3412 4 4
FBA_DBI5 FBA_EDC5
VPP
V10 5 5
FBA_DBI6 FBA_EDC6
VPP
V5 6 6
FBA_DBI7 FBA_EDC7
7 7
GND
GND
VGA@ VGA@
1uF:18 pcs
10uF:6 pcs
22uF:6 pcs CLOSE DRAM
电容_10uF_0402_X5R_6.3V_M
电容_10uF_0402_X5R_6.3V_M
电容_10uF_0402_X5R_6.3V_M
电容_10uF_0402_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
+1.2VGS
+1.2VGS
1
C3406 C3407 C3408 C3409 C3404 C3410 C3411 C3412 C3413 C3414 C3415 C3416 C3417 R99694
549R/F_2
2
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ ns
VGA@ VGA@ VGA@ VGA@
16 mil
R3402 1 2 931R/F_2
+FBA_VREFC 25
ns
100nF/16V/X5R/M_2
100nF/16V/X5R/M_2
1
3D
GND
R3450
C3402
C3403
R3404
G Q3401 1.33K/F_2
1 WNM3013
20 MEM_VREF
2
ns ns
2
ns
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
ns 1K/F_2
CLOSE DRAM R99695
S
ns
+1.2VGS
100K/J_2
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
Use internal Vref 0830
C 1uF:4 pcs C
C3418 C3419 C3420 C3421 C3422 C3423 C3424 C3425 C3426
+V1P8VPP
VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
C3434 C3435 C3436 C3437

GND
电容_22uF_0603_X5R_6.3V_M
电容_22uF_0603_X5R_6.3V_M
电容_22uF_0603_X5R_6.3V_M
电容_22uF_0603_X5R_6.3V_M
电容_22uF_0603_X5R_6.3V_M
电容_22uF_0603_X5R_6.3V_M
电容_10uF_0402_X5R_6.3V_M
电容_10uF_0402_X5R_6.3V_M
AROUND DRAM
VGA@ VGA@ VGA@ VGA@
+1.2VGS
GND
C3405 C3427 C3428 C3429 C3430 C3431 C3432 C3433
GND
Page7: MEMORY: FBA Partition 63..32
M1012D
24,25 FBA_CMD[33..0]
K4Z80325BC-HC14
?
COMMON
24 FBA_D[32..63]
+1.2VGS
A11 VSS VDD A1

A13 VSS VDD A14 M1012A M1012C
A2 VSS VDD E10 K4Z80325BC-HC14 M1012B K4Z80325BC-HC14
A4 VSS VDD E5 ? K4Z80325BC-HC14 ?
B1 VSS VDD H13 COMMON ? COMMON
B14 VSS VDD H2 COMMON
C10 VSS VDD L13
C12 VSS VDD L2 NORMAL FBA_CMD20
C3 VSS VDD P10 NORMAL 20 H3 CA0_A VREFC K1
C5 P5 32
FBA_D32
B2 28
FBA_CMD28
G11 +FBA_VREFC 25
VSS VDD FBA_D33 DQ3_A FBA_CMD21 CA1_A
D1 VSS VDD V1 33 F2 DQ6_A x16 x8 21 G4 CA2_A
D12 VSS VDD V14 34 E3 DQ4_A 56 N2 DQ6_B NC 29 H12 CA3_A C3401
D14 VSS 35 G2 DQ7_A 57 P2 DQ5_B NC 23 H5 CA4_A 820pF/25V/X7R/K_2
D3 VSS 36 B3 DQ2_A 58 M2 DQ7_B NC 27 H10 CA5_A
ns
E11 VSS 37 B4 DQ0_A 59 P3 DQ4_B NC 30 J12 CA6_A
E4 VSS
+1.2VGS 38 A3 DQ1_A 60 U2 DQ3_B NC 31 J11 CA7_A
F1 VSS 39 E2 DQ5_A 61 V3 DQ1_B NC 19 J4 CA8_A
FBA_D62 FBA_CMD17
F12 VSS 62 U3 DQ2_B NC 17 J3 CA9_A
FBA_EDC4 FBA_D63 FBA_CMD22
F14 VSS VDDQ B10 C2 EDC0_A 63 U4 DQ0_B NC 22 J5 CABI_A GND
FBA_DBI4 FBA_CMD26
F3 VSS VDDQ B5 D2 DBI0_A 26 G10 CKE_A
FBA_EDC7
B G1 VSS VDDQ C1 T2 EDC0_B GND
B
FBA_DBI7 SNN_FBAU_TCK
G12 VSS VDDQ C11 D4 WCK0_t_A R2 DBI0_B NC TCK N5 1 T3405
G14 C14 24 FBA_WCK45_P D5 F10
SNN_FBAU_TDI
1 T3406
VSS VDDQ 24 FBA_WCK45_N WCK0_c_A TDI SNN_FBAU_TDO
G3 VSS VDDQ C4 R4 WCK0_t_B NC TDO N10 1 T3407
H11 E1 24 FBA_WCKB67_P R5 F5
SNN_FBAU_TMS
1 T3408
VSS VDDQ 24 FBA_WCKB67_N WCK0_c_B NC TMS
H4 VSS VDDQ E14 x16 x8
FBA_D40 FBA_D48
L11 VSS VDDQ F11 40 F13 DQ14_A NC 48 P12 DQ12_B
L4 VSS VDDQ F4 41 G13 DQ15_A NC 49 N13 DQ14_B 16 L3 CA0_B
M1 VSS VDDQ H1 42 E12 DQ12_A NC 50 P13 DQ13_B 25 M11 CA1_B
M12 VSS VDDQ H14 43 B13 DQ11_A NC 51 M13 DQ15_B 24 M4 CA2_B
M14 VSS VDDQ J13 44 E13 DQ13_A NC 52 U13 DQ11_B 33 L12 CA3_B
M3 VSS VDDQ J2 45 B12 DQ10_A NC 53 V12 DQ9_B 23 L5 CA4_B
N1 VSS VDDQ K13 46 A12 DQ9_A NC 54 U12 DQ10_B 27 L10 CA5_B
N12 VSS VDDQ K2 47 B11 DQ8_A NC 55 U11 DQ8_B 30 K12 CA6_B
FBA_CMD31
N14 VSS VDDQ L1 31 K11 CA7_B
FBA_EDC5 FBA_EDC6 FBA_CMD19
N3 VSS VDDQ L14 C13 EDC1_A GND T13 EDC1_B 19 K4 CA8_B
FBA_DBI5 FBA_DBI6 FBA_CMD17
P11 VSS VDDQ N11 D13 DBI1_A R13 DBI1_B 17 K3 CA9_B
FBA_CMD22
P4 VSS VDDQ N4 NC 22 K5 CABI_B
FBA_CMD26
R1 VSS VDDQ P1 D11 WCK1_t_A NC R11 WCK1_t_B 26 M10 CKE_B
R12 P14 24 FBA_WCKB45_P D10 24 FBA_WCK67_P R10 J14
FBA_ZQ_3_A
VSS VDDQ WCK1_c_A NC WCK1_c_B ZQ_A R3407 121R/F_2
R14 T1 24 FBA_WCKB45_N 24 FBA_WCK67_N K14
FBA_ZQ_3_B
VGA@
VSS VDDQ ZQ_B
R3 VSS VDDQ T11 R3408 121R/F_2
T10 VSS VDDQ T14 VGA@
T12 VSS VDDQ T4
FBA_CMD18
T3 VSS VDDQ U10 Place DRAM on TOP with PIN A1 Toward GPU 18 J1 RESET
T5 VSS VDDQ U5
U1 VSS GND
U14 VSS
V11 VSS K10 CLK_c
V13 +V1P8VPP 24 FBA_CLK1_N J10
VSS 24 FBA_CLK1_P CLK_t
V2 VSS
V4 VSS
RFU_A G5
FBA_DBI[7..0]
A10 M5
VPP
A5 24,25 FBA_DBI[7..0] 0
FBA_DBI0 24,25 FBA_EDC[7..0] 0
FBA_EDC0 RFU_B Delete this test point 0830
VPP FBA_DBI1 FBA_EDC1
VPP V10 1 1
FBA_DBI2 FBA_EDC2
VPP V5 2 2
FBA_DBI3 FBA_EDC3
GND 3 3
FBA_DBI4 FBA_EDC4
4 4
FBA_DBI5 FBA_EDC5
5 5
FBA_DBI6 FBA_EDC6
6 6
FBA_DBI7 FBA_EDC7
7 7
1uF:18 pcs
电容_10uF_0402_X5R_6.3V_M
电容_10uF_0402_X5R_6.3V_M
电容_10uF_0402_X5R_6.3V_M
电容_10uF_0402_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
10uF:6 pcs CLOSE DRAM

22uF:6 pcs
+1.2VGS
C3439 C3440 C3441 C3442 C3443 C3444 C3445 C3446 C3447 C3448 C3449 C3450 C3451

VGA@ VGA@ VGA@ VGA@
GND
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
CLOSE DRAM
+1.2VGS
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
电容_1uF_0201_X5R_6.3V_M
1uF:4 pcs
C3452 C3453 C3454 C3455 C3456 C3457 C3458 C3459 C3460
+V1P8VPP
A A
C3469 C3470 C3471 C3472
GND
VGA@ VGA@ VGA@ VGA@
电容_22uF_0603_X5R_6.3V_M
电容_22uF_0603_X5R_6.3V_M
电容_22uF_0603_X5R_6.3V_M
电容_22uF_0603_X5R_6.3V_M
电容_22uF_0603_X5R_6.3V_M
电容_22uF_0603_X5R_6.3V_M
电容_10uF_0402_X5R_6.3V_M
电容_10uF_0402_X5R_6.3V_M
AROUND DRAM
GND
+1.2VGS
C3461 C3462 C3463 C3464 C3465 C3466 C3467 C3468
GND
Page name: N17S_GDDR5
Size: Project REV:

Sheet: of 64
5 4 3 2 1
5 4 3 2 1
0 1 2
+V1P8_AON PN MPN STRAP Vendor
MV20000061725 K4Z80325BC-HC14 0x0 Samsung
MV20000064820 MT61K256M32JE-14:A 0x2 Hynic
R3501 R3502 R3503

100K/J_2 100K/J_2 100K/J_2
Physical
Strapping pin 0x0 0x02
D 21 STRAP0 ns ns ns STRAP0 D
21 STRAP1 L L
21 STRAP2
STRAP1 L H
R3506 STRAP2 L L
R3504 R3505 100K/J_2
100K/J_2 100K/J_2
VGA@ VGA@
VGA@
default install is Samsung
+V1P8_AON
SMBUS_ALT_ADDR
0 0x9E (Default)
R3507 R3508 R3517
100K/J_2 100K/J_2 100K/J_2 1 0x9C (Multi-GPU usage)
ns ns
ns
21 STRAP3 DEVID_SEL
21 STRAP4
21 STRAP5
C 0 (Default) C
R3518 R3509 R3510 1

100K/J_2 100K/J_2 100K/J_2
VGA@ VGA@
VGA@
PCIE_CFG
0 (Default)
VGA_DEVICE
0 3D Device (Class Code 302h)
1 VGA Device (Default)
+V1P8_AON
R3511 R3512 R3513

100K/J_2 100K/J_2 100K/J_2
B B
Physical
Strapping pin Power Rail
21 ROM_SO ns ns ns ROM_SCLK L
21 ROM_SI
ROM_SI L PULL Low to enable the Failsafe_OVERT
21 ROM_SCLK
ROM_SO L
R3515 R3516
R3514 100K/J_2 100K/J_2
10K/F_2
VGA@ VGA@
VGA@
A A
Page name: N17S_MISC
Size: Project REV:

5 4 3 2 1
5 4 3 2 1
FOR product line

+V1P8A +V1P8A_SPI
+V1P8A_SPI
D 1 T2119 D
1
R7062
1
ns
2
2 30mil FLASH_SPI_CS0_N_IC
FLASH_SPI_CLK_IC
1
1
T2122
T2125
C3201 FLASH_SPI_MISO_IC 1 T2127
0402
FLASH_SPI_MOSI_IC 1 T2137
1uF/6.3V/X5R/M_2 FLASH_SPI_IO2_IC 1 T2131
FLASH_SPI_IO3_IC 1 T2123
1 T2132
+V1P8A_SPI +V1P8A_SPI
C C
R115
R112 R113 R114
10K/J_2 +V1P8A_SPI
10K/J_2 10K/J_2 10K/J_2
FLASH_SPI_CS0_N_IC ns ns 1
U3113
CS* VCC 8
30mil
R2276 0R/J_2
8 FLASH_SPI_CS0_N
R2296 0R/J_2 FLASH_SPI_IO2_IC 3 IO2/WP* SI/IO0 5
8 FLASH_SPI_WP
FLASH_SPI_IO3_IC C3202
R3247 0R/J_2 7 IO3/HOLD* SO/IO1 2
8 FLASH_SPI_Hold
FLASH_SPI_CLK_IC 6 SCLK VSS 4 100nF/6.3V/X5R/K_2
R2293 0R/J_2
8,13 FLASH_SPI_CLK
W25Q128JWSIQ
R2294 0R/J_2
33 EC_FLASH_SPI_CLK
B 33 EC_FLASH_SPI_CS0_N
R2274 0R/J_2 Change SPI ROM From w/RPMC to Wo/RPMC B
20201103-zhiqiang
R2283 0R/J_2 FLASH_SPI_MISO_IC

8 FLASH_SPI_MISO
R2315 0R/J_2 FLASH_SPI_MOSI_IC
8 FLASH_SPI_MOSI
R2284 0R/J_2
33 EC_FLASH_SPI_MISO
R2311 0R/J_2
33 EC_FLASH_SPI_MOSI
A A
Page name: SYSTEM_FLASH
Size: Project REV:

5 4 3 2 1
5 4 3 2 1
+V3P3A
+V3P3S5_SSD1
2.8A M2SSD_PWREN SHOULD COME FROM EC

NVMe (PCIe or M.2) devices should be powered by S0 rail to reduce power consumption in MS.
2 3
SATA SSD should be powered by S5 rail as SATA SSD has DEVSLP feature to reduce power consumption.
D
S
100nF/6.3V/X5R/K_2
100nF/6.3V/X5R/K_2
1 G
PPMT20V3
R7075
QW3101
CW2104
CW2103
D D
+V3P3A
R7105
100K/J_2
ns
ns 100K/J_2
100nF/6.3V/X5R/K_2
R7076 PCIE SSD
CW2102
10K/J_2 ns
ns Q3127 JSSD3101
3D
RW6 4.7K/J_2 2N7002 40-42258-067B1RHF-HQ
G
RW2 0R/J_2
1 +V3P3S5_SSD1
33 SSD_EN_N
2
ns
1 CONFIG_3
80mil
3 GND 3.3V 2
S
ns
100nF/6.3V/X5R/K_2
100nF/6.3V/X5R/K_2
100nF/6.3V/X5R/K_2
100nF/6.3V/X5R/K_2
5 PERN3 3.3V 4
5 GPP_M2_RX0_DN
10uF/X5R/6.3V/M_6
10uF/X5R/6.3V/M_6
10uF/6.3V/X5R/M_4
7 PERP3 NC 6
CU188
C3247
C3251
CU189
5 GPP_M2_RX0_DP
C2568
C2576
C3244
C3246
C2560
9 GND NC 8
ns
电容_12pF_0201_C0G_25V_J
电容_12pF_0201_C0G_25V_J
11 PETN3 DAS/DSS 10
5 GPP_M2_TX0_DN
13 PETP3 3.3V 12
5 GPP_M2_TX0_DP
15 GND 3.3V 14
17 PERN2 3.3V 16
5 GPP_M2_RX1_DN
C 19 PERP2 3.3V 18 C
5 GPP_M2_RX1_DP
21 CONFIG_0 NC 20 FP6 supports four SATA ports but only two

5 GPP_M2_TX1_DN
23 PETN2 NC 22 DEVSLP pins.
25 PETP2 NC 24
DEVSLP[0] can be used for SATA Port 0 or
5 GPP_M2_TX1_DP
2. DEVSLP[1] can be used for SATA Port 1 or 3.
27 GND NC 26
+V3P3S5_SSD1
5 GPP_M2_RX2_DN 29 PERN1 NC 28
31 PERP1 NC 30
5 GPP_M2_RX2_DP
33 GND NC 32
RN2 CR3107
35 PETN1 NC 34 100K/J_2
5 GPP_M2_TX2_DN
2 2 1 1
37 PETP1 NC 36
5 GPP_M2_TX2_DP ns
39 GND DEVSLP 38 ns SATA1_DEVSLP_CON R2354 0R/J_2
SATA1_DEVSLP 7
41 PERN0/SATA_BP NC 40 R2353 10K/J_2
5 GPP_M2_RX3_DP +V3P3S5_SSD1
ns
43 PERP0/SATA_BN NC 42
5 GPP_M2_RX3_DN
45 GND NC 44
47 PETN0/SATA_AN NC 46 R2379
5 GPP_M2_TX3_DN ns 10K/J_2
49 PETP0/SATA_A+ NC 48
5 GPP_M2_TX3_DP
51 GND PERST* 50 PLT_RST_N_SSD
53 REFCLKN CLKREQ* 52
8 GPP_SSD_CLK0_DN PCIE_SSD_CLKREQ0 8
55 REFCLKP PEWAKE* 54
B 8 GPP_SSD_CLK0_DP PCIE_SSD_WAKE_N 7 B
Reserve SSD1_DET Pull Up to _V3P3A 57 GND MFG1 56 1 T2145
2.2nF/50V/X7R/k_4
20201021
MFG2 58
C3283
+V3P3A +V3P3S5_SSD1
KEY M
KEY M
KEY M
Note: PCIE: 1 R7139 R3399
+V3P3S5_SSD1 SATA:0 10K/J_2 10K/J_2
67 NC
ns
ASUS request PR add 11/26 69 CONFIG_1 SUSCLK 68
7 SSD1_DET
2
2.2nF/50V/X7R/k_4
71 GND 3.3V 70
220R/J_6
220R/J_6
R2803
R2804
73 GND 3.3V 72
C3284
75 CONFIG_2 3.3V 74
1
MTG1 76
1 OF 2 MTG2 77
+V3P3S5_SSD1
Q2802
For MS for EMI suggest
3D
WNM3013
+V3P3S5_SSD1 R7093
R2805 G 10K/J_2
1
[26] SSD_EN_N U16
2
74LVC1G08GW
4.7K/J_2
100nF/6.3V/X5R/K_2
A ns ns A
1 R7078
S
5 B 0R/J_2
PLT_RST_N 6,7,20,32,42,43 To ensure that the reset timing of the NVMe drive meets
VCC
PLT_RST_N_SSD A
2
AGPIO40_RST_N 7 the PCIe specification, NVMe storage devices must use AGPIO40 for its
CW2801
R240 0R/J_2 4
Y 3 Don't use other GPIO because AGPIO40 is hardcoded in
ns
GND the BIOS to ensure that the NVMe drive is always available after exiting
ns ns
RN1
100K/J_2 R7092
R7067 Huaqin Telecom Technology Com.,Ltd.
10K/J_2
0R/J_2
Page name: M.2 SSD1_PCIE/SATA
Size: Project REV:

5 4 3 2 1
5 4 3 2 1
+V1P1U_VDDQ +V1P1U_VDDQ +V1P1U_VDDQ +V1P1U_VDDQ +V1P1U_VDDQ

+1.2VGS +1.2VGS +1.2VGS
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
2
2
2
2
C2986
C2988
2
C2985
C2987
C2989
2
C2991
C2990
C2992
1
1
1
1
1
1
ns ns ns ns ns
ns ns ns
RF reserve 0827
D D
+VSYS +VSYS +VSYS +VSYS +VSYS +VSYS

+VDDCR_SOC +VDDCR_SOC +VDDCR_VDD +VDDCR_VDD
+VDDCR_VDD
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
2
2
2
C2993
C2997
C2998
C2994
C2995
C2996
2
2
2
C2980
2
C2982
C2984
C2981
C2983
1
1
1
1
1
1
1
ns ns ns ns ns ns
ns ns ns ns
ns
RF reserve 0827
+VADP +VADP +V5P0A +V5P0A
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
2
2
2
2
C2972
C2970
C2971
C2999
1
1
1
1
ns ns ns ns
+V5P0A +V5P0A +V3P3A +VSYS

+VBATA_BKLT_IN +V3P3_DISPLAY_CONN
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
2
C4201
C4202
C4203
C4204
2
2
CX23
CX24
1
1
ns ns ns ns
C ns ns C
RF reserve 0821
+VDDQ_LP4X +VDDQ_LP4X +VDDQ_LP4X +VDDQ_LP4X +VDDQ_LP4X +VDDQ_LP4X

+VDDQ_LP4X +VDDQ_LP4X +VDDQ_LP4X +VDDQ_LP4X
+1.2VGS +1.2VGS +1.2VGS +1.2VGS +1.2VGS +1.2VGS
+1.2VGS +1.2VGS +1.2VGS +1.2VGS +1.2VGS
C9953 C9902 C9901 C9999 C9995 C9994
C9996 C9993 C9992 C9991
100nF/16V/X5R/M_2 100nF/16V/X5R/M_2 C9960 C9970 C9959 C9967 C9965 C9964
100nF/16V/X5R/M_2 100nF/16V/X5R/M_2 C9969 C9968 C9963 C9962 C9961
EMI 100nF/16V/X5R/M_2100nF/16V/X5R/M_2100nF/16V/X5R/M_2 100nF/16V/X5R/M_2 100nF/16V/X5R/M_2 100nF/16V/X5R/M_2
EMI EMI EMI EMI EMI EMI EMI EMI 100nF/16V/X5R/M_2100nF/16V/X5R/M_2
100nF/16V/X5R/M_2 100nF/16V/X5R/M_2 100nF/16V/X5R/M_2100nF/16V/X5R/M_2 100nF/16V/X5R/M_2 100nF/16V/X5R/M_2
EMI 100nF/16V/X5R/M_2
100nF/16V/X5R/M_2 100nF/16V/X5R/M_2
EMI EMI EMI EMI EMI EMI
EMI EMI EMI EMI EMI
+VDDQ_LP4X +VDDQ_LP4X +VDDQ_LP4X +VDDQ_LP4X

+VDDQ_LP4X +VDDQ_LP4X
+V5P0S +V5P0A +V3P3A

C9988 C9987 C9986 C9985
C9990 C9989 C9903
100nF/16V/X5R/M_2 100nF/16V/X5R/M_2 100nF/16V/X5R/M_2 100nF/16V/X5R/M_2
100nF/16V/X5R/M_2100nF/16V/X5R/M_2 C9905 C9955 C9954
EMI EMI EMI EMI
EMI EMI +V3P3A +V3P3S
EMI
EMI EMI EMI
+V1P1U_VDDQ +V1P1U_VDDQ +V1P1U_VDDQ +V1P1U_VDDQ +V1P1U_VDDQ C9958
+V1P1U_VDDQ +V1P1U_VDDQ +V1P1U_VDDQ +V1P1U_VDDQ
C9984 +V3P3A +V3P3S

C9983 C9982 C9981 C9980
C9979 C9978 C9977 C9976 EMI 100nF/16V/X5R/M_2
100nF/16V/X5R/M_2 100nF/16V/X5R/M_2 100nF/16V/X5R/M_2 100nF/16V/X5R/M_2 100nF/16V/X5R/M_2
EMI EMI EMI EMI
100nF/16V/X5R/M_2 100nF/16V/X5R/M_2 100nF/16V/X5R/M_2 100nF/16V/X5R/M_2 C9957
EMI EMI EMI EMI
EMI
+V1P8U +V1P8A +V3P3S

+V1P8U +V1P8U +V1P8U +V1P8U
B B
C9975 C9974 C9956

C9973 C9972 C9971
100nF/16V/X5R/M_2 +V1P8A +VDDCR_VDD
EMI EMI EMI EMI EMI 100nF/16V/X5R/M_2
EMI
Detail location, refer EMI NB2567 Layout check 202000905
C10004 C10007
C10013
+VDDP_S5 +VDDCR_VDD +V3P3A

+V1P8A +VDDCR_VDD
100nF/16V/X5R/M_2 EMI 100nF/16V/X5R/M_2
EMI 100nF/16V/X5R/M_2 EMI
C10014 C10005
C10008
+V1P8A +V3P3S +VDDP_S5 +V3P3S

+V1P8A +V3P3A
EMI 100nF/16V/X5R/M_2 100nF/16V/X5R/M_2
EMI
C10015
C10009
+V3P3A +V3P3S
+V1P8A +V3P3S
C10016
C10011
A A
+V3P3A +V5P0A
+V1P8A +V3P3S
C10017 C10012
+V3P3A +V5P0A +V1P8A +VDDCR_VDD

EMI 100nF/16V/X5R/M_2 100nF/16V/X5R/M_2
EMI
C10018 Huaqin Telecom Technology Com.,Ltd.
Page name: USB HUB

+VDDCR_SOC +VDDCR_VDD
Size: Project REV:
EMI 100nF/16V/X5R/M_2 A4 Name: UX425UG V1.0
5 4 3 2 1
5 4 3 2 1
BOM Change
Add 2nd source
+V5P0S_HDMI
20201026-zhiqiang HDMI CONN
RI1 0R/J_2
EMI request JHDMI1
close to CHD1 RI861 CHKI1
ns
18 HDMI_TX0_CONN_R_DN RI2 HDMI_TX0_CONN_DN HDMI_TX0_DN
+5V
0R/J_2 2 3
HDMI_TX0_CONN_R_DP RI3 0R/J_2 HDMI_TX0_CONN_DP 1 4 HDMI_TX0_DP
HDMI_TX2_CONN_R_DP 1
100nF/10V/X5R/K_2
100nF/10V/X5R/K_2
DATA2+
2.2uF/10V/X5R/M_4
2
2
Power 1 0204
DATA2G
HDMI_TX2_CONN_R_DN 3 RI377 0R/J_2 EXC14CH350U
CI99 CI100 DATA2- EMI request
RHD1 CHD1 150R/F_2 RI4 0R/J_2
AVLC5S02050
HDMI_TX1_CONN_R_DP 4 ns RI378 ns 0R/J_2
DATA1+
R0402 5 ns
+V5P0S HDMI_TX1_CONN_R_DN
DATA1G
ns RI5 0R/J_2
+V5P0S5_HDMI_R +V5P0S_HDMI 6 DATA1-
1
U1 HDMI_TX0_CONN_R_DP 7 RI862 CHKI2
ns
ns DATA0+ HDMI_TX1_CONN_R_DN RI6 0R/J_2 HDMI_TX1_CONN_DN 2 3 HDMI_TX1_DN
8 HDMI_TX1_CONN_R_DP RI7 HDMI_TX1_CONN_DP HDMI_TX1_DP
VOUT 2 1 RHD2 04022 HDMI_TX0_CONN_R_DN
DATA0G
0R/J_2 1 4
9
3 VIN DATA0-
PMR HDMI_CLK_CONN_R_DP RI379 0R/J_2 EXC14CH350U

10
1 CLK+ 0204
100nF/10V/X5R/K_2
GND 11 150R/F_2 RI8 0R/J_2
CHD2 CLKG EMI request RI380 ns 0R/J_2
D HDMI_CLK_CONN_R_DN 12 CLK- ns D
ns
AP2331SA-7 ns RI9 0R/J_2
13 CEC
HDMI_DDC_SCL 15 SCL
HDMI_DDC_SDA 16 RI863 CHKI3
ns
SDA HDMI_TX2_CONN_R_DN RI10 0R/J_2 HDMI_TX2_CONN_DN 2 3 HDMI_TX2_DN
HDMI_TX2_CONN_R_DP RI11 0R/J_2 HDMI_TX2_CONN_DP 1 4 HDMI_TX2_DP
HDMI_HPD 19 HP_DET
20
SHELL-1 0204 RI381 0R/J_2 EXC14CH350U
17 DDC/CEC_GND SHELL-2 21 EMI request
22 150R/F_2 RI12 0R/J_2
0R/J_2
SHELL-3
ns RI382 ns 0R/J_2
1
ESDI1 ESDI2 ESDI3 14 UTILITY SHELL-4 23
RI13 RI14 ns
100K/J ns HDMI_CLK_CONN_R_DN RI15 0R/J_2
ns HDMI_CLK_CONN_DN RI16 0R/J_2
3.3PF/25V/NP0/C_2
W-04-A19F-05HD RI864 CHKI4
ns
2
0204 RI383 0R/J_2 2 3 HDMI_CLK_DN
EMI request CI1 1 4 HDMI_CLK_DP
ns
RI384 ns 0R/J_2
8KV 8KV 8KV EXC14CH350U
150R/F_2 HDMI_CLK_CONN_R_DP RI17 0R/J_2
ns HDMI_CLK_CONN_DP RI18 0R/J_2
ns
ns
Signal
6 DP0_TX0_DN CHD3 100nF/10V/X5R/K_2 HDMI_TX2_LV_DN
6 DP0_TX0_DP CHD4 100nF/10V/X5R/K_2 HDMI_TX2_LV_DP
UI1
6 DP0_TX1_DN CHD5 100nF/10V/X5R/K_2 HDMI_TX1_LV_DN
6 DP0_TX1_DP CHD6 100nF/10V/X5R/K_2 HDMI_TX1_LV_DP HDMI_TX2_LV_DP 38 23 HDMI_TX2_DP
HDMI_TX2_LV_DN 39 IN_D2P OUT_D2P 22 HDMI_TX2_DN
IN_D2N OUT_D2N
CHD7 100nF/10V/X5R/K_2 HDMI_TX0_LV_DN HDMI_TX1_LV_DP 41 20 HDMI_TX1_DP
6 DP0_TX2_DN IN_D1P OUT_D1P
6 DP0_TX2_DP CHD8 100nF/10V/X5R/K_2 HDMI_TX0_LV_DP HDMI_TX1_LV_DN 42 19 HDMI_TX1_DN
IN_D1N OUT_D1N
HDMI_TX0_LV_DP HDMI_TX0_DP
CHD9 100nF/10V/X5R/K_2 HDMI_CLK_LV_DN HDMI_TX0_LV_DN
44
45 IN_D0P PS8409A OUT_D0P
17
16 HDMI_TX0_DN
6 DP0_TX3_DN IN_D0N OUT_D0N
CHD10 100nF/10V/X5R/K_2 HDMI_CLK_LV_DP Delete wrong net name
6 DP0_TX3_DP HDMI_CLK_LV_DP HDMI_CLK_DP
47 14
20201102-zhiqiang HDMI_CLK_LV_DN 48 IN_CKP OUT_CKP 13 HDMI_CLK_DN +V5P0S_HDMI
IN_CKN OUT_CKN
ESD
C C
3V RI19 0R/J_2 DP0_HPD_LV 40 21 HDMI_HPD 5V HDMI_DDC_SCL RI20 2.2K/J_2
6 DP0_HPD HPD_SRC HPD_SNK
DP0_DDC_SCL 34 7 HDMI_DDC_SCL_8409A RI21 0R/J_2 HDMI_DDC_SCL HDMI_DDC_SDA RI22 2.2K/J_2
HDMI_TX2_CONN_DN HDMI_TX0_CONN_DN HDMI_CLK_CONN_DN 6 DP0_DDC_SCL SCL_SRC/AUXP SCL_SNK
HDMI_TX1_CONN_DN 3V DP0_DDC_SDA 33 8 HDMI_DDC_SDA_8409A RI23 0R/J_2 HDMI_DDC_SDA 5V
6 DP0_DDC_SDA SDA_SRC/AUXN SDA_SNK
1
1
1
ESDI4 ESDI5 ESDI6 DCIN_EN_8409A

ESDI7 ns 1 29 3
PESD5V0H1BSF PESD5V0H1BSF PESD5V0H1BSF 20MIL TPI1 CSCL DCIN_ENB
PESD5V0H1BSF 15KV 20MIL TPI2 ns 1 28
CSDA
RI24
4 HDMI_PDB_8409A 0R/J_2
PDB ns EC_SLP_S0_CS_N 33
2
2
2
ns 1 37 5 EQ_8409A
20MIL TPI3 POWERSW EQ
9 1 ns
15 HDMI_CEC TPI4 20MIL HDMI +V3P3S_HDMI
HDMI_TX2_CONN_DP HDMI_TX0_CONN_DP HDMI_CLK_CONN_DP 18 VDDTX12_1 12 1 ns
HDMI_TX1_CONN_DP VDDTX12_2 CEC_EN TPI5 20MIL HDMI
43
VDDRX12_1 PRE_8409A
1
1
+V1P2S_HDMI 46 27
1
VDDRX12_2 PRE +V3P3S_HDMI

ESDI8 ESDI9 ESDI10 31 I2C_ADDR_8409A
ESDI11 I2C_ADDR
PESD5V0H1BSF PESD5V0H1BSF PESD5V0H1BSF 6
PESD5V0H1BSF 30 VDD12_1 32 HDMI_ID_8409A
VDD12_2 HDMI_ID
2
2
11 2 1 ns
10K/J_2
4.7K/J_2
4.7K/J_2
4.7K/J_2
RI25 RI26 RI27 RI28 RI29
2
+V3P3S_HDMI VDDA12 TESTMODEB 10 TPI6 20MIL HDMI

RSV1 10K/J_2 ns ns ns
26
1 RSV2 25
24 VDD33_1 NC
VDD33_2 35 RESETB_8409A
RESETB
49 36
EPAD REXT
CI2 HDMI_PDB_8409A
PS8409A HDMI 1uF/6.3V/X5R/M_2 HDMI_ID_8409A
RI30 I2C_ADDR_8409A
4.99K/F_2 EQ_8409A
+V3P3S +V3P3S_HDMI
PRE_8409A
DCIN_EN_8409A
0R/J_4 RHD3
CI3
B ns 2.2uF/10V/X5R/M_4 B
4.7K/J_2
4.7K/J_2
4.7K/J_2
RI31 RI32
RI33
ns ns ns
+V1P2_HDMI +V1P2S_HDMI
+V3P3S_HDMI
内部pu high 2.36k to 3.3 FBI1
1 2
ns 2.2K/J_2 DP0_DDC_SCL
4.7uF/6.3V/X5R/M_4
100nF/10V/X5R/K_2
100nF/10V/X5R/K_2
100nF/10V/X5R/K_2
100nF/10V/X5R/K_2
100nF/10V/X5R/K_2
100nF/10V/X5R/K_2
10nF/16V/X7R/K_2
10nF/16V/X7R/K_2
10nF/16V/X7R/K_2
RI34 Bead_330 Ohm@100MHz_0603
100nF/10V/X5R/K_2
RI35 ns 2.2K/J_2 DP0_DDC_SDA CI4 CI5 CI6 CI7 CI8 CI9 CI11 CI12 CI13 CI14
CI10
RI36 100K/J_2 DP0_HPD
+V3P3S_HDMI
100nF/10V/X5R/K_2
100nF/10V/X5R/K_2
10nF/16V/X7R/K_2
CI15 CI16 CI17
ns
A A
Page name:
HDMI
Size: Project REV:
Date: Sheet: of
5 4 3 2 1
5 4 3 2 1
eDP Signal eDP CONN

BOM Change
Add 1st source
20201026-zhiqiang
RX242 0R/J_2
+VBATA_BKLT_IN JEDP1
EXC14CH350U
EDP_TX1_SOC_DP CX1 100nF/10V/X5R/K_2 EDP_TX1_C_DP EDP_TX1_C_DP 2 3 EDP_TX1_CONN_DP
6 EDP_TX1_SOC_DP EDP_TX1_SOC_DN EDP_TX1_C_DN EDP_TX1_C_DN EDP_TX1_CONN_DN 30 34
CX2 100nF/10V/X5R/K_2 1 4
6 EDP_TX1_SOC_DN ns 29 33
CHKX1 28
D +V3P3_DISPLAY_CONN D
27
RX243 0R/J_2 26
25
RX244 0R/J_2 24 31
EXC14CH350U 23
EDP_TX0_SOC_DP EDP_TX0_C_DP EDP_TX0_C_DP EDP_TX0_CONN_DP 22
CX5 100nF/10V/X5R/K_2 2 3 EDP_TX1_CONN_DP
6 EDP_TX0_SOC_DP EDP_TX0_SOC_DN EDP_TX0_C_DN EDP_TX0_C_DN ns 4 EDP_TX0_CONN_DN 21
CX6 100nF/10V/X5R/K_2 1 EDP_TX1_CONN_DN
6 EDP_TX0_SOC_DN 20
CHKX6 19
RX245 0R/J_2 EDP_TX0_CONN_DP 18
EDP_TX0_CONN_DN 17
16
RX905 0R/J_2 EDP_AUX_CONN_DP 15
EDP_AUX_CONN_DN 14
EXC14CH350U
EDP_AUX_SOC_DP EDP_AUX_C_DP EDP_AUX_C_DP EDP_AUX_CONN_DP 13
CX7 100nF/10V/X5R/K_2 2 3 EDP_BKLT_LS_EN
6 EDP_AUX_SOC_DP EDP_AUX_SOC_DN EDP_AUX_C_DN EDP_AUX_C_DN ns 4 EDP_AUX_CONN_DN 12
CX8 100nF/10V/X5R/K_2 1 EDP_HPD
6 EDP_AUX_SOC_DN 11
CHKX7 10
RX906 0R/J_2 9
RX904 0R/J_2 6 EDP_BKLT_PWM
8
CX25 7
1 6
20MIL TP15
5 32
ns 4
电容_4.7nF_0201_X7R_10 V_K(±10%) 3
2
Follow QA&UA 1
20201204-zhiqiang
nb_con30_21d25x4x1d05_0d5
FP225H-030G10M
+V3P3S
eDP VCC & BL Power
EDP CONN HQ_CODE and Foorprint update at 10/13
1uF/6.3V/X5R/M_2
C60 Add 2 & 3 source +V3P3_DISPLAY +V3P3_DISPLAY_CONN

C ns 20201102-zhiqiang C
UX1
5 VIN VOUT 1 1 RX1 1 2 ns 2
3
12pF/25V/C0G/J_2
FLG_N SHORT_0603
4.7uF/6.3V/X5R/M_4
1uF/6.3V/X5R/M_2
100nF/X5R/10V/K_2
C41
- 1
EDP_VDD_EN 4 EN/EN* GND 2 C63
C61
C62
6 EDP_VDD_EN +VSYS +VBATA_BKLT_IN
D2 EMC@
RT9742CGJ5 LM5Z3V3T1G
ns RX2 ns 0R/J_6
100K/J_2
RX12
2+
4.7uF/25V/X5R/K_6
10uF/25V/X5R/M_6
100nF/25V/X5R/M_2
1uF/35V/X5R/M_4
100nF/25V/X5R/M_2
12pF/25V/C0G/J_2
CX11 CX10 RX7
ns CX3 CX4 CX9 C40
0R/J_6
RX5 EMC@
560K/J_2 UX2
1 6
VIN VOUT
RX6 0R/J_2 4 2 ns
7,33,50,52 SLP_S3_S0A3# ns EN PG EDP_19VPG 33
3 5 BKL_ISET
eDP Control 7
GND ISET
100K/J_2
TPAD RX3
RX4
115K/F_2 G2176RB1U
EDP_HPD
EDP_BKLT_EN RX25 0R/J_2 6 EDP_HPD
6,33 EDP_BKLT_EN
1
ESD5451R-2/TR
RX18 ns
EC_EDP_BKLT_EN EDP_BKLT_LS_EN ESDX1
33 EC_EDP_BKLT_EN RX21 ns 0R/J_2
100K/J_2 ns
100nF/X5R/10V/K_2
RX22
CX22
2
ns 100K/J_2
B B
A A
Page name:
EDP CONN
Size: Project REV:
A4 Name: V1.0
UX425UG
Date: Sheet: of
5 4 3 2 1
5 4 3 2 1
Peak current:1360mA
+V3P3A +V3P3S5_WLAN
ns
R7072 1 2 0R/J_6
+V3P3S5_WLAN +V3P3S5_WLAN
PLACE CA CLOSE TO PIN 4 AND 5 RF request
2 3 RF request
D
S
PLACE CB CLOSE TO PIN 72 AND 73
100nF/6.3V/X5R/K_2
100nF/6.3V/X5R/K_2
1 G
PPMT20V3
R242 ns
10uF/6.3V/X5R/M_4
100nF/10V/X5R/K_2
10nF/25V/X5R/K_2
100pF/25V/C0G/J_2
47pF/25V/C0G/J_2
QW3100 CW1 CW2
CW2101
CW2100
CW3
10nF/25V/X5R/K_2
100pF/25V/C0G/J_2
47pF/25V/C0G/J_2
+V3P3A CW4 CW5
100nF/10V/X5R/K_2
D D
10uF/6.3V/X5R/M_4
ns R7104 CW8 CW9 CW10 CW7 CW6
100K/J_2 ns ns
ns ns
100K/J_2
100nF/6.3V/X5R/K_2
R244
ns
ns
10K/J_2
CW1111
Q555
3D
RW5 0R/J_2 2N7002
G
RW1 ns 0R/J_2
1
NOTE: 33 WLAN_EN_N
2
ns
WLAN_PWR_EN SHOULD COME FROM EC
IN S3/S4/S5, EC TOGGLES high THIS SIGNAL
S
IN S0i3, EC KEEPS THIS SIGNAL low
UW2A
M2_AX200_Cyclone_Peak2_2
1 UIM_POWER_SRC_GPIO1 CLink_CLK 42
2 UIM_POWER_SNK CLink_DATA 43
3 UIM_SWP CLink_RESET 44
SDIO_RESET_N 45
8 ALERT_N SDIO_WAKE_N 46
9 I2C CLK SDIO_DATA3 47
10 I2C DATA SDIO_DATA2 48
11 COEX1 SDIO_DATA1 49
+V3P3S5_WLAN
12 COEX2 SDIO_DATA0 50
13 COEX3 SDIO_CMD 51 UW2B
14 SYSCLK_GNSS0 SDIO_CLK 52
Connected to device requiring a 32-kHz clock in S5 state (optional). 15 TX_BLANKING_GNSS1 UART_WAKE_N 53 M2_AX200_Cyclone_Peak2_2
+V3P3S5_WLAN RW12 0R/J_2 SUSCLK_WLAN 27 SUSCLK_32KHZ UART_RTS 54 7 RESERVED_7 3P3V_4 4
8 SUS_CLK_WLAN WLAN_OFF_R_N 28 W_DISABLE1_N UART_RX 55
RW13 0R/J_2 16 RESERVED_16 3P3V_5 5
9 PCH_WLAN_OFF_N WLAN_WAKE_DEVICE 29 PEWAKE_N UART_TX 56
ns 18 RESERVED_18 3P3V_72 72
10K/F_4ns
R3393
30 CLKREQ_N UART_CTS 57 19 RESERVED_19 3P3V_73 73
WLAN_RST#_R 8 PCIE_WLAN_CLKREQ3 31 PERST_N PCMFR1 58 21 RESERVED_21
33 REFCLKN0 PCMOUT 59 22 RESERVED_22
8 GPP_WLAN_CLK3_DN 34 REFCLKP0 PCMIN 60 24 RESERVED_24 UW2C
8 GPP_WLAN_CLK3_DP 36 PERN0 PCMCLK 61 25 RESERVED_25 GND_77 77
5 GPP_WLAN_RX_DN BT_OFF_N_WIFI BT_RF_KILL_N
C 37 PERP0 W_DISABLE2_N 63 RW14 0R/J_2 66 RESERVED_66 GND_78 78 M2_AX200_Cyclone_Peak2_2 C
SWAP -0204 5 GPP_WLAN_RX_DP 39 PETN0 USB_D_N 69 BT_RF_KILL_N 9
5 GPP_WLAN_TX_DN 67 RESERVED_67 GND_79 79
40 PETP0 USB_D_P 70 USB2_BT_P3_DN 9 GND_80 80
5 GPP_WLAN_TX_DP USB2_BT_P3_DP 9
GND_81 81 GG50 GG09
65 LED1_N LED2_N 64 GG51 GG50 GG09 GG11
1 OF3 GND_82 82
GND_83 GG52 GG51 GG11 GG10
83
+V3P3S5_WLAN GND_84 84 GG53 GG52 GG10 GG12
85
PR:FCH端已经pull high，这边pull high会有1.5V漏电---0403 GND_86 GG55 GG54 GG13 GG14
86
R2431 4.7K/J_2 GG56 GG55 GG14 GG15
GND_87 87
GG57 GG56 GG15 GG16
GND_88 88
+V3P3S5_WLAN 89 GG58 GG57 GG16 GG17
ns GND_89
GG58 GG17
GND_90 90 GG59 GG18
91
GG61 GG60 GG19 GG20
GND_92 92
G
Q2125 WNM3013 GND_93 GG62 GG61 GG20 GG21

R2454 93
GG63 GG62 GG21 GG22
1
GND_94 94
D
3 2
S WLAN_WAKE_DEVICE GND_95 GG64 GG63 GG22 GG23
7,9 WLAN_WAKE_N 95
96
GG65 GG24
ns 10K/J_2 GND_G1 GG01 GG66
GG66 GG25
GG25
GND_G2 GG02 GG67 GG26
ns GND_G3 GG03 GG68 GG67 GG26 GG27
0R/J_2 GG69 GG68 GG27 GG28
R2426 GND_G4 GG04
PCIE_WLAN_CLKREQ3 GG70 GG69 GG28 GG29
GND_G5 GG05
GG71 GG70 GG29 GG30
GND_G6 GG06
GND_G7 GG72 GG71 GG30 GG31
GG07
GND_G8 GG08 GG72 GG31 GG32
GG32 GG33
97
97
GG33 GG34
98
98 GG34 GG35
99
+V3P3A 99 GG35
100 GG36
100 GG36 GG38
2 OF 3 GG38
For MS GND_6 6
17
GG37
GG37
GG39
GND_17 GG39
GND_20 20 GG40
+V3P3A R7138 GG40 GG41
GND_23 23
10K/J_2 26 GG41 GG42
GND_26 GG42
U17 GND_32 32 GG43
74LVC1G08GW GG43 GG44
GND_35 35
GG44 GG45
ns GND_38 38
1 GG45 GG46
GND_41 41
5 B WLAN_RST_N 33 3 OF3 GG46 GG47
GND_62 62
VCC 2 R7112 0R/J_2 GG47 GG48
68
WLAN_RST#_R 4 A PLT_RST_N 6,7,20,28,42,43 GND_68 GG48 GG49
71
Y 3 +V3P3S5_WLAN GND_71 GG49
ns GND_74
74
GND
GND_75
75
ns 76
GND_76
RW26 10K/J_2 BT_OFF_N_WIFI
ns
R7100 0R/J_2
B ns B
RW27 10K/J_2 WLAN_OFF_R_N
R7140 0R/J_2 ns
A A
Page name:
WIFI HarP 2 1216
Size: Project REV:
Date: Sheet: of
5 4 3 2 1
5 4 3 2 1
NO PULL-UP RESISTORS ON GPG(7:2)-RESERVED FOR HARDWARE STRAPPING
GPG2 IS PULLED UP TO ENABLE EXTERNAL SPI FLASH MIRROR-CODE FUCTION
+V1P8A +V1P8A_EC DESIGN NOTE:
EC SHOULD GENERATE EC_SLP_SX_N BY ANDING SLP_S0_N AND SLP_S3_N
R131 0R/J_2
+V3P3A_EC
+AVCC
R2372 33R/F_2
+V3P3A_LDO +V3P3A +V3P3A_EC
+V3P3A_EC
40mil +V1P8A_EC
100nF/6.3V/X5R/K_2
2
FB3101 ns 1 120ohm_100MHz_1.3A
1nF/25V/X7R/K_2
R3291 0R/J_4
100nF/6.3V/X5R/K_2
C2566
D D
C2544
ns R3329
R7082 0R/J_4
C160
100K/J_2
+V3P3A_EC
+V3P3A_EC V5P0A_EN_EC RE11 0R/J_2 V5P0A_EN
ns V5P0A_EN 38,40,47,50,51
100nF/6.3V/X5R/K_2
FB31001 2 120ohm_100MHz_1.3A
1.VCC :LPC BUS interface(3.3 or 1.8) & eSPI BUS interface(1.8)
1 1
R2345 CR2103
C3217
2.VFSPI :SPI interface(3.3V or 1.8V)
3.VSTBY :standby power supply of 3.3V
2 2
100K/J_2
4.VCORE :core power bypass,internal output 20,33,38,40 EC_WRST_N
5.AVSS :analog ground for analog component +V3P3A_EC
TypeC_P0_PRESENT 37
C2520
6.AVCC :analog VCC for analog component WLAN_EN_N 32 PROCHOT_EC_N R2375 100R/F_2 APU_PROCHOT# 6,49 1uF/6.3V/X5R/M_2
7.VSS :Ground VR_PWRGD 49
100nF/6.3V/X5R/K_2
100nF/6.3V/X5R/K_2
100nF/6.3V/X5R/K_2
100nF/6.3V/X5R/K_2
100nF/6.3V/X5R/K_2
100nF/6.3V/X5R/K_2
Q2120
3D
TYPEC_I2C_INT_EC 34 PD I2C INT WNM3013
G +V3P3A_EC
C2594
C2595
C3216
C2498
C2575
C2497
C2495 EC_PROCHOT 1
2
1uF/6.3V/X5R/M_2 +V3P3A_EC R2382
TypeC_P1_PRESENT 37
S
R2368
TYPEC_P0_PWR_EN 37 100K/J_2
100nF/6.3V/X5R/K_2
100K/J_2
V5P0A_EN_EC
EC_SLP_SX R3283 0R/J_2
0730-配合时序修改
EC_SLP_SX_N 50,51,52 CR2111
C3229
2 2 1 1
33 EC_CHG_ACOK CHG_ACOK 20,46
1R3287ns 02012
RSMRST_N 7
PMR
LPC_CLKRUN 1 R2336ns PMR 02012
LPC_CLKRUN_N 8
1 T2140
U19
D10
K10
B12
A12
A13
M3
D4
D5
N2
D8
K4
E6
E9
E4
B7
A8
B8
A9
+V3P3A_EC
J5
J4
IT5571
K1 B4 AMP AMP单独接--0331
GPH7
8,43 LPC_AD0_ESPI_IO_0
VCC
VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VFSPI
ID6/GPH6
ID5/GPH5
ID4/GPH4
ID3/GPH3
VSTBY(PLL)
EGCLK/GPE3
EGCS#/GPE2
EGAD/GPE1
EIO0/LAD0/GPM0
CLKRUN#/ID0/GPH0
SMCLK0/GPB3 SMB_EC_SCLK 20,33,42
AVCC
SMDAT4/L80LLAT/GPE7
SMCLK4/L80HLAT/BAO/GPE0
J2 A2
8,43 LPC_AD1_ESPI_IO_1 EIO1/LAD1/GPM1 SMDAT0/GPB4 SMB_EC_SDATA 20,33,42
8,43 LPC_AD2_ESPI_IO_2
J1
EIO2/LAD2/GPM2 SM BUS SMCLK1/GPC1
B3
SM_BAT_CLK 33,45
H2 B2 battery/charge
8,43 LPC_AD3_ESPI_IO_3 0201 R2367 ESPI_RESETB EIO3/LAD3/GPM3 SMDAT1/GPC2 SM_BAT_DATA 33,45 R3315
1 2 M4 B1
8,43 LPC_RESET ns ERST#/LPCRST#/GPD2 PECI/SMCLK2/GPF6 APU_EC_SCLK 6,33,38,56 100K/J_2
LPC_CLK_ESPI_CLK K2 C1 PECI/Termal protection/termal sensor 0x98/0x4c/
8 LPC_CLK_ESPI_CLK H1 ESCK/LPCCLK/GPM4 SMDAT2/PECIRQT#/GPF7 APU_EC_SDATA 6,33,38,56
port2增加Termal protection/termal sensor--0331 CR3102
8,43 LPC_FRAME_N_ESPI_CSB ECS#/LFRAME#/GPM5 APU Termal Monitor
0201 R2355 2 2 1 1
0204 1 2 SUS_STAT_N M1 8 SMC_RUNTIME_SOC_SCI_N SMC_RUNTIME_EC_SCI_N 33
EMI request
8,33 EC_LPC_PD# ns LPCPD#/GPE6
2
C C
close to EC C3695 37 TYPEC_P0_PWR_LIMIT_EC
F1
GA20/GPB5 PS/2 EDP_19VPG_EC
R3317
ns
0R/J_2
G2 A11
8,33 LPC_SERIRQ ALERT#/SERIRQ/GPM6 PS2CLK0/CEC/TMB0/GPF0
PLTRST#/ECSMI#/GPD4 eSPI/LPC
1
L2 B11
ns 100pF/50V/C0G/J_2 7,33 EC_SMI_N PS2DAT0/TMB1/GPF1 EC_SLP_S0_CS_N 30
N4 D9
33 SMC_RUNTIME_EC_SCI_N ECSCI#/GPD3 PS2CLK2/GPF4 PM_PWRBTN_R_N 7 R3316
20,33,38,40 EC_WRST_N EC_KBRST_R#
L1
WRST# GPIO PS2DAT2/GPF5
B9
FN_LED 39 +V3P3A_EC ns
0R/J_2 H4
8 EC_KBRST#
IT5571
M2 KBRST#/GPB6
R7967 33 PWUREQ_N PWUREQ#/BBO/SMCLK2ALT/GPC7
10K/J_2
M5
PWM0/GPA0 N5 LED_BAT_LOW 40
VFBGA
PWM1/GPA1 LED_BAT_FULL 40 R2381
M6
PWM2/GPA2 KBBKL_EN_PWM 39 10K/J_2
E5 N6
通知charge可以充电了 46 BATT_IN_L CRX0/GPC0 PWM3/GPA3 TYPEC_P1_PWR_LIMIT_EC 37
+V3P3A_EC 39 CAP_LED
D2
CTX0/TMA0/GPB2 CIR SMCLK5/PWM4/GPA4
K6
EC_CHG_ACOK 33
J6
SMDAT5/PWM5/GPA5 EC_Board_ID 33
33 EC_Board_ID +V3P3A_EC
+V3P3A_EC PWM 0724-add +V3P3A_EC
B13 1 T3114
42 5825M_SLP DAC4/DCD0#/GPJ4
D1 M11
7,48 SLP_S5# DSR0#/GPG6 TACH0A/GPD6 CPU_TACHO_FAN 42 R2380
0R/J_2 N7 M12
42 EC_USBPWR1_EN R7053 B10 GINT/CTS0#/GPD5 TACH1A/TMA1/GPD7 V3P3A_PGOOD 47 0730-配合时序修改 10K/J_2
R2394 49 EC_VR_ON PS2DAT1/RTS0#/GPF3 ns
10K/J_2 C12 C2 R1344 RE12
28 SSD_EN_N A10 DAC5/RIG0#/GPJ5 GPC4 E1 SYS_PWROK 7
47,50,51 1.8VA_EN PS2CLK1/DTR0#/GPF2 GPC6 WLAN_RST_N 32 100K/J_2 10K/J_2
PDG中EC GPIO控制1.8V regulator A3
20 VGA_AC_DC_N TXD/SOUT0/GPB1
R2989 A4
48 VCC_DDR_PWROK RXD/SIN0/GPB0
100K/J_2 EDP_19VPG_EC
EC_THRM_ALERT4 F10 A5 EC_PWRBTN_IN_N PM_PWRBTN_R_N EC_PWRBTN_IN_N PWR_BUTTON_N
ADC5/DCD1#/GPI5 PWRSW/GPE4 RE13 1K/J_2
PWR_BUTTON_N 39
46 CHG_IADPT EC_THRM_ALERT5
F12
ADC6/DSR1#/GPI6 UART port RI1#/GPD0
N1
PM_AC_PRESENT 7,33,34 +V3P3A_EC
PG is OD--0329 E13
ADC7/CTS1#/GPI7 WAKE UP RI2#/GPD1
N3
PM_BATLOW_N 7,33
Q9725 N8
39,42 LED_PWR_ON K7 RTS1#/GPE5
3D
41 TP_POWER_EN_N F4 PWM7/RIG1#/GPA7 A1
WNM3013
7,31,50,52 SLP_S3_S0A3# DTR1#/SBUSY/GPG1/ID7 RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 CAM_PWR_ON_EC 42 CAM POWER ENABLE
G D7
34 SMB_TYPEC_SDATA E8 CTX1/SOUT1/GPH2/SMDAT3/ID2
EDP_19VPG R7051
31 EDP_19VPG
1
PD 34 SMB_TYPEC_SCLK CRX1/SIN1/SMCLK3/GPH1/ID1 R2395 R2390 R2387 R2378
47K/J_4
2
+V3P3A_EC B5 47K/J_4 47K/J_4 47K/J_4 47K/J_4

27 EC_FLASH_SPI_CLK FSCK
A7
27 EC_FLASH_SPI_CS0_N FSCE#
B6 EXTERNAL SERIAL FLASH
S
27 EC_FLASH_SPI_MOSI FMOSI EC_THRM_ALERT1

A6 G10 +V3P3A_EC
27 EC_FLASH_SPI_MISO FMISO ADC0/GPI0 EC_THRM_ALERT2
G13 EC_THRM_ALERT4 EC_THRM_ALERT5
R3281 K13 ADC1/GPI1 G12 EC_THRM_ALERT3
40 EC_RTC_RST
R2384 ns 0R/J_2
KSO16/SMOSI/GPC3 ADC2/GPI2 BOM Change
J10 F9 Mount RT_SOC
49 ALLSYSPWRGD KSO17/SMISO/GPC5 ADC3/GPI3 LID_INT_N 42
2
M7 F13
NCP15WB473F03RC
20201025-zhiqiang
2
42 CPU_PWM_FAN
NCP15WB473F03RC
NCP15WB473F03RC
NCP15WB473F03RC
NCP15WB473F03RC
PWM6/SSCK/GPA6 ADC4/GPI4 CHG_IBAT 46
R2391
RT_CHARGER
100K/J_2 EC_STRAP E7 A/D D/A
RT_SOC
SSCE0#/GPG2
RT_VR
RT_SSD
SPI ENABLE
RT_DDR
0R/J_2 R2331 E2
48 EC_VDDQ_EN SSCE1#/GPG0 E12
0204 TACH2A/GPJ0 EC_MUTE_N 42
ns M8 D13 ns
GPG0 exchange GPJ7 39 KSO0 KSO0/PD0 TACH2B/GPJ1 EC_EDP_BKLT_EN 31
1
R3282 ns J7 D12 R2351 0R/J_2
1
39 KSO1 KSO1/PD1 DAC2/TACH0B/GPJ2 EDP_BKLT_EN 6,31 470K/J_2
N9 C13
39 KSO2 M9 KSO2/PD2 DAC3/TACH1B/GPJ3 V3P3A_EN_EC 8 LID_INT_N
B B
39 KSO3 KSO3/PD3 ns ns ns
100K/J_2 K8
39 KSO4 J8 KSO4/PD4
39
39
KSO5
KSO6
N10 KSO5/PD5
KBMX 0721-增加二供
M10 KSO6/PD6
39 KSO7 N11 KSO7/PD7
39 KSO8 KSO8/ACK#
K9
39 KSO9 N12 KSO9/BUSY
39 KSO10 N13 KSO10/PE G1 0204
39 KSO11 TYPEC_P1_PWR_EN 37
KSI3/SLIN#
KSO11/ERR# GPJ7
KSI1/AFD#
GPG0 exchange GPJ7
KSI0/STB#
KSI2/INIT#
M13 F2
39 KSO12 L12 KSO12/SLCT GPJ6 TP_Enable 41
VCORE
39 KSO13 KSO13 R7077
L13
AVSS
VSS1
VSS2
VSS3
VSS4
VSS5
2 1
KSI4
KSI5
KSI6
KSI7
39 KSO14 K12 KSO14 CHG_PSYS 46
39 KSO15 KSO15
137K/F_2
J12
J13
F5
J9
H12
H10
H13
E10
H9
G9
D6
G4
G5
H5
K5
VCORE
+V3P3A_EC
C3230
Unmount P7023&R7024 For +V5P0A leakage 50mv
20201126-zhiqiang
100nF/6.3V/X5R/K_2
ns
39
39
39
39
39
39
39
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
39
KSI0
R3284 R3274
R3313 R3314 R3309 R2360 R3306 R3278 R3279 R2342 R7023 R7024
2.2K/J_2 2.2K/J_2
10K/J_2 100K/J_2 10K/J_2 100K/J_2 100K/J_2 4.7K/J_2 4.7K/J_2 100K/J_2 2.2K/J_2 2.2K/J_2
ns ns ns
7,33,34 PM_AC_PRESENT ns ns
7,33 PM_BATLOW_N
33 PWUREQ_N
8,33 EC_LPC_PD#
7,33 EC_SMI_N
33,45 SM_BAT_CLK
33,45 SM_BAT_DATA
20,33,42 SMB_EC_SCLK
20,33,42 SMB_EC_SDATA
8,33 LPC_SERIRQ
A A
6,33,38,56 APU_EC_SCLK
6,33,38,56 APU_EC_SDATA
Page name:
EC(IT5571VG)
Size: Project REV:
Date: Sheet: of
5 4 3 2 1
5 4 3 2 1
+V3P3S
+V3P3S
R9961
R9959 DP3_AUXN_C
DP2_AUXN_C
100K/J_2
100K/J_2 R9962
R9960 DP3_AUXP_C
DP2_AUXP_C
100K/J_2
100K/J_2
+V3P3S
D RT1151 10K/J_2 DP2_HPD_P0 100K/J_2 RT2131 D
+V3P3S
TCP1_CC2_PD CT17 390pF/50V/X7R/M_2

RT1152 10K/J_2 DP3_HPD_P1 100K/J_2 RT2132
TCP1_CC1_PD CT16 390pF/50V/X7R/M_2
UT14
CT88 TCP0_CC1_PD TCP0_CC1_PD K2 K9 TCP1_CC1_PD

35 TCP0_CC1_PD TCP0_CC2_PD CC1_P1 CC1_P2 TCP1_CC2_PD TCP1_CC1_PD 36 +V3P3A_VSYS_PD
CT89
390pF/50V/X7R/M_2
TCP0_CC2_PD TYPE C CONN 35 TCP0_CC2_PD
H2
CC2_P1 CC2_P2
K10
TCP1_CC2_PD 36 TYPE C CONN
390pF/50V/X7R/M_2 TCP0_SBU1_CONN RT325 0R/J_2 TCP0_SBU1_CONN_R A3
35 TCP0_SBU1_CONN TCP0_SBU2_CONN TCP0_SBU2_CONN_R SBU1_P1 TCP1_SBU2_CONN_R TCP1_SBU2_CONN USBC0_OCP#
TYPE C CONN 35 TCP0_SBU2_CONN RT326 0R/J_2 A4
SBU2_P1 SBU2_P2
F1
E1 TCP1_SBU1_CONN_R
RT310
RT311
0R/J_2
0R/J_2 TCP1_SBU1_CONN TCP1_SBU2_CONN 36 TYPE C CONN 2.2K/J_2 RT137
L7 SBU1_P2 TCP1_SBU1_CONN 36 1 USBC1_OCP#

2.2K/J_2 RT140
GPIO TPT24 26MIL
APU_RST#_PD K5
L8 OVP_TRIP_P1/GPIO
OVP_TRIP_P2/GPIO
I2C_SCL_SCB1_EC/GPIO
I2C_SDA_SCB1_EC/GPIO
L6
K6
TYPEC_PD_EC_CLK
TYPEC_PD_EC_SDA
RT109
RT110
0R/J_2
0R/J_2
SMB_TYPEC_SCLK
SMB_TYPEC_SDATA
ns
SMB_TYPEC_SCLK
SMB_TYPEC_SDATA
33
33
EC
OK L4 L5 TYPEC_I2C_INT_EC_R RT6 0R/J_2 1
USBC0_OCP# USBC0_OCP#_R VSEL_1_P2/GPIO I2C_INT_EC/GPIO TYPEC_I2C_INT_EC 33 TPT25 26MIL
0R/J_2 RT256 B6 2.2K/J_2 RT200 TYPEC_PD_EC_CLK
RT3 0R/J_2 DP2_HPD_P0_R K7 UV_OCP_TRIP_P1/GPIO E2 SRC_P1_FRS_EN
6 DP2_HPD_P0 HPD_P1/GPIO I2C_SCL_SCB2_TBT/GPIO SRC_P1_FRS_EN 37 ns
DP3_HPD_P1_R SRC_P0_FRS_EN RT201 TYPEC_PD_EC_SDA
TO CPU 6 DP3_HPD_P1
RT5 ns 0R/J_2 E10
B9 HPD_P2/GPIO I2C_SDA_SCB2_TBT/GPIO
D2
F2 SRC_P0_FRS_EN 37
2.2K/J_2
B8 VCONN_OCP_TRIP_P2/GPIO I2C_INT_TBT_P1/GPIO 10K/J_2 RT204 TYPEC_I2C_INT_EC_R

PD OC to PCH OC PD_FW_Detect H10 VCONN_OCP_TRIP_P1/GPIO L10 PM_AC_PRESENT_R RT309 0R/J_2 PM_AC_PRESENT_LS EC
VSEL_2_P2/GPIO I2C_SCL_SCB3/VSEL_1_P1/GPIO J10
I2C_SDA_SCB3/VSEL_2_P1/GPIO G2
PD_SWD_DATA B2 I2C_INT_TBT_P2/GPIO 1
SWD_IO/AR_RSTN/GPIO TPT26 26MIL
PD_SWD_CLK_I2C_ADD C2
SWD_CLK/I2C_CFG_EC/GPIO I2C_SCL_SCB4/GPIO
I2C_SDA_SCB4/GPIO
F10
G10
TYPEC_PD_SOC_CLK_R
TYPEC_PD_SOC_DAT_R
RT138
RT139
0R/J_2
0R/J_2
TYPEC_PD_SOC_CLK
TYPEC_PD_SOC_DAT
ns CPU +V3P3A
B7 USBC1_OCP#_R RT277 0R/J_2 USBC1_OCP# 1 4.7K/J_2 RT141 TYPEC_PD_SOC_DAT_R

+V3P3A_VDDD_PD UV_OCP_TRIP_P2/GPIO TPT27 26MIL +V3P3A
CT300 100nF/X5R/10V/K_2 DP2_AUXP_C RT17 0R/J_2 DP2_AUXP_R B11 D11 RT16 0R/J_2 DP3_AUXP_C CT303 100nF/X5R/10V/K_2 4.7K/J_2 RT142 TYPEC_PD_SOC_CLK_R
6 DP2_AUXP AUX_P_P1 AUX_P_P2 ns ns DP3_AUXP 6
from CPU CT301 100nF/X5R/10V/K_2 DP2_AUXN_C RT18 0R/J_2 DP2_AUXN_R C11 E11 RT15 0R/J_2 DP3_AUXN_C CT304 100nF/X5R/10V/K_2
6 DP2_AUXN 1 TBT_P1_LSRX_R A11 AUX_N_P1 AUX_N_P2 L11 TBT_P2_LSRX_R 1 DP3_AUXN 6
26MIL TPT2431 1 TBT_P1_LSTX_R A10 LSRX_P1 LSRX_P2 K11 TBT_P2_LSTX_R 1 TPT22226MIL
RT149
26MIL TPT2432 LSTX_P1 LSTX_P2 TPT22326MIL
ns A7 G11 ns RT402
DMINUS_SYS_P1 DMINUS_SYS_P2
4.7K/J_2 37 TCPC_OC_P1_N
TCPC_OC_P1_N
TCPC_OC_P0_N
ns A6
A9 DPLUS_SYS_P1
UART_RX_P1/GPIO
CCG5 DPLUS_SYS_P2
UART_RX_P2/GPIO
F11
J11
ns
OC to PD
37 TCPC_OC_P0_N
A8
C1 UART_TX_P1/GPIO
DMINUS_BOT_P1
(CYPD5225-96BZXI) UART_TX_P2/GPIO
DMINUS_BOT_P2
H11
L1 10K/J_2
PD_XRES B1
A2 DPLUS_BOT_P1 96-BGA DPLUS_BOT_P2
K1
H1
PM_AC_PRESENT_LS
DMINUS_TOP_P1 DMINUS_TOP_P2
3
A1 G1
100nF/10V/X5R/K_2
CT90 DPLUS_TOP_P1 DPLUS_TOP_P2 +VBUS_TYPEC_P0 D Q88

PD_XRES H6 J1 WNM2046C-3/TR PD_P0_CSP
XRES CSP_P1 PD_P0_CSP 37 G
C B3 1 C
CSN_P1 D1 PD_P0_CSN 37 PM_AC_PRESENT 7,33 PD_P0_CSN
CR3155 H7 VBUS_P1 K3 TCPC_P0_SRC_EN_N +V5P0A S
2 2 1 1 USBC0_OCP# G7 GND_1 VBUS_P_CTRL_P1 K4 TCPC_P0_SNK_EN
100nF/25V/X5R/M_2
100nF/25V/X5R/M_2
9 USB_OCP_ALL# GND_2 VBUS_C_CTRL_P1 TCPC_P0_SNK_EN 37
2
G6 J2
G5 GND_3 V5V_P1 CT98 CT99
G4 GND_4 L2 +VBUS_TYPEC_P1
nsCR3156 GND_5 CSP_P2 PD_P1_CSP 37 ns ns
2 2 1 1 USBC1_OCP# F8 K8
100nF/10V/X5R/K_2
CT103
F7 GND_6 CSN_P2 L3 PD_P1_CSN 37
+V3P3A_VDDD_PD F6 GND_7 VBUS_P2 B4 TCPC_P1_SRC_EN_N +V5P0A
F5 GND_8 VBUS_P_CTRL_P2 B5 TCPC_P1_SNK_EN
ns GND_9 VBUS_C_CTRL_P2 TCPC_P1_SNK_EN 37
F4 L9
RT114 10K/J_2 PD_FW_Detect E8 GND_10 V5V_P2
E7 GND_11 +V3P3A_VSYS_PD
100nF/10V/X5R/K_2
E6 GND_12 CT102
ns GND_13
RT115 10K/J_2 E5 A5 PD_P1_CSP
E4 GND_14 VSYS +V3P3A_VDDD_PD
D8 GND_15 PD_P1_CSN
D7 GND_16 D10
D6 GND_17 VDDD
100nF/25V/X5R/M_2
100nF/25V/X5R/M_2
GND_18
1: For USB TypeC support Data transfer and full range charging FW D5
GND_19 B10 +V3P3A_VCCD_PD CT49 100nF/10V/X5R/K_2 CT100 CT101
0: Type C USB 3.1 Gen 2 Data + PD + Display FW G8
NC_1
VCCD
ns ns
H4
H5 NC_2 C10
H8 NC_3 VDDIO +V3P3A_VDDD_PD +V3P3A_VDDD_PD
NC_4
+V3P3A_VDDD_PD
2.2uF/6.3V/X5R/M_4
100nF/10V/X5R/K_2
+V3P3A_VSYS_PD +V3P3A
100nF/10V/X5R/K_2
CT53 CT85
+V3P3A_LDO
Slave Addr Ra 1% Rb 1%
CYPD5225-96BZXI CT84 RT107 0R/J_4
0x08 NC NC
RT56 0x40 NC Mount RT108 ns 0R/J_4
ns 1K/J_2
Ra 0x42 Mount NC
2.2uF/6.3V/X5R/M_4
100nF/10V/X5R/K_2
CT86 CT87
PD_SWD_CLK_I2C_ADD I2C slave address:
*Floating: 0X08
High: 0X42 +V3P3A +V1P8A
Low: 0X40
+V3P3A_VDDD_PD
RT199
Rb ns 1K/J_2
+V1P8A
RT1146 2019 12/10 add

R9917 R9918
RT144
B +V3P3A_VDDD_PD DP2_AUXP_C RT312 0R/J_2 DP2_AUXP_C_R RT313 0R/J_2 TCP0_SBU1_CONN B
100K/J_2
10K/J_2 DP2_AUXN_C RT314 ns 0R/J_2 DP2_AUXN_C_R RT315 ns 0R/J_2 TCP0_SBU2_CONN Reserved cap
Q63 4.7K/J_2 4.7K/J_2
1
ns ns +V1P8A
TCPC_P1_SRC_EN USBC_I2C_SCL
WNM2046C-3/TR TYPEC_PD_EC_CLK TYPEC_PD_EC_SDA
RT145 TCPC_P1_SRC_EN 37
G
APU_RST#_PD 3 2 APU_RST# 100K/J_2 USBC_I2C_SDA

S
APU_RST# 6,43
D
Q9707
1
3
QT6 DP3_AUXP_C RT316 0R/J_2 DP3_AUXP_C_R RT317 0R/J_2 TCP1_SBU1_CONN VDD_18_S5
D
ns CT161 ns CT162 WNM2046C-3/TR
10pF/25V/C0G/J_2 10pF/25V/C0G/J_2
G
+V3P3A_VDDD_PD DP3_AUXN_C
Place together RT318 ns 0R/J_2 DP3_AUXN_C_R RT319 ns 0R/J_2 TCP1_SBU2_CONN
TYPEC_PD_SOC_CLK 3 2
TCPC_P1_SRC_EN_N 1 G
S
D
WNM2046-3/TR TYPEC_PD_SOC_DAT USBC_I2C_SCL 9
1 40MIL ns ns
TPT36 ns 0R/J_2
S R9936
1 40MIL
TPT37
2
+V1P8A
PD_XRES 1 40MIL
TPT38
Q9708
1
PD_SWD_CLK_I2C_ADD 1 40MIL TYPEC_PD_SOC_CLK_R TYPEC_PD_SOC_DAT_R
TPT39 WNM2046C-3/TR
G
PD_SWD_DATA 1 40MIL
TPT40 3 2
S
USBC_I2C_SDA 9
D
+V3P3A_VDDD_PD ns CT163 ns CT164
10pF/25V/C0G/J_2 10pF/25V/C0G/J_2 ns 0R/J_2
R9937
RT146
+V3P3A_VDDD_PD 100K/J_2
TCPC_P0_SRC_EN
TCPC_P0_SRC_EN 37
RT147
3
100K/J_2 QT7
D
TCPC_P0_SRC_EN_N 1 G
WNM2046-3/TR
S
2
A A
Page name:
BLANK
Size: Project REV:
Date: Sheet: of
5 4 3 2 1
5 4 3 2 1
RT58 0R/J_2
EXC14CE900U
1 4 TCP0_TX1_CMC_DP CT70 220nF/25V/X5R/M_4 TCP0_RT_TX1_CONN_DP
TX2 9 USBC0_DP2_TXP1_DP 2 3 TCP0_TX1_CMC_DN TCP0_RT_TX1_CONN_DN TX
CT71
D 9 USBC0_DP2_TXN1_DN D
CHK4 220nF/25V/X5R/M_4
ns
RT71 0R/J_2
RT79 0R/J_2
EXC14CE900U
1 4 TCP0_TXRX1_CMC_DN CT64 330nF/25V/X5R/M_4 TCP0_RT_TXRX1_CONN_DN
RX2 9 USBC0_DP2_TXN0_DN TCP0_TXRX1_CMC_DP TCP0_RT_TXRX1_CONN_DP RX
2 3 CT65 330nF/25V/X5R/M_4
9 USBC0_DP2_TXP0_DP
CHK5
RT80 ns 0R/J_2
RT36 0R/J_2 TCP0_CC2_PD 0R/J_2 TCP0_CC2_CONN

RT112
34 TCP0_CC2_PD
EXC14CE900U
220nF/25V/X5R/M_4 TCP0_CC1_PD RT111 0R/J_2 TCP0_CC1_CONN
1 4 TCP0_TX0_CMC_DP CT68 TCP0_RT_TX0_CONN_DP 34 TCP0_CC1_PD
TX1 9 USBC0_DP2_TXP2_DP TCP0_TX0_CMC_DN TCP0_RT_TX0_CONN_DN TX
2 3 CT69
9 USBC0_DP2_TXN2_DN
RT48 ns 0R/J_2 TCP0_SBU1_CONN
TCP0_SBU2_CONN TCP0_SBU1_CONN 34
TCP0_SBU2_CONN 34
RT50 0R/J_2
EXC14CE900U
RX1 9 USBC0_DP2_TXN3_DN 2 3 TCP0_TXRX0_CMC_DP TCP0_RT_TXRX0_CONN_DP RX
CT5 330nF/25V/X5R/M_4
9 USBC0_DP2_TXP3_DP
CHK2
RT51 ns 0R/J_2
C C
BOM Change
Add 2nd source TCP0_SBU2_CONN
20201026-zhiqiang TCP0_SBU1_CONN
电容_100pF_0201_C0G_50V_J
电阻_1M_0201_1/20W_J
电容_100pF_0201_C0G_50V_J
电阻_1M_0201_1/20W_J
JTBT1
CT73 RT123
A1 B12 CT72 RT122
GND1 GND4 ns ns
ns ns
+VBUS_TYPEC_P0 TCP0_RT_TX0_CONN_DP A2 B11 TCP0_RT_TXRX0_CONN_DP
TX1+ RX1+ +VBUS_TYPEC_P0
TCP0_RT_TX0_CONN_DN A3 B10 TCP0_RT_TXRX0_CONN_DN
TX1- RX1-
A4 B9 Reserve For SBU
VBUS1 VBUS4 20201207-zhiqiang
100nF/25V/X5R/M_2
TCP0_CC1_CONN A5 B8 TCP0_SBU2_CONN
CC1 SBU2
1
10uF/25V/X5R/M_6
CT10 CT21
USB2_P2_TYPEC_CONN_DP A6 B7 USB2_P2_TYPEC_CONN_DN
100nF/25V/X5R/M_2
ns 1uF/25V/X5R/K_4
D+ D-_1
2
CT74 CT75 USB2_P2_TYPEC_CONN_DN A7 B6 USB2_P2_TYPEC_CONN_DP
D- D+_1 +VBUS_TYPEC_P0
+VBUS_TYPEC_P0 TCP0_SBU1_CONN A8 B5 TCP0_CC2_CONN
SBU1 CC2
A9 B4 TCP0_CC2_CONN
VBUS2 VBUS3 TCP0_CC1_CONN
TCP0_RT_TXRX1_CONN_DN A10 B3 TCP0_RT_TX1_CONN_DN
100nF/25V/X5R/M_2
电容_100pF_0201_C0G_50V_J
电容_100pF_0201_C0G_50V_J
RX2- TX2-
TCP0_RT_TXRX1_CONN_DP A11 B2 TCP0_RT_TX1_CONN_DP
100nF/25V/X5R/M_2
10uF/25V/X5R/M_6
47pF/25V/C0G/J_2
22pF/50V/C0G/J_2
CT9
GND10
RX2+ TX2+
1
GND9
GND8
GND7
GND6
GND5
ESD56231L24-2/TR
CT80
A12 B1 CT76 CT77 CT78 CT81 CT79
GND2 GND3 ESDT1 ns ns ns
40-42356-A2100RHF
G6
G5
G4
G3
G2
G1
2
RF Requirement - 03/06
RT124 0R/J_2
ns
CMCT1
USBC0_DN_USB0_DN 2 3 USB2_P2_TYPEC_CONN_DN
9 USBC0_DN_USB0_DN USBC0_DP_USB0_DP 1 4 USB2_P2_TYPEC_CONN_DP
B 9 USBC0_DP_USB0_DP B
EXC14CE900U
RT125 0R/J_2
ns
TCP0_SBU1_CONN
TCP0_CC1_CONN
TCP0_SBU2_CONN
TCP0_CC2_CONN
TCP0_RT_TX0_CONN_DP TCP0_RT_TX0_CONN_DN TCP0_RT_TXRX0_CONN_DP TCP0_RT_TXRX0_CONN_DN
1
ESDT6 ESDT27 ESDT28 ESDT29
ESD73031N-2/TR ESD73031N-2/TR ESD73031N-2/TR ESD73031N-2/TR
1
2
PESD5V0H1BSF PESD5V0H1BSF PESD5V0H1BSF PESD5V0H1BSF
2
2
1
1
USB2_P2_TYPEC_CONN_DP
ESDT8 ESDT9 ESDT10 ESDT11 USB2_P2_TYPEC_CONN_DN
1
ESDT12 ESDT13
2
ESD73031N-2/TR ESD73031N-2/TR
2
A A
Page name:
TYPE C Connector
Size: Project REV:
Date: Sheet: of
5 4 3 2 1
5 4 3 2 1
D D
RTT108 0R/J_2
EXC14CE900U
RX2 9 USBC4_DP3_TXN0_DN TCP1_TXRX1_CMC_DP 330nF/25V/X5R/M_4 TCP1_RT_TXRX1_CONN_DP RX2
2 3 CT144
9 USBC4_DP3_TXP0_DP
CHK9 TCP1_SBU1_CONN
TCP1_SBU2_CONN TCP1_SBU1_CONN 34
RTT113 ns 0R/J_2
TCP1_SBU2_CONN 34
RTT97 0R/J_2
EXC14CE900U 220nF/25V/X5R/M_4
1 4 TCP1_TX1_CMC_DP CT149 TCP1_RT_TX1_CONN_DP
TX2 9 USBC4_DP3_TXP1_DP TCP1_TX1_CMC_DN TCP1_RT_TX1_CONN_DN TX2
2 3 CT150
9 USBC4_DP3_TXN1_DN
RTT107 ns 0R/J_2
RT235 0R/J_2 TCP1_CC2_CONN
34 TCP1_CC2_PD
RT234 0R/J_2 TCP1_CC1_CONN
34 TCP1_CC1_PD
RTT87 0R/J_2
EXC14CE900U
1 4 TCP1_TX0_CMC_DP 220nF/25V/X5R/M_4 TCP1_RT_TX0_CONN_DP
CT145
TX1 9 USBC4_DP3_TXP2_DP TCP1_TX0_CMC_DN TCP1_RT_TX0_CONN_DN TX1
2 3 CT146
9 USBC4_DP3_TXN2_DN
ns
RTT90 0R/J_2
RTT91 0R/J_2
EXC14CE900U
RX1 9 USBC4_DP3_TXN3_DN TCP1_TXRX0_CMC_DP 330nF/25V/X5R/M_4 TCP1_RT_TXRX0_CONN_DP RX1
2 3 CT142
9 USBC4_DP3_TXP3_DP
CHK7
RTT96 ns 0R/J_2
C C
BOM Change
Add 2nd source TCP1_SBU2_CONN
20201026-zhiqiang TCP1_SBU1_CONN
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
JTBT2
CT151 RT249
A1 B12 CT152 RT250
GND1 GND4 +VBUS_TYPEC_P1 ns ns
ns1M/J_2 ns 1M/J_2
TCP1_RT_TX0_CONN_DP A2 B11 TCP1_RT_TXRX0_CONN_DP
+VBUS_TYPEC_P1 TX1+ RX1+
TCP1_RT_TX0_CONN_DN A3 B10 TCP1_RT_TXRX0_CONN_DN Reserve For SBU
100nF/25V/X5R/M_2
TX1- RX1- 20201207-zhiqiang
A4 B9
VBUS1 VBUS4 CT8
1
CT20
TCP1_CC1_CONN A5 B8 TCP1_SBU2_CONN ns
CC1 SBU2 1uF/25V/X5R/K_4
100nF/25V/X5R/M_2
10uF/25V/X5R/M_6
2
USB2_P3_TYPEC_CONN_DP A6 B7 USB2_P3_TYPEC_CONN_DN
D+ D-_1
CT154 CT153 USB2_P3_TYPEC_CONN_DN A7 B6 USB2_P3_TYPEC_CONN_DP
D- D+_1 TCP1_CC2_CONN
+VBUS_TYPEC_P1 +VBUS_TYPEC_P1
TCP1_CC1_CONN
TCP1_SBU1_CONN A8 B5 TCP1_CC2_CONN
SBU1 CC2
A9 B4
VBUS2 VBUS3
100pF/50V/C0G/J_2
TCP1_RT_TXRX1_CONN_DN A10 B3 TCP1_RT_TX1_CONN_DN CT159
100pF/50V/C0G/J_2
100nF/25V/X5R/M_2
RX2- TX2- CT160 ns
100nF/25V/X5R/M_2
TCP1_RT_TXRX1_CONN_DP A11 B2 TCP1_RT_TX1_CONN_DP ns
47pF/25V/C0G/J_2
22pF/50V/C0G/J_2
GND10
10uF/25V/X5R/M_6
CT7 RX2+ TX2+
1
GND9
GND8
GND7
GND6
GND5
ESD56231L24-2/TR
CT155
CT156
A12 B1 CT157 CT158
GND2 GND3 ESDT14 ns
40-42356-A2100RHF
G6
G5
G4
G3
G2
G1
2
RF Requirement - 03/06
RT251 0R/J_2
ns
B CMCT2 B
2 3 USB2_P3_TYPEC_CONN_DN
9 USBC4_DN_USB4_DN USB2_P3_TYPEC_CONN_DP
1 4
9 USBC4_DP_USB4_DP
EXC14CE900U
RT252 0R/J_2
ns
TCP1_SBU1_CONN
TCP1_CC1_CONN
TCP1_SBU2_CONN
TCP1_CC2_CONN
1
ESD73031N-2/TR ESD73031N-2/TR ESD73031N-2/TR ESD73031N-2/TR
2
1
1
2
2
USB2_P3_TYPEC_CONN_DP
TCP1_RT_TX1_CONN_DP TCP1_RT_TX1_CONN_DN TCP1_RT_TXRX1_CONN_DP TCP1_RT_TXRX1_CONN_DN USB2_P3_TYPEC_CONN_DN
1
1
1
ESDT26
ESDT25
ESDT21 ESDT22 ESDT23 ESDT24 ESD73031N-2/TR ESD73031N-2/TR
2
2
2
A A
Page name:
TYPE C Connector
Size: Project REV:
Date: Sheet: of
5 4 3 2 1
5 4 3 2 1
TYPE-C P0 PD OUTPUT
+V5P0A_TYPEC_P0
+V5P0A +V5P0A_TYPEC_P0 LV TYPE-C P1 PD OUTPUT
10uF/25V/X5R/M_6
10uF/25V/X5R/M_6
0.01R/F_8
RT88
1 2
2
BOM Change +V5P0A_TYPEC_P1
100nF/25V/X5R/M_2
nb_rtc0805 CT58 CT59
Change LV 2nd PN +V5P0A +V5P0A_TYPEC_P1
4.7uF/6.3V/X5R/M_4
CT57
4
3
20201025-zhiqiang
4
CT55 CT56 2 1 RT152
D ns 1 2 0.01R/F_8
D
10uF/25V/X5R/M_6
10uF/25V/X5R/M_6
34 PD_P0_CSP RT89 0R/J_2
BOM Change
4.7uF/6.3V/X5R/M_4
100nF/25V/X5R/M_2
PSBD1DF40V3H nb_rtc0805
Change LV 2nd PN CT91 CT92 CT93
4
3
RT153
C1
B1
B2
RT90 0R/J_2 +VBUS_TYPEC_P0 20201025-zhiqiang
4
34 PD_P0_CSN UT5 PD_P1_CSP CT94 CT95 2 1
34 PD_P1_CSP ns
VCP1
VCP2
VCP3
0R/J_2
ns PSBD1DF40V3H
A1 C2
A2 VIN1 VBUS1 D1 RT154
C1
B1
B2
PD_P1_CSN
删除到CPU的OC
VIN2 VBUS2 D2 SINK UFP 34 PD_P1_CSN 0R/J_2
UT8 +VBUS_TYPEC_P1
VBUS3 CT60
10uF/25V/X5R/M_6
VCP1
VCP2
VCP3
ns
TCPC_OC_P0_N RT116 0R/J_2 TCPC_OC_P0_N_R A4 A3 A1 C2
34 TCPC_OC_P0_N #FLT ILIM VIN1 VBUS1
TCPC_P0_SRC_EN B4 A2 D1
34 TCPC_P0_SRC_EN SRC_P0_FRS_EN EN VIN2 VBUS2
RT40 0R/J_2 SRC_P0_FRS_EN_R C4
删除到CPU的OC
D2
GND01
GND02
GND03
34 SRC_P0_FRS_EN FO VBUS3 CT96
10uF/25V/X5R/M_6 SINK UFP
CAP
RT93 TCPC_OC_P1_N RT39 0R/J_2 TCPC_OC_P1_N_R A4 A3
34 TCPC_OC_P1_N #FLT ILIM
WS4683C-16/TR TCPC_P1_SRC_EN B4
34 TCPC_P1_SRC_EN EN
D4
B3
C3
D3
33K/F_2 SRC_P1_FRS_EN RT8 0R/J_2 SRC_P1_FRS_EN_R C4
GND01
GND02
GND03
Add TYPEC current limit to 1.5A - 0130 34 SRC_P1_FRS_EN FO
1nF/25V/X7R/K_2
CAP
RT155
RT96
WS4683C-16/TR
3
33K/F_2 RT1 0R/J_2 TYPEC_P0_PWR_LIMIT_EC Add TYPEC current limit to 1.5A - 0130
D4
B3
C3
D3
CT61 TYPEC_P0_PWR_LIMIT_EC 33 33K/F_2
+V5P0A_TYPEC_P0 D
QT2
G 1 TCPC_P0_SRC_HI_ILIM_R +V5P0A_TYPEC_P1 RT158
1nF/25V/X7R/K_2
SRC_P0_FRS_EN
3
RT94 ns 47K/F_2 S CT97
33K/F_2
WNM3013-3/TR RT159 ns 47K/F_2 SRC_P1_FRS_EN D RT4 0R/J_2 TYPEC_P1_PWR_LIMIT_EC
QT8 TYPEC_P1_PWR_LIMIT_EC 33
2
+V3P3A_VSYS_PD
RT97 TCPC_P0/P1_SRC_HI_ILIM +V3P3A_VSYS_PD G 1TCPC_P1_SRC_HI_ILIM_R
TCPC_OC_P0_N_R 100K/J_2
RT95 100K/J_2 S
OCP RT160 100K/J_2 TCPC_OC_P1_N_R WNM3013-3/TR
2
ns 1M/J_2 TCPC_P0_SRC_EN
RT91 threshold: RT156 1M/J_2 TCPC_P1_SRC_EN RT161
RT92 ns 1M/J_2 SRC_P0_FRS_EN_R min: 3.1A ns
100K/J_2
SRC_P1_FRS_EN_R
max: 3.5A RT157 ns 1M/J_2
OCP
threshold:
min: 3.1A
max: 3.5A
C C
+V3P3A_EC
HV TYPEC-IN detect +V3P3A_EC
TYPE-C P0 PD INPUT TYPE-C P1 PD INPUT

UT9
UT6 RT21 KTS1677EVH-TR
RT22 +V3P3A_EC KTS1677EVH-TR 100K/J_2 +V3P3A_EC +VADP nb_bga15_2d56x1d54x0d6_0d5 +VBUS_TYPEC_P1
100K/J_2 +VADP nb_bga15_2d56x1d54x0d6_0d5 +VBUS_TYPEC_P0
TypeC_P1_PRESENT D1 B2
TypeC_P0_PRESENT 33 TypeC_P1_PRESENT VINT4 VBUS1
33 TypeC_P0_PRESENT D1 B2 RT162 C1 C2
C1 VINT4 VBUS1 C2 B1 VINT3 VBUS2 D2
RT98 VINT3 VBUS2 10K/J_2 VINT2 VBUS3
3
10K/J_2 B1 D2 A1 E1
VINT2 VBUS3 VINT1 VBUS4 RT163
3
QT13 D
A1
VINT1 VBUS4
E1
E2
RT99
QT3 D
VBUS5
E2
ns1M/J_2 SOURCE DFP
VBUS5 ns 1M/J_2 G TCPCP1_SNK_PS_ACK
G 1 TCPCP0_SNK_PS_ACK A2 B3
SOURCE DFP WNM3013-3/TR
1 A2
ACK OVLO
B3
WNM3013-3/TR ACK OVLO A3 C3

S
A3 C3 +V3P3A_VDDD_PD +V3P3A_VDDD_PD EN# GND1 D3
S
EN# GND1 GND2
2
+V3P3A_VDDD_PD +V3P3A_VDDD_PD D3 E3
GND2 GND3
2
E3
GND3 RT164
RT103 RT165
RT166 0R/J_2
RT101 1K/J_2
1K/J_2
RT102 0R/J_2 ns
ns QT9
49.9K/F_2
49.9K/F_2
QT4 WNM3013-3/TR
WNM3013-3/TR TCPC_P1_SNK_EN 2 3
TCPC_P0_SNK_EN 34 TCPC_P1_SNK_EN
D
2 3
S
34 TCPC_P0_SNK_EN
D
S
G
+V3P3A_VDDD_PD
G
+V3P3A_VDDD_PD
EN#:A HIGH on EN will disable the channel MOSFET
1
and all protection circuits putting the
1
RT135
RT167 device into a low power mode. A LOW on EN will
B
10K/J_2 enable the protection circuits and the B
10K/J_2
MOSFET. EN pin has 29V voltage tolerance
3
D
3
D QT10
QT5 33 TYPEC_P1_PWR_EN
TYPEC_P1_PWR_EN 1 G
WNM3013-3/TR DVT: add RT135/QT5 for TYPEC
33 TYPEC_P0_PWR_EN
TYPEC_P0_PWR_EN 1 G DVT: add RT135/QT5 for TYPEC dead battery power on - 04/15
WNM3013-3/TR S
dead battery power on - 04/15
S
2
The ACK output is an open-drain output that requires an
2
RT106
RT168
external pull-up resistor. When
100K/J_2
100K/J_2
the input voltage is within valid range and no protection
circuit has been triggered, the
ACK will output low to indicate power good. If OVLO or
OTP circuits are activated the ACK
output will be set to high Impedance. The pull up resistor
value is recommend to be 10K
to 200K
A A
Page name:
TYPE C Power
Size: Project REV:
Date: Sheet: of
5 4 3 2 1
REMOTE1+/-, Trace width/space:10/10 mil,Trace length:<8"
Connect guard traces to GND on either side of the
DXP-DXN traces
+V3P3A_LDO +V3P3A
R8795 0R/J_2
U3117
ns
R8794 0R/J_2 1 8 APU_EC_SCLK REMOTE1+
VCC SMBCLK APU_EC_SCLK 6,33,56
3
2 7 APU_EC_SDATA 1 QS1
REMOTE1+
CS1 CS2 DXP SMBDATA R7135 APU_EC_SDATA 6,33,56 LMBT3904LT1G
10.5K/F_4 ns
R99691 0R/J_2
2
2.2nF/50V/X7R/k_4 REMOTE1- 3 6 REMOTE1-
100nF/6.3V/X5R/K_2 DXN ALERT +V3P3A_LDO
R7133 PMR 0201 ns ns R99682 0R/J_2
THER_SHD#_1
1 2 4 5 +V3P3A
1 2
THERM GND
ns
G788P81U
R7134
ns
2K/F_2
R99661 0R/J_2
+V3P3A
THER_SHD#_1 R99651 THER_SHD#
R99671
ns 0R/J_2 0R/J_2
+V3P3A_LDO
ns ns
Change R3199 from 29.4K to 24.9K Rset(Kohm)=0.0012T*T-0.9308T+96.147,Shut down on

Thermal Temp from 80 to 86 8dgree
Hysteresis is 30C
Add 2nd Source +V3P3A_LDO
+V3P3A_LDO 20201102-zhiqiang
R3189 150R/J_4 20mil 5

U3108
1 R3199 24.9K/F_2 R3179
VCC SET
C3184 2 100K/J_2
GND ns
100nF/6.3V/X5R/K_2
4 3 THER_SHD# R3174
0R/J_2 V5P0A_EN 33,40,47,50,51
HYST OT#
G709T1UF
+V3P3A_EC
R3173 ns 10K/J_2
Thermal Sensor
G
1
D S
20,33,40 EC_WRST_N 3 2
ns Q3110
WNM3013
Page name: BUTTON/LED
Size: Project REV:

5 4 3 2 1
Keyboard CONN UPDATE AT 10/13

D D
BOM Change
JKB1 Delete KB CONN PN
20201125-zhiqiang
KB 32
33 KSO7 1
33 KSO0 2
33 KSI1 3
33 KSI7 4
33 KSO9 5
33 KSI6 6
33 KSI5 7
33 KSO3 8
33 KSI4 9
33 KSI2 10
33 KSO1 11
33 KSI3 12
33 KSI0 13
33 KSO13 14
33 KSO5 15
33 KSO2 16
33 KSO4 17
33 KSO8 18
33 KSO6 19
33 KSO11 20
33 KSO10 21
33 KSO12 22
33 KSO14 23
33 KSO15 24
C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 25
POWER_LED_CON 26
27
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
220pF/50V/X7R/K_2
ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns CAP_LED_CONN
FN_LED_CON 28
29
30 31
51539-0300M-002
C C
PWRBTN_N_KB
40 PWRBTN_N_KB
R7
1
1.5K/J_4
1
ESD2 R62 0R/J_4 +V5P0A
ESD3
2
ns R8
Debug BUTTON
100nF/25V/X5R/M_4
1.5K/J_4
C25
1
EMI
3D
ESD4
G Q8
1 WNM3013 ns
33 FN_LED
2
PWRBTN_N_KB 1 TP2977 40MIL
2
3D
G Q9 R1035 1 TP2978 40MIL
S
1 WNM3013
33,42 LED_PWR_ON
2
100K/J_2
R1033 0511-
fix 插AC时闪一下issue
S
100K/J_2 R9 1.5K/J_4
0511-
fix 插AC时闪一下issue
1
Q10
3D
WNM3013 ESD5
G ns
1
33 CAP_LED
2
2
R1034 RE2
S
0R/J_2 PWRBTN_N_KB
100K/J_2 33 PWR_BUTTON_N
100nF/X5R/10V/K_2
0511-
fix 插AC时闪一下issue CE1
B B
KB Backlight
+V5P0S5_KB_BL
+V5P0S
30mil 1
RE3
1 2
2
ns
10uF/6.3V/X5R/M_4
2.2uF/10V/X5R/M_4
100nF/X5R/10V/K_2
SHORT_0603
C26 C27 C28
ns
BOM Change
Add BL CONN PN
20210113-zhiqiang
30mil
3
D 4 JKBL1
Q11 3 40504W90-4PN-SHLOATBR
0R/J_2 RE4 G KB_BL_CTRL_W30 2
33 KBBKL_EN_PWM 1
WNM2072 1
6
100nF/X5R/10V/K_2
S
40MIL KBL_TP1 1 5
2
R10 C29 40MIL KBL_TP2 1
100K/J_2
A A
Page name:
KB CON & Backlight
Size: Project REV:
A4 Name: V1.0
UX425UG
Date: Sheet: of
5 4 3 2 1
15S Foece Power Down
R2346 1K/J_2
EC_WRST_N 20,33,38,40
+V3P3A_LDO
3D
G Q2118
R2337 EC_WRST_L 1 WNM3013
2
HW RESET
5.6M/J_4
S
R2341
R2340 0R/J_2 V5P0A_EN 33,38,47,50,51
10uF/6.3V/X5R/M_4
2.2uF/6.3V/X5R/M_4
1K/J_2
C2502
C2501
3D
3D
G Q2117
G Q2116 1 WNM3013
WNM3013
2
1
39 PWRBTN_N_KB
2
ns
S
S
Mount R2340 & Q2117 for RTC_RST Clear
20201217-zhiqiang
LED 30S RTC RESET

+V3P3A_EC
+V5P0A
+V3P3A
R2332 0R/J_2
20mil R2326 R2333 100R/F_2 30S_RTC_RST_N RTC_RST_N 11
20mil
3M/J_4
3D
R7059 ER change to 750R
R2328
R7061 750R/F_2 G Q2115
220RJ_2 30S_RTC_RST 1 WNM3013
+V5P0A_LED2
2
10uF/6.3V/X5R/M_4
2.2uF/6.3V/X5R/M_4
1K/J_2
+V3P3A_LED1
C2500
20M/J_4
S
C2499
R7052
3D
3D
G Q2114
1 WNM3013 R3285 0R/J_2 G Q3121
20,33,38,40 EC_WRST_N EC_RTC_RST_R WNM3013
2
1
33 EC_RTC_RST
1
2
1
ESD49
S
LED1 LED2
+
ns
S
ns
2
Charge LED Power LED

-
Orange White ns R3272

10K/J_2
2
33 LED_BAT_LOW ns 0S RTC RESET

33 LED_BAT_FULL
1
ESD59 ESD6
2
ns ns Huaqin Telecom Technology Com.,Ltd.
Page name: BUTTON/LED
Size: Project REV:

5 4 3 2 1
Touch Pad +V3P3A

+V3P3S5_TP +V3P3S5_TP
+V3P3S5_TP Peak current:1360mA
+V3P3A
R2425 R2424
2.2K/J_2 2.2K/J_2 R2440 R2439
1
2.2K/J_2 2.2K/J_2 R7096 1 2 0R/J_6
ns ns Q2127
G
WNM2072 ns
3 2 2 3
S
D
7 I2C_TP_SOC_CLK I2C_TP_CLK 41
D
S
1uF/6.3V/X5R/M_2
100nF/6.3V/X5R/K_2
ns
1 G
PPMT20V3
D R7097
QW3102 ns D
R2433 0R/J_4
CW2106
CW2107
+V3P3A
ns R7103
100K/J_2
1
Q2126
G
WNM2072 100K/J_2
3 2
S
D
7 I2C_TP_SOC_SDA I2C_TP_DAT 41
1uF/6.3V/X5R/M_2
ns R7098
CW2105
R7199
R2432 0R/J_4
10K/J_2
ns 10K/J_2
RW4 Q3129
3D
2N7002 ns
ns
G
RW3 ns 10K/J_2 0R/J_2
33 TP_POWER_EN_N 1
2
ns
S
+V5P0A +V5P0S5_TP_LED
Touch Pad CONN

R8677 0R/J_4
ns
+V5P0S
R8655 0R/J_4
100nF/10V/X5R/K_2
C C
C1000
+V3P3S5_TP
100nF/10V/X5R/K_2
BOM Change
C102 Delete BL CONN PN
R8911 20201125-zhiqiang
10K/J_2 R9445
10K/J_2 JTP1
ns 30mil 8 10
R99697 0R/J_2
7 9
33 TP_Enable 6
5
EXC14CE900U 4
2 3 I2C_TP_DAT_CMC R3403 0R/J_4 I2C_TP_DAT_CONN 3
41 I2C_TP_DAT ns I2C_TP_CLK_CMC I2C_TP_CLK_CONN
1 4 R3400 0R/J_4 2
41 I2C_TP_CLK TOUCHPAD_INT_N_R 1
R7028 0R/J_4
CHK3 7 TOUCHPAD_INT_N
100nF/25V/X5R/M_4
82pF/50V/NPO/J_4
82pF/50V/NPO/J_4
C105
C106
R3398 0R/J_2
C107
1
ns
ESD24
ESD25
ESD26
ESD3104
ns ns ns ns
2
B B
+V3P3S5_TP
40MIL TP29 1
40MIL TP30 1 TP_Enable +V5P0S5_TP_LED
40MIL TP31 1
40MIL TP32 1
40MIL TP33 1
40MIL TP34 1 I2C_TP_DAT_CMC
40MIL TP36 1 I2C_TP_CLK_CMC
40MIL TP35 1 TOUCHPAD_INT_N_R
A A
Page name:
TouchPad
Size: Project REV:
A4 Name: V1.0
UX425UG
Date: Sheet: of
5 4 3 2 1
+3P3S5 2A
+VSYS 0.5A
+V5P0A 2A
+V5P0S5 3A Change +V3P3A to +V3P3A_EC For Hall Sensor
+1P8S5 0.25A +V5P0A
JDB1
+V5P0A 20201126-zhiqiang
1 31 +V3P3A_EC
2 1 31 32
3 2 32 33
4 3 33 34
5 4 34 35
5 35 LID_INT_N 33
6 36
7 6 36 37 CPU_TACHO_FAN 33
9 USB2_P2_CAM_DN 7 37 CPU_PWM_FAN 33
8 38
9 USB2_P2_CAM_DP 8 38 CAM_PWR_ON SD_WAKE_N 7
9 39
9 USB2_P5_DP 10 9 39 40 DMIC1_DATA0_CONN
9 USB2_P5_DN 10 40 DMIC1_CLK0_CONN
R60 0R/J_4 11 41
12 11 41 42
9 USB3_P5_TX_DP 12 42 PLT_RST_N 6,7,20,28,32,43
13 43
9 USB3_P5_TX_DN 13 43 EC_USBPWR1_EN 33
14 44
9 USB3_P5_RX_DP 15 14 44 45 PCIE_SD_CLKREQ4 8
9 USB3_P5_RX_DN 15 45 LED_PWR_ON 33,39
16 46
17 16 46 47 PDN_Codec 5825M_SLP 33
5 GPP_SD_TX_DN 17 47 HDA_BCLK_CONN HDA_BCLK_CONN HDA_BCLK
18 48 R144 0R/J_2
5 GPP_SD_TX_DP 18 48 HDA_BCLK 7
19 49
20 19 49 50 HDA_SDO 7
5 GPP_SD_RX_DN 20 50 HDA_SDI 7
22pF/25V/C0G/J_2
21 51
5 GPP_SD_RX_DP 22 21 51 52 HDA_SYNC 7
C6051
23 22 52 53 SMB_TAS5825M_SCLK
8 GPP_REFCLK_SD_DP 23 53 SMB_TAS5825M_SDATA
24 54
8 GPP_REFCLK_SD_DN 25 24 54 55 1 2 0201
R47
25 55 1 2
V3P3IN_SD_EN 7
26 56 ns
+V3P3A 27 26 56 57 +5V_LDO
28 27 57 58
28 58 ns
29 59
30 29 59 60
30 60 +V3P3A
+V1P8A_CODEC 61 62 +VSYS
+V5P0S 63 61 62 64
65 63 64 66
65 66
molex
DB_CONN UPDATE AT 10/13
+V3P3S +V3P3A
Reserve +V3P3A Power For AC S5 Comsumption
20210114-zhiqiang
RE1 0R/J_2 CAM_PWR_ON
33 CAM_PWR_ON_EC
RE14 RE15
0R/J_2 0R/J_2
ns
+V3P3S
R1 0R/J_2
33 EC_MUTE_N
CR6 1 1 2 2 R2 R3 R4
10K/J_2 2.2K/J_2 2.2K/J_2
LRB520S-30T1G
ns PDN_Codec
CR7 1 1 2 2
7 HDA_RST_N ns Q5A
5 G
LRB520S-30T1G
SMB_TAS5825M_SCLK 4 3
ns SMB_EC_SCLK 20,33
D
LBSS139DW1T1G
R5 0R/J_2
RTC
2
Q5B ns
G
SMB_TAS5825M_SDATA 1 6
SMB_EC_SDATA 20,33
D
+V3P3A_LDO LBSS139DW1T1G
+VCCRTC
PCH_DMIC1_DATA0
R6 0R/J_2
PSBD2FD40V01 ns
CR3104 1 2 PCH_DMIC1_CLK0
ESD1
ESD5342N-3/TR
C3319
1uF/6.3V/X5R/M_2 1 2
3
+V1P8A +V3P3A
+V3P3A
+V1P8A
R345 R17 R45 R46

2.2K/J_2 2.2K/J_2
2.2K/J_2 2.2K/J_2
U2
1 8
2 VL VCC 7 DMIC1_CLK0_CONNns ns +V1P8A
7 PCH_DMIC1_CLK0 IO_1 VL1 IO_1 VCC1 DMIC1_DATA0_CONN
3 6
7 PCH_DMIC1_DATA0 IO_1 VL2 IO_2 VCC2 DMIC_OUTPUT_EN
4 5 R18 0R/J_2
GND EN
ns
PCH DMIC is S5 domain NLSX4373
R33
L:Hi-Z
H:I/O Buses Connected
ns 10K/J_2
ns
R1844 0R/J_2
R1845 0R/J_2 Huaqin Telecom Technology Com.,Ltd.
Page name: TO USB DB
Size: Project REV:

42
HDT+ HEADER
nb_pthc3d5hc5d5_p
nb_pthc3d5hc5d5_p
nb_pthc3d5hc5d5_p
1
+V1P8A +V1P8_HDT
1
1
NUT3
HDT is AMD proprietary APU/CPU debug tool that +V1P8_HDT
NUT2
NUT1
allows users to read/write APU/CPU internal registers
and state machine
R227 0R/J_4
100nF/10V/X5R/K_2
DB CONN SSD R7106 R7107
C269
ns 1K/J_2
U14 1K/J_2
1 6 APU_RST_L_BUF
6,34 APU_RST# A1 Y1
2 ns 5
GND VCC
nb_pthc3d5hc5ic4d5
nb_pthc3d5hc5ic4d5
nb_pthc3d5hc5ic4d5
MT1 MT2 MT3 +V1P8_HDT
+V1P8_HDT 3 4 APU_PWROK_BUF
6,49 APU_PWROK A2 Y2
1
74LV2G07GW R232 R234
R229 R230 R231
ns ns ns ns
R226 +V1P8_HDT 10K/J_2 1K/J_2

1K/J_2 1K/J_2 1K/J_2
J1
1K/J_2 1 2
CPU_VDDIO CPU_TCK APU_TCK 6
3 4
GND CPU_TMS APU_TMS 6
5 6 R228 0R/J_2
7
GND CPU_TDI
8 APU_TDI 6
GND CPU_TDO
APU_PWROK_BUF APU_TDO 6
R216 33R/F_2 9 10
6 APU_TRST# 11
CPU_TRST_L CPU_PWROK_BUF
12 APU_RST_L_BUF
R215 10K/J_2 CPU_DBRDY3 CPU_RST_L_BUF
R214 10K/J_2 13 14
APU_DBRDY 12
C0201_10nF_16V_K
CPU_DBRDY2 CPU_DBRDY0
R213 10K/J_2 15 ns 16 R233 33R/F_2
nb_pthc3d5hc6
MT4 CPU_DBRDY1 CPU_DBREQ_L APU_REQ# 6
1
17 18
C268
GND CPU_PLLTEST0 APU_PLLTEST0 12
19 20
CPU_VDDIO CPU_PLLTEST1 APU_PLLTEST1 12
C0201_10nF_16V_K
C0201_10nF_16V_K
2
1
HDR 10X2 - BLUE - VERTICAL PLUG

COMMON(6010037800G)
1
ns
C271
C270
ns
ns ns
2
Change MT5&MT6 Footprint--nb_pthc3hc5ic4_np
20210115--zhiqiang
nb_pthc3hc5ic4_np
nb_pthc3hc5ic4_np
MT5 MT6
1
J2100
ns ns
1
2
3 LPC_CLK_PRT80_CONN R2300 0R/J_2
LPC_FRAME_N_CONN LPC_CLK_PRT80 8
11 4 R2303 0R/J_2
5 LPC_AD0_CONN R2305 0R/J_2 LPC_FRAME_N_ESPI_CSB 8,33
6 LPC_AD1_CONN LPC_AD0_ESPI_IO_0 8,33
R2309 0R/J_2
LPC_AD2_CONN LPC_AD1_ESPI_IO_1 8,33
12 7 R2314 0R/J_2
8 LPC_AD3_CONN LPC_AD2_ESPI_IO_2 8,33
R2316 0R/J_2
PLT_RST_N_CONN LPC_AD3_ESPI_IO_3 8,33
9 R2318 0R/J_2
nb_pthc3d5hc4d5ic3d5_np
MT8 MT9 MT10 MT11 MT12 MT13 10 R7037 0R/J_2 PLT_RST_N 6,7,20,28,32,42
LPC_RESET 8,33
15mil
+V3P3A
51614-01001 ns
ns
1
1
ns ns ns ns ns ns
Change MT8-MT13 Footprint--nb_pthc3d5hc4d5ic3d5

20210115--zhiqiang
nb_pthc3d5hc5ts
MT14
1
SHIELDING HOOK
HS4304
HS4301 HS4302 HS4303 1 HS4306
1 1 1 1 2 1
1 2 1 2 1 2 2 1 2
2 2 2 3 2
3 3 3 3 3
3 3 3 3
818004173
818004173 818004173 818004173 818004173
Remove wahser
20201022
PCB
nb2567_sh_shape
MT15
1
NFP Huaqin Telecom Technology Com.,Ltd.
Page name: VDDP
Size: Project REV:

Date: Friday, February 05, 2021 Sheet: 43 of 64
Vbattery=9V~13.35V, Ibattery=6A, 3S1P, 63Wh
+VBATTERY
1
PT1001
1 ns
PT1002
3
PESD1001
ns
100nF/25V/X5R/M_2
Battery CONN
PC1001
2
PJ1001
2
8 ns
7 PT1004 PT1003
6
Test point for RMA repair
1
5 P_BAT_CLK 45,46
ns ns
4 P_BAT_DATA 45,46
+VSYS
9 3 1
10 2 PT1005
1 1
ns +VADP
3
PT1006
ns
NC1
NC2
50458-00801-003
+VBUS_TYPEC_P1
GND
+V3P3A_EC
PESD1002 +VBUS_TYPEC_P0
2
PT1007
1
1
PT1008
PR1004
ns
PR1003
4.7K/J_2
4.7K/J_2
1
PT1009
ns
2
2
P_BAT_CLK 45,46 1
ns ns
PT1010
P_BAT_DATA 45,46 ns
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
1
1
ns ns
PC1002
PC1003 PT1011
ns
1
2
PT1012
ns
1
ns
+V5P0A
+V3P3A
PR1001 0402 P_BAT_CLK 45,46
33 SM_BAT_CLK 1 2
PR1002ns 0402 P_BAT_DATA 45,46
33 SM_BAT_DATA 1 2
ns
Page name:
POWER_DCIN&BAT CON
Size: Project REV:
A4 Name: V1.0
UX425UG
Date: Sheet: of
5 4 3 2 1
+VSYS
PSH7102 GAP
+VADP 1 2
ns
PSH6098 GAP
D P_CHG_VSYS_S D
1 2
15uF/25V/POSCAP/M_3528
ns
100nF/25V/X5R/M_2
PSH6097 GAP
1
10uF/25V/X5R/M_6
10uF/25V/X5R/M_6
10uF/25V/X5R/M_6
10uF/25V/X5R/M_6
10uF/25V/X5R/M_6
100nF/25V/X5R/M_2
1 1 2
10uF/25V/X5R/M_6
10uF/25V/X5R/M_6
10uF/25V/X5R/M_6
10uF/25V/X5R/M_6
1
ns +
PCS2002
PC2006
PC2007
PC2008
PC2009
PC2010
PC2011
1
1
+ PSH6094 GAP
PC6066
PC2002
PC2003
PC2004
PC2005
PCS2001
1 2
10nF/25 V/X5R/K_2
2
2
ns
2
2 PSH6099 GAP
2
1 2
PC2001
ns
PSH7103 GAP
1
1 2 ns
ns
PQ2003 PQ2005
PR2001 PL2001 PE616BA PE537BA +VBATT PR2002 +VBATTERY
0.01R/F_12 1 2.2uH/10A(lrat)/8A(lrms)/M 1 1 0.01R/F_12
P_CHG_ADP 2 P_CHG_LX1_30 P_CHG_LX2_30 2 2
3 3 3
5 S S 5 S 5
1uF/25V/X5R/K_4
100nF/25V/X5R/M_2
1uF/25V/X5R/K_4
D D D
1
G PQ2001 G G
PC2156
PC2015
PC2016
PKCH6BB
4
1
1
1 2P_CHG_BST1_R_S P_CHG_BST2_R_S 2 1
33pF/25V/C0G/J_2
1nF/50V/X7R/J_2
2
PR2003 PR2004
1
1
PC2012
2R2/F_6 PC2013 PC2014 2R2/F_6

PC17
P_CHG_BATGATE_R_20
1
1
47nF/X5R/25V/M_4 47nF/X5R/25V/M_4
ns PR2006 PR2007
2
2
P_CHG_SNB1_S
P_CHG_SNB2_S 2
PQ2004
5
PR2005 PQ2002 0R/J_6 0R/J_6
1R/F_8 PKC26BB PE616BA
D
ns
2
P_CHG_BST1_S2
P_CHG_BST2_S2
4 4
1uF/25V/X5R/K_4
100pF/50V/C0G/J_2
PC2017
S
S
2.2nF/25V/X5R/K_2
1
100pF/50V/C0G/J_2
3
2
1
1
2
3
1
PC2018
2.2nF/25V/X5R/K_2
2
1
PR2008 PR2009
PC2025
2
1
4.7R/J_6 4.7R/J_6
PC2019
PC2020
C C
1uF/25V/X5R/K_4
2
1
PR2010 1 2
PC2022
30
25
2
2
1 2 ns 0R/J_2
100nF/25V/X5R/M_2
100nF/25V/X5R/M_2
ns PC2026
BTST1
BTST2
2
2
1219 100nF/25V/X5R/M_2
1
PC2021
PC2027
PC2028
33nF/25V/X7R/K_4
33nF/25V/X7R/K_4
100nF/25V/X5R/M_4 32 23
SW1 SW2
1
1
PC2023
PC2024
ns
2
AGND_CHG P_CHG_LG1_20 29 26 P_CHG_LG2_20
LODRV1 LODRV2
2
P_CHG_HG1_20 31 24 P_CHG_HG2_20
HIDRV1 HIDRV2 AGND_CHG AGND_CHG
P_CHG_VBUS_20 1 22
AGND_CHG VBUS VSYS
AGND_CHG P_CHG_ACN 2 21 P_CHG_BATGATE_20
ACN BATDRV#
P_CHG_ACP 3 20 P_CHG_SRP PR2011 2 1 10R/F_4
ACP SRP
PR2012 1 2 100R/F_2 P_CHG_PROCHOT# 11 19 P_CHG_SRN PR2013 2 1 10R/F_4
6 PROCHOT_SOC_N PROCHOT# SRN
45 P_BAT_CLK PR2014 0201 P_CHG_SCL 13 18 P_CHG_PRES
1 2 SCL CELL_BATPRES
ns
PR2015 0201 P_CHG_SDA 12 9
45 P_BAT_DATA SDA IBAT CHG_IBAT 33
CHG_VDD +VDDA 1 2 ns
PR2016 8 CHG_IADPT 33
10R/F_6 IADPT PR2017 0201
1 2 7 10 P_CHG_PSYS 2 1
VDDA PSYS CHG_PSYS 33
PT2001 PR2018 1 2 360K/F_2 ns
Adapter limit 5A
PR2019 1 2 360K/F_2 P_CHG_ILIM 6 17 P_CHG_COMP2
PR2020 PR2021 ILIM_HIZ COMP2
1
PC2029
1
2
1uF/16V/X5R/K_4 1 2 2 1 PC2030 1 2 100pF/50V/C0G/J_2
ns
100pF/50V/C0G/J_2
100pF/50V/C0G/J_2
PR2022
2
+V3P3A_LDO
2
10K/F_2 10K/F_2 1219 10K/F_2
137K/F_2
2
AGND_CHG P_CHG_OTG 5
PR2023
PC2032
PC2031
ns ENZ_OTG CHG_VDD
15pF/50V/C0G/J_2
2P_CHG_COMP2_R 1
B B
PR2024 2 1 10K/F_2 4
CHRG_OK
1
2
AGND_CHG 28
PC2033
REGN
1
P_CHG_COMP1 16
ns COMP1
15 27
2.2uF/10V/X5R/M_4
20,33 CHG_ACOK CMPOUT PGND
1
2
1219 14
CMPIN PAD
33
PR2025
1
2
40.2K/F_2 PU2001
PC2034
680pF/25V/X7R/K_2
BQ25700A AGND_CHG AGND_CHG AGND_CHG
PR2026
2P_CHG_COMP1_R1
1
120K/F_2
PC2035
AGND_CHG PSH2005
2
GAP +VDDA
ns
1
1 2
ns
33pF/25V/C0G/J_2
1.8nF/25V/X5R/M_2
AGND_CHG need change to 160K for 3S +V3P3A_LDO

1
1
AGND_CHG
PC2037
AGND_CHG
2
PR2027
PC2036
160K/F_2
PR2029
1
2
100K/J_2
1
P_CHG_PRES
ns
3
2
AGND_CHG D
PQ2006
PR2030 NMOS_2N7002 G 1 BATT_IN_L
BATT_IN_L 33
200K/F_2
S
2
2 1
ns
PR2031 1M/J_2
ns
A A
Page name: POWER_CHARGER

Size: Project REV:
CustomName: UX425UG V1.0
5 4 3 2 1
5 4 3 2 1
+VSYS TP100 PC3003

PC3002 PR3003 2.2nF/25V/X5R/K_2
PR3002
100nF/25V/X5R/M_2 2.2R/F_8
P_+V3P3A_VIN_S P_+V3P3A_BST_S 1 2 P_+V3P3A_BST_R_S 1 2 1 2 P_+V3P3A_SNB_S 1 2
1
10uF/25V/X5R/M_6
10uF/25V/X5R/M_6
100nF/25V/X5R/M_2
1 0R/J_6 ns
TP101
ns
1
+ PU3001 +V3P3A
PC3001
PC3004
PC3005
PCS3001
3
2
1
PL3001
1.5uH/14 A(lrat)/10 A(lrms)/M_10.6 mohm
BS
IN2
IN1
2
1
2 4 20 P_+V3P3A_LX_S P_+V3P3A_OUT_S
5 IN3 LX3 19
IN4 LX2 6
+V3P3A LX1
100nF/16V/X5R/M_2
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
D D
14
ns OUT
1
PC3006
PC3007
PC3008
PC3009
PC3010
PR3001 1 2 100K/J_2 9 13 P_V3P3A_FF 1 2 P_+V3P3A_FB_R 1 2
PG FF
2
33 V3P3A_PGOOD 15 PC3012 PR3007
NC2 10 220pF/50V/X7R/K_2 1K/J_2
P_+V3P3A_EN2 11 NC1
EN2
ns ns
+VCC3P3_LDO_OUT
EE request PR3006 1 2 0R/J_4 P_+V3P3A_EN1 12 16
33,50,51 1.8VA_EN EN1 NC3 17
LDO
ns
100nF/16V/X5R/M_2
1
4.7uF/6.3V/X5R/M_4
1
PR3025 0201 21 18
PR3008
PC3013
1M/J_2
33,51,52 V1P8A_PGOOD GND GND3
1
1 2 ns 7 8
GND1 GND2
PC3011
2
2
2
33,38,40,47,50,51 V5P0A_EN PR3026 1 2 0R/J_4
SY8288B
ns
+VSYS ns
PR3010 1 2 470K/F_2 P_+V3P3A_EN2 +VCC3P3_LDO_OUT +V3P3A_LDO

20mil
PR3009 0402
1 2
1uF/6.3V/X5R/M_2
1
ns
2
150KF_2
PR3011
PC3014
1
2
C C
TP5617
PC59
+VSYS PC60 PR44 2.2nF/25V/X5R/K_2
PR45
100nF/25V/X5R/M_4 2.2R/F_8
1
P_+V5P0A_IN_100 P_+V5P0A_BST_S 1 2P_+V5P0A_BST_R_S 1 2 1 2 P_+V5P0A_SNB_S 1 2
0R/J_6 ns
10uF/25V/X5R/M_6
10uF/25V/X5R/M_6
1 ns
1uF/25V/X5R/K_4
1
1
+
PC57
PC58
PC5120
PCS3002
2
2
For 背对对摆件设置
13
1
Imax=10A
BS
IN
+V3P3A_LDO PL3 +V5P0A
TP5618
1.5uH/14 A(lrat)/10 A(lrms)/M_10.6 mohm
2 P_+V5P0A_LX_S P_+V5P0A_OUT_220 1
PR48 1 2 10K/F_2 LX1
B B
12 ns
100nF/6.3V/X5R/K_2
LX2
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
4
50 V5P0A_PGOOD PG
1
PC63
PC64
PC65
PC66
PC67
PC6072
PC6071
P_+V5P0A_EN 6
PR5156 EN1
2
P_+V5P0A_IN_100 1 2 P_+V5P0A_EN2 5
EN2
P_+V5P0A_VCC 10 8 P_+V5P0A_SENSE PR6104 1 2 0402
10K/F_4 VCC OUT ns
ns
1
+5V_LDO 7 P_+V5P0A_FB 1 2 P_+V5P0A_FB_R 1 2

4.7uF/6.3V/X5R/M_4
FF
1
9
PR6105
1M/J_4
SEQUENCE LDO PC62 PR49

PC55
220pF/50V/X7R/J_4 1K/J_2
2
PR6125 1 2 51K/F_4 P_+V5P0A_EN PC61

33,38,40,47,50,51 V5P0A_EN
4.7uF/6.3V/X5R/M_4 3 11
GND1 GND2
2
1
PU5103
EN>2.3V: Normal Mode PR5113 SY8370CTMC
0.8V<EN<1.7V: USM 91K/F_2
2
A A
Page name: POWER_SYSTEM POWER

Size: Project REV:
5 4 3 2 1
5 4 3 2 1
D D
+VSYS ns
SHUNT_0805
PR4007
PC4006 PR4008 nsPC4019
PRS4001 100nF/25V/X5R/M_4 2.2R/F_8 1nF/50V/X7R/J_4
1 2 P_VDD2_IN_S 2 1P_VDD2_BST_R_S 1 2 2 1 P_VDD2_SNB_S 1 2
P_VDD2_BST_S
4.7R/J_6
100nF/25V/X5R/M_4
1
10uF/25V/X5R/M_6
10uF/25V/X5R/M_6
ns
2
+
PC4001
PC4002
PC4003
PCS4001
2
1
+V1P1U_VDDQ
18
7
C PU4001 PL4001 C
+V3P3A 0.68uH/17A(lrat)/16A(lrms)/M
BST
PVIN
17 P_VDD2_LX_S P_VDD2_OUT_S
SW
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
PR40011 2 100K/J_2
PR4009
1
PR4002 0201 P_VDDQ_PG 8 0201 ns
PC4010
PC4012
PC4013
PC4014
PC4015
PC4011
33 VCC_DDR_PWROK PGOOD 5 P_VDD2_SENSE 2 1
1 2 ns VDD2SNS
ns
PR4003 0402 P_VDDQ_EN 11 2 1
7,33 SLP_S5# VDD_EN
2
1 2
PR4004 1 2 0R/J_2
33 EC_VDDQ_EN ns ns PR4005 0201
+V1P8U
1 2 ns
VCC_DDR_PWROK PR4006 1 ns 2 0R/J_2 P_VTT_EN 10 PL4002
VDDQ_EN 4.7uH/1.4A(lrat)/1.3A(lrms)/M
15 P_VDD1_SW_S P_VDD1_OUT_S
+V5P0A SW_VDD1
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
P_VPP_IN_S 14
PVIN_VDD1 12 +VDDQ_TX
100nF/6.3V/X5R/K_2 VDD1SNS
10uF/6.3V/X5R/M_6
1
PC4004
PC4005
1
+V5P0A 2 P_VDDQ_OUT_S ns
PC4008
PC4009
VDDQ
2
13 4 P_VDDQ_SENSE PSH4002 2 1 0201
VCC_5V VDDQSNS
10uF/6.3V/X5R/M_4
2
ns
2 1
1uF/6.3V/X5R/M_2
+V1P1U_VDDQ
1
1
PC4007
PC4017
9 1
16 PGND VLDOIN
PGND_VDD1
10uF/6.3V/X5R/M_4
2
2
3 6 P_VTT_REF
AGND VDDQREF
0.47nF/6.3V/X5R/M_2
1
B B
PC4016
1
PC4018
TPS51487XRJER
2
2
A A
Page name:
POWER_LPDDR4
Size: Project REV:
Custom
Name: V1.0
UX425UG
Date: Sheet: of
5 4 3 2 1
5 4 3 2 1
D D
+VSYS
+VSYS SHUNT_0805
PSH5008
P_+VDDNB_IN_S 1 2
+V5P0A
PR50041 2 4.7R/J_6 PR9985 2 1 0R/J_6
100nF/25V/X5R/M_2
1 SHUNT_0805
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
P_APU_VIN_30 +V5P0A ns PSH5007
1
PR5001 1 2 10R/F_6 + 1 2
PC5056
PC5057
PC5088
PC5058
PC5059
PCS5005
ns PQ5005
PQ1001
2.2uF/10V/X5R/M_4
2
1 PR5011 1 2 2.2R/F_6 2
ns
100nF/25V/X5R/M_4
1
2 PU5001 D1 2
PC5001
3 D1 3
2.2uF/10V/X5R/M_4
ns
1
S 5 PR5008 4
PC5014
D1
100nF/25V/X5R/M_2
2
1
1
D 2.2R/F_6 10
PC5009
D1
P_+VDD_VCC P_+VDDNB_BOOTA1_S P_+VDDNB_BOOTA1_R_S
1
PR5005 1 2 33R/F_6 28 42 1 2
100K/J_2
G
PR1005
PC1006
VCC BOOTA1
2
2
PR5003 P_+VDDNB_LX_S
100nF/25V/X5R/M_4
2
PHASEA1
44 PC5015 1 2 100nF/25V/X5R/M_4 Imax=10A
2
P_APU_TONSET_INPUT P_+VDD_PVCC
1
1 2 50 1
PC5016
G1
PVCC
100nF/25V/X5R/M_4
PL5004 +VDDCR_SOC
43 P_+VDDNB_UG_30 PR5088 1 2 0R/J_6 P_+VDDNB_UG_R_30 0.22uH_41 A(lrat)_23 A(lrms)_M(±20%)_2.1mohm
33R/F_6
UGATEA1 P_+VDDNB_LX_S
2
P_APU_IN_GATE
Fsw_Max 413K
1
9
PC5005
S1/D2
P_+VDD_TONSETA_R PR5006 1 2 82K/F_2 P_+VDD_TONSETA 40
POSCAP/330uF/2V/M
POSCAP/330uF/2V/M
TONSETA
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
P_+VDDNB_LG_30
1
45 1 1
LGATEA1
2
1
Fsw_Max 411K PR5089
PCS5019
PCS5020
1
8 G2 2.2R/F_8 2 1 10MIL + +
PC5060
PC5061
PC5062
PC5063
PR5002 1 2 100K/F_2 P_+VDDNB_TONSET 4 36 P_+VDDNB_CSP ns
PR1006
47K/F_2
PR5075 TONSET ISENA1P PR5090
P_+VDDNB_CSP_R
PR5058 PR5057 PNTC5001
P_+VDDNB_SNB_S
2
2 2
2
2.49k/J_4 3.4k/F_4 NTC/100K/F_4 1 2 5 S2 1.24K/F_4
P_+VDD_VCC 300R/F_4 P_+VDDNB_RNTC_RP
2 910R/B_4 P_+VDDNB_CSN
PQ1003_D 2
1 2 P_IMON_VCC_R 2 1 2 1 P_+VDDNB_RNTC_P 2 1 35 P_+VDDNB_ISENA1N PR5018 1 6 S2

ISENA1N
1
PC5068 7 S2 PC5070
PR5061
1
PR5063 PR5060 PC5123 100pF/25V/C0G/J_2 1nF/50V/X7R/J_4
PR5062
300R_F_4 18.7K/F_4 21K/F_4 6.8K/F_4 100nF/25V/X5R/M_4 nb_mos10_6x5x0d8 PC5069
1P_+VDDNB_RNTC_RN P_+VDDNB_RNTC_N 1P_+VDDNB_IMON_R 1P_+VDDNB_IMON
2
2 2 1 2 2 17 ns 100nF/25V/X5R/M_4
IMONA
2
1
ns 2 1 1 2
+V3P3A
P_+VDD_SET3
PR5074 PR5068 PNTC5002 PR5066 PR5065
PR5067 PR5092
3
1
24K/F_4 NTC/100K/F_4 27K/F_4 11K/F_4 PC5071
2K/F_4 750R/F_4 P_+VDDNB_CSP
10K/J_2 D 2 1P_+VDD_RNTC_RP 2 1 P_+VDD_RNTC_P 2 1 2 1P_+VDD_IMON_R 2 1P_+VDD_IMON 15 1.24K/F_4 PR5093 1 2 2.49K/F_2 100nF/6.3V/X5R/K_2
PR6110
PQ1003 IMON
PQ1003_G ns
2
1 2 1 G PR5071 PR5070
20K/J_4 2.4K/J_4 P_+VDDNB_CSN PR5094 0201
S 2 1P_+VDD_RNTC_RN 2 1 P_+VDD_RNTC_N 1 2 ns
100nF/16V/X5R/M_2
VDD/DOC offset 0mV

1PQ1003_S 2
1
PC1004
PR5084 PR5079 PR5078 PC5156 +VDDCR_VDD

0R/J_4 20k/F_4 0R/J_4 22nF/50V/X5R/M_4
2
2 1 P_IMON_VCC_R2 2 1 1 2P_+VDD_SET3_SNB 1 2 13 P_+VDD_COMP PC5038 1 2 68pF/25V/C0G/J_2 PC5139 1 2 330pF/50V/X7R/K_2 PR5041 1 2 100R/F_4

COMP
PR5033 PR5035 PR5036
P_+VDD_SET3 16 PR5034
PR6106 POR,Vdiv=2150mV:current gain ratio 25% 30K/F_4 10K/F_4 10k/F_4 0R/J_4
10K/J_2 after POR,V064 clamp voltage =0.64V P_+VDD_VCC PR5032 1 2 20K/F_4 V064/SET3 1 2 P_+VDD_COMP_RU 1 2 1 2 P_+VDD_COMP_RD 1 2 PR5042 1 2 20R/F_4
ns VDDCR_VCC_SENSE 6
PR5037 2 1 0R/J_4 P_+VDDNB_OFSA 24 12 P_+VDD_FB PC5043
OFSA FB
2
1nF/50V/X7R/J_2
11 P_+VDD_VSEN 1 2 PR5051 1 2 0R/J_4
VSEN VDDCR_VSS_SENSE 6
P_+VDD_VCC PR5039 1 2 20K/F_4 P_+VDD_OFS 23
OFS
ns ns
PR5040 1 2 0R/J_4 14 P_+VDD_RGND PR5053 1 2 100R/F_4 VDDCR_SOC
RGND
FSW=300KHz
41
PWMA2 Connect to output Cap GND Slew rate :12.5mv/us
C TDC=13A EDC=17A C
P_+VDD_VCC P_+VDD_SET1_RU P_+VDD_SET1 P_+VDD_EN OCP=26A
PR5043 1 2 124K/F_4 PR5044 1 2 1K/F_4 25 37 PR5054 1 2 0R/J_4 OVP=VID+300mA
SET1 EN EC_VR_ON 33
ns Loadline=2.1mohm
P_+VDD_SET1_RD
1
PR5045 2 1 20K/F_4 PR5046 2 1 732R/F_4
+VSYS Ripple:+/-20mv
PC5044
MAX AC: VID_VDDCR_SOC +70mv
100nF/25V/X5R/M_4 PR6076 0402
MIN AC: VID_VDDCR_SOC -40mv
2
1 2 ALLSYSPWRGD 33 SHUNT_0805
P_+VDD_VCC PR5049 1 2 470R/F_2 P_+VDD_SET2_RU PR5050 1 2 2.4K/J_4 P_+VDD_SET2 26 PQ5001 PSH5002
SET2 ns P_CORE_IN1_S
1 2
100nF/25V/X5R/M_2
PR5047 1 2 560R/F_2 P_+VDD_SET2_RD PR5048 1 2 0R/J_2 1
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
46 P_+VDD_BST1_S PR5010 1 2 2.2R/F_6 P_+VDD_BST1_R_S D1 2
P_+VDD_IBIAS BOOT1
1
PR5052 1 2 100K/J_2 29 3 + SHUNT_0805
PC5007
PC5008
PC5002
PC5003
PC5004
D1 ns
PCS5001
IBIAS 4 PSH5001
D1
48 P_+VDD_LX1_S PC5006 1 2 100nF/25V/X5R/M_4 D1 10 1 2
PHASE1
2
2
ns ns
47 P_+VDD_UG1_30 PR5009 1 2 0R/J_6 P_+VDD_UG1_R_30 1 G1
UGATE1 +VDDCR_VDD
100K（>1%）*20uA=2V, for internal analog circuits NOT USE,Connect to 5VALW PL5001
+V5P0A P_+VDDNB_ISENA2 33 9 P_+VDD_LX1_S

0.15uH_45 A(lrat)_38 A(lrms)_M(±20%)_0.9mohm 待确认感值大小、DCR大小
S1/D2
ISENA2P
PR5007
POSCAP/330uF/2V/M
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
PR5020 1 2 10K/J_2 34 1 2 P_+VDD_SNB1_S
ISENA2N 2 1 1
P_+VDDNB_VSENA P_+VDD_LG1_30 PR5012 ns
1
32 49 8
PC5010
PC5012
PC5013
G2
PCS5012
PC5011
+VDDCR_SOC VSENA LGATE1 2.2R/F_8 +
P_+VDD_CS1P_R
1
PC5030 PC5131 PC5119 2K/F_4
330pF/50V/X7R/K_2 56pF/25V/C0G/J_2 1nF/50V/X7R/J_4
P_+VDDNB_COMPA_C P_+VDDNB_COMPA P_+VDD_CS1P
2
PR5031 1 2 100R/F_4 1 2 1 2 30 8 1 2 5 S2 2
COMPA ISEN1P
2
PR5026 PR5027 ns 6 S2 ns
43.2k/F_4 5.1K/J_4 PC5018 7 S2 PR5014 PC5017
PR5025 1 2 15R/F_4 PR5022 1 2 10k/F_4 1 2 P_+VDDNB_COMPA_R 1 2 7 P_+VDD_ISEN1N PR5015 1 2 910R/F_4 P_+VDD_CS1N100pF/25V/C0G/J_2 2K/F_4 100nF/25V/X5R/M_4
ns
6 VDDCR_SOC_VCC_SENSE ISEN1N 1 2 1 2
nb_mos10_6x5x0d8
100nF/6.3V/X5R/K_2
1
1
PC5020
VDDCR_SOC_VSS_SENSE merge with VDDCR_VSS_SENSE
1
PC9056 31 100nF/25V/X5R/M_4 PR6081 1 2 4.02K/F_2
PC5022
1nF/50V/X7R/J_2 FBA
P_+VDD_CS1P
2
2
PR9988 1 2 0R/J_4 ns
6 VDDCR_SOC_VSS_SENSE
2
ns
PR8899 1 2 100R/F_4 P_+VDD_RGND P_+VDD_CS1N PR5017 0201
1 2 ns
2 P_+VDD_BST2_S PR5016 1 2 2.2R/F_6 +VSYS
+V1P8A +V1P8S +V1P8A BOOT2
PC5121 SHUNT_0805
PR5055 1 2 2.2R/F_4
52 P_+VDD_LX2_S
100nF/25V/X5R/M_4
1 2 P_+VDD_BST2__R_S P_CORE_IN2_S 1
PSH5004
2
Base on 25W config
PHASE2 APU_VDDCR
PR6075 1 2 10K/J_2 ns PC5145 2 1 1uF/6.3V/X5R/M_2 P_+VDD_VDDIO 18 PQ5002
VDDIO FSW=400KHz
100nF/25V/X5R/M_2
1 SHUNT_0805
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
PR5080 1 2 10K/J_2 ns
ns PSH5003 2 Slew rate:12.5mv/us
1
D1 2 + 1
PC5019
PC5021
PC5023
PC5024
PC5025
PCS5002
PR6074 1 2 10K/J_2 D1 3 TDC=44A EDC=70A
P_+VDD_OCP
D1 4 OCP=105A
2
PR5082 1 2 10K/J_2 ns 27 10 2
49 P_APU_OCPL_10 OCP_L
D1 ns OVP=VID+300mV
Load Line=0.7mohm
ns Ripple:+/-20mv
6,43 APU_PWROK
PR5056 1 2 0402 19
PWROK Imax=70A
ns
1 P_+VDD_UG2_30 P_+VDD_UG2_R_30 待确认感值大小、DCR大小 +VDDCR_VDD MAX AC: VID_VDDC +95mv
PR5021 1 2 0R/J_6 1 G1
UGATE2 PL5002 MIN AC: VID_VDDC -80mv
0.15uH_45 A(lrat)_38 A(lrms)_M(±20%)_0.9mohm
S1/D2 9 P_+VDD_LX2_S
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
+V3P3S 1 1
POSCAP/330uF/2V/M
POSCAP/330uF/2V/M
1 2 2 1
P_+VDD_CS2P_R
P_+VDD_SNB2_S
1
ns + +
PC5026
PC5028
PC5031
PC5029
PCS5013
PCS5014
PR5076 1 2 10K/J_2 51 P_+VDD_LG2_30 8 G2 PR5028 PR5023
38 LGATE2 2.2R/F_8 2K/F_4
PGOODA P_+VDD_CS2P 2 2
2
5
39 ISEN2P 1 2 5 PR5030 PC5036
S2
33 VR_PWRGD PGOOD 6 P_+VDD_ISEN2N PR5019 1 2 910R/F_4 P_+VDD_CS2N 6 2K/F_4 100nF/25V/X5R/M_4
S2
B PR5059 1 2 0402 P_+VDD_SVC 20 ISEN2N PC5040 7 2 1 1 2 1 2 B
S2
6 APU_SVC SVC
1
ns PC5124 100pF/25V/C0G/J_2 ns
100nF/6.3V/X5R/M_2
100nF/25V/X5R/M_4 nb_mos10_6x5x0d8 PC5141
PR5064 1 2 0402 P_+VDD_SVD 21 1nF/50V/X7R/J_4
6 APU_SVD SVD
1
ns PR6082 1 2 4.02K/F_2
PC5142
ns
PR5073 1 2 0402 P_+VDD_SVT 22 3 P_+VDD_PWM3 P_+VDD_CS2P
6 APU_SVT SVT PWM3
2
ns
9 P_+VDD_CS3P 二供料号待申请 P_+VDD_CS2N PR5038 0201
ISEN3P
100nF/25V/X5R/M_4
100nF/25V/X5R/M_4
100nF/25V/X5R/M_4
53 1 2 ns +VSYS
GND P_+VDD_ISEN3N PR5029 1 P_+VDD_CS3N
1
10 2 910R/F_4 SHUNT_0805
PC5050
PC5052
PC5053
ISEN3N PSH5005
1
+V3P3S PC5037 1 2
2
100nF/25V/X5R/M_4
PR6057 1 2 180K/F_2 RT3663BMGQW_WQFN52_6X6 SHUNT_0805
APU_PROCHOT# 6,33
2
ns ns ns ns ns PSH5006
ns
84mil 1 2
3D
100nF/25V/X5R/M_2
+V1P8S PR6058 1
1uF/35V/X5R/M
1uF/35V/X5R/M
1uF/35V/X5R/M
1uF/35V/X5R/M
180K/F_2 G PQ9755 PC5051 PQ5003 ns
PQ9755_G
1
1 2 1 PR5069 220nF/10V/X5R/K_2 +
PC5039
PC5041
PC5042
PC5045
PC5086
PCS9003
ns 2.2R/F_6
2
1 2 P_+VDD_BST3_R_30 1 2 D1 2
2
2
3
ns D1 3
P_+VDD_LX3_S
P_+VDD_BST3_30
S
D PQ9752 D1 4
D1 10
1 G ns
49 P_APU_OCPL_10
1
S PU5002
ns 待确认感值大小、DCR大小
2
PR6060 +V5P0A 4 2 PR5072 P_+VDD_UG3_R_30 1 G1

180K/F_2 BOOT PHASE 0R/J_6 PL5003 DCR: Typ:0.9mohm +VDDCR_VDD
ns PR6069 1 2 2.2R/F_6 P_+VDD_DRV_VCC 8 3 P_+VDD_UG3_30 1 2 0.15uH_45 A(lrat)_38 A(lrms)_M(±20%)_0.9mohm
VCC UGATE P_+VDD_LX3_S
2
S1/D2 9
PR5077 1 06032 P_+VDD_DRV_EN 1
EN 7 P_+VDD_LG3_30 1 2
1uF/16V/X5R/K_4
LGATE
POSCAP/330uF/2V/M
POSCAP/330uF/2V/M
P_+VDD_PWM3
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
ns 5 2 1 1 1
PWM
P_+VDD_SNB3_S
1
6 9 8 PR5081 ns
PC5054
G2
GND EPAD PR5083
1
2.2R/F_2 + +
PC9058
PC9057
PC9059
PC9060
PCS5015
PCS5016
P_+VDD_CS3P_R
RT9610C 2K/F_4
2
2 1 5 S2
2 2
2
6 S2 PC5157
PC5055 7 S2 3.3nF/50V/X7R/K_4
100pF/25V/C0G/J_2 2 1
ns ns
ns
nb_mos10_6x5x0d8
2 1 PR5086 1 2 4.02K/F_2
POR,Vdiv=2150mV:current gain ratio 25%

ns PR5085
after POR,V064 clamp voltage =0.64V 2K/F_4
+V5P0A 1 2
PR9991
10K/F_2 PC5158
P_+VDD_CS3P
2
1 2 100nF/25V/X5R/M_4
PC5159
100nF/10V/X5R/K_4
P_+VDD_CS3N
1
PR5087 0402
1
1 2 ns
ns PR9990
0R/J_2
2
ns P_+VDD_ISEN3N
A A
Page name:
POWER_CPU CORE_RT3663BM
Size: Project REV:
A4 UX425UGUX425UGUX425UG
Name: V1.0

5 4 3 2 1
5 4 3 2 1
D D
+V5P0A SHUNT_0805
PRS6001
1 2 P_+VDDPA_IN_S Imax=1.8A
TDC=1.44A
OCP=3A
10uF/6.3V/X5R/M_6
ns
1
Reserve voltage step issue
PC6001
+VDDP_S5
EE request PU6001
PL6001
2
1uH/9.8A(lrat)/10A(lrms)/M
3 6 P_+VDDPA_LX_S P_+VDDPA_OUT_S
VIN LX
100nF/16V/X5R/M_2
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
33,51 VDDPA_PGOOD
1
PR6001 1 2 100K/J_2 2 PR6009
PC6004
PC6005
PC6006
47,50 V5P0A_PGOOD PG PC6003 10R/F_2
22pF/50V/C0G/J_2
2
PR9987 0201 PR6002 1 2 100K/J_2 P_+VDDPA_EN 7 1 P_+VDDPA_FB 2 1
47,50 V5P0A_PGOOD EN FB
1 2 ns ns ns
8 PR6003
PR9986 2 1 0R/J_2 PD6001 1 2 WSB5819WA-2/TR 9 GND1 10K/F_2
33nF/16V/X7R/M_4
33,47,51 1.8VA_EN GND2 P_+VDDPA_SNS
4 5 2 1
GND3 NC
1
ns
PC6002
G2822CRC1U
1
33,38,40,47,51 V5P0A_EN PR9989 1 2 0R/J_4 PR6004
39.2K/F_2 PR6020 2 1 0R/J_2
APU_VDDP_S5_SEN_H 6
ns
2
PR6021 2 1 0R/J_2
APU_VDDP_S5_SEN_L 6,50
C C
Vout=0.6(R1/R2+1)
+V3P3A SHUNT_0805
PRS6004
1 2 P_+VDDPS_IN_S Imax=1.8A
B
TDC=1.44A B
OCP=3A
10uF/6.3V/X5R/M_6
ns
Reserve voltage step issue 1
PC6007 PL6002 +VDDP

PU6002
2
EE request 3 6
1uH/9.8A(lrat)/10A(lrms)/M
P_+VDDPS_LX_S P_+VDDPS_OUT_S
VIN LX
100nF/16V/X5R/M_2
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
1
+V3P3A PR6006
100K/J_2
1
1 2 P_+VDDPS_PG 2 PR6011
PC6010
PC6012
PC6011
PG
ns PC6009 10R/F_2
22pF/50V/C0G/J_2
2
PD6002 1 2 WSB5819WA-2/TR P_+VDDPS_EN 7 1 P_+VDDPS_FB 2 1
7,31,33,52 SLP_S3_S0A3# EN FB
ns
8 PR6010
PR6005 1 2 100K/J_2 9 GND1 10K/F_2
33nF/16V/X7R/M_4
4 GND2 5 2 1 P_+VDDPS_SNS
GND3 NC
1
ns
PC6008
PR6008 1 2 100K/J_2
33,51,52 EC_SLP_SX_N
G2822CRC1U
2
1
PR6007
39.2K/F_2 PR6022 2 1 0R/J_2
APU_VDDP_SEN_H 6
2
PR6023 2 1 0R/J_2
APU_VDDP_S5_SEN_L 6,50
Vout=0.6(R1/R2+1)
A A
Page name: VDDP
Size: Project REV:

5 4 3 2 1
5 4 3 2 1
D D
+VSYS SHUNT_0805 PR1810 PC1810 PR1808 PC1814

PRS1801 0R/J_6 100nF/25V/X5R/M_4 2.2R/F_8 1nF/50V/X7R/J_4
1 2 P_+V1P8A_IN_S P_+V1P8A_BST_S 1 2 P_+V1P8A_BST_R_S 1 2 1 2 P_+V1P8A_SNB_S 1 2
10uF/25V/X5R/M_6
10uF/25V/X5R/M_6
100nF/25V/X5R/M_2
1uF/25V/X5R/K_4
1
ns ns ns
1
+
PC1804
PC1815
PC1816
PCS9002
PC1811
2
2
ns 2 PU1801
1
PL1801 +V1P8A
IN2
IN1
BS
4 1.0uH/15 A(lrat)/12.5 A(lrms)/M_7.3 mohm
IN3 20 P_+V1P8A_LX_S P_+V1P8A_OUT_S
5 LX3 19
IN4 LX2 6
LX1
EE request 10
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
100nF/6.3V/X5R/K_2
P_+V1P8A_VCC PR1801 1 2 100K/J_2 NC1 PR1802 2 1 1K/J_2 P_+V1P8A_FB_R PC1812 2 1 220pF/50V/X7R/K_2
1
PC1809
PC1805
PC1801
PC1806
PC1807
PC1808
PR1809 0201 P_+V1P8A_PG 9 14 P_+V1P8A_FB PR1804 2 1 102K/F_2
33,47,52 V1P8A_PGOOD PG FB
EN High: >1V 1 2 ns
2
EN Low:<0.4V
2 100K/J_2 P_+V1P8A_VCC
1
PR1811 1 2 0R/J_4 P_+V1P8A_EN 11 12 P_+V1P8A_MODE PR1813 1
33,47,50 1.8VA_EN EN MODE ns
ns PR1803
ns PR1805 1 2 100K/J_2 49.9K/F_2
PR1815 0201 16
33,50 VDDPA_PGOOD
1 2 ns NC2 ns
C Vout=0.6V*(1+R1/R2) C
2
+V3P3A P_+V1P8A_VCC
100nF/6.3V/X5R/K_2
17
33,38,40,47,50 V5P0A_EN PR1816 1 2 0R/J_4 VCC
PR1807 0402 P_+V1P8A_BYP 15
1
ns BYP 13 P_+V1P8A_ILMT 1 2
PC1813
1 2
ILMT
ns
1uF/6.3V/X5R/M_2
ns 21 7 PR1806
2
GND GND1
2
18 8 100K/J_2
2.2uF/6.3V/X5R/M_4
PC1803
GND3 GND2
1
100K/J_2
ILMT pin
PR1812
PC1802
1
floating,
SY8286A Ilim_min=9.3A
2
2
ns
B B
+V3P3A PL1201 +V1P2_HDMI

1 uH/4.6 A(lrat)/4 A(lrms)/M
P_+V1P2A_IN_S P_V1P2A_LX
1
10uF/6.3V/X5R/M_6
100nF/6.3V/X5R/K_2
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
Imax=1A
1
PSH1201
PC1206
1
PC1203
PC1204
PC1205
0201
2
2
3
PU1201
2
VIN
LX
2
PR1202
5 100K/F_2 ns
PG 6 P_V1P2A_FB 1 2
FB
PR1201 0402 1 2
33,50,52 EC_SLP_SX_N EN GND
1 2
ns PC1202
RT8096CHGJ5 22pF/25 V/C0G/J_2
1
1 2 P_+V1P2A_SNS
PC1201
100nF/16 V/X5R/M_2
2
1
ns Vout=0.6(R1/R2+1)
PR1203
100K/F_2
2
A A
Page name: VDDP
Size: Project REV:

5 4 3 2 1
1 2 3 4 5
A +V5P0A +V5P0S A
+V3P3S,+V5P0S
100nF/6.3V/X5R/K_2
IMAX:3A
1
0305 Modify for EE timing. PC7006
PC7007
10uF/X5R/6.3V/M_6
PU7002
2
PR7002 0201 PR7003 1 2 10K/J_2 V3P3SX_EN 1
7,31,33,50,52 SLP_S3_S0A3# IN1_1
1 2 ns 13
V5P0SX_EN 3 OUT1_2
PR7004 1 2 0R/J_2 PR7005 0201 V5P0SX_EN +5V_LDO EN1
33,50,51,52 EC_SLP_SX_N
ns 1 2 ns +V3P3S
4
1nF/50V/X7R/J_2
100nF/6.3V/X5R/K_2
VBIAS
1
OUT2_2
8 IMAX:3A
1
PC7013
PC7014
1
PR7006 +V3P3A 12 +V5P0S5_CT
100nF/6.3V/X5R/K_2
PC7012 CT1
100K/J_2
1uF/6.3V/X5R/M_2
1
6 10 +V3P3S5_CT
PC7008
10uF/X5R/6.3V/M_6
IN2_1 CT2
2
ns 15
2.2nF/25V/X5R/K_2
ns V3P3SX_EN 5 GPAD 11
1nF/50V/X7R/J_2
EN2 GND
2
1
PC7009
1
PC7010
PC7011
G2898
2
B B
2
+V1P8S,+V1P8A_CODEC
+V1P8A
+V1P8S
10uF/X5R/6.3V/M_6
100nF/6.3V/X5R/K_2
PR7001 0201 1P8S_EN
33,50,51,52 EC_SLP_SX_N
1
1 2 ns PC7001
1
10uF/X5R/6.3V/M_6
PC7002
PC7003
PU7001
2
C 7,31,33,50,52 SLP_S3_S0A3# PR7007 1 2 0R/J_2 C
2
ns 1 ns ns
IN1_1 13
1P8S_EN OUT1_2
1
3
PC7015 +5V_LDO EN1 +V1P8A_CODEC
1uF/6.3V/X5R/M_2
2
4 8
VBIAS OUT2_2
ns
1
12 P_V1P8S_CT1 PC7021
PC7005 CT1 10uF/X5R/6.3V/M_6
1uF/6.3V/X5R/M_2 6 10 P_VDDP_CT2
+V1P8A
IN2_1 CT2
2
15 ns
1nF/50V/X7R/J_2
1nF/50V/X7R/J_2
PR7125 0201 P_+V1P8A_CODEC_EN P_+V1P8A_CODEC_EN 5 GPAD 11
33,47,51 V1P8A_PGOOD EN2 GND
1
1 2 ns
PC7016
PC7004
G2898
1
2
PC7059
1uF/6.3V/X5R/M_2
2
ns
D D
Page name: POWER_Load switch
Size: Project REV:

1 2 3 4 5
1 2 3 4 5
A +VSYS A
TP5614
SHUNT_0805
EMI Request 背对背摆件 PRS8001
1
P_NVDD_IN1_S 1 2
ns
100nF/25V/X5R/M_4
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
1
ns
1
+
PC8003
PC8004
PC8005
PC8006
PC8002
PCS8001
PQ11
2
2
D1 2 VGA@ VGA@ VGA@ VGA@

ns
D1 3
D1 4
VGA@
D1 10
+VSYS PR8011 MHCI06030-R36M-R8A3R05

PR8002
1R/J_6 ISAT=40A, IRMS=23A
1 2 P_NVVDD_TON_R PR8006 1 2 P_NVVDD_HG1_R_30 1 2 P_NVVDD_HG1_30 1
330K/F_4 G1
6.6*7.3*3.0mm TP5613 +VGA_CORE
VGA@ PL8001
RDC=3.0mohm
1
2.2R/F_6 PC8007 VGA@ 0.22uH/40A(Isat)/23A(Irms)/M

PR8008 9 P_NVVDD_LX1_S ns EMI Request
VGA@ 1uF/35V/X5R/M_4 S1/D2
1
P_NVVDD_BST1_30 1 2 P_NVVDD_BST1_R_30
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
POSCAP/330uF/2V/M
2
2 1 P_NVVDD_TON VGA@
VGA@ 1
PCS8002
1R/J_6
1
75K/F_2 ns 8 VGA@ +
PC8014
PC8015
PC8016
PC8017
PC8018
VGA@ G2
1
PR8005 PR8003 PU5701 PC8009
1
47K/F_2 220nF/10V/X5R/K_2 PR8001
2
PC8027 2 1 100nF/6.3V/X5R/K_2 2 1 5 S2 2.2R/F_6 VGA@ 2
BST1
TON
UGATE1
2
VGA@ VGA@ 6 S2
2
ns 7 S2 VGA@ VGA@ VGA@ VGA@ VGA@
20 P_NVVDD_LX1_S
LX1 ns
PR8020
19 P_NVVDD_LG1_30
PC8010
1 2 2 1 P_NVVDD_SNB1_S
+VSYS
7.5K/F_4 100pF/50V/C0G/J_2 SHUNT_0805
B 1 2 P_NVVDD_VREF_R PR8019 1 2 13K/F_2 P_NVVDD_VREF 8 LGATE1 PRS8002 B
VREF P_NVDD_IN2_S 1 2
VGA@
VGA@ ns PC8001 ns
2.2nF/25V/X5R/K_2
PR8022 PR9993
1 0R/J_2 2 P_NVVDD_REFADJ_R P_NVVDD_REFADJ P_NVVDD_BST2_30 P_NVVDD_BST2_R_30
1
PC8032 PR8023 1 2 6.19K/F_2 6 15 1 2 PQ9756
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
VGA@ REFADJ BOOT2 ns
4.7nF/10V/X7R/K_2 VGA@
1
PC9066
PC9065
PC9067
PC9064
PC9069
PC9068
1R/J_6
2
1
VGA@
VGA@ PC9063 D1 2
220nF/10V/X5R/K_2 D1 3
2
P_NVVDD_VSSSENSE P_NVVDD_REFADJ_R2 PR8024 1 2 4.32K/F_4 D1 4
2
VGA@ VGA@ D1 10
16 P_NVVDD_LX2_S
PHASE2 VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
P_NVVDD_STDBY_R PR8027 1 2 5.1K/F_2 P_NVVDD_REFIN 7
REFIN
ns PR9994 MHCI06030-R36M-R8A3R05
P_NVVDD_RFIN_DIV P_NVVDD_HG2_R_30
1R/J_6
P_NVVDD_HG2_30 ISAT=40A, IRMS=23A +VGA_CORE
D 3
PR8028 1 2 16.5k/F_2 14 1 2 1 G1
PQ8003 UGATE2 6.6*7.3*3.0mm PL9002
VGA@
RDC=3.0mohm
1
VGA@ 0.22uH/40A(Isat)/23A(Irms)/M
G PR8031 S1/D2 9 P_NVVDD_LX2_S
4.7nF/10V/X7R/K_2
P_NVVDD_STDBY
1
1 309R/F_4
PC8033
POSCAP/100uF/6.3V/M
ns VGA@ VGA@
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
1
2
P_NVVDD_LG2_30
1
VGA@ 17 8 VGA@
PCS8003
G2
2S
P_NVVDD_VSSSENSE LGATE2
1
+
PC8028
PC8029
PC8030
PC8031
PC8019
PR9992
5 S2 2.2R/F_6
2
2
1
+V3P3S 6 S2
PR8007
2
PC9061 7 S2 VGA@
1 2 100pF/50V/C0G/J_2 VGA@ VGA@ VGA@ VGA@
ns
2
VGA@ VGA@
1K/J_2 2 1 P_NVVDD_SNB2_S
PR8009 1 2 0R/J_2 P_NVVDD_PG 13 ns
20 NVVDD_PGOOD PGOOD
VGA@ PC9062 ns
2.2nF/25V/X5R/K_2
PR8010 0402 P_NVVDD_EN 3
20,22 EN_VGA EN
1 2
ns P_NVVDD_VID P_NVVDD_SS P_NVVDD_SS_R
PR8017 1 2 0R/J_2 5 12 1 2
C 20 VGA_CORE_PWM_VID VID OCSET/SS C
1
VGA@ +V5P0S PR8012
P_NVVDD_PSI PR8004
1
RGND
PR8013 1 2 0R/J_2 4 PC8011 PR8015 51K/J_2 PC8012

VSNS
20 PSI_VGA
GND
PSI 18 P_NVVDD_PVCC_20 2 1 47nF/10V/X5R/M_2 120K/F_2 ns 1nF/50 V/X7R/J_2

PVCC
1
VGA@
100nF/16V/X5R/M_2
10pF/25V/C0G/J_2
2
PR8032 1 2 82R/J_4 P_NVVDD_STDBY RT8816A 1R/J_6
20 GPU_Standby VGA@ ns
21
10
2
11
1
1
VGA@ PC8008 VGA@
PR8014
PC8013
PC8021
100K/J_2
VGA@
ns 2.2uF/6.3V/X5R/M_4
1uF/6.3V/X5R/M_2
VGA@
2
2
1
ns
PC8036
ns
ns
2
ns
PR8021 2 1 100R/F_2
VGA@
P_NVVDD_VSSSENSE PR8025 1 2 0201

ns
VSSSENSE_VGA 23
P_NVVDD_VCCSENSE PR8026 1 2 0201

ns
VCCSENSE_VGA 23
+VGA_CORE
D D
PR8030 2 1 100R/F_2
VGA@
Page name: POWER_GPU CORE

Size: Project REV:
Sheet: 53
of 57
1 2 3 4 5
1 2 3 4 5
+V5P0A
SHUNT_0805
PRS7101
Imax=1.8A
Reserve voltage step issue 1 2 P_+V1P0VGS_IN_40 TDC=1.44A
OCP=3A
10uF/6.3V/X5R/M_6
EE request
PC7101
ns
2
A PL7101 +1.0VGS A
+V3P3S 10K/J_2 PU7101 1uH/4.6 A(lrat)/4A(lrms)/M
PR9995 3 6 P_+V1P0VGS_LX_S P_+V1P0VGS_OUT_S
1 2 VGA@ VIN LX
VGA@
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
1
VGA@
100nF/16V/X5R/M_2
2
20 V1P0VGS_PGOOD PG
1
PSH7101
PC7104
PC7105
PC7106
PR7104 0201
PR7102 1 2 100K/J_2 P_+V1P0VGS_EN 7 200K/F_2
2
20,22 +1.0VGS_EN EN
2
1 P_+V1P0VGS_FB 1 2
8 FB
VGA@ GND1
ns
ns
1
PD7101 1 2 WSB5819WA-2/TR 9 PC7103 VGA@
GND2 VGA@ VGA@
1
ns 4 5 22pF/50V/C0G/J_2
33nF/10V/X5R/M_2
GND3 NC PR7105
2
300K/F_2 P_+V1P8A_SENSE
1
G2822CRC1U VGA@
PC7102
ns VGA@
2
VGA@ Vout=0.6(R1/R2+1)
2
B B
+V1P8A
+V1P8VGS
PR7203 1 2 0R/J_6
ns
P_+V1P8VGS_EN
1
PR7201 0201
20,22 +V1P8VGS_EN
1
1 2 ns PC7201 PC7209 PC7208
1
ns 4.7uF/6.3V/X5R/M_4 100nF/16V/X5R/M 10uF/6.3V/X5R/M_4
2
PC7202 VGA@ PU7201
ns
2
4.7uF/6.3V/X5R/M_4 2 VGA@
1
IN1_1 13
P_+V1P8VGS_EN 3 OUT1_2
PR7202 0201 P_+V1P8_AON_EN EN1
20,22 GPU_PWREN_18AON 1 2 ns +V1P8_AON
P_+V1P8_AON_EN 5
1
PC7204 ns +V1P8A 8
4.7uF/6.3V/X5R/M_4 EN2 OUT2_2
100nF/6.3V/X5R/K_2
12
CT1
2
+V5P0A 6
IN2_1
1
10
PC7206
2.2nF/25V/X5R/K_2
4 CT2 15
1nF/50V/X7R/J_2
VBIAS GPAD 11
GND
2
1
1
PC7205
PC7207
PC7203
1uF/6.3V/X5R/M_2 G2898
VGA@
2
VGA@ ns VGA@
C VGA@ C
EE request,删除1.8VPP load swtich
D D
Page name: POWER_1.0VGS&1.8VGS

Size: Project REV:
1 2 3 4 5
5 4 3 2 1
D D
+VSYS
SHUNT_0805 PR9004 PC9004 PR9006 PC9005
PRS9001 0R/J_6 100nF/10V/X5R/K_4 2.2R/F_6 2.2nF/50V/X7R/M_4
1 2 P_+1.2VGS_VIN_S 1 2 P_+1.2VGS_BST_R_S 1 2 1 2 P_+1.2VGS_SNB_S 1 2
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
1uF/25V/X5R/K_4
P_+1.2VGS_BST_S
1
1
ns VGA@ VGA@ ns ns
1
+
PC9006
PC9007
PC9008
PC9009
PCS9001
PR9002
110K/F_2
2
2
2
+V5P0A VGA@
VGA@ VGA@ VGA@ VGA@ VGA@
PR9001 1 2 2.2R/J_4 P_+1.2VGS_VCC
20
7
8
9
PU9001
IN1
IN2
IN3
BST
1
PC9001 +1.2VGS
4.7uF/16V/X5R/M_4 6 PL9001
TON 1.0uH_0630_15 A(lrat)_12.5 A(lrms)_M(±20%)_7.3 毫欧
VGA@
2
VGA@ 10 P_+1.2VGS_LX_S
21 LX1 11
VCC LX2
100nF/16V/X5R/M_2
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
22uF/6.3V/X5R/M_6
16 VGA@
P_+1.2VGS_OUT_S
LX3 17
C C
LX4
2
+V3P3A 18
PC9010
PC9012
PC9013
PC9014
PC9015
PC9016
PC9011
LX5
100pF/50V/C0G/J_2
PR9005 1 2 100K/J_2 1 ns
PGOOD
1
1
VGA@
PC9018
20 FBVDDQ_PG VGA@ VGA@ VGA@ VGA@ VGA@ VGA@
2
P_+1.2VGS_EN 2 PR9008 ns
20,22 FBVDDQ_PWR_EN PR9003 0402
1 2 EN 1 0R/J_2 2 P_+1.2VGS_SNS_C
2
ns PC9002
100nF/16V/X5R/M_2 PR9007
10K/F_2
ns
1
ns P_+1.2VGS_SS 22 5 P_+1.2VGS_FB 1 2
SS FB
4
AGND
10nF/25V/X5R/K_2
3 12
PFM PGND1 VGA@
1
10pF/25V/C0G/J_2
13
PC9003
PGND2
2
14
PC9017
PR9009
20K/F_2
PGND3 15
PGND4
nsPC9019
2
VGA@ 19 100nF/6.3V/X5R/K_2
PGND5
1
ns
2
VGA@
Vout=0.8(R1/R2+1)
VGA@
APW8742QBI-TRG
B B
A A
Page name: POWER_1.35VGS

Size: Project REV:
5 4 3 2 1
5 4 3 2 1
D D
Place near the battery conn
PR6090 1 2 12K/F_2 P_TEMP_TM3
C C
2
+V3P3A
2
PNTC3
NTC/100K/F_4 PC9055
100nF/6.3V/X5R/K_2
1
1
2.2K/J_2
2.2K/J_2
待申请料号和封装
PR3333
PR2222
Place near the VCCIN Phase1 L/S PU5104
PQ12 or PL7 2 8 P_TEMP_SDA PSH6091 0201
AIN3 SDA APU_EC_SDATA 6,33,38
1 2 ns
PR6096 1 2 12K/F_2 P_TEMP_TM2 3 7 P_TEMP_SCL PSH6090 0201
AIN2 SCL APU_EC_SCLK 6,33,38
1 2 ns
4 5 P_TEMP_VDD
AIN1 VDD
2
PNTC5 6 1 +V5P0S +V5P0A
NTC/100K/F_4 PC8057 GND ALERT/ADDR
100nF/6.3V/X5R/K_2 APL6002 ns
1
PR7124 2 1 2R2/F_6
P_TEMP_VDD
PR6093
1
10K/F_2
P_TEMP_ALERT 2 1 PR6089 2 1 2R2/F_6
2
PC9052
Place near the CHG L/S PQ5 or PL1 1uF/25V/X5R/K_4
2K/F_4
1
PR60951 2 12K/F_2 P_TEMP_TM1 PR6094
2
ns
2
PNTC4
NTC/100K/F_4 PC8056
100nF/6.3V/X5R/K_2
1
B B
1
A A
Page name: System Thermal Protection

Size: Project REV:
A4 Name: V1.0
UX425UG
Date: Sheet: of
5 4 3 2 1
5 4 3 2 1
Time ER Designer Page Description

10/20 zhiqiang.xia Page 7 1.Board ID2 PU to +3VA
10/20 zhiqiang.xia Page 7 2.GPU_PWREN Reserve PU to +3VA
10/20 zhiqiang.xia Page 8 3.GPU_PWROK adajist to AGPIO31
10/20 zhiqiang.xia Page 20 4.NV Suggest Mount R2902,Unmout R2903
10/20 zhiqiang.xia Page 20 5.Change R2911 0ohm to 1K,C2918 100nf to 22nf,R2946 470k to 330k
10/20 zhiqiang.xia Page 20 6.Umount D2912 R2944 C2920
D D
10/20 zhiqiang.xia Page 20 7.Change R2952 30K to 100K,R2969 0 to 30K,R2954 to 120K
10/20 zhiqiang.xia Page 20 8.Mount R2953,Unmount R2957
10/20 zhiqiang.xia Page 20 9.Mount C2922 220nF,Change R2942 from 0ohm to 10K
10/20 zhiqiang.xia Page 20 10.Change VCC Power from +V3P3S to +V1P8S
10/20 zhiqiang.xia Page 20 11.Let GPU_PWROK open Q2902&Q2904
10/20 zhiqiang.xia Page 28 12.Reserve SSD1_DET Pull Up to _V3P3A
10/20 zhiqiang.xia Page 33 13.Mount RT_SOC
10/20 zhiqiang.xia Page 41 14.Change C105 C106 footprint to 0201
10/20 zhiqiang.xia Page 43 15.Modify Hs4301-Hs4306 footprint tonb_nb2563-ssd_sh
10/30 zhiqiang.xia Page 6 16.Power suggest mount R7117 & R7116
10/30 zhiqiang.xia Page 11 17.Power suggest Ummount C205 & C9917 for CD
Time PR Designer Page Description

12/14 zhiqiang.xia Page 7 1.Mount R1011&Unmount R0733 For change DGPU_HOLD_RST From AGPIO69 to EGPIO27 to solve MS+GC6 Issue
zhiqiang.xia Page 7 2.Mount R0731 For GPU_PWREN
zhiqiang.xia Page 7 3.Unmount R0732 For GC6_FB_EN for open GPU&APU
zhiqiang.xia Page 7 4.Mount R0730 For GPU_PWROK
zhiqiang.xia Page 8 5.Delete AGPIO31 For GPU_PWROK
zhiqiang.xia Page 9 6.Unmount R296、R298&R299，Reserved For GPUPWERN、GPUPWROK&GPU_HOLD_RST For MS+GC6
C C
zhiqiang.xia Page 11 7.Change R239、R264、R265、R268、R267&R7069 to short pad
zhiqiang.xia Page 20 8.Delete R2947 For Pull-up GPU_REQ to avoid repet Pull-up
zhiqiang.xia Page 20 9.Add R2993 for using +1.8VGS to open GPU_REQ MOS，And Reserve R2992 for GPU_PWROK
zhiqiang.xia Page 20 9.Add R2975 for using +1.8VGS to open GPU_SMBus MOS，And Reserve R2970 for GPU_PWROK,And Delete D2913
zhiqiang.xia Page 20 10.Reserve +V3P3A power use R2951 to open Q2906，And mount R2985 for VGA_AC_DET_N，UNmount R2980 reserve for NV GPIO Issue
zhiqiang.xia Page 20 11.Mount R2973 Use +V3P3A to Pull-up GC6_FB_EN_R,Unmount R2971 for Reserve +V3P3S
zhiqiang.xia Page 20 12.Delete R2991 for Remove +V1P8S to Pull-up U2902 GPU_PWROK
zhiqiang.xia Page 20 13.Mount R2981 to Use V1.0VGS_PG and with FBVDD to open U2902,Unmount R2982 to reserve NVVDDPG
zhiqiang.xia Page 27 14.Change R7062、RHD2 to short pad
zhiqiang.xia Page 28 15.Add SSD_EN_N Discharge，And Change RW6 from 0ohm to 4.7K
zhiqiang.xia Page 31 15.Add CX25 For EDP，CT21&CT20 For Type-C VBUS
zhiqiang.xia Page 33 16.Add GPB1 to use as VGA_AC_DET_N，Mount R3306，UNmount R7023&R7024
zhiqiang.xia Page 39 17.Remove +V5P0S for KB Power
zhiqiang.xia Page 43 18.Change JDB1 Pin35 from +V3P3A to +V3P3A_EC
zhiqiang.xia Page 33 19.Change R2989、R1344、R3144 from 10K to 100K
zhiqiang.xia Page 40 20.Mount R2340 & Q2117 for RTC_RST Clear
zhiqiang.xia Page 20 21.Unmount R2955、R2962、Q2908、Q2909 & Q2910 for Run-in issue
zhiqiang.xia Page 53 22.Mount PR8009&PR8007 for SMT restart ，UNmount PC7102 for GPU Timing
B Time FCS Designer Page Description B
01/14 zhiqiang.xia Page 42 1.Reserve RE15 For +V3P3A Power For AC S5 Power Consumption
Page 53 2.UNmount PC7102 for GPU Timing
Page 20 3.Unmount R2955、R2962、Q2908、Q2909 & Q2910 for Run-in issue
Page 7 4.Modify R0731 option
Page 54 5.Unmount PC7102 For GPU Sequence
Page 7 6.Reserve R2905 S0 Power +V3P3S For AGPIO86 used as SMI external PU
Page 43 7.Update MT5、MT6、MT8-MT13 Footprint
Page 39 8.Update BL Footprint
A A
Page name: System Thermal Protection

Size: Project REV:
A4 Name: V1.0
UX425UG
Date: Sheet: of
5 4 3 2 1

Ux425ug Ux425ug Ux425ug Ux425ug Ux425ug Ux425ug

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5 4 3 2 1

Huaqin Telecom Technology Com.,Ltd.

Page name: Block Diagram

Size: Project REV:

NB2567 V4 POWER MAP

+VSYS reg CONTROLLER IC

Huaqin Telecom Technology Com.,Ltd.

Page name: Power Map

Size: Project REV:

BYTE1 MA_ADD0/RSVD AK26

MA_EVENT_L AK23 MA_EVENT_L MA_EVENT_L is an optional signal.

Huaqin Telecom Technology Com.,Ltd.

Page name: RN-DDR4(CHA)

Size: Project REV:

MB_DM0/MBA_DM1 C30 16 MBA_DM1

MBB_DATA16 17 AT29 MB_DATA32/MBB_DATA16 MB_DQS_H0/MBA_DQS_H1 E29 16 MBA_DQS_H1 MBA_DQS_H1

453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2 453R/F_2

MB_CKE0/MBA_CA1 AC31 16 MBA_CA1

Huaqin Telecom Technology Com.,Ltd.

Page name: RN-DDR4(CHB)

Size: Project REV:

PCIE4_GPU_RX0_DP G13 P_GFX_RXP0 P_GFX_TXP0 F4 PCIE4_GPU_TX0_DP GPU

C F18 P_GFX_RXP5 P_GFX_TXP5 B6 C

J18 P_GFX_RXP6 P_GFX_TXP6 D8

H19 P_GFX_RXP7 P_GFX_TXP7 C8

G11 L3 GPP_M2_TX0_C_DP C103 220nF/6.3V/X5R/M_2

CPU To CAP need >=12.7mm

GPP_SD_RX_DP L7 P_GPP_RXP5 P_GPP_TXP5 R1 R0501 0R/J_2 GPP_SD_TX_DP

K11 P_GPP_RXP9/SATA3_RXP P_GPP_TXP9/SATA3_TXP J4

J12 P_GPP_RXP10 P_GPP_TXP10 H3

J13 P_GPP_RXP11 P_GPP_TXP11 H4

FP6 REV 0.92

Huaqin Telecom Technology Com.,Ltd.

Page name: RN-(GFX/GPP)

Size: Project REV:

T4 1 AP3 TDI ANALOGIO_0 AK21 APU_TEST470 1 T234

APU_RST# AW3 RESET_L SMU_ZVDD P3 SMU_ZVDD R170 196R/F_2

+V1P8A SVID RESERVE

SVC SVD Boot Voltage 1K/F_2

0 1 1.0V APU_TEST15 R189ns 10K/J_2

APU_TEST17 R192ns 10K/J_2

Huaqin Telecom Technology Com.,Ltd.

Page name: RN(DP/DEBUG)

Size: Project REV:

Reserve TouchPAD_INT_N Pull up to +V3P3A

I2C0_SDA/EGPIO146 AN14 used as SMI--AMD suggest

SFH1_SCL D24 +V3P3A

R7101 SLP_S3_S0A3# R246 0R/J_2 SLP_S3#

Hynix 8GB 010

Hynix 16GB R196 R198 R200 R204

10K/J_2 10K/J_2 10K/J_2 10K/J_2

Page name: RN(AUDIO/GPIO/MIS)

Size: Project REV:

C272 15pF/25V/C0G/J_2 48M_OCS

R90 0R/J_2 GPP_WLAN_CLK3_R_DN AF4 GPP_CLK3N LPC_RST_L/AGPIO32 BC12 R103 33R/F_2

Add 3rd Source AF9 GPP_CLK6N/WIFIBT_CLKN ESPI_RESET_L/KBRST_L/AGPIO129 AT15

Y2 BB3 X48M_X1 SPI_DO BB8

C140 1pF/50V/C0G_2 BA5 BC9 SPI_CS2 1 T29

SUS_CLK_WLAN_C AW10 RTCCLK

R116 XTAL_32K_SOC_IN AY1 BA17 UART0_RX 1 T31

20M_J_4 XTAL_32K_SOC_OUT AY4 X32K_X2 AGPIO144/SHUTDOWN_L/UART0_INTR BB16 U9710

SEL LOW B0 connected to A