Patents

Method and apparatus for testing display panel

Abstract
CN102629440A
Disclosed in the invention is a display panel test apparatus, which is used for realizing
China
testing of a gate driver on array (GOA) panel, thereby learning the performance of the
GOA panel timely. The apparatus comprises a pad and a driver circuit; the pad is used for
receiving a test signal; and an input terminal of the driver circuit is connected with the Download PDF
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pad and the driver circuit is used for transmitting the received test signal to a gate
electrode of a pixel circuit array in the display panel so as to drive the pixel circuit array, Other languages: Chinese
thereby carrying out characteristic testing. Besides, the invention also discloses a
Inventor: 封宾, 王峥
method utilizing the apparatus to realize pixel unit driving.
Current Assignee
: BOE Technology Group Co Ltd
,
Beijing BOE Display Technology Co Ltd

Worldwide applications

2011

CN

Application CN2011101167319A events

2011-05-06 Application filed by BOE Technology

Group Co Ltd, Beijing BOE Display
Technology Co Ltd

2011-05-06 Priority to CN201110116731.9A

2012-08-08 Publication of CN102629440A

2015-01-07 Application granted

2015-01-07 Publication of CN102629440B

Status Active

2031-05-06 Anticipated expiration

Info: Patent citations (7), Cited by (11), Legal events,

Similar documents, Priority and Related Applications

External links: Espacenet, Global Dossier, Discuss

Claims (12) Hide Dependent

1. a display pannel proving installation is characterized in that, comprising: pad and driving circuit; Wherein:

Said pad is used for the acceptance test signal;

The input end of said driving circuit links to each other with said pad, is used for the test signal that receives is transferred to the grid of the image element
circuit array of display pannel through output terminal, and the driving pixels gate array, thus carry out characteristic test.

2. device as claimed in claim 1 is characterized in that said pad is positioned at the display pannel top.

3. device as claimed in claim 1 is characterized in that said driving circuit comprises connecting line, and every connecting line links to each other with
a pad.

4. device as claimed in claim 3; It is characterized in that; Said driving circuit comprises lead-in wire; One end of a lead-in wire links to each other with a
connecting line, or an end of many lead-in wires links to each other with a connecting line, and the other end of a lead-in wire links to each other with
the grid of delegation's TFT of image element circuit array.

5. device as claimed in claim 4; It is characterized in that said driving circuit also comprises transistor, said transistorized grid links to each other as
input end with source electrode; And said input end links to each other with the output terminal of said connecting line; Said transistor drain is as
 output terminal, and said output terminal links to each other with the input end of said lead-in wire, is used to isolate each lead-in wire that is
connected to same connecting line.

6. device as claimed in claim 5 is characterized in that, said transistor is a TFT.

7. device as claimed in claim 1 is characterized in that, said display pannel is the capable actuation techniques GOA panel of array base palte.

8. a display pannel is characterized in that, comprises the described arbitrary device of claim 1-7.

9. a display pannel method of testing is characterized in that, may further comprise the steps:

Pad acceptance test signal;

The driving circuit that links to each other with said pad transfers to the grid of the image element circuit array in the display pannel with the test signal that
receives through output terminal, the driving pixels gate array, thus carry out characteristic test.

10. method as claimed in claim 9 is characterized in that, the step of pad acceptance test signal comprises: when comprising a plurality of pad, receive
identical or different test signal through each pad.

11. method as claimed in claim 9; It is characterized in that; Said driving circuit also comprises transistor; Each transistorized grid links to each other
with source electrode, and each transistorized grid links to each other with the input end of said driver module with source electrode, and each
transistor drain links to each other with the output terminal of said driving circuit;

Driving circuit transfers to the test signal that receives the grid of the image element circuit array in the display pannel through output terminal; The
driving pixels gate array; Thereby the step of carrying out characteristic test comprises: through pad said test signal is sent into said transistorized
source electrode and grid; Said test signal transfers to the grid of the image element circuit array in the display pannel through said transistor drain, the
driving pixels gate array, thus carry out characteristic test.

12. method as claimed in claim 11; It is characterized in that; Said driving circuit comprises lead-in wire; One end of a lead-in wire links to each other
with a connecting line, or an end of many lead-in wires links to each other with a connecting line, and the other end of a lead-in wire links to each other
with the grid of delegation's TFT of image element circuit array; When not having the test signal input, said transistor ends, and each lead-in wire that is
connected to same connecting line is not communicated with mutually.
Description

A kind of display pannel method of testing and device

Technical field

The present invention relates to electronic applications, particularly a kind of display pannel method of testing and device.

Background technology

GOA (Gate Driver on Array, the capable actuation techniques of array base palte) is directly gate driver circuit (Gate driver IC) to be produced on array
(Array) substrate, replaces a kind of technology by the chip for driving of external silicon wafer to manufacture.This The Application of Technology can
reduce the production technology program, reduces product technology cost, improves the high integration of TFT-LCD (TFT LCD) panel.

The GOA technology has obtained comprehensive development and has used more widely in recent years.The GOA panel can be divided into
monolateral GOA panel (gate driver circuit being fabricated into the left side of array base palte) and bilateral GOA panel (manufacturing grid driving
circuit all in the array base palte left and right sides from the GOA distribution; Drive simultaneously from both sides); (wherein T represents the TFT
structure can be divided into 9T/13T again from sequential control aspect and unit TFT design aspect; 9T is that each gate driver circuit unit is made
up of nine TFT, and 13T is that each gate driver circuit unit is made up of 13 TFT) structure, condenser type (containing electric capacity in the finger
grid drive circuit unit) structure etc.

But also there are a lot of weak points in present GOA panel with respect to some traditional panel.For example; In the test of the V-T that carries out
panel (voltage-transmissivity) characteristic, classic method is through the gate pads zone is applied elargol, with inserting the grid test signal after the
pad area short circuit; The counter plate specific region drives, thereby realizes the test of V-T characteristic.But because the GOA panel is produced on
gate driver circuit on the array base palte; And be hidden in to box inside (to box be meant liquid crystal panel up and down layer glass substrate
utilization envelope frame glue fit formed in the middle of the box-packed structure of filling liquid crystal); There is not gate pads to be exposed;
Thereby cause and through pad test signal to be connected with the grid of image element circuit; The i.e. direct grid of driving pixels circuit, thereby
each item performance that can't before binding, test the GOA panel with PCB (printed circuit board (PCB)).

Summary of the invention

The embodiment of the invention provides a kind of display pannel method of testing and device, is used to realize the test to the GOA panel, thereby in
time knows the performance of GOA panel.

A kind of display pannel proving installation comprises: pad and driving circuit; Wherein:

Said pad is used for the acceptance test signal;

The input end of said driving circuit links to each other with said pad, is used for the test signal that receives is transferred to the grid of the image
element circuit array of display pannel through output terminal, and the driving pixels gate array, thus carry out characteristic test.
A kind of display pannel method of testing may further comprise the steps:

Pad acceptance test signal;

The driving circuit that links to each other with said pad transfers to the grid of the image element circuit array in the display pannel with the test signal
that receives through output terminal, the driving pixels gate array, thus carry out characteristic test.

Pad acceptance test signal in the embodiment of the invention; The driving circuit that links to each other with said pad transfers to the grid of the
image element circuit array in the display pannel with the test signal that receives through output terminal, the driving pixels gate array, thus carry out
characteristic test.Through increasing the pad module, for the introducing of test signal provides interface, pad links to each other with the input end of
driving circuit; The output terminal of driving circuit directly links to each other with the grid of image element circuit array; Thereby make test signal
pass through the direct driving pixels gate array of driving circuit, accomplishing each class testing, thus each item performance that before binding,
can test the GOA panel with PCB; To identify the function admirable degree of GOA panel; And whether the GOA panel is available or the like, the actual
utilization of being more convenient for, the utilization factor of raising GOA panel.

Description of drawings

Fig. 1 is the primary structure figure of display pannel proving installation in the embodiment of the invention;

Fig. 2 is a GOA panel synoptic diagram under the QGSD pattern in the embodiment of the invention;

Fig. 3 is the rough schematic that display pannel proving installation function realizes in the embodiment of the invention;

Fig. 4 is the main process flow diagram of display pannel method of testing in the embodiment of the invention.

Embodiment

Pad acceptance test signal in the embodiment of the invention; The driving circuit that links to each other with said pad transfers to the grid of the
image element circuit array in the display pannel with the test signal that receives through output terminal, the driving pixels gate array, thus carry out
characteristic test.Through increasing the pad module, for the introducing of test signal provides interface, pad links to each other with the input end of
driving circuit; The output terminal of driving circuit directly links to each other with the grid of image element circuit array; Thereby make test signal
pass through the direct driving pixels gate array of driving circuit, accomplishing each class testing, thus each item performance that before binding,
can test the GOA panel with PCB; Identifying the function admirable degree of GOA panel, and whether the GOA panel is available or the like.The actual
utilization of being more convenient for improves the utilization factor of GOA panel.

Referring to Fig. 1, the display pannel proving installation comprises pad 101 and driving circuit 102 in the embodiment of the invention.But test signal
input end connection pads 1, pad 101 links to each other with the input end of driving circuit 102, and the grid of the image element circuit array on the
output terminal of driving circuit 102 and the GOA panel links to each other.The embodiment of the invention is introduced the display pannel proving
installation with QGSD (quadruple gate signal driving method, the quadruple signal drives method) for example.Wherein, the embodiment of the
invention is that example describes with monolateral GOA panel.

Pad 101 is used for the acceptance test signal.Can comprise a plurality of pads 101 in the said device, wherein, pad is meant the part that pcb board
and components and parts pin are welded to each other, and is made up of Copper Foil and hole, expose Copper Foil, can not have soldering-
resistance layer to cover.The number of included pad 101 can be confirmed as required in the said device.For example, if comprise two connecting
lines in the driving circuit 102, the number of then said pad 101 can be 2.The pad 101 numbers number than connecting line as far as possible are
many, so that carry out expanded application.The input end of test signal can link to each other with pad 101, thereby through pad 101 input test
signals.Pad 101 can be positioned at the top of GOA panel; Promptly be positioned at GOA panel homonymy with the original data pads of GOA panel;
Preferable, be positioned at the upper left corner of GOA panel, be produced on the left side of GOA panel because of gate driver circuit; Pad 101 is
produced on the GOA panel upper left corner, makes it to be convenient to link to each other through the grid of driving circuit 102 with the image
element circuit array.Wherein, the grid of image element circuit array is meant the grid of the TFT of delegation in the image element circuit
array.Simultaneously, the top that pad 101 is positioned at the GOA panel is in order not take the resource at GOA panel middle part, to avoid lead-in
wire chaotic.Can import a drive test trial signal through a pad 101, promptly when comprising a plurality of pad 101 in the said device, can import
identical test signal, also can import different test signals through different pad 101.

The input end of driving circuit 102 links to each other with said pad, is used for the test signal that receives is transferred to the grid of the image
element circuit of display pannel through output terminal, and the driving pixels circuit, thus carry out characteristic test.The input end connection pads
101 of driving circuit 102, output terminal connects the grid of image element circuit array.Concrete, driving circuit 102 comprises many connecting
lines and many lead-in wires.Wherein, for making rational use of resources, avoid because of the confusion that goes between causes signal cross-
talk, the input end of every connecting line can connect a pad 101.Can transmit a drive test trial signal that receives from pad 101 on the every
connecting line; And different pads 101 can receive different test signals; Promptly when driving circuit 102 comprised many connecting lines, different
connecting lines can transmit identical test signal, also can transmit different test signals.

The input end of lead-in wire links to each other with the output terminal of connecting line in the driving circuit 102, and the output terminal of said
lead-in wire links to each other with the grid of image element circuit array.The number of lead-in wire can be confirmed as required in the driving
circuit 102; For example; If desired whole image element circuit array is tested, then the number of said lead-in wire can be identical with the line
number of image element circuit array, if only need the subregion of test pixel gate array; Promptly only need every capable TFT in the zone to be
measured is linked to each other with corresponding lead-in wire respectively, then the number of lead-in wire can be identical with the line number in
zone to be measured.The connected mode of connecting line and lead-in wire also can be confirmed as required in the driving circuit 102; For example,
it is leaded to use a connecting line to connect institute, and then expression drives zone to be measured with a test signal; Promptly zone to be
measured is carried out the test of same specific character; Perhaps different connecting lines connect different lead-in wires, for example can
connect a lead-in wire by a connecting line, perhaps can connect some lead-in wires by a connecting line; Can carry out different test processs to the
zones of different in zone to be measured through the different test signal of connecting line input like this.Every connecting line is controlled the lead-
in wire that is attached thereto respectively, and corresponding zone is tested, and the number of connecting line and lead-in wire all can be adjusted
arbitrarily according to actual needs.But need consider the restriction of cloth line position on the panel,, will take very big space, increase the difficulty
of wiring, and cause interference easily, concerning the reality test, also not have too big meaning if each root connecting line all only connects a lead-
in wire.

Preferable, can also comprise transistor in the said driving circuit 102.

Transistor is used for the lead-in wire of isolated drive circuit 102.Concrete, said transistor can be TFT.The grid of TFT links to each other as input end
with source electrode, and said input end links to each other with the output terminal of a connecting line, and TFT drains as output terminal, and said
output terminal links to each other with the input end of a lead-in wire that is connected to said connecting line.GOA panel synoptic diagram referring
to QGSD pattern shown in Figure 2.Test signal is input to the panel left side from data pad (data pads) district at panel top; Through the image element
circuit input to the right of GOA structural unit; Wherein, All GOA structural units among the figure do not belong to the driving circuit 102 in the
embodiment of the invention, because of in GOA panel figure, can't it specifically being separated, so in the drawings the GOA structural unit is divided
in driving circuit 102.GOA structural unit 1,3,5,7 is one group, and per two link to each other up and down, and connecting line of this four GOA
structural units connections, and GOA structural unit 2,4,6,8 is one group, and per two link to each other up and down, and these four GOA structural
units connect another root connecting lines.The grouping of GOA structural unit is what to be determined by quadruple grid type of drive.All GOA
structural units have promptly constituted gate driver circuit on the display pannel.It is for realizing the function of shift LD that per two GOA structural
units link to each other up and down; In per two GOA structural units that link to each other up and down; The output signal of a last GOA structural unit
is except providing gate drive signal to the image element circuit array; Also be connected trigger pip in addition, and next GOA structural unit produces
the output signal under the trigger action of a last GOA structural unit, except gate drive signal is provided for the image element circuit array as next
GOA structural unit with next GOA structural unit; Be connected as the pick-off signal of a last GOA structural unit with a last GOA structural unit
simultaneously; By that analogy, thereby realize the effect of shift register, realize lining by line scan.In addition, each GOA structural unit all links to
each other with clock signal clk, and gate drive signal can be exported simultaneously, can be controlled timesharing output by CLK.Wherein, first of
G1-G8 remarked pixel gate array walk to the 8th row the grid of TFT.Preferable, each lead-in wire continuous with each the GOA structural unit in one
group of GOA structural unit can be connected same connecting line.Each GOA structural unit is connected a lead-in wire in the driving circuit 102
simultaneously with the end that the grid of image element circuit array links to each other.When transistor receives the test signal of connecting line
transmission, because of the grid of TFT links to each other with source electrode and links to each other with the output terminal of connecting line,
the TFT conducting, test signal flows to drain electrode from the source electrode of TFT, and warp drains and sends into driving circuit 102.If the part
lead-in wire connects same connecting line in the driving circuit 102, each lead-in wire that then is connected to same connecting line is equivalent to
be connected with each other, and the signal of each lead-in wire may the phase mutual interference in operate as normal.After adding transistor, the
unidirectional input of restricting signal.As shown in Figure 3; Test signal can only be imported to right-hand member from left end; And the working
signal of grid can't transmit from right to left; Be that transistor is isolated each lead-in wire that is connected to same connecting line, thereby
guaranteed the operate as normal of image element circuit array, avoided each interference that goes between and influence each other and bring.If
every connecting line in the driving circuit 102 only connects a lead-in wire, then need not transistor.Transistorized number can be identical with the
number of lead-in wire in the driving circuit 102.

The slight problem that descends of grid voltage that can have simultaneously, the image element circuit array behind the adding transistor.Concrete,
one is meant that the voltage of grid test signal when work in viewing area (being the image element circuit array) descends, and is because the
decision of the limitation of TFT self; Though TFT is in cut-off state; But still can have the leakage current of trace among the TFT, the defective of this
TFT self can solve through the mode of applied load, promptly when TFT ends, imports negative voltage to the test signal input end; Guarantee that
TFT closes fully, prevent the generation of leakage current.On the other hand, be meant that the trace of test signal voltage changes, reason is the
consumption of TFT device self; The test signal voltage while is as grid voltage and the source voltage of TFT; Have small consumption, cause finally
being input to the drain voltage value and compare source voltage values small decline is arranged, but when plate is tested over there; Less
demanding to image element circuit array grid voltage, this slight voltage descends within the acceptable range.

Below introduce the method for display pannel test.

Referring to Fig. 4, the main method flow process of display pannel test is following in the embodiment of the invention:

Step 401: pad 101 acceptance test signals.

Step 402: the driving circuit 102 that links to each other with said pad 101 transfers to the grid of the image element circuit array in the display pannel
with the test signal that receives through output terminal, the driving pixels gate array, thus carry out characteristic test.

The detailed method flow process of panel test is following in the embodiment of the invention:

Pad 101 acceptance test signals, the connecting line of said test signal in driving circuit 102 transfers to transistorized grid, makes transistor turns;
Said test signal flows to drain electrode by the source electrode of TFT; And transferring to the input end of lead-in wire in the driving circuit 102 via the
drain electrode of TFT, the output terminal of said lead-in wire links to each other with the grid of image element circuit array, said test signal is sent
into the grid of image element circuit array; Thereby the driving pixels gate array is to carry out all kinds of characteristic tests to display pannel.

Pad 101 acceptance test signals in the embodiment of the invention; The driving circuit 102 that links to each other with said pad 101 transfers to the
grid of the image element circuit array in the display pannel with the test signal that receives through output terminal, the driving pixels gate array, thus
carry out characteristic test.Through increasing pad 101; For the introducing of test signal provides interface; Pad 101 links to each other with the input
end of driving circuit 102; The output terminal of driving circuit 102 directly links to each other with the grid of the image element circuit array TFT of
delegation, thereby makes test signal pass through the direct driving pixels gate array of transmission of driving circuit 102, to accomplish each class
testing to the GOA panel; Thereby whether each item performance that before binding with PCB, can test the GOA panel is available and according to
the performance of GOA panel it is rationally utilized or the like with the function admirable degree of identifying the GOA panel, GOA panel.The actual
utilization of being more convenient for improves the utilization factor of GOA panel.The number of the number of connecting line and lead-in wire can
be selected as required in the driving circuit 102, realizes comparatively flexibly, can make rational use of resources.And, between connecting line and
lead-in wire, increase transistor, be used for that driving circuit 102 is connected to respectively going between of same connecting line and isolate,
prevent the signal phase mutual interference between each lead-in wire, guarantee image element circuit array operate as normal.

Obviously, those skilled in the art can carry out various changes and modification to the present invention and not break away from the spirit and scope
of the present invention.Like this, belong within the scope of claim of the present invention and equivalent technologies thereof if of the present
invention these are revised with modification, then the present invention also is intended to comprise these changes and modification interior.

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Cited By (11)

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CN103995369A
* 2014-04-18 2014-08-20 京东方科技集团股 Array substrate, display panel and test method thereof
份有限公司

CN104464580A
* 2013-09-25 2015-03-25 三星显示有限公司 Mother substrate, array test method thereof and display substrate

CN104680963A
* 2015-03-26 2015-06-03 京东方科技集团股 Detection device and detection method of display panel GOA circuit
份有限公司

CN105096780A
* 2015-07-29 2015-11-25 武汉华星光电技术 Substrate circuit and signal test circuit of display panel
有限公司

CN105355163A
* 2015-12-22 2016-02-24 昆山国显光电有限 GIP (gate in panel) signal detection circuit, GIP signal detection
公司 method and panel display device

CN105590602A
* 2016-01-19 2016-05-18 昆山龙腾光电有限 Liquid crystal display apparatus
公司

CN106782250A
* 2017-01-16 2017-05-31 京东方科技集团股 A kind of display panel, its detection method and display device
份有限公司

CN107329298A
* 2017-08-31 2017-11-07 京东方科技集团股 Lighting test circuit, array base palte and preparation method
份有限公司 thereof, display device
 CN108806602A
* 2013-05-31 2018-11-13 三星显示有限公司 Organic light emitting display panel

WO2019242514A1
* 2018-06-22 2019-12-26 京东方科技集团股 Gate drive signal detection circuit, method, and display device
份有限公司

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Priority And Related Applications

Priority Applications (1)

Application Priority date Filing date Title

CN201110116731.9A 2011-05-06 2011-05-06 Method and apparatus for testing display panel

Applications Claiming Priority (1)

Application Filing date Title

CN201110116731.9A 2011-05-06 Method and apparatus for testing display panel

Legal Events

Date Code Title Description

2012-08-08 C06 Publication

2012-08-08 PB01 Publication

2012-10-03 C10 Entry into substantive examination

2012-10-03 SE01 Entry into force of request for substantive examination

2015-01-07 C14 Grant of patent or utility model

2015-01-07 GR01 Patent grant

Concepts

machine-extracted Download Filter table

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installation claims,description 6 0.000

test method claims,description 6 0.000

method claims,description 5 0.000

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