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00000005981LF-000
IR21844STRPBF
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Arrow
Arrow Electronics,
Electronics, Inc
Verical Division
9201 East Dry Creek Road
P.O. Box 740970
Centennial,
Los Angeles, CO 80112
CA 90074-0970

This coversheet was created by Verical, a division of Arrow Electronics, Inc. (“Verical”). The attached document was created by the part supplier,
not Verical, and is provided strictly 'as is.' Verical, its subsidiaries, affiliates, employees, and agents make no representations or warranties
regarding the attached document and disclaim any liability for the consequences of relying on the information therein. All referenced brands,
product names, service names, and trademarks are the property of their respective owners.
Data Sheet No. PD60174 revG

IR2184(4)(S) & (PbF)


HALF-BRIDGE DRIVER
Features
• Floating channel designed for bootstrap operation Packages
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune 14-Lead PDIP
• Gate drive supply range from 10 to 20V IR21844
• Undervoltage lockout for both channels 8-Lead PDIP
• 3.3V and 5V input logic compatible IR2184
• Matched propagation delay for both channels
• Logic and power ground +/- 5V offset.
• Lower di/dt gate driver for better noise immunity
• Output source/sink current capability 1.4A/1.8A 8-Lead SOIC 14-Lead SOIC
• Also available LEAD-FREE (PbF) IR2184S IR21844S

Description
IR2181/IR2183/IR2184 Feature Comparison
The IR2184(4)(S) are high voltage,

high speed power MOSFET and IGBT   ! 
 "!$" % ! &''
drivers with dependent high and low  "#"

side referenced output channels. Pro- *797 
prietary HVIC and latch immune 
&
  " 79&**
*797: &
CMOS technologies enable rugge- *79;

&
 ="
"< 
79&**
dized monolithic construction. The *79;: $>:?<  &
*79: "< 
logic input is compatible with standard *79::

&  ="
$>:?<  &
9&*@
CMOS or LSTTL output, down to 3.3V
logic. The output drivers feature a
high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be
used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600
volts.

Typical Connection


 

 



   


  
IR2184

IR21844
  




  


(Refer to Lead Assignments for correct
configuration). This/These diagram(s) show    
 
electrical connections only. Please refer to 
our Application Notes and DesignTips for
proper circuit board layout.

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IR2184(4)(S) & (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board
mounted and still air conditions.

Symbol Definition Min. Max. Units


VB High side floating absolute voltage -0.3 625
VS High side floating supply offset voltage VB - 25 VB + 0.3
VHO High side floating output voltage VS - 0.3 VB + 0.3
VCC Low side and logic fixed supply voltage -0.3 25
V
VLO Low side output voltage -0.3 VCC + 0.3
DT Programmable dead-time pin voltage (IR21844 only) VSS - 0.3 VCC + 0.3
VIN Logic input voltage (IN & SD) VSS - 0.3 VSS + 5
VSS Logic ground (IR21844 only) VCC - 25 VCC + 0.3
dVS/dt Allowable offset supply voltage transient — 50 V/ns
PD Package power dissipation @ TA ≤ +25°C (8-lead PDIP) — 1.0
(8-lead SOIC) — 0.625
W
(14-lead PDIP) — 1.6
(14-lead SOIC) — 1.0
RthJA Thermal resistance, junction to ambient (8-lead PDIP) — 125
(8-lead SOIC) — 200
°C/W
(14-lead PDIP) — 75
(14-lead SOIC) — 120
TJ Junction temperature — 150
TS Storage temperature -50 150 °C
TL Lead temperature (soldering, 10 seconds) — 300

Recommended Operating Conditions


The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The VS and VSS offset rating are tested with all supplies biased at 15V differential.
Symbol Definition Min. Max. Units
VB High side floating supply absolute voltage VS + 10 VS + 20
VS High side floating supply offset voltage Note 1 600
VHO High side floating output voltage VS VB
VCC Low side and logic fixed supply voltage 10 20
VLO Low side output voltage 0 VCC V

VIN Logic input voltage (IN & SD) VSS VSS + 4


DT Programmable dead-time pin voltage (IR21844 only) VSS VCC
VSS Logic ground (IR21844 only) -5 5
TA Ambient temperature -40 125 °C
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
Note 2: IN and SD are internally clamped with a 5.2V zener diode.

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IR2184(4)(S) & (PbF)

Dynamic Electrical Characteristics


VBIAS (VCC, VBS) = 15V, VSS = COM, CL = 1000 pF, TA = 25°C, DT = VSS unless otherwise specified.

Symbol Definition Min. Typ. Max. Units Test Conditions


ton Turn-on propagation delay — 680 900 VS = 0V
toff Turn-off propagation delay — 270 400 VS = 0V or 600V
tsd Shut-down propagation delay — 180 270
MTon Delay matching, HS & LS turn-on — 0 90 nsec
MToff Delay matching, HS & LS turn-off — 0 40
tr Turn-on rise time — 40 60 VS = 0V
tf Turn-off fall time — 20 35 VS = 0V
DT Deadtime: LO turn-off to HO turn-on(DTLO-HO) & 280 400 520 RDT= 0
HO turn-off to LO turn-on (DTHO-LO) 4 5 6 µsec RDT = 200k
MDT Deadtime matching = DTLO - HO - DTHO-LO — 0 50 RDT=0
nsec
— 0 600 RDT = 200k

Static Electrical Characteristics


VBIAS (VCC, VBS) = 15V, VSS = COM, DT= VSS and TA = 25°C unless otherwise specified. The VIL, VIH and IIN
parameters are referenced to VSS /COM and are applicable to the respective input leads: IN and SD. The VO, IO and Ron
parameters are referenced to COM and are applicable to the respective output leads: HO and LO.

Symbol Definition Min. Typ. Max. Units Test Conditions


VIH Logic “1” input voltage for HO & logic “0” for LO 2.7 — — VCC = 10V to 20V
VIL Logic “0” input voltage for HO & logic “1” for LO — — 0.8 VCC = 10V to 20V
VSD,TH+ SD input positive going threshold 2.7 — — VCC = 10V to 20V
V
VSD,TH- SD input negative going threshold — — 0.8 VCC = 10V to 20V
VOH High level output voltage, VBIAS - VO — — 1.2 IO = 0A
VOL Low level output voltage, VO — — 0.1 IO = 0A
ILK Offset supply leakage current — — 50 VB = VS = 600V
µA
IQBS Quiescent VBS supply current 20 60 150 VIN = 0V or 5V
IQCC Quiescent VCC supply current 0.4 1.0 1.6 mA VIN = 0V or 5V
IIN+ Logic “1” input bias current — 25 60 IN = 5V, SD = 0V
µA
IIN- Logic “0” input bias current — — 1.0 IN = 0V, SD = 5V
VCCUV+ VCC and VBS supply undervoltage positive going 8.0 8.9 9.8
VBSUV+ threshold
VCCUV- VCC and VBS supply undervoltage negative going 7.4 8.2 9.0
VBSUV- threshold
V
VCCUVH Hysteresis 0.3 0.7 —
VBSUVH
IO+ Output high short circuit pulsed current 1.4 1.9 — VO = 0V,
PW ≤ 10 µs
IO- Output low short circuit pulsed current 1.8 2.3 — A VO = 15V,
PW ≤ 10 µs

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IR2184(4)(S) & (PbF)

Functional Block Diagrams

VB

2184 UV
DETECT
R HO
R Q
PULSE
HV
FILTER
LEVEL S
VSS/COM SHIFTER
IN LEVEL VS
PULSE
SHIFT
GENERATOR

DEADTIME VCC

UV
+5V DETECT
LO

VSS/COM
SD LEVEL DELAY
SHIFT COM

VB

21844 UV
DETECT
R HO
R Q
PULSE
HV
FILTER
LEVEL S
VSS/COM SHIFTER
IN LEVEL VS
PULSE
SHIFT
GENERATOR

DT DEADTIME VCC

UV
+5V DETECT
LO

VSS/COM
SD LEVEL DELAY
SHIFT COM

VSS

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IR2184(4)(S) & (PbF)

Lead Definitions
Symbol Description
IN Logic input for high and low side gate driver outputs (HO and LO), in phase with HO (referenced to COM
for IR2184 and VSS for IR21844)
SD Logic input for shutdown (referenced to COM for IR2184 and VSS for IR21844)
DT Programmable dead-time lead, referenced to VSS. (IR21844 only)
VSS Logic Ground (21844 only)
VB High side floating supply
HO High side gate drive output
VS High side floating supply return
VCC Low side and logic fixed supply
LO Low side gate drive output
COM Low side return

Lead Assignments

1 IN VB 8 1 IN VB 8
2 SD HO 7 2 SD HO 7

3 COM VS 6 3 COM VS 6

4 LO VCC 5 4 LO VCC 5

8-Lead PDIP 8-Lead SOIC

IR2184 IR2184S

1 IN 14 1 IN 14
2 SD VB 13 2 SD VB 13

3 VSS HO 12 3 VSS HO 12

4 DT VS 11 4 DT VS 11

5 COM 10 5 COM 10

6 LO 9 6 LO 9

7 VCC 8 7 VCC 8

14-Lead PDIP 14-Lead SOIC

IR21844 IR21844S

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IR2184(4)(S) & (PbF)



^_
<` <`


^_
  '' '

 q` q`



 7` 7`
Figure 1. Input/Output Timing Diagram Figure 2. Switching Time Waveform Definitions


<`

<` <`
!

 q`
 q`

   7`
Figure 3. Shutdown Waveform Definitions
  
q`

7`

 {     


^_
<` <` Figure 4. Deadtime Waveform Definitions

^_

 

7`

 

q`

 

Figure 5. Delay Matching Waveform Definitions

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IR2184(4)(S) & (PbF)

1400 1400
Turn-on Propagation Delay (ns)

Turn-on Propagation Delay (ns)


1200 1200
M ax.
1000 1000
M ax.
800 800 Typ.

Typ.
600 600

400 400
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (oC) Supply Voltage (V)

Figure 4A. Turn-on Propagation Delay Figure4B. Turn-on Propagation Delay


vs. Temperature vs. Supply Voltage

700 700
Turn-off Propagation Delay (ns)

Turn-off Propagation Delay (ns)

600 600
500 500
M ax.

400 400
M ax.
300 300
Typ.

Typ.
200
200
100
100
-50 -25 0 25 50 75 100 125
10 12 14 16 18 20
Temperature (oC)
Supply Voltage (V)

Figure 5A. Turn-off Propagation Delay Figure 5B. Turn-off Propagation Delay
vs. Temperature vs. Supply Voltage

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IR2184(4)(S) & (PbF)

500 500

SD Propagation Delay (ns)


SD Propagation Delay (ns)

400 400
M ax.
300 300
M ax.
Typ.
200 200
Typ.

100 100

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (oC) Supply Voltage (V)

Figure 6A. SD Propagation Delay Figure 6B. SD Propagation Delay


vs. Temperature vs. Supply Voltage

120 120

100 100
Turn-on Rise Time (ns)
Turn-on Rise Time (ns)

M ax.
80 80

60 60 Typ.

40 M ax. 40
Typ.
20 20

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (oC) Supply Voltage (V)

Figure 7A. Turn-on Rise Time vs. Temperature Figure 7B. Turn-on Rise Time vs. Supply Voltage

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IR2184(4)(S) & (PbF)

80 80
Turn-off Fall Time (ns)

Turn-off Fall Time (ns)


60 60

M ax.

40 40
M ax. Typ.

Typ
20 20

0 0
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (oC) Supply Voltage (V)

Figure 8A. Turn-off Fall Time vs. Temperature Figure 8B. Turn-off Fall Time vs. Supply Voltage

1100 1100

900 900
Deaduime (ns)
Deadtime (ns)

700 700
M ax. M ax.

500 Typ.
500 Typ.

M in. M in.
300 300

100 100
-50 -25 0 25 50 75 100 125 10 12 14 16 18 20
Temperature (oC) Supply Voltage (v)

Figure 9A. Deadtime vs. Temperature Figure 9B. Deadtime vs. Supply Voltage

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IR2184(4)(S) & (PbF)

7 6
M ax.
6 5

Logic "1" Input Voltage (V)


Typ.
5
Deadtime ( Ηs)

M in.
4
4
3 3 M in.

2 2
1 1
0
0
0 50 100 150 200
-50 -25 0 25 50 75 100 125
RDT (KΗ)
Temperature (oC)

Figure 9C. Deadtime vs. RDT


Figure 10A. Logic "1" Input Voltage
vs. Temperature

6 6
5
Logic "1" Input Voltage (V)

5
Logic "0" Input Voltage (V)

4 4
3 M in.
3
2 2
M ax.
1 1
0 0
10 12 14 16 18 20 -50 -25 0 25 50 75 100 125
Supply Voltage (V) Temperature (oC)

Figure 10B. Logic "1" Input Voltage Figure 11A. Logic "0" Input Voltage
vs. Supply Voltage vs. Temperature

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IR2184(4)(S) & (PbF)

6
6

SD Input Positive Going Threshold (V)


5
Logic "0" Input Voltage (V)

5
4
4
3 3 M in.

2 2
M ax.
1 1
0 0
10 12 14 16 18 20 -50 -25 0 25 50 75 100 125
Supply Voltage (V) Temperature (oC)

Figure 11B. Logic "0" Input Voltage Figure 12A. SD Input Positive Going Threshold
vs. Supply Voltage vs. Temperature

6 5
SD Input Positive Going Threshold (V)

SD Input Negative Going Threshold (V)

5 4
4
3
M in.
3
2
2

1 1
M ax.

0 0
10 12 14 16 18 20 -50 -25 0 25 50 75 100 125
Supply Voltage (V) Temperature (oC)

Figure 12B. SD Input Positive Going Threshold Figure 13A. SD Input Negative Going Threshold
vs. Supply Voltage vs. Temperature

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IR2184(4)(S) & (PbF)

5 5
SD Input Negative Going Threshold (V)

4 4

High Level Output (V)


3 3

2 2 M ax.

1 1
M ax.

0 0
10 12 14 16 18 20 -50 -25 0 25 50 75 100 125

Supply Voltage (V) Temperature (oC)

Figure 13B. SD Input Negative Going Threshold Figure 14A. High Level Output vs. Temperature
vs. Supply Voltage

0.5
5

4 0.4
Low Level Output (V)
High Level Output (V)

3 0.3

2 M ax.
0.2
M ax.
1 0.1

0 0.0
10 12 14 16 18 20 -50 -25 0 25 50 75 100 125
o
Supply Voltage (V) Temperature ( C)

Figure 14B. High Level Output vs. Supply Voltage Figure 15A. Low Level Output vs. Temperature

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IR2184(4)(S) & (PbF)

0.5

Offset Supply Leakage Current ( ΗA)


500

0.4 400
Low Level Output (V)

0.3 300

0.2 200
M ax.
0.1 100
M ax.

0.0 0
10 12 14 16 18 20 -50 -25 0 25 50 75 100 125
Supply Voltage (V) Temperature (oC)

Figure 15B. Low Level Output vs. Supply Voltage Figure 16A. Offset Supply Leakage Current vs.
Temperature
Offset Supply Leakage Current ( ΗA)

500
250
V BS Supply Current ( ΗA)

400 200
M ax.
300 150

200 100 Typ.

100 M ax. 50 M in.

0 0
100 200 300 400 500 600 -50 -25 0 25 50 75 100 125
VB Boost Voltage (V) Temperature (oC)

Figure 16B. Offset Supply Leakage Current vs. Figure 17A. VBS Supply Current
VB Boost Voltage vs. Temperature

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IR2184(4)(S) & (PbF)

250 5
V BS Supply Current ( ΗA)

V CC Supply Current (mA)


200 4

150 M ax. 3

100 Typ. 2 M ax.

Typ.
50 M in. 1
M in.

0 0
10 12 14 16 18 20 -50 -25 0 25 50 75 100 125

VBS Floating Supply Voltage (V) Temperature (oC)

Figure 17B. VBS Supply Current Figure 18A. VCC Supply Current
vs. VBS Floating Supply Voltage vs. Temperature

5 120
Logic "1" Input Bias Current ( ΗA)

100
V CC Supply Current (mA)

4
80
3
M ax. 60
2 M ax.
Typ. 40
Typ.
1 M in. 20

0 0
10 12 14 16 18 20 -50 -25 0 25 50 75 100 125

VCC Supply Voltage (V) Temperature (oC)

Figure 18B. VCC Supply Current Figure 19A. Logic "1" Input Bias Current
vs. VCC Supply Voltage vs. Temperature

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IR2184(4)(S) & (PbF)

Logic "0" Input Bias Current ( ΗA)


120
Logic "1" Input Bias Current ( ΗA)

100 4

80 3
60
M ax. 2
40 M ax.
Typ. 1
20

0 0
10 12 14 16 18 20 -50 -25 0 25 50 75 100 125

Supply Voltage (V) Temperature (oC)

Figure 19B. Logic "1" Input Bias Current Figure 20A. Logic "0" Input Bias Current
vs. Supply Voltage vs. Temperature

12
V CC and V BS UV Threshold (+) (V)

5
Logic "0" Input Bias Current ( ΗA)

11
4
10 M ax.

3 Typ.
9
M in.
2 8
M ax.
1 7

0 6
10 12 14 16 18 20 -50 -25 0 25 50 75 100 125

Supply Voltage (V) Temperature (oC)

Figure 20B. Logic "0" Input Bias Current Figure 21. VCC and VBS Undervoltage Threshold (+)
vs. Supply Voltage vs. Temperature

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IR2184(4)(S) & (PbF)

12
5
V CC and V BS UVThreshold (-) (V)

11

Output Source Current (A)


4
10
M ax. 3
9 Typ.
Typ.
8 2
M in.
M in.
7 1

6
0
-50 -25 0 25 50 75 100 125
-50 -25 0 25 50 75 100 125
Temperature (oC)
Temperature (oC)

Figure 22. VCC and VBS Undervoltage Threshold (-) Figure 23A. Output Source Current
vs. Temperature vs. Temperature

5 5.0
Output Source Current (A)

Output Sink Current (A)

4 4.0

3
3.0 Typ.

2
Typ.
2.0
1 M in.

M in.

0 1.0
10 12 14 16 18 20 -50 -25 0 25 50 75 100 125

Supply Voltage (V) Temperature (oC)

Figure 23B. Output Source Current Figure 24A. Output Sink Current
vs. Supply Voltage vs. Temperature

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IR2184(4)(S) & (PbF)

5 140

120
Output Sink Current (A)

Temprature (oC)
100
3
80 140v
2 70v
Typ.
60 0v

1 M in. 40

0 20
10 12 14 16 18 20 1 10 100 1000
Supply Voltage (V) Frequency (KHz)

Figure 24B. Output Sink Current Fig u re 21. IR 2181 vs . Fre q u e n cy (IR FB C 20),
vs. Supply Voltage R gate =33 Ω, V C C =15V

140 140

120 120
Temperature (oC)
Temperature (oC)

100 100
140v

140v
80 80 70v

70v
0v
60
0v 60

40
40
20
20
1 10 100 1000
1 10 100 1000
Frequency (KHz)
Frequency (KHz)

Fig u re 22. IR 2181 vs . Fre q u e n cy (IR FB C 30), Fig u re 23. IR 2181 vs . Fre q u e n cy (IR FB C 40),
R gate =22 Ω, V C C =15V R gate =15 Ω, V C C =15V

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IR2184(4)(S) & (PbF)

140v
140 140
70v
0v
120 120
Temperature (oC)

Temperature (oC)
100 100

80 80

60 60 140v
70v
40 40 0v

20 20
1 10 100 1000 1 10 100 1000
Frequency (KHz) Frequency (KHz)

Fig u re 24. IR 2181 vs . Fre q u e n cy (IR FP E50), Fig u re 25. IR 21814 vs . Fre q u e n cy (IR FB C 20),
R gate =10 Ω, V C C =15V R gate =33 Ω , V C C =15V

140 140
120 120
Temperature (oC)

Temperature o(C)

100 100
140v
80 80
70v

60 140v
60 0v
70v
0v
40 40
20 20
1 10 100 1000 1 10 100 1000
Frequency (KHz) Frequency (KHz)
Fig u re 26. IR 21814 vs . Fre q u e n cy (IR FB C 30), Fig u re 27. IR 21814 vs . Fre q u e n cy (IR FB C 40),
R gate =22 Ω , V C C =15V R gate =15 Ω, V C C =15V

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IR2184(4)(S) & (PbF)

140v
140 140

120 70v 120

Temperature (oC)
Temperature (oC)

100 0v 100

80 80 140v

60 60 70v
0v

40 40

20 20
1 10 100 1000 1 10 100 1000

Frequency (KHz) Frequency (KHz)

Fig u re 28. IR 21814 vs . Fre q u e n cy (IR FP E50), Fig u re 29. IR 2181s vs . Fre q u e n cy (IR FB C 20),
R gate =10 Ω, V C C =15V R gate =33 Ω, V C C =15V

140v 70v
140 140

120 120
Temperature o(C)

140v 0v
Temperature (oC)

100 100
70v

80 0v 80

60 60

40 40

20
20
1 10 100 1000
1 10 100 1000
Frequency (KHz)
Frequency (KHz)
Fig u re 30. IR 2181s vs . Fre q u e n cy (IR FB C 30), Fig u re 31. IR 2181s vs . Fre q u e n cy (IR FB C 40),
R gate =22 Ω , V C C =15V R gate =15 Ω, V C C =15V

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IR2184(4)(S) & (PbF)

140V 70V 0V
140 140

120 120

Temperature (oC)
Tempreture (oC)

100 100

80 80
60 60 140v
70v
40 40
0v

20 20
1 10 100 1000 1 10 100 1000
Frequency (KHz) Frequency (KHz)

Figure 32. IR2181s vs. Frequency (IRFPE50), Figure 33. IR21814s vs. Frequency (IRFBC20),
Rgate=10Ω , V CC=15V Rgate=33Ω , V CC=15V

140 140

120 120
Temperature (oC)

Temperature o(C)

100 100 140v

80 140v 80 70v

0v
70v
60 0v
60

40 40

20 20
1 10 100 1000 1 10 100 1000
Frequency (KHz) Frequency (KHz)
Figure 34. IR21814s vs. Frequency (IRFBC30), Figure 35. IR21814s vs. Frequency (IRFBC40),
Rgate=22Ω , V CC=15V Rgate=15Ω , V CC=15V

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IR2184(4)(S) & (PbF)

140v 70v
140
0v

120
Temperature o(C)

100

80

60

40

20
1 10 100 1000
Frequency (KHz)

Figure 36. IR21814s vs. Frequency (IRFPE50),


Rgate=10Ω , V CC=15V

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IR2184(4)(S) & (PbF)

01-6014
8-Lead PDIP 01-3003 01 (MS-001AB)

INCHES MILLIMETERS
D B DIM
MIN MAX MIN MAX
A 5 FOOTPRINT A .0532 .0688 1.35 1.75
A1 .0040 .0098 0.10 0.25
8X 0.72 [.028]
b .013 .020 0.33 0.51
8 7 6 5 c .0075 .0098 0.19 0.25
6 H D .189 .1968 4.80 5.00
E E .1497 .1574 3.80 4.00
0.25 [.010] A
1 2 3 4 6.46 [.255] e .050 BASIC 1.27 BASIC
e1 .025 BASIC 0.635 BASIC
H .2284 .2440 5.80 6.20
K .0099 .0196 0.25 0.50
L .016 .050 0.40 1.27
6X e 3X 1.27 [.050]
8X 1.78 [.070] y 0° 8° 0° 8°

e1 K x 45°
A
C y

0.10 [.004]
A1 8X L 8X c
8X b
7
0.25 [.010] C A B

NOTES: 5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.


1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994. MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
2. CONTROLLING DIMENSION: MILLIMETER 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
4. OUTLINE C ONFORMS TO JEDEC OUTLINE MS-012AA.
A SUBSTRATE.
01-6027
8-Lead SOIC 01-0021 11 (MS-012AA)

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IR2184(4)(S) & (PbF)

01-6010
14-Lead PDIP 01-3002 03 (MS-001AC)

01-6019
14-Lead SOIC (narrow body) 01-3063 00 (MS-012AB)

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IR2184(4)(S) & (PbF)

LEADFREE PART MARKING INFORMATION

Part number IRxxxxxx


Date code YWW? IR logo

Pin 1 ?XXXX
Identifier
Lot Code
? MARKING CODE (Prod mode - 4 digit SPN code)
P Lead Free Released
Non-Lead Free
Released
Assembly site code
Per SCOP 200-002

ORDER INFORMATION

Basic Part (Non-Lead Free) Leadfree Part


8-Lead PDIP IR2184 order IR2184 8-Lead PDIP IR2184 order IR2184PbF
8-Lead SOIC IR2184S order IR2184S 8-Lead SOIC IR2184S order IR2184SPbF
14-Lead PDIP IR21844 order IR21844 14-Lead PDIP IR21844 order IR21844PbF
14-Lead SOIC IR21844 order IR21844S 14-Lead SOIC IR21844 order IR21844SPbF

Thisproduct has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web Site http://www.irf.com
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
4/4/2006

24 www.irf.com

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