You are on page 1of 6

® APPLICATION NOTE

UNDERSTANDING POWER FACTOR

by L. Wuidart

1. INTRODUCTION
The majority of electronics designers do not the voltage of the capacitor. A single phase
worry about Power Factor (PF); PF is off-line supply draws a current pulse during
something that you learnt one day at school a small fraction of the half-cycle duration.
in your “electrotechnics course” as being Between those current peaks, the load draws
the cos οf ϕ, the phase angle between the the energy stored in the input capacitor.
voltage and current waveforms. However, The phase lag ϕ and also the harmonic
this conventional definition is only valid when content of the pulsed current waveform
considering ideal sinusoidal signals for both produce additional RMS currents, affecting
current and voltage waveforms, and in reality the real power available from the mains. So
most off-line power supplies draw a non- Power Factor is much more than cos ϕ!
sinusoidal current. The P.F. value measures how much the
Many off-line systems will typically have a mains efficiency is affected by both the
front end section consisting of a rectifier phase lag ϕ and the harmonic content of the
bridge and an input filter capacitor, which input current. In this context, the European
act as a peak detector - see figure 1. A Standard EN 60555 only defines the limit of
current flows to charge the capacitor only current harmonics in mains supplied
when the instantaneous AC voltage exceeds equipment.

AN523/1093 1/5
APPLICATION NOTE

Figure 1: Full-Wave Rectifier

VDC
LOAD
I mains
VDC Vmains
Vmains
t
I mains
T/2 T

2. THEORETICAL MEANING
The Power Factor is defined by: 2.2 Non-ideal sinusoidal current

REAL POWER Assuming that the mains voltage is an ideal


P
P.F. = = sinusoidal voltage waveform, its RMS value
S APPARENT POWER is:
2.1 Ideal sinusoidal signals Vpeak
VRMS=
For ideal sinusoidal voltage and current 2
waveforms, if there is a phase difference ϕ
If the current has been distorted in some
between the voltage and current waveforms,
way (for example as in figure 1) into a
the total apparent power can be modelled
periodic non-sinusoidal waveform, applying
as being composed of two components:
a Fourier transform gives:
one in phase with the input voltage, and the
other 90° out of phase (in quadrature) with it IRMS(total) = √I 0 + I21RMS + I22RMS + .... + I2nRMS
- see figure 2.
Then by definition, where I0 is the DC component of the current,
I1RMS the fundamental of the RMS current
P (that is the component at the frequency of
P.F. = = COS ϕ the voltage input) and I2RMS ... InRMS are the
S
harmonics created by the distortion.
Figure 2: Power vectors of ideal sinusoidal signals For a pure AC signal, there is no DC
component and so I0 = 0.
P The fundamental of the RMS current can be
ϕ modelled as in section 2.1 above as an in-
phase component I1RMSP and a quadrature
Q component I1RMSQ, and so the RMS current
S can be expressed as:
√I

IRMS(total) = 0 Σ I2nRMS
+ I21RMS P + I21RMS Q + n=2
P = VRMS . IRMS COS ϕ: In-Phase or Real Power
Then, the Real Power is given by the RMS
Q = VRMS . IRMS SIN ϕ: Reactive or Quadrative
voltage multiplied by the in-phase current:
Power
S = VRMS . IRMS: Total Apparent Power P = VRMS . I1RMS P

2/5
APPLICATION NOTE

As ϕ1 is the displacement angle between θ is linked to the harmonic content of the


the input voltage and the in-phase current; as the harmonic content of IRMS(total)
component of the fundamental current: approaches zero, θ approaches 0 and cos θ
approaches 1.
I1RMS P = I1RMS COS ϕ1
2.3 Summary
so
Finally then, the Power Factor can be
P = VRMS . IRMS COS ϕ1 expressed as:
As the total apparent power is given by: P.F. = COS θ . COS ϕ1
S = VRMS . IRMS total and the representation of the power vectors
the Power Factor can be calculated as : becomes that shown in figure 3.
ϕ1 is the “conventional” displacement angle
P I . COS 1 (phase lag) between the voltage and the
P.F. = = 1 RMS
S I RMS (total) fundamental component of the current, while
θ is the distortion angle caused by the
If the phase angle between I1RMS and IRMS(total) harmonic content of the current.
is defined as θ:
Both the reactive power, Q, and the distortion
I 1 RMS power, D, produce extra RMS currents,
COS θ = I giving additional losses and reducing the
RMS (total)
efficiency of the mains supply network.

Figure 3: Power vectors with non-sinusoidal signals.

P = Real Power
P
ϕ1 = VRMS . IRMS . COS ϕ
θ Q
Q = Reactive Power

S1 = VRMS . IRMS . SIN ϕ


S1 = Apparent Fundamental Power
S
= VRMS . I1RMS
D
D = Distortion Power

= VRMS . √ Σ I2nRMS
n=2

S = TOTAL APPARENT POWER


= VRMS . IRMS (total)

3/5
APPLICATION NOTE

Improving the Power Factor means reducing harmonic content of the current of mains
both elements: supplied equipment.
ϕ1 → 0 means COS ϕ1 → 1: 3.1.3 Reduction of component costs in the
reduction of the phase lag between I and V, downstream converter

θ → 0 means COS θ → 1: For the same output power capability, a


conventional converter using an input mains
reduction of harmonic content of I. voltage doubler has primary RMS current
1.8 times higher than one employing a PFC
regulator. Consequently, if a PFC is used in
3. PRACTICAL IMPLICATIONS OF
a system using Power MOSFET switches,
POWER FACTOR
the on-resistance (RDS(ON)) of the switches
3.1 Benefits of reduced Power Factor can be up to three times higher than in a
Both the user and the electricity supply system without PFC, allowing significantly
company can benefit from a reduction in cheaper parts to be used.
Power Factor. Adding a PFC also reduces The size of the converter transformer can
the component costs in a downstream be reduced not only because the thickness
converter. of the windings is smaller, but also because
3.1.1 Benefits to the user of the regulation of the DC bulk voltage
delivered by the PFC pre-regulator.
At the minimum line voltage (85VAC), a
standard 115VAC wall socket should be able The PFC provides an automatic mains
to deliver the nominal 15A to a common selection on a wide range of voltages from
load. However, an SMPS without a Power 85V AC up to 265VAC. Compared to the
Factor Corrector (PFC), which will typically conventional doubler front-end section the
have a Power Factor of 0.6, reduces the same hold-up time can be achieved with a
available current to around 9A. bulk storage capacitor 6 times smaller. For
example, to achieve a 10ms hold-up time, a
As an example, a single wall socket will 100W converter in doubler operation requires
supply four 280W computers equipped with a series combination of two 440µF capacitors
PFCs, but only two without. without a PFC, but only a single 130µF with.
3.1.2 Benefits to the distribution company 3.2 RFI filter
Both the reactive power Q and the distortion However, the size and cost optimisation of
power D give rise to extra RMS currents, the PFC has to take the RFI filter into
significantly reducing the efficiency of the consideration. A PFC circuit generates more
mains supply network. This means that the high frequency interference to the mains
copper distribution wires must be thicker than a conventional rectifier front-end - see
than would otherwise be necessary. figure 4. Thus the use of a PFC means that
Delivering power at frequencies other than additional filtering is required. For this reason,
the line frequency (ie the distortion power modulation techniques and mode of
D) also causes difficulties. The distortion operation for the PFC have to be carefully
disturbs the zero voltage crossing detection adapted to the requirements of the
systems, and generates overcurrent in the application.
neutral line and resonant overvoltages.
In Europe, the standard EN 60555 and the
international project IEC 555-2 limit the

4/5
APPLICATION NOTE

Figure 4: SMPS with (a) conventional rectifier front-end, and


(b) PFC front-end.

Smaller
Ci
EMI filter
220µF

Larger Ci
EMI filter 0.1µF

PFC

4. CONCLUSIONS
For new designs, SMPS designers will have in the cost of components for the
to take into account the IEC 555-2 standard. downstream converter. The PFC also
In practice, this will require the use of a PFC provides additional functions such as
on the front end of much mains supplied automatic mains voltage selection and
equipment. The additional cost of the PFC constant output voltage.
is compensated by the significant reduction

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

The ST logo is a trademark of STMicroelectronics

 1999 STMicroelectronics - Printed in Italy - All Rights Reserved

STMicroelectronics GROUP OF COMPANIES

Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco -
Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A.

http://www.st.com

5/5
This datasheet has been download from:

www.datasheetcatalog.com

Datasheets for electronics components.

You might also like