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TYPICAL APPLICATI
LTC1487 LTC1487
1 1
RO R R RO
2 2000 FEET OF TWISTED-PAIR WIRE 2 DI
RE RE
3 7 7 3
DE DE
4 4
RECEIVER INPUT
DI D 120Ω 120Ω D DI
6 6 A
B
330Ω
4.7nF
RO
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LTC1487
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ABSOLUTE AXI U RATI GS PACKAGE/ORDER I FOR ATIO
(Note 1)
Supply Voltage (VCC) .............................................. 12V ORDER PART
Control Input Voltage ..................... – 0.5V to VCC + 0.5V TOP VIEW
NUMBER
Driver Input Voltage ....................... – 0.5V to VCC + 0.5V RO 1
R
8 VCC
Operating Temperature Range ............. 0°C ≤ TA ≤ 70°C N8 PACKAGE S8 PACKAGE S8 PART MARKING
8-LEAD PDIP 8-LEAD PLASTIC SO
Storage Temperature Range ................ – 65°C to 150°C
1487
Lead Temperature (Soldering, 10 sec)................. 300°C TJMAX = 125°C, θJA = 130°C/ W (N8)
TJMAX = 125°C, θJA = 150°C/ W (S8)
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LTC1487
ELECTRICAL CHARACTERISTICS – 40°C ≤ TA ≤ 85°C, VCC = 5V (Note 4) unless otherwise noted.
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SWITCHI G CHARACTERISTICS 0°C ≤ TA ≤ 70°C, VCC = 5V (Notes 2, 3) unless otherwise noted.
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LTC1487
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SWITCHI G CHARACTERISTICS 0°C ≤ TA ≤ 70°C, VCC = 5V (Notes 2, 3) unless otherwise noted.
The ● denotes specifications which apply over the full operating Note 3: All typicals are given for VCC = 5V and TA = 25°C.
temperature range. Note 4: The LTC1487 is not tested and is not quality-assurance sampled at
Note 1: Absolute maximum ratings are those beyond which the safety of – 40°C and at 85°C. These specifications are guaranteed by design,
the device cannot be guaranteed. correlation, and/or inference from 0°C, 25°C and/or 70°C tests.
Note 2: All currents into device pins are positive; all currents out ot device
pins are negative. All voltages are referenced to device ground unless
otherwise specified.
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TYPICAL PERFORMANCE CHARACTERISTICS
Driver Differential Output Voltage Driver Differential Output Voltage
Supply Current vs Temperature vs Output Current vs Temperature
450 80 2.24
TA = 25°C 2.22 RL = 54Ω
400 70
2.20
60
SUPPLY CURRENT (µA)
THERMAL SHUTDOWN
300 WITH DRIVER ENABLED 2.16
50
AND NOMINAL LOAD 2.14
250
40 2.12
200 2.10
30
150 DRIVER ENABLED 2.08
WITH NO LOAD 20 2.06
100
2.04
50 10
DRIVER DISABLED WITH NO LOAD 2.02
0 0 2.00
– 50 –25 0 25 50 75 100 125 150 175 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 –50 –25 0 25 50 75 100 125
TEMPERATURE (°C) OUTPUT VOLTAGE (V) TEMPERATURE (°C)
LTC1487 • TPC01 LTC1487 • TPC02 LTC1487 • TPC03
–30 400
80
–40
TIME (ns)
350
60 –50
300
–60
40
–70 250
–80
20 200
–90
0 –100 150
0 1 2 3 4 0 1 2 3 4 5 –50 –25 0 25 50 75 100 125
OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) TEMPERATURE (°C)
LTC1487 • TPC04 LTC1487 • TPC05 LTC1487 • G06
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LTC1487
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PIN FUNCTIONS
RO (Pin 1): Receiver Output. If the receiver output is DI (Pin 4): Driver Input. If the driver outputs are enabled
enabled (RE LOW), and A > B by 200mV, RO will be HIGH. (DE HIGH) then a LOW on DI forces the outputs A LOW and
If A < B by 200mV, then RO will be LOW. B HIGH. A HIGH on DI with the driver outputs enabled will
force A HIGH and B LOW.
RE (Pin 2): Receiver Output Enable. A LOW enables the
receiver output, RO. A HIGH input forces the receiver GND (Pin 5): Ground.
output into a high impedance state. A (Pin 6): Driver Output/Receiver Input.
DE (Pin 3): Driver Outputs Enable. A HIGH on DE enables B (Pin 7): Driver Output/Receiver Input.
the driver output. A and B and the chip will function as a line
driver. A LOW input will force the driver outputs into a high VCC (Pin 8): Positive Supply. 4.75V < VCC < 5.25V.
impedance state and the chip will function as a line
receiver. If RE is HIGH and DE is LOW, the part will enter
a low power (1µA) shutdown state.
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FU CTIO TABLES
LTC1487 Transmitting LTC1487 Receiving
INPUTS OUTPUTS INPUTS OUTPUTS
RE DE DI B A RE DE A–B RO
X 1 1 0 1 0 0 ≥ 0.2V 1
X 1 0 1 0 0 0 ≤ – 0.2V 0
0 0 X Z Z 0 0 Inputs Open 1
1 0 X Z* Z* 1 0 X Z*
*Shutdown mode *Shutdown mode
TEST CIRCUITS
A
TEST POINT S1 1k
R RECEIVER VCC
OUTPUT
VOD
1k
VOC CRL S2
R
B
LTC1487 • F01 LTC1487 • F02
3V
DE
A
A CL1 S1
DI
RDIFF RO VCC
B 500Ω
B CL2 OUTPUT
RE 15pF UNDER TEST S2
CL
LTC1487 • F03
LTC1487 • F04
Figure 3. Driver/Receiver Timing Test Circuit Figure 4. Driver Timing Test Load
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LTC1487
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SWITCHI G TI E WAVEFOR S
3V
DI 1.5V f = 1MHz, tr ≤ 10ns, tf ≤ 10ns 1.5V
0V
t PLH t PHL 1/2 VO
B
VO
A
1/2 VO tSKEW t SKEW
VO
90% 90%
0V VDIFF = V(A) – V(B)
10% 10%
–VO
LTC1487 • F05
tr tf
3V
DE 1.5V f = 1MHz, tr ≤ 10ns, tf ≤ 10ns 1.5V
0V
t ZL(SHDN), t ZL t LZ
5V
A, B 2.3V OUTPUT NORMALLY LOW 0.5V
VOL
VOH
OUTPUT NORMALLY HIGH 0.5V
A, B 2.3V
0V
t ZH(SHDN), t ZH t HZ LTC1487 • F06
VOH
RO 1.5V OUTPUT 1.5V
VOL
t PHL f = 1MHz, tr ≤ 10ns, tf ≤ 10ns t PLH
VOD2
A–B 0V 0V
INPUT
–VOD2 LTC1487 • F07
3V
RE 1.5V f = 1MHz, tr ≤ 10ns, tf ≤ 10ns 1.5V
0V
t ZL(SHDN), tZL t LZ
5V
RO 1.5V OUTPUT NORMALLY LOW 0.5V
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LTC1487
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APPLICATIO S I FOR ATIO
High Input Impedance VCC
SD3
The LTC1487 is designed with a 96kΩ (typ) input imped-
ance to allow up to 256 transceivers to share a single P1
RS485 differential data bus. The RS485 specification D1
requires that a transceiver be able to drive as many as 32
OUTPUT
“unit loads.” One unit load (UL) is defined as an imped- LOGIC
SD4
ance that draws a maximum of 1mA with up to 12V across
it. Typical RS485 transceivers present between 0.5 and 1 D2
N1
unit load at their inputs. The 96kΩ input impedance of the
LTC1487 will draw only 125µA under the same 12V
LTC1487 • F10
condition, presenting only 0.125UL to the bus. As a result,
256 LTC1487 transceivers (32UL/0.125UL = 256) can be Figure 10. LTC1487 Output Stage
connected to a single RS485 data bus without exceeding When two or more drivers are connected to the same
the RS485 driver load specification. The LTC1487 meets transmission line, a potential condition exists whereby
all other RS485 specifications, allowing it to operate more than two drivers are simultaneously active. If one or
equally well with standard RS485 transceiver devices or more drivers is sourcing current while another driver is
high impedance transceivers. sinking current, excessive power dissipation may occur
within either the sourcing or sinking element. This condi-
CMOS Output Driver
tion is defined as driver contention, since multiple drivers
The RS485 specification requires that a transceiver with- are competing for one transmission line. The LTC1487
stand common-mode voltages of up to 12V or –7V at the provides a current limiting scheme to prevent driver
RS485 line connections. Additionally, the transceiver must contention failure. When driver contention occurs, the
be immune to both ESD and latch-up. This rules out current drawn is limited to about 70mA, preventing exces-
traditional CMOS drivers, which include parasitic diodes sive power dissipation within the drivers.
from their driver outputs to each supply rail (Figure 9). The
The LTC1487 has a thermal shutdown feature which
LTC1487 uses a proprietary process enhancement which
protects the part from excessive power dissipation. Under
adds a pair of Schottky diodes to the output stage (Figure
extreme fault conditions, up to 250mA can flow through
10), preventing current from flowing when the common-
the part, causing rapid internal temperature rise. The
mode voltage exceeds the supply rails. Latch-up at the
thermal shutdown circuit will disable the driver outputs
output drivers is virtually eliminated and the driver is
when the internal temperature reaches 150°C and turns
prevented from loading the line under RS485 specified
them back on when the temperature cools to 130°C. This
fault conditions. A proprietary output protection structure
cycle will repeat as necessary until the fault condition is
protects the transceiver line terminals against ESD strikes
removed.
(Human Body Model) of up to ±10kV.
VCC Receiver Inputs
P1 The LTC1487 receiver features an input common-mode
D1 range covering the entire RS485 specified range of –7V to
12V. Internal 96k input resistors from each line terminal to
LOGIC OUTPUT
ground provide the 0.125UL load to the RS485 bus.
N1 D2 Differential signals of greater than ±200mV within the
specified input common-mode range will be converted to
LTC1487 • F09
a TTL-compatible signal at the receiver output. A small
amount of input hysteresis is included to minimize the
Figure 9. Conventional CMOS Output Stage
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of circuits as described herein will not infringe on existing patent rights.
LTC1487
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APPLICATIO S I FOR ATIO
effects of noise on the line signals. If the line is terminated In shutdown the LTC1487 typically draws only 1µA of
or the receiver inputs are shorted together, the receiver supply current. In order to guarantee that the part goes
output will retain the last valid line signal due to the 45mV into shutdown, RE must be HIGH and DE must be LOW for
of hysteresis incorporated in the receiver circuit. If the at least 600ns simultaneously. If this time duration is less
LTC1487 transceiver inputs are left floating (unterminated), than 50ns the part will not enter shutdown mode. Toggling
an internal pull-up of 10µA at the A input will force the either RE or DE will wake the LTC1487 back up within
receiver output to a known high state. 3.5µs.
If the driver is active immediately prior to shutdown, the
Low Power Operation
supply current will not drop to 1µA until the driver
The LTC1487 draws very little supply current whenever outputs have reached a steady state; this can take as long
the driver outputs are disabled. In shutdown mode, the as 2.6µs under worst case conditions. If the driver is
quiescent current is typically less than 1µA. With the disabled prior to shutdown the supply current will drop
receiver active and the driver outputs disabled, the LTC1487 to 1µA immediately.
will typically draw 80µA quiescent current. With the driver
Slew Rate and Propagation Delay
outputs enabled but unterminated, quiescent current will
rise slightly as one of the two outputs sources current into Many digital encoding schemes are dependent upon the
the internal receiver input resistance. With the minimum difference in the propagation delay times of the driver and
receiver input resistance of 70k and the maximum output receiver. Figure 11 shows the test circuit for the LTC1487
swing of 5V, the quiescent current will rise by a maximum propagation delay.
of 72µA. Typical quiescent current rise with the driver
enabled is about 40µA. 100pF
BR
RECEIVER
TTL IN D R
R OUT
The quiescent current rises significantly if the driver is t r, t f < 6ns 100Ω
enabled when it is externally terminated. With 1/2 LTC1487 • F11
100pF
termination load (120Ω between the driver outputs), the
quiescent current will jump to at least 13mA as the drivers
force a minimum of 1.5V across the termination resistance. Figure 11. Receiver Propagation Delay Test Circuit
With a fully terminated 60Ω line attached, the current will
The receiver delay times are:
rise to greater than 25mA with the driver enabled,
completely overshadowing the extra 40µA drawn by the tPLH – tPHL = 13ns Typ, VCC = 5V
internal receiver inputs. The LTC1487 drivers feature controlled slew rate to reduce
system EMI and improve signal fidelity by reducing reflec-
Shutdown Mode tions due to misterminated cables.
Both the receiver output (RO) and the driver outputs (A, B) The driver’s skew times are:
can be placed in three-state mode by bringing RE HIGH
and DE LOW respectively. In addition, the LTC1487 will Skew = 250ns Typ, VCC = 5V
enter shutdown mode when RE is HIGH and DE is LOW. 600ns Max, VCC = 5V, TA = – 40°C to 85°C
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PACKAGE DESCRIPTION
For package descriptions consult the 1994 Linear Databook Volume III.
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