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UO
TYPICAL APPLICATI
1 16
+ 5V INPUT Output Waveforms
0.1µF 3 2
V + OUT
+ DRIVER
LT1381 0.1µF
OUTPUT
RL = 3k
4 6
+ V – OUT CL = 2500pF
0.1µF
0.1µF 5 +
11 14 RECEIVER
RS232 OUTPUT
LOGIC R OUTPUT
INPUTS CL = 50pF
10 7
RS232 OUTPUT
12 13
RS232 INPUT INPUT
LOGIC 5k
OUTPUTS
9 8
S RS232 INPUT LT1381 • TA02
5k
15
LT1381 • TA01
1
LT1381
W W W U U W U
ABSOLUTE AXI U RATI GS PACKAGE/ORDER I FOR ATIO
(Note 1)
Driver Output .............................................. Indefinite TJMAX = 125°C, θJA = 90°C/ W, θJC = 46°C/W (N)
Receiver Output .......................................... Indefinite TJMAX = 125°C, θJA = 110°C/ W, θJC = 34°C/W (S)
2
LT1381
ELECTRICAL CHARACTERISTICS (Note 2)
PARAMETER CONDITIONS MIN TYP MAX UNITS
Receiver
Input Voltage Thresholds Input Low Threshold (VOUT = High) 0.8 1.3 V
Input High Threshold (VOUT = Low) 1.7 2.4 V
Hysteresis ● 0.1 0.4 1.0 V
Input Resistance (Note 6) 3 5 7 kΩ
Output Voltage Output Low, IOUT = – 1.6mA ● 0.2 0.4 V
Output High, IOUT = 160µA (VCC = 5V) ● 3.5 4.2 V
Output Short-Circuit Current Sinking Current, VOUT = VCC – 20 – 10 mA
Sourcing Current, VOUT = 0V 10 20 mA
Propagation Delay Output Transition tHL High-to-Low (Note 5) 250 600 ns
Output Transition tLH Low-to-High 350 600 ns
The ● denotes specifications which apply over the full operating Note 4: For driver delay measurements, RL = 3k and CL = 51pF. Trigger
temperature range. points are set between the driver’s input logic threshold and the output
Note 1: Absolute Maximum Ratings are those values beyond which the life transition to the zero crossing (t HL = 1.4V to 0V and t LH = 1.4V to 0V).
of the device may be impaired. Note 5: For receiver delay measurements, CL = 51pF. Trigger points are
Note 2: Testing done at VCC = 5V, unless otherwise specified. set between the receiver’s input logic threshold and the output transition
Note 3: Supply current is measured as the average over several charge to standard TTL/CMOS logic threshold (t HL = 1.3V to 2.4V and t LH = 1.7V
pump cycles. C + = C – = C1 = C2 = 0.1µF. All outputs are open, with all to 0.8V).
driver inputs tied high. Note 6: Tested at VIN = ±10V.
W U
TYPICAL PERFOR A CE CHARACTERISTICS
Driver Maximum Output Voltage Driver Minimum Output Voltage
vs Load Capacitance vs Load Capacitance Driver Output Voltage
9.0 –4.0 10
RL = 3k
2 DRIVERS LOADED 2 DRIVERS LOADED 8
120k BAUD
8.5
–4.5
DRIVER OUTPUT VOLTAGE (V)
6 VCC = 5.5V
PEAK OUTPUT VOLTAGE (V)
PEAK OUTPUT VOLTAGE (V)
8.0 VCC = 5V
4
–5.0 VCC = 4.5V
7.5 60k BAUD 2 OUTPUT HIGH
20k BAUD
7.0 –5.5 0
OUTPUT LOW
–2 VCC = 4.5V
6.5
60k BAUD –6.0 20k BAUD VCC = 5V
–4
6.0 VCC = 5.5V
–6
–6.5
5.5 –8
120k BAUD
5.0 –7.0 –10
0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 –55 –25 0 25 50 75 100 125
LOAD CAPACITANCE (nF) LOAD CAPACITANCE (nF) TEMPERATURE (°C)
LT1381 • TPC01 LT1381 • TPC02 LT1381 • TPC03
3
LT1381
W U
TYPICAL PERFOR A CE CHARACTERISTICS
Receiver Input Threshold Supply Current vs Data Rate Driver Leakage in Shutdown
3.00 50 100
2.75 2 DRIVERS ACTIVE
RL = 3k
2.50 40 CL = 2500pF
THRESHOLD VOLTAGE (V)
Receiver Short-Circuit Current Driver Short-Circuit Current Slew Rate vs Load Capacitance
50 30 20
ISC – 18
SHORT-CIRCUIT CURRENT (mA)
40 25
16
ISC +
14
V + (1µF)
8 –8
V + (0.1µF) V – (1µF)
6 –6
V + (V)
V – (V)
V – (0.1µF)
4 –4
2 –2
0 0
0 5 10 15 0 5 10 15
LOAD CURRENT + (mA) LOAD CURRENT – (mA)
LT1381 • TPC10 LT1381 • TPC11
4
LT1381
U U U
PI FU CTIO S
C1 +, C1 –, C2 +, C2 – (Pins 1, 3, 4, 5): Commutating higher voltages will not damage the device if the over-
Capacitor Inputs. These pins require two external capaci- drive is moderately current limited. Short circuits on one
tors C ≥ 0.1µF: one from C1+ to C1– and another from C2+ output can load the power supply generator and may
to C2 –. C1 may be deleted if a separate 12V supply is disrupt the signal levels of the other outputs. The driver
available and connected to pin C1+. outputs are protected against ESD to ±10kV for human
V + (Pin 2): Positive Supply Output (RS232 Drivers). body model discharges.
V + ≈ 2VCC – 2.1V. This pin requires an external charge REC2 IN, REC1 IN (Pins 8, 13): Receiver Inputs. These
storage capacitor C ≥ 0.1µF, tied to ground or VCC. Larger pins accept RS232 level signals (±30V) into a protected 5k
value capacitors may be used to reduce supply ripple. With terminating resistor. The receiver inputs are protected
multiple transceivers, the V+ and V – pins may be paralleled against ESD to ±10kV for human body model discharges.
into common capacitors. Each receiver provides 0.4V of hysteresis for noise immu-
V – (Pin 6): Negative Supply Output (RS232 Drivers). nity. Open receiver inputs assume a logic low state.
V – ≈ –(2VCC – 3V). This pin requires an external charge REC2 OUT, REC1 OUT (Pins 9, 12): Receiver Outputs with
storage capacitor C ≥ 0.1µF. Larger value capacitors may TTL/CMOS Voltage Levels. Outputs are fully short-circuit
be used to reduce supply ripple. With multiple transceiv- protected to ground or VCC with the power ON or OFF.
ers, the V+ and V – pins may be paralleled into common TR2 IN, TR1 IN (Pins 10, 11): RS232 Driver Input Pins.
capacitors. These inputs are TTL/CMOS compatible. Inputs should
TR2 OUT, TR1 OUT (Pin 7, 14): Driver Outputs at RS232 not be allowed to float. Tie unused inputs to VCC.
Voltage Levels. Driver output swing meets RS232 levels GND (Pin 15): Ground Pin.
for loads up to 3k. Slew rates are controlled for lightly
loaded lines. Output current capability is sufficient for VCC (Pin 16): 5V Input Supply Pin. This pin should be
load conditions up to 2500pF. Outputs are in a high decoupled with a 0.1µF ceramic capacitor close to the
impedance state when VCC = 0V. Outputs are fully short- package pin. Insufficient supply bypassing can result in
circuit protected from V – + 25V to V + – 25V. Applying low output drive levels and erratic charge pump operation.
U
ESD PROTECTIO
The RS232 line inputs of the LT1381 have on-chip protec- ESD Test Circuit
tion from ESD transients up to ±10kV. The protection
1 16
structures act to divert the static discharge safely to C1+ 5V VCC
+ 0.1µF +
system ground. In order for the ESD protection to function 0.1µF
+2 V+
LT1381
GND
15 0.1µF
effectively, the power supply and ground pins of the circuit 3 TR1 OUT 14
C1– RS232
must be connected to ground through low impedances. 4 REC1 IN 13
LINE PINS
+ C2+ PROTECTED
The power supply decoupling capacitors and charge pump 0.1µF TO ±10kV
5 REC1 OUT 12
storage capacitors provide this low impedance in normal 0.1µF
C2 –
ESR capacitors must be used for bypassing and charge RS232 7 TR2 OUT TR2 IN 10
storage. ESD testing must be done with pins VCC, V +, V – LINE PINS
PROTECTED 8 REC2 IN REC2 OUT 9
and GND shorted to ground or connected with low ESR TO ±10kV
5
LT1381
U
TYPICAL APPLICATIO S
Isolated RS232 Driver/Receiver
CTX20-1 1N5818
VIN = 5V 1Ω
±10% FROM 1:1 LT1121-5 5V ±10%
SYSTEM + +
47Ω L1 0.1µF
100µF 10µF
20µH
1 16 VCC
VCC
ISOLATOR OUTPUT VOUT + LT1381
OS IN 0.1µF
(DATA TO SYSTEM) RS232
LTC1145 3 2
+
4 0.1µF
GND2 GND1
+
0.1µF
5 6
+ 0.1µF
VCC 9 8
VIN RX RS232 INPUT
ISOLATOR INPUT
IN OS
(DATA FROM SYSTEM)
LTC1145
11 14
DX RS232 OUTPUT
15
GND1 GND2
FLOATING GROUND
LT1381 • TA03
ISOLATOR RS232
INPUT INPUT
RS232 ISOLATOR
OUTPUT OUTPUT
6
LT1381
U
PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted.
N Package
16-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.770*
(19.558)
MAX
16 15 14 13 12 11 10 9
0.255 ± 0.015*
(6.477 ± 0.381)
1 2 3 4 5 6 7 8
0.020
(0.508)
MIN 0.065
0.009 – 0.015
(1.651)
(0.229 – 0.381) TYP
+0.035
0.325 –0.015
( )
0.125 0.100 ± 0.010 0.018 ± 0.003
+0.889 (3.175) (2.540 ± 0.254) (0.457 ± 0.076)
8.255
–0.381 MIN
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. N16 1197
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
S Package
16-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.386 – 0.394*
(9.804 – 10.008)
16 15 14 13 12 11 10 9
1 2 3 4 5 6 7 8
0.010 – 0.020
× 45° 0.053 – 0.069
(0.254 – 0.508)
(1.346 – 1.752)
0.004 – 0.010
0.008 – 0.010
0° – 8° TYP (0.101 – 0.254)
(0.203 – 0.254)
7
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of circuits as described herein will not infringe on existing patent rights.
LT1381
U
TYPICAL APPLICATIO S
Operation Using 5V and 12V Power Supplies
1 16
12V INPUT 5V INPUT
2 3
LT1381
4 16
+ –12VOUT
0.1µF
0.1µF 5 +
11 14
RS232 OUTPUT
LOGIC
INPUTS 10 7
RS232 OUTPUT
12 13
RS232 INPUT
LOGIC 5k
OUTPUTS
9 8
S RS232 INPUT
5k
15
LT1381 • TA06
Sharing Capacitors
16 2 16 2
5V VCC V+ 5V VCC V+
LT1381 6 LT1381 6
V– + V–
11 14 0.1µF 11 14
TTL INPUT RS232 OUTPUT + TTL INPUT RS232 OUTPUT
10 7 10 7
TTL INPUT RS232 OUTPUT TTL INPUT RS232 OUTPUT
12 13 12 13
TTL OUTPUT RS232 INPUT TTL OUTPUT RS232 INPUT
5k 5k
9 8 9 8
TTL OUTPUT RS232 INPUT TTL OUTPUT RS232 INPUT
5k 5k
1 4 1 4
C1+ C2+ C1+ C2+
+ + + +
0.1µF 0.1µF 0.1µF 0.1µF
3 5 3 5
C1– C2 – C1– C2 –
LT1381 • TA07
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LT1180A/LT1181A 5V 2-Driver/2-Receiver RS232 Transceivers Pin Compatible with LT1280A/LT1280A
LT1280A/LT1281A 5V 2-Driver/2-Receiver RS232 Transceivers Pin Compatible with LT1180A/LT1181A
LT1780/LT1781 5V 2-Driver/2-Receiver RS232 Transceivers IEC 1000-4-2 Level 4 Compliance