COMPUTER ORGANISATION

BE 2/4 IV SEM
SECTION
 Syllabus
Unit 1: Basic Structure of Computers
Basic Structure of Computers : Computer Types, Functional Units,
Basic Operational Concepts, Bus Structures, Software, Performance,
Multiprocessors and Multicomputer, Memory locations and Addresses,
Memory operations, Instructions and Instruction Sequencing,
Addressing Modes, Assembly language, Additional Instructions
Unit 2: Basic Processing Unit
Basic Processing Unit: Register Transfer Language and Micro operations:
Register Transfer Language, Register Transfer, Arithmetic Micro operations,
Logic Micro operations, Shift Micro operations, Arithmetic logic shift unit.
MICROPROGRAMMED CONTROL: Control memory, address sequencing,
micro program example, Design of control unit, hardwired control, micro
programmed control.
Unit 3 : Input Output Organization
Input Output Organization: Peripheral devices, Input-output Interface,
Asynchronous Data Transfer, Modes of Transfer, and Priority interrupt, Direct
Memory Access.
Unit 4 : Memory System
Memory System Some Basic Concepts, Semiconductor RAM Memories, Read -Only
memories, Cache Memories, Performance considerations, Virtual Memories,
Memory Management Requirements, Secondary Storage Magnetic Hard disks,
Optical Disks, Magnetic Tape Systems.
Unit 5 : PIPELINIING
Pipelining: Basic Concepts, Data Hazards, Instruction Hazards, Influence on
Instruction sets, Data path and control considerations, Super Scalar Operation
FUNDAMENTALS OF COMPUTER ORGANISATION
• WHAT IS COMPUTING?
• FOR WHAT PURPOSE ?
• What are the basic elements in any computing system?
• How they are interact with each other?
• DIFFRENCE BETWEEN ORGANAISATION & ARCHITECTURE
•Architecture describes what the computer
does.
•Organization describes how it does it.
ORGANISATION
• Users ex car driver
• How to use
• User must know the availability
• Programmer or software
engineer
• Software point of view.
ARCHITECTURE
• Designer ex automobile engineer
• How to implement
• Must design the needs
• Designers
• Hard ware point of view.
 Computer Architecture
• Architecture describes what the
computer does.
• Computer Architecture deals
with functional behavior of
computer system.
• it deals with high-level design
issue.
• Architecture indicates its
hardware.
Computer Organization
• Organization describes how it
does it.
• Computer Organization deals
with structural relationship.
• In above figure, its also clear
that it deals with low-level
design issue.
• Where, Organization indicates its
performance.
• For designing a computer, its
architecture is fixed first.
• Computer Architecture is also
called as instruction set
architecture.
• For designing a computer,
organization is decided after its
architecture.
• Computer Organization is
frequently called as micro
architecture.
• Computer Architecture
comprises logical functions such
as instruction sets, registers,
data types and addressing
modes.
• Architecture coordinates
between the hardware and
software of the system.
• Computer Organization consists
of physical units like circuit
designs, peripherals and adders.
• Computer Organization handles
the segments of the network in
a system
• Historically there have been 2 types of Computers:
• Fixed Program Computers –
Their function is very specific and they couldn’t be programmed, e.g.
Calculators, billing machines(Hotels, Super Bazaar)
• Stored Program Computers –
These can be programmed to carry out many different tasks,
applications are stored on them, hence the name.
• The modern computers are based on a stored-program concept
introduced by John Von Neumann.
• In this stored-program concept, programs and data are stored in a
separate storage unit called memories and are treated the same.
• This novel idea meant that a computer built with this architecture
would be much easier to reprogram.
Computer ??
COMPUTER is a Electronic Device that receives input, stores &
process the input as per user instructions and provides output in a
desired format.
Modern computers will do lot more than calculate.
 COMPUTING ?

processing storage COMMUNICATION

numbers numeric processing Arithmetic processing VOICE , DATA

symbolic processing(Text) logical processing ALU (Core of CPU)

Multi media computers Structure data, Unstructured data

numbers, text Graphics, audio, video.

Functional Units
Arithmetic
Input and
logic

Memory

Output Control

I/O Processor

Figure 1. Basic functional units of a computer.

BLOCK DIAGRAM OF A COMPUTER
• DATA --
The input that is fed to computer
• Information –
Out Put obtained after processing the Data.
- Raw facts and figures Which can be processed using
arithmetic and logical operations to obtain information
are called Data.
Central Processing Unit(C P U )
• The CPU is the brain of the computer system. It works as an
administrator of a system.
• All the operations within the system are supervised and controlled by
the CPU.
• The data and the instructions are temporarily stored in its memory
unit.
• After performing operations, the result of operations can be stored in
this memory unit.
• The results of the operations are sent towards the output unit for the
user.
• Thus, the CPU controls all internal and external devices, perform
arithmetic and logical operations, controls memory usage and control
the sequence of operations.
• For performing all these operations, the CPU has three subunits:
• Arithmetic and logic unit (ALU)
• Control unit
• Memory unit (CPU registers)
STATE MACHINE
• The Processor is a state machine.
• It has to go through state after state as defined by the clock period
and then it will be executing its over all function.
• Why CPU is called as State Machine?
• It is moving the contents from one place to another place with in the
CPU.
• One machine cycle fetch one word at a time.
 Control Unit
• The control unit directs the overall functioning of a computer system.
• The control unit controls all the operations which internally take place
within the CPU and also the operations of CPU related to input /
output devices.
• This unit also monitors the sequence of operations.
• It fetches instructions from the primary storage unit, interprets them
and generates control signals to ensure correct execution of the
program.
 CPU Registers
• A register is a group of flip-flops which can be used to store a
word.
• It is a high-speed temporary storage space for holding data,
addresses, and instructions during processing the
instructions.
• Registers are not referenced by their addresses, however,
they are directly accessed.
REGISTERS AVILABLE
 Data register
• It is used only to hold data and cannot be employed in the calculation
of an operand address.
Address register
• Holds the Address. They may be somewhat general purpose or they
may be devoted to a particular addressing mode.
• To perform execution of the instructions, the processor contains a
number of registers used for temporary storage of data and some
special function registers.
• The special function registers include
I. Program Counter (PC),
II. Instruction Register (IR),
III. Memory Address Register (MAR), and
IV. Memory Data Register (MDR).
Program Counter (PC)

 The sequence of instructions executions is monitored by the

program counter.
 It keeps track of which instruction is being executed and what the
next instruction to be carried out.

Instruction Register (IR)

• It is used to hold the instruction that is currently being executed.
• The contents of IR are available to the control unit, which generate
the timing signals that control the various processing elements
involved in executing the instruction.
 PROGRAM COUNTER

• A program counter is a register in a computer processor that

contains the address (location) of the instruction being executed

at the current time.

• As each instruction gets fetched, the program counter increases

its stored value by 1.

• After each instruction is fetched, the program counter points to
the next instruction in the sequence.

• When the computer restarts or is reset, the program counter

normally reverts to 0.

• Some engineers refer to a program counter as an instruction

address register or an address pointer.
 Instruction Register

• In computing, the instruction register (IR) or current instruction register (CIR) is

the part of a CPU's control unit that holds the instruction currently being

executed or decoded.

• In the instruction cycle, the instruction is loaded into the instruction register after

the processor fetches it from the memory location pointed to by the program

counter.
 Memory Address Register (MAR) &
Memory Data Register (MDR)
• These registers are used to handle the data transfer between the
main memory and the processor.
• The MAR holds the address of the main memory to or from which the
data is to be transferred.
• The MDR sometimes also called MBR (Memory Buffer Register)
contains the data to be written into or read from the addressed word
of the main memory.
 Computer Registers
 This is a part of the central processing unit, reside inside the CPU.
 The information from main memory is brought to CPU and keeps the
information in register
 Due to space and cost constraints, there is the limited number
of registers in a CPU.
 Types of registers
1) User-visible register
2) Control and status register
 Control and status register
• The control register is used by the control units to control the
operations of the processor and
• The status register are used to check the status of the register.
Ex Program Counter (PC), Instruction register (IR),MAR,MBR
 User-visible register
1. General purpose register
• It can be assigned to a variety of functions by the programmer.
• The general purpose register can contain the operand for any opcode.
Restrictions
• there may be dedicated register for floating point and stack
operations.
• In some cases, general purpose register can be used for addressing
functions (e.g register indirect, displacement).
Arithmetic and Logic Unit (ALU)

• Arithmetic and logic unit is the subunit of the central processing unit
It performs
1. arithmetic operations like addition, subtraction
2. logic operations like OR, AND, invert, exclusive – OR.
• The data stored in the memory unit is transferred to ALU.
• The ALU performs the operations and the result is stored in an
internal memory unit of the CPU.
• The result of a final operation is transferred from the memory unit to
an output unit.
 Bus Structure
• A Group of wires which are provided to carry the signals for
communication between the components/modules is called BUS.
• A Bus that connects major computer components/modules is called
system bus.
• The system bus is divided into three functional groups:
1.Data Bus
2.Address Bus
3.Control Bus
DATA Bus
• Bidirectional
• Data can read or write by CPU from/to Memory or a Port.
• Consists of 8,16,32..parallel lines to transfer data.
Address Bus
• Unidirectional
• CPU sends the address of the Memory or I/O port that is to be
written or Read from.
• Consists of 16,32..parallel lines to transfer address.
Control Bus :
• Regulate the activity on the Bus.
• CPU sends the signals on the Control Bus to enable the locations
(memory, I/O ..)
Ex Memory Read
memory Write
I/O read, I/O write
Hold, Interupt
• Parallel and Serial Data Buses
• Parallel data buses carry data on many wires simultaneously.
• The most common parallel buses are the ATA, Advanced Technology
Attachment, PC card , SCSI -Small Computer System Interface
• A serial data bus has one wire or path, and carries all the bits, one
after the other.
• USB - the Universal Serial Bus; FireWire; Serial ATA; and Serial
Attached SCSI.
USB
Internal and External Data Buses
• The internal data bus, also known as a local bus, connects all
components that are on the motherboard, like the CPU and memory.
Local devices would include such items as the video card, sound card,
and modem.

• The external data bus connects all peripheral devices to the

motherboard.
 Bus Arbitration
• A bus is connected to several units like (memory, IO and processor)
• At any point of time any of these units may want to start a
transaction.
• Arbitration is a process of deciding which unit will get access to the
bus for driving the transaction.
• There are basically three bus arbitration mechanisms:
1. Daisy chaining
2. Polling
3. Independent request
 Daisy chaining

Steps to achieve daisy chaining mechanism:

a. Each devices checks, if bus is not busy then make bus
request to the master.
b. Then master see the bus request like high, and then it
activates the bus grant.
c. Then bus grant line travel from one device to another,
in this time if a device gets a bus grant, mark the bus
busy.
 POLING

Steps to achieve polling mechanism

a. If bus is not busy, make bus request.
b. Master polls by placing device on polling lines. In this master decides
priority.
c. If device gets access to the bus, mark bus busy.
 Independent request

Steps to achieve independent request mechanism

a. If bus is not busy, make bus request.
b. Master decides who to grant access, and
indicates through grant lines.
c. If device gets bus grant, make bus busy.
Memory Unit

• Store programs and data

• Two classes of storage
Primary storage
Fast
Programs must be stored in memory while they are being executed
Large number of semiconductor storage cells
Processed in words
Address
RAM and memory access time
Memory hierarchy – cache, main memory
Secondary storage – larger and cheaper
Memory Classification
 Memory Classification
With respect the way that the data accessed memories can be
classified as follows:
- Random Access Memory (RAM)
- Sequential Access Memory (SAM)
- Direct Access Memory (DAM)
- Content addressable Memory (CAM)
Hierarchy List
• Registers
• L1 Cache
• L2 Cache
• Main memory
• Disk cache
• Disk
• Optical
• Tape
• Memory is the most essential element of a computing
system because without it computer can’t perform simple
tasks.
• Computer memory is of two basic type – Primary
memory(RAM and ROM) and Secondary memory(hard
drive,CD,etc.).
• Random Access Memory (RAM) is primary-volatile memory
and
• Read Only Memory (ROM) is primary-non-volatile memory.
 Types of Info.entered by Possible to Cost per chip Method of Application area
ROM change info? erasing info.

Mask-programmed Manufacturer No Cheapest Not possible Large-scale production

ROM

PROM User No Costlier Not possible Medium-scale

production

EPROM User Yes Even more costly Using strong UV R& D

source

EEPROM User Yes Costliest Using electrical R& D

signals
1. Random Access Memory (RAM) –
 It is also called as read write memory or the main
memory or the primary memory.
 The programs and data that the CPU requires during
execution of a program are stored in this memory.
 It is a volatile memory as the data loses when the
power is turned off.
 RAM is further classified into three types-
1. SRAM (Static Random Access Memory) ,
2. DRAM (Dynamic Random Access Memory) and
3. Non-Volatile RAM(NVRAM)
2. Read Only Memory (ROM)

 Stores crucial information essential to

operate the system, like the program
essential to boot the computer.
 It is not volatile.
 Always retains its data.
 Used in embedded systems or where the
programming needs no change.
 Used in calculators and peripheral devices.
 ROM is further classified into 4 types-
ROM, PROM, EPROM, and EEPROM.
Hard Disk Drive
Cache operation – overview
• Cache operates on a principal called Locality of reference.
• CPU requests contents of memory location
• Check cache for this data
• If present, get from cache (fast)
• If not present, read required block from main memory to cache
• Then deliver from cache to CPU
• Cache includes tags to identify which block of main memory is in each
cache slot
 CACHE DRAM STORAGE
SIZE K Bytes M bytes 100’s of M
bytes

SPEED 10 n sec 100 n sec 2-10 m sec

Hit & Miss Operations
Cache Hit :

A cache hit will occurs when a file is requested from a cache and cache is

able to full fill that request. If it is available in cache then it is a HIT.

Cache Miss :

A Cahe Miss is occurs when the cache does not contain the requested

content.
 H I T RATIO
Cache Hit Ratio is measurement of how many content requests is able
to fill successfully, compared to how many request it receives.
Number of cache hits
Hit Ratio =
Number of references
Number of references = (number of hits + number of misses)
The CPU found data in Cache 95 times out of 100 references. Find out
the hit ratio and percentage of misses.

total no of references = 100

number of times found in cache = 95
Hit ratio = 95 / 100 = 0.95
number of misses = 100 – 95 = 5
misses percentage = (5 / 100) * 100 = 5
Memory Location, Addresses, and Operation
n bits

• Memory consists of first word

second word
many millions of
storage cells, each of
which can store 1 bit. •
•
• Data is usually •
accessed in n-bit
groups. n is called i th word

word length.
•
•
•

last word

Figure 2.5. Memory words.

Memory Location, Addresses, and Operation
• 32-bit word length example
32 bits

b31 b30 b1 b0

•
•
•
Sign bit: b31= 0 for positive numbers
b31= 1 for negative numbers

(a) A signed integer

8 bits 8 bits 8 bits 8 bits

ASCII ASCII ASCII ASCII

character character character character

(b) Four characters

Memory Location, Addresses, and Operation
• To retrieve information from memory, either for one word or one byte (8-
bit), addresses for each location are needed.
• A k-bit address memory has 2k memory locations, namely 0 – 2k-1, called
memory space.
• 24-bit memory : 224 = 16,777,216 = 16M (1M=220)
• 32-bit memory: 232 = 4G (1G=230)
• 1K(kilo)=210
• 1T(tera)=240
Ex.
1. It is desired to have a memory chip of 512 bytes. Find
out the no of bits required to address the above chip?
Number of locations = 512
It requires(29 = 512)09 bits to address the 512 locations.
000000000 - 0 111111110 -- 511
000000001 - 1 111111111 -- 512
000000010 - 2
2. It is desired to have a RAM chip of 4096 x 8 bits. The size of each chip is
1024 x 8. Find out the no of bits required to address the above chip and the
no of chips required?

Size of the chip is 1024 x 8.

To address one chip it is required(210 =1024) 10 bits. Total locations are

4096.

Hence it is required 4 chips of 1024 size(4 x 1024 = 4096)

Memory Location, Addresses, and Operation
• It is impractical to assign distinct addresses to individual bit locations
in the memory.
• The most practical assignment is to have successive addresses refer to
successive byte locations in the memory – byte-addressable memory.
• Byte locations have addresses 0, 1, 2, … If word length is 32 bits, they
successive words are located at addresses 0, 4, 8,…
 software
• Essential things of Hard Ware – Processor(CPU), Storage(memory),
Extended memory(I/O)
OPERATING USRES
SYSTEM

SYSTEM
SOFTWARE
HW
SOFTWARE EVALUATION
 Machine codes Ex 1001011,0011010,1110011,
 Assembly language Ex add,sub,mov,jc,
 High Level Language. Ex statements Ex x = a+ b;
What required?
 A Translator.
which converts from one language to another language.
 TRANSLATOR

ASSEMBLER COMPILER INTERPTER

PASCAL COMPILER

C- COMPILER

NOTE :1. Not necessary to convert HLL to AL then to machine code. Directly code can be generated from HLL
to Machine code.
2. Translators are independent of users.
OPERATING SYSTEM
• Core of the system is same, but may use different software.
• System software ???
• Application Software ???
• SW

System Application

Translator OS WP DBASE C,JAVA

COMILER INTERPTER
Why software required?
• To run the Hardware parts of the computer
• To run the application software
• Acts as interface between Hardware and user applications.
• System software converts the human instructions into machine
understandable instructions.
• Types of software
1. Operating Systems
2. Language Processor
3. Device Drivers.
 Operating system
• An operating system (OS) is system software that manages
computer Hardware, software resources and provides
common service for computer programs.
• An operating system (OS) is an interface between Hardware
and User.
• The operating system is a vital component of the system
software in a computer system.
TYPES OF OPERATING SYSTEMS

1. Batch operating system

2. Time-sharing operating systems

3. Distributed operating System

4. Network operating System

5. Real Time operating System

a) Hard real-time systems b) Soft real-time systems
6. WINNDOWS

7. Mac OS (apple)

8.UNIX

9. LINUX

10. MOBILE OPERATING SYSTEM (ANDROID, APPLE IOS)

 LANGUAGE PROCESSOR
• A language processor is a software program designed or used to
perform tasks such as processing program code to machine code.
• There are two main types of language processors:
1. Interpreter - allows a computer to interpret, or understand, what a
software program needs, the computer to do, what tasks to
perform.
2. Translator - takes a program's code and translates it into machine
code, allowing the computer to read and understand what tasks the
program needs to be done in its native code. An assembler and
a compiler are examples of translators.
COMPILER

• The language processor that reads the complete source program

written in high level language as a whole in one go and translates it

into an equivalent program in machine language is called as a

Compiler.

Ex c,c++, c#,java
• In a compiler the source code is translated to object code successfully

if it is free of errors.m

• The compiler specifies the errors at the end of compilation with line

numbers when there are any errors in the source code.

 ASSEMBLER

• Is used to translate the program written in assembly language into

machine code.

• The source program is a assembly language and the ouput is the

object code or machine code.

 INTERPRETER

• The translation of single statement of source program in to machine

code is done by language processor and execute it immediately

before moving to the next line is called an Interpreter.

• If there is an error in the statement, the interpreter terminates its

translation process at that statement and displays an error message.

• The difference between an interpreter and a
translator is that an interpreter tells a computer what
to do.
• A translator takes the program's code and converts it
to machine code, allowing the computer to read it.
• Essentially, the interpreter tells the computer what to
do and the translator lets the computer figure out
what to do by itself.
 DEVICE DRIVER
• Device driver is a computer program that operates or
controls a particular type of device that is attached to
a computer .
• A driver provides a software interface
to hardware devices, enabling operating systems and
other computer programs to access hardware
functions.
• If a system is already running but needs to be restarted, it is
called rebooting.
There are two types of booting −
• Cold Booting − When the system is started by switching on the
power supply it is called cold booting. The next step in cold
booting is loading of BIOS.
• Warm Booting − When the system is already running and
needs to be restarted or rebooted, it is called warm booting.
Warm booting is faster than cold booting because BIOS is not
reloaded.
Input and Output Devices

• Input and output devices allow the computer system to interact with
the outside world by moving data into and out of the system.
• An input device is used to bring data into the system.
• Some input devices are:
Keyboard
Mouse
Microphone
Bar code reader
Graphics tablet
• An output device is used to send data out of the system.
• Some output devices are:
Monitor
Printer
Speaker
• Input – Output Devices
Data can be transferred in both directions ie, to the computer as well
as from computer.
Ex speaker & Ear phones, Pen drive.
• Input/output devices are usually called I/O devices.
• They are directly connected to an electronic module inside the
systems unit called a device controller. (audio card, )
 Ports
• A connection point that acts as interface between the computer and
external devices like mouse, printer, modem, etc. is called port. Ports
are of two types −
• Internal port − It connects the motherboard to internal devices like
hard disk drive, CD drive, internal modem, etc.
• External port − It connects the motherboard to external devices like
modem, mouse, printer, flash drives, etc.
• When an application is closed (stops running), do you think that it is
copied from main memory back to the hard disk?
a) No. The hard disk already has a copy, and that copy will be used the
next time the application is run.
Say that a computer has just added 13 to 27. Where did this activity
take place? In the processor
q)You have just purchased a copy of the computer game Tomb
Raider© (you were waiting for the price to fall below $20). You follow
the directions on the package and install the game on your
computer. Tomb Raider© consists of
A program (that controls the action of the game.)
Data (the images and other information.)
After you have installed the game, where does each of these things
exist in the computer system?
a) A program (that controls the action of the game.)
On the hard disk
Data (the images and other information.)
• On the hard disk
(When you play the game, its various parts are copied into and out of
main memory.)
 Multiprocessing and Multiprogramming
• Multiprocessing is a system that has two or more than one
processors.
• CPUs are added for increasing computing speed of the system.
• Because of Multiprocessing, there are many processes that are
executed simultaneously.
• Multiprocessing are further classified into two categories:
1. Symmetric Multiprocessing,
2. Asymmetric Multiprocessing.
Multi Programming
 Multi-programming is more than
one process running at a time
 it increases CPU utilization by
organizing jobs (code and data)
so that the CPU always has one
to execute.
 The motive is to keep multiple
jobs in main memory.
 If one job gets occupied with
Input/output, CPU can be
assigned to other job.
Multiprocessor and Multicomputer
Multiprocessor:
• A Multiprocessor is a computer system with two or more central
processing units (CPUs) share full access to a common RAM.
• The main objective of using a multiprocessor is to boost the system’s
execution speed, with other objectives being fault tolerance and
application matching.
• two types of multiprocessors
1. shared memory multiprocessor and
2. distributed memory multiprocessor.
shared memory multiprocessor
 Applications of Multiprocessor –
• As a uniprocessor, such as single instruction, single data stream (SISD).
• As a multiprocessor, such as single instruction, multiple data stream
(SIMD), which is usually used for vector processing.
• Multiple series of instructions in a single perspective, such as multiple
instruction, single data stream (MISD), which is used for describing hyper-
threading or pipelined processors.
• Inside a single system for executing multiple, individual series of
instructions in multiple perspectives, such as multiple instruction, multiple
data stream (MIMD).
 Benefits of using a Multiprocessor –

• Enhanced performance.
• Multiple applications.
• Multi-tasking inside an application.
• High throughput and responsiveness.
• Hardware sharing among CPUs.
Multicomputer
• A multicomputer system is a computer system with multiple
processors that are connected together to solve a problem.
• Each processor has its own memory and it is accessible by that
particular processor and those processors can communicate with
each other via an interconnection network.
• As the multicomputer is capable of messages passing between the
processors, it is possible to divide the task between the processors to
complete the task.
• Hence, a multicomputer can be used for distributed computing.
• It is cost effective and easier to build a multicomputer than a
multiprocessor.
Multiprocessors and Multicomputers
• Multiprocessor computer
 Execute a number of different application tasks in parallel
 Execute subtasks of a single large task in parallel
 All processors have access to all of the memory – shared-memory multiprocessor
 Cost – processors, memory units, complex interconnection networks
• Multicomputers
 Each computer only have access to its own memory
 Exchange message via a communication network – message-passing multicomputers
 multiprocessor
• Multiprocessor is a system with
two or more central processing
units (CPUs) that is capable of
performing multiple tasks
• A multiprocessor system is a
single computer that operates
with multiple CPUs
multicomputer
• multicomputer is a system with
multiple processors that are
attached via an interconnection
network to perform a
computation task.
• a multicomputer system is a
cluster of computers that
operate as a singular computer.
 multiprocessor
• In multiprocessor system,
program tends to be easier
• multiprocessor supports parallel
computing.
multicomputer
• multicomputer system, program
tends to be more difficult.
• Multicomputer supports
distributed computing.
• Construction of multicomputer
is easier and cost effective than
a multiprocessor.
Computer Instructions

• Computer instructions are a set of machine language instructions that

a particular processor understands and executes. A computer
performs tasks on the basis of the instruction provided.
• An instruction comprises of groups called fields. These fields include:
• The Operation code (Opcode) field which specifies the operation to
be performed.
• The Address field which contains the location of the operand, i.e.,
register or memory location.
• The Mode field which specifies how the operand will be located.
Instruction Cycle
• The Instruction cycle is the time required to execute one single
instruction by CPU.

• Instruction cycle consists of three basic steps

i) Fetch ii) Decode iii) Execute

• The machine cycle is a part of Instruction cycle.

 Instruction Cycle

Machine cycle EXECUTION

Bus activity small steps of activity

Instruction Cycle
• A program residing in the memory unit of a computer consists of a
sequence of instructions. These instructions are executed by the
processor by going through a cycle for each instruction.
• In a basic computer, each instruction cycle consists of the following
phases:
1. Fetch instruction from memory.
2. Decode the instruction.
3. Read the effective address from memory.
4. Execute the instruction.
 Instruction Cycle.
Major phases
Instruction Fetch Data Fetch Execution
ex. ADD,SUB,INC
Instruction Cycle.
instruction fetch Execution

CPU will be placing the address of instruction on the bus and memory will respond by putting the
contents of that particular address, which is an instruction. CPU will get that.(Fetch cycle).
After fetching the instruction CPU will decode it.
CPU will ask memory by putting location on the bus again, and memory respond by keeping data
on the bus and executed by processor.
Program : resides in memory unit
I op code address
Instruction Cycle 15 14 - 12 11 - 0

Fetch Decode ( Decision) Execute

op code ---- 12th bit to 14th bit

14 13 12
0 0 0 - 0 (D0)
0 0 1 - 1 (D1)
---------------
1 1 1 -- 7 (D7)

D7 =1(111) then it is a Register or I/O

D7 = 0 (000 to 110) it is a Memory reference instruction.

Program ------ resides in memory
instruction cycle

fetch decode execute

Decision?
Steps 1. start Sequence counter( SC ) 0
2. T0 : AR PC Fetching
3. T1 : IR M[AR], PC PC+1

4 T2 : in IR (12-14) Decode
AR IR(0-11), I IR(15)
 Step 5: T3 : Register reference or Decision
Memory or I/O reference (Direct or Indirect)
( This depends on the vale of D7 & I)
If D7 = 0, direct reference, execution will take place at T3 cycle.
= 1, Indirect, execution will take place at T4 cycle.
Step 6: T4 : Execution
 Instruction Cycle.
Instruction Register
15 14 11 0

I Op code address of memory.

 I- indicates the Memory reference. If I =0 then Direct reference I = 1 then Indirect reference.
 Bits 12 – 14 will indicate the opcode and
 0 – 11 will give the address of the memory location.
op code of IR 14 13 12

Ranges from 000 to 111 (D0 to D7 )

Case i) when D7 = 0(000 to 110) opcode my range from 000 to 110.

Case ii) when D7 = 1 (111) no choice for opcode.
 A basic computer has three instruction code formats which are:

1.Memory - reference instruction

2.Register - reference instruction

3.Input-Output instruction
 Memory - reference instruction

In Memory-reference instruction, 12 bits of memory is used

to specify an address and one bit to specify the addressing
mode 'I'.
Register - reference instruction

The Register-reference instructions are represented by the Opcode 111

with a 0 in the leftmost bit (bit 15) of the instruction.
 Input-Output instruction

• Just like the Register-reference instruction, an Input-Output

instruction does not need a reference to memory and is recognized by
the operation code 111 with a 1 in the leftmost bit of the instruction.
The remaining 12 bits are used to specify the type of the input-output
operation or test performed.
 Note:
• The three operation code bits in positions 12 through 14 should be
equal to 111. Otherwise, the instruction is a memory-reference type,
and the bit in position 15 is taken as the addressing mode I.
• When the three operation code bits are equal to 111, control unit
inspects the bit in position 15. If the bit is 0, the instruction is a
register-reference type. Otherwise, the instruction is an input-output
type having bit 1 at position 15.
Find out the following instructions are which type?
1. 0 101 000110101010

2. 1 011 010101101010

3. 1 111 000011110101

4. 0 111 001100110011
SUMMARY
• IF bits 12-14 are 111, check the 15th bit position.
If 15th bit is 0 then it is a register reference.( 0 111 xxxxxxxxxxxx)
if 15th bit is 1 then it is a I/O reference. ( 1 111 xxxxxxxxxxxx)

IF bits 12-14 are 000, then it is a memory reference instruction.

(0/1 000 xxxxxxxxxxxx), (0/1 001 xxxxxxxxxxxx),)
(0/1 101 xxxxxxxxxxxx) etc..
Instruction Formats (Zero, One, Two and Three
Address Instruction)
• Computer perform task on the basis of instruction provided.
• An instruction in computer comprises of groups called fields.
• These field contains different information.
• each field has different significance on the basis of which a CPU
decide what to perform. The most common fields are:
 Operation field which specifies the operation to be performed like
addition.
 Address field which contain the location of operand, i.e., register or
memory location.
 Mode field which specifies how operand is to be founded.
CPU Organization
Generally CPU organization are of three types on the
basis of number of address fields:
• Single Accumulator
• Result usually goes to the Accumulator
• Accumulator has to be saved to memory quite often
• General Register
• Registers hold operands thus reduce memory traffic
• Register bookkeeping
• Stack
• Operands and result are always in the stack
Single Accumulator
• All the operations will be performed with respect to Accumulator.
( CPU register)
Ex Add X, CLA,
• One operand is accumulator and second is the address of Memory
or Register.
• The content of X will be added to accumulator and result will be
stored in accumulator.

AC AC +M[ x ]
General Register
• The corresponding instruction contains multiple address.
• The multiple address means it may contain the general purpose
registers or memory address or combination.
Ex 1. ADD R1,R2,R3 R1 R1 + R2 + R3

2. MOV R1,R2 R1 R2
STACK
• Operations will be performed on stack.
Ex push , pop

ADD – The top two positions of the stack will be added and result
will be stored on top of stack.
Instruction Formats
• Three-Address Instructions
• ADD R1, R2, R3 R1 ← R2 + R3
• Two-Address Instructions
• ADD R1, R2 R1 ← R1 + R2
• One-Address Instructions
• ADD M AC ← AC + M[AR]
• Zero-Address Instructions
• ADD TOS ← TOS + (TOS – 1)
• RISC Instructions
• Lots of registers. Memory is restricted to Load & Store

Opcode Operand(s) or Address(es)

Three address instruction
Example: Evaluate (A+B)  (C+D)
Three-Address
1. ADD R1, A, B ; R1 ← M[A] + M[B]
2. ADD R2, C, D ; R2 ← M[C] + M[D]
3. MUL X, R1, R2 ; M[X] ← R1  R2
 Two Address Instructions

R1, R2 are registers

M[] is any memory location
One Address Instruction
 One Address Instructions –

AC is accumulator
M[] is any memory location
M[T] is temporary location
Zero Address Instructions

Expression: X = (A+B)*(C+D)
Post fixed :X = AB+CD+*
TOP means top of stack
M[X] is any memory location
Evaluate the following instruction using Three, Two and One
addressing Formats.

Ex (A - B * C + D) * ( X / Y + A).
Three address instruction
Ex (A - B * C + D) * ( X / Y + A).
1. SUB R1, A, B R1 = A - B
2. ADD R2, C, D R2 = C * D
3. MUL R3, R1, R2 R3 = R2 * R1
4. DIV R1, X, Y R1 = X / Y
5. ADD R2, R1, A R2 = R1 + A
6. MUL T, R3, R2 M[T] = R3 * R2
Two Address
Ex (A - B * C + D) * ( X / Y + A).
1. MOV R1, A R1 = M[A]
2. SUB R1 , B R1 = R1 – M[B]
3. MOV R2 , C R2 = C
4. ADD R2 , D R2 = R2 +M[D]
5. MUL R1,R2 R1 = R1* R2
6. MOV R2, X R2 = M[X]
7. DIV R2, Y R2 = M[Y]
8. MOV R3 , A R3 = A
9. ADD R3, R2 R3 = R3 +R2
10. MUL R1, R3 R1 = R1* R3
11. MOV X, R1 M[X] = R1
One Address
Ex (A - B * C + D) * ( X / Y + A).
1. LOAD A AC = M[A]
2. SUB B AC = AC – M[A]
3. STORE P M[P] = AC
4. LOAD C AC = M[C ]
5. ADD D AC = AC + M[D]
6. MUL P AC = AC * M[P]
7. STORE P M[P] = AC
8. LOAD X AC = M[ X]
9. DIV Y AC = AC / M[Y]
10. ADD A AC = AC + M[A]
11. MUL P AC = AC * M[P]
12. STORE X M[X] = AC
RISC
• RISC is an abbreviation of Reduced Instruction Set
Computer.
• RISC processor has ‘instruction sets’ that are simple
and have simple ‘addressing modes’.
• A RISC style instruction engages “one word” in
memory.
• Execution of the RISC instructions are faster and
take one clock cycle per instruction.
 RISC Instruction Sets

• RISC instructions are simple and are of fixed size.

• Each RISC instruction engages a single memory word.
• RISC instructions operate on processor registers only.
• The instructions that have arithmetic and logic operation should have
their operand either in the processor register or should be
given directly in the instruction.
 Add R2, R3
Add R2, R3, R4
Both are possible in RISC
• Initially, at the start of execution of the program, all the operands are
in memory.
• So, to access the memory operands, the RISC instruction set
has Load and Store instruction.
• The Load instruction loads the operand present in memory to the
processor register. The load instruction is of the form:
Load destination, Source
Example : Load R2, A // memory to register
• The Store instruction is used to store the intermediate result or the
final result in the memory. It is of the form:
Store source, destination
Example: Store R2, A // register to memory
 Advantages
1. Reduced Instruction set computer.
2. Small set of instructions with fixed format.(32bit)
3. Data transfer from register to register.
4. Register based instructions.
5. Program length is large.
6. Executing time for an instruction is less.(instructions
are simple and small.)
7. Most of the instructions are completed in one
machine cycle.(allows the processor to handle many
instructions at the same time.)
Instruction formats
• https://www.youtube.com/watch?v=MSac_s-W0pc

https://www.geeksforgeeks.org/different-instruction-
cycles/?ref=rp
Instruction Format & Types

Operator Data

Opcode Operand
Types
1. Zero or No operand
2. One operand
3. Two operand
Ex 1 The format of a double operand instruction of a CPU is
OP CODE SOURCE DATA DESTINATION DATA
4 –BITS 4-BITS 4-BITS

if 12 double operand and 30 single operand instruction are to be

implemented and if opcode field must identify the three groups of
n-operand instructions, calculate the total number of non operand
instructions that can be implemented.
1. OP CODE 4 BITS , Hence 16 codes will be possible. (2 power 4)
2. double operand instructions 12. out of 16 codes 12 will be reserved
for double operand instructions. Reaming 16-12 =4
3. In case of single operand, one field is sufficient, since it has only one
operand i.e. destination data.( reaming are free)
so, source 4 data bits are free. With this we can address 16 codes.
by choosing 2 leftover opcodes we can generate 2 X 16 =32 codes.
total left over opcodes = 16-12-2 =2
• For no operand we can use 4 bits of destination field additionally . Hence
available codes will be 16.
total available coded for zero op code
2 codes X 16 X 16
uniquely source destination
identifying code bits code bits

No operand codes 2 *16 * 16

Single operand 30
Double operand 12
EX 2. A CPU, which addresses the data through its 6 registers, in one of
12 different modes is to be designed to support the following
instructions. SNO NOTYPE OF % OF SINGLE OR NO
OPERAND
IN NUMBERS
INSTRUCTIONS

ARITHMETIC
1 10 20 2
LOGIC
2 15 60 9
DATA MOVING
3 24 50 12
BRANCH
4 6 50 3
5 CONTOL 5 60 3

Rest of them are double-operand type. Find the minimum size of CPU’s instruction word?
 OP CODE SOURCE REGISTER DESTINATION REGISTER
3 BITS 3 BITS
OP CODE MODE REGISTER MODE REGISTER

Registers 6 - required bits are 3 (2 power 3 = 8)

modes 12 required bits are 4 (2 power 4 =16)
no of 31 double –operand instructions are 31. required minimum bits are 5 (2 power 5).
out off 32, 31 are used for double operand instructions. Left over 32-31 = 1 code (
 Addressing Modes
• What is addressing Mode?
The possible ways of operands can be referred to or
the different modes that can be address data.
• Why it is required?
to refer or address the data
The various addressing modes that are defined in a given instruction set architecture define how the
machine language instructions in that architecture identify the operand(s) of each instruction. An addressing
mode specifies how to calculate the effective memory address of an operand by using information held in
registers and/or constants contained within a machine instruction or elsewhere.
• What are the types of Addressing Modes?
Addressing Modes
Ex Add x,y where Add is the operator and x is register and y is the memory location.
Memory
register
regreeee 200 1010
100

500
1010
x= 100 y = 500; x + y = 600;
Addressing Modes
1. Register Addressing Mode
Register it self contains the data. Register is a part of CPU.
No bus activity. Saves time.

Register
Data 2500
Addressing Modes
2. Direct Addressing mode(Register direct addressing)
Register contains the address where data is stored.
Bus activity is needed. One machine cycle is required.
3. Indirect Addressing Mode:
Address will not available directly.
The register contains the address of location where the data
available. [ address [address[data]]]
more bus activity. More no of machine cycles.
to find out effective address more and more calculations required.
Addressing Modes
4. Index Mode: 1000
Index is some number X. Register
1000
X is added to some register content.
Effective address = Base register + X
Ex Base register value 1000, index 10 1010 DATA

then effective address will be 1010,

where data will be available.
Instruction will supply the X value.
Addressing Modes
5. Index Deferred (Indirect) Mode :
Effective address = Base register + X(x)
where X (x) = Address (address)
Note in all these modes the register content will not change.
6. Auto Increment/Decrement Mode:
content of the register will incremented/Decremented automatically.
Addressing Modes
7.Immediate Mode:
Address is available as a part of the Instruction.
8. Relative Mode:
Relative to What?
Program counter
Effective address = PC + X
Addressing Modes

• Implied Opcode Mode ...

• AC is implied in “ADD M[AR]” in “One-Address” instr.

• TOS is implied in “ADD” in “Zero-Address” instr.
• Immediate
• The use of a constant in “MOV R1, 5”, i.e. R1 ← 5
• Register
• Indicate which register holds the operand
Immediate Addressing Mode :
In Immediate addressing mode, the operand is specified in the instruction itself .The
operand field contains the actual operand to be used in conjunction with the operation
specified in the instruction .

Example: Add 5 to the accumulator.

ADD 5
Direct Address Mode :
In Direct Address Mode, the effective address of the operand is equal to the
address part of the instruction, i.e. the address part of the instruction indicates the
memory location containing the operand.
Example –
ADD R1, 4000 where 4000 is the effective address of the location.
Indirect Addressing Mode :

This is the mode of addressing where the instruction contains the address of the location where
the target address is stored. So in this way it is Indirectly storing the address of the target location in
another memory location

There are 2 types of Indirect Addressing Modes:

Memory Indirect, and

Register Indirect.
 Relative Address Mode :

In this mode, the Effective Address (EA) of the operand is calculated by adding the
content of the CPU register and the address part of the instruction word. The effective
address thus calculated is relative to the address of the next instruction

EA = CPU Register + Displacement

Memory Indirect –

In this type we directly mention the address of the memory location in the instruction either enclosed by

parenthesis or preceded by ‘@’ character.

1.Example :
LOAD R1, (1005) or LOAD R1, @1005
2.Register Indirect –

In this type the address of the target memory location will be

stored in the register and the register will be mentioned in the
instruction.

Example :
MOV R@, 1005 LOAD R1, (R2)
Example
50 Load A/c
100 105
51 Address
100 101 35 R1 = 98 and XR = 3.
52 Next inst 102 45 PC = 52
53 250 103 65
54 400 104 75

55 212 105 500

.
98 700
152 70
99 800
stack

stack
`
• Find out the effective address and content of the EA for the following addressing modes.
addressing mode effective address content of location.
1. Direct 100 105
2. Immediate ----- 100
3. Indirect 105 500
4. Relative 152 70
5. Indexed 103 65
6. Register direct ----- 98
7. Register indirect 98 700
8. Auto increment 100/101 105/35
9. Auto decrement. 100/99 105/800
200 Load AC mode R1 = 400, XR = 100.
201 500
202 Next Instruction SNO ADDRESSING MODE EFFECTIVE CONTENT
ADDRESS OF ACC.1
1 Immediate addressing 201 500
399 450 2 Direct addressing 500 600
400 700 3 Indirect addressing 600 900
4 Relative addressing 702 325
499 50 5 Register Direct addressing -- 400
500 600 6. Register Indirect 400 700
501 100 6 Indexed addressing 600 900
600 900 7 Auto increment 501 100*
8 Auto Decrement 499 50
702 325

800 300
900 250
Assembly Language
What is Assembly Language?

• Each personal computer has a microprocessor that manages the

computer's arithmetical, logical, and control activities.
• Each family of processors has its own set of instructions for handling
various operations such as getting input from keyboard, displaying
information on screen and performing various other jobs. These set
of instructions are called 'machine language instructions'.
Advantages of Assembly Language

Having an understanding of assembly language makes one aware of −

• How programs interface with OS, processor, and BIOS;
• How data is represented in memory and other external
devices;
• How the processor accesses and executes instruction;
• How instructions access and process data;
• How a program accesses external devices.
• It requires less memory and execution time;
• It allows hardware-specific complex jobs in an easier
way;
• It is suitable for time-critical jobs;
• It is most suitable for writing interrupt service
routines and other memory resident programs.
• Assembly language is dependent upon the instruction set and the
architecture of the processor.
There are many good assembler programs, such as −
•Microsoft Assembler (MASM)
•Borland Turbo Assembler (TASM)
•The GNU assembler (GAS)
•Netwide Assembler(NASM)
An assembly program can be divided into three sections −
• The data section,
• The bss section, and
• The text section.
• The data Section
-- The data section is used for declaring initialized data or constants. This
data does not change at runtime. You can declare various constant values,
file names, or buffer size, etc., in this section.
• The syntax for declaring data section is −
section.data
The bss Section
• The bss section is used for declaring variables. The syntax for
declaring bss section is −
section.bss
The text section
• The text section is used for keeping the actual code. This section must
begin with the declaration global _start, which tells the kernel where
the program execution begins.
• The syntax for declaring text section is −
section.text global _start :
Assembly Language Statements

• Assembly language programs consist of three types of statements −

Executable instructions or instructions,
Assembler directives or pseudo-ops, and
Macros.
• The executable instructions or simply instructions tell the processor what
to do. Each instruction consists of an operation code (opcode). Each
executable instruction generates one machine language instruction.
• The assembler directives or pseudo-ops tell the assembler about the
various aspects of the assembly process. These are non-executable and do
not generate machine language instructions.
• Macros are basically a text substitution mechanism.
 Types of Instructions
Data Transfer Instructions

Data Manipulation Instructions

Program Control Instructions

Types of Instructions
• Data Transfer Instructions
Name Mnemonic Data value is
Load LD not modified
Store ST
Move MOV
Exchange XCH
Input IN
Output OUT
Push PUSH
Pop POP
 Data Transfer Instructions
Mode Assembly Register Transfer
Direct address LD ADR AC ← M[ADR]
Indirect address LD @ADR AC ← M[M[ADR]]
Relative address LD $ADR AC ← M[PC+ADR]
Immediate operand LD #NBR AC ← NBR
Index addressing LD ADR(X) AC ← M[ADR+XR]
Register LD R1 AC ← R1
Register indirect LD (R1) AC ← M[R1]
Autoincrement LD (R1)+ AC ← M[R1], R1 ← R1+1
 Data Manipulation Instructions
Name Mnemonic
• Arithmetic Increment INC
• Logical & Bit Manipulation Decrement DEC
Add ADD
• Shift Subtract SUB
Multiply MUL
Divide DIV
Add with carry ADDC
Name Mnemonic Subtract with borrow SUBB
Clear CLR Negate NEG
Complement COM Name Mnemonic
AND AND Logical shift right SHR
OR OR Logical shift left SHL
Exclusive-OR XOR Arithmetic shift right SHRA
Clear carry CLRC Arithmetic shift left SHLA
Set carry SETC Rotate right ROR
Complement carry COMC Rotate left ROL
Enable interrupt EI Rotate right through carry RORC
Disable interrupt DI Rotate left through carry ROLC
Program Control Instructions
Name Mnemonic
Branch BR
Jump JMP
Skip SKP
Subtract A – B but
Call CALL don’t store the result

Return RET
Compare
CMP
(Subtract) 10110001
Test (AND) TST
00001000

Mask
00000000
Conditional Branch Instructions
Mnemonic Branch Condition Tested Condition
BZ Branch if zero Z=1
BNZ Branch if not zero Z=0
BC Branch if carry C=1
BNC Branch if no carry C=0
BP Branch if plus S=0
BM Branch if minus S=1
BV Branch if overflow V=1
BNV Branch if no overflow V=0
Interrupt
• Normal execution of programs may be preempted if some device requires
urgent servicing.
• The normal execution of the current program must be interrupted – the
device raises an interrupt signal.
• Interrupt-service routine
• Current system information backup and restore (PC, general-purpose
registers, control information, specific information)
Performance
Performance
• The most important measure of a computer is how quickly it can
execute programs.
• Three factors affect performance:
Hardware design
Instruction set
Compiler
Performance
• Processor time to execute a program depends on the hardware involved
in the execution of individual machine instructions.

Main Cache
memory memory Processor

Bus

Figure 1.5. The processor cache.

Performance
• The processor and a relatively small cache memory can be fabricated
on a single integrated circuit chip.
• Speed
• Cost
• Memory management
Processor Clock
• Clock, clock cycle, and clock rate
• The execution of each instruction is divided into several steps, each of
which completes in one clock cycle.
• Hertz – cycles per second
Performance
• Instructions – simple and complex
• T – processor time required to execute a program that has been prepared in high-
level language(source program)
• N – number of actual machine language instructions needed to complete the
execution (note: loop)
• N may not be equal to the number of machine instructions in the object program.
• S – average number of basic steps needed to execute one machine instruction.
Each step completes in one clock cycle
Basic Performance Equation
• T – processor time required to execute a program that has been
prepared in high-level language
• N – number of actual machine language instructions needed to
complete the execution (note: loop)
• S – average number of basic steps needed to execute one machine
instruction. Each step completes in one clock cycle
• R – clock rate
• Note: these are not independent to each other

N S
T
R
How to improve T?
 How to improve T?
• By reducing the T value.(by reducing the N,S and by increasing the R)
• compiling into fewer machine instructions.(N)
• Instructions have smaller basic steps to perform (S).
• Using higher frequency clock(R).
• A 2.5 MHz clock processor may not perform better than 2.0MHz
clock.
Clock Rate
• Increase clock rate
Improve the integrated-circuit (IC) technology to make the circuits faster
Reduce the amount of processing done in one basic step (however, this may
increase the number of basic steps needed)
• Increases in R that are entirely caused by improvements in IC
technology affect all aspects of the processor’s operation equally
except the time to access the main memory.
Performance Measurement
• T is difficult to compute.
• Measure computer performance using benchmark programs.
• System Performance Evaluation Corporation (SPEC) selects and publishes
representative application programs for different application domains, together
with test results for many commercially available computers.
• Compile and run (no simulation)
• Reference computer

Running time on the reference computer

SPEC rating 
Running time on the computer under test
n 1
SPEC rating  ( SPECi ) n

i 1
Pipeline and Superscalar Operation
• Pipelining divides an instruction into steps, and since each step is executed in a
different part of the processor, multiple instructions can be in different "phases"
each clock.
• Superscalar design involves the processor being able to issue multiple
instructions in a single clock, with redundant facilities to execute an instruction.
We're talking about within a single core, mind you -- multicore processing is
different.
• An instruction goes through 5 stages to be "performed". These are IF
(instruction fetch), ID (instruction decode), EX (execute), MEM
(update memory), WB (write back to cache).
• In a very simple processor design, every clock a different stage would
be completed so we'd have:
• IF
• ID
• EX
• MEM
• WB
• Which would do one instruction in five clocks. If we then add a
redundant execution unit and introduce superscalar design, we'd
have this, for two instructions A and B:
• IF(A) IF(B)
• ID(A) ID(B)
• EX(A) EX(B)
• MEM(A) MEM(B)
• WB(A) WB(B)
• Pipelining allows the parts to be executed simultaneously, so we would end
up with something like (for ten instructions A through J):
IF(A) IF(B)
ID(A) ID(B) IF(C) IF(D)
EX(A) EX(B) ID(C) ID(D) IF(E) IF(F)
MEM(A) MEM(B) EX(C) EX(D) ID(E) ID(F) IF(G) IF(H)
WB(A) WB(B) MEM(C) MEM(D) EX(E) EX(F) ID(G) ID(H) IF(I) IF(J)
WB(C) WB(D) MEM(E) MEM(F) EX(G) EX(H) ID(I) ID(J)
WB(E) WB(F) MEM(G) MEM(H) EX(I) EX(J)
WB(G) WB(H) MEM(I) MEM(J)
WB(I) WB(J)
:
An Analogy: Washing Clothes
• Imagine a dry cleaning store with the following facilities: a rack for hanging
dirty or clean clothes, a washer and a dryer (each of which can wash one
garment at a time), a folding table, and an ironing board.

• The attendant who does all of the actual washing and drying is rather dim-
witted so the store owner, who takes the dry cleaning orders, takes special
care to write out each instruction very carefully and explicitly.

• On a typical day these instructions may be something along the lines of:
1. take the shirt from the rack
2. wash the shirt
3. dry the shirt
4. iron the shirt
5. fold the shirt
6. put the shirt back on the rack
7. take the pants from the rack
8. wash the pants
9. dry the pants
10. fold the pants
11. put the pants back on the rack
12. take the coat from the rack
13. wash the coat
14. dry the coat
15. iron the coat
16. put the coat back on the rack
The attendant follows these instructions to the tee, being very careful not to ever do anything out of order.
As you can imagine, it takes a long time to get the day's laundry done because it takes a long time to fully
wash, dry, and fold each piece of laundry, and it must all be done one at a time.
However, one day the attendant quits and a new, smarter, attendant is hired who notices that most of the
equipment is laying idle at any given time during the day. While the pants were drying neither the ironing
board nor the washer were in use. So he decided to make better use of his time. Thus, instead of the
above series of steps, he would do this:

1.wash the shirt, take the pants from the rack

2.dry the shirt, wash the pants
3.iron the shirt, dry the pants
4.fold the shirt, (take the coat from the rack)
5.put the shirt back on the rack, fold the pants, (wash the coat)
6.take the shirt from the rack
7.put the pants back on the rack, (dry the coat)
8.(iron the coat)
9.(put the coat back on the rack)

This is pipelining. Sequencing unrelated activities such that they use different components at the same
time. By keeping as much of the different components active at once you maximize efficiency and speed
up execution time, in this case reducing 16 "cycles" to 9, a speedup of over 40%.
Now, the little dry cleaning shop started to make more money because they could work so much faster, so the
owner bought an extra washer, dryer, ironing board, folding station, and even hired another attendant. Now
things are even faster, instead of the above, you have:

1.take the shirt from the rack, take the pants from the rack

2.wash the shirt, wash the pants, (take the coat from the rack)

3.dry the shirt, dry the pants, (wash the coat)

4.iron the shirt, fold the pants, (dry the coat)

5.fold the shirt, put the pants back on the rack, (iron the coat)

6.put the shirt back on the rack, (put the coat back on the rack)

This is superscalar design. Multiple sub-components capable of doing the same task simultaneously, but with
the processor deciding how to do it. In this case it resulted in a nearly 50% speed boost (in 18 "cycles" the new
architecture could run through 3 iterations of this "program" while the previous architecture could only run
through 2).
CISC and RISC
• Tradeoff between N and S
• A key consideration is the use of pipelining
S is close to 1 even though the number of basic steps per instruction may be
considerably larger
It is much easier to implement efficient pipelining in processor with simple
instruction sets
• Reduced Instruction Set Computers (RISC)
• Complex Instruction Set Computers (CISC)
 CISC RISC
1. Complex instruction set computer. 1. Reduced Instruction set computer.
2. Large set of Instructions with variable 2. Small set of instructions with fixed
format.(16 – 64 bits) format.(32bit)
3. Data transfer is from memory to memory. 3. Data transfer from register to register.
4. Memory base instructions are used.
4. Register based instructions.
5. Program length is short.
5. Program length is large.
6. Executing time for an instruction is more.(in
one instruction multiple instructions) 6. Executing time for an instruction is
less.(instructions are simple and small.)
7. Instructions cannot be completed in one
machine cycle. 7. Most of the instructions are completed in one
machine cycle.(allows the processor to handle
many instructions at the same time.)
 CISC
8 Has a microprogramming control unit
9 Used for low end applications such as
security systems, laptops, desktops.
10 Many addressing modes.
11 Any instruction can access memory
12 Minimum amount of RAM.
13 Ex. SYSTEM/360,PDP-11,VX,68000
etc.
RISC
8 . Hardwired control unit
9. High end applications like video processing,
image Processing, mobiles, Tabs
10.FEWER ADDRESSING MODES
11.Only Load and store instructions can access
the memory.
12.More RAM required.
13.Ex MIPS,PA-RISC,ALPHA,POWER PC etc.
 Imagine that you have just turned on your computer
•Input devices? Yes--various sensors throughout the car
and have not yet started any application. Are any
deliver data to the computer.
programs running?
Yes--the operating system is running. Mostly it is managing •Output devices? Yes--various actuators have their
the user interface, waiting for some input to tell it what to actions controlled by data.
do. •Main storage? Yes--probably not very much.
2. What component of a computer system holds the •Secondary storage? No.
operating system when the computer is not running?
The hard disk. The hard disk is used for long-term storage of
all software, including the operating system.
3. Which of the following can be saved on a floppy disk?
A game program.
Accounting data (numbers.)
Audio data.
Graphics data.
Digital photographs.
Video data.
Everything on the list can be stored on a floppy disk
Most modern automobiles are controlled by a computer. Do
you think that the computer in your car has:
Input devices?
Output devices?
Main storage?