Installation Guide

Online Joint Faculty Development Programme on
RISC-V VLSI Implementation Flow: RTL2GDS
Course Plan and Overview
Presented by
Dr. Aditya Dalakoti and Mr. Puneet Mittal
(VLSI Expert)
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RISC-V VLSI
Implementationwww.vlsi-expert.com
Flow: RTL2GDS
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-By
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Puneet Mittal
&
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Program Goals

• Learn the basics to take a processor core from RTL to GDS
• Learn from both
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• Practical tool based implementation
• Fundamental theory which is involved in the process
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• Achieve a Final GDS which can be Taped Out as per the
application requirements of the bigger SoC
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Program Overview
Timing
Simulations and
Sign Off
Characterization
Constraints &
Synthesis
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CTS and Input Output

RTL2GDS
Routing www.vlsi-expert.com Files
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Floorplanning Static Timing Layer and
and Placement Analysis Power Planning
Training Agenda : Day 1
• Linux Installation (Like Ubuntu), if not
• Introduction to
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the Topic available, please install
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• Why • Tool Installations
• What • Python3
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• Program Overview • fusesoc
• General Training Methodology • CppSim
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• Yosys
• Expectations from participants
• OpenSTA
• Magic
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klayout
• Docker
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• Simulations and
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• Low Power Basics
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Characterization • Circuits
• Simulation
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• Characterization
• Generation • System
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• Constraints and
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Synthesis • Input Outputwww.vlsi-expert.com
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• Input Output Constraints • General file discussion
• Synthesis using Yosys
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• Constraints and
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Synthesis • Input Outputwww.vlsi-expert.com
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• SoC Perspective on Constriants • Lib Files Discussion
• Synthesis of RISCV cores
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• Layer and Power

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Planning • Static Timingwww.vlsi-expert.com
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• System Planning • Delay Calculations and
• Layer Planning System Implications
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• Power Planning
• OpenLane Tool for PD Networks
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• Floorplanning
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• Static Timingwww.vlsi-expert.com
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• Basic Concepts • Setup and Hold Discussion
• SoC and Low Power Perspective
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• Macros
• MV
• RISCV Cores Floorplanning www.vlsi-expert.com
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• Placement
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• Placement Basics • STA Reports and Analysis
• Setting in Openlane
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• Placement of RISCV Cores
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• Clock Tree Synthesis

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• Basic Concepts • Complex Analysis
• Setting in Openlane Techniques overview
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• Design for RISCV Cores
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• Routing
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• DRC LVS Extraction
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• Basic Techniques • DRC basics
• Setting ins Openlane
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• RISCV Core Routing
• LVS basics
• PEX basics
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• Lowwww.vlsi-expert.com
Power Flow Basics • Design Sign Off
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• Overview of Industry methods on • Sign-Off Checks
Low Power
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Installation

• CPPSIM Windows
• Rest All  www.vlsi-expert.com
Ubuntu
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Tool Installation : Openlane
1  git clone https://github.com/efabless/openlane.git --branch rc6
2  docker run -it -v $(pwd):/openLANE_flow -v
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$PDK_ROOT:$PDK_ROOT
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PDK_ROOT=$PDK_ROOT -u $(id -u $USER):$(id -g $USER) openlane:rc6
EXIT the docker before the next steps, Enter the docker only for the openlane work in the
worshop. www.vlsi-expert.com
3  cd openlane/docker_build
4  make merge(permission denied)
sudo chmod 666 /var/run/docker.sock www.vlsi-expert.com
5  make merge
6  cd ..
7  exportwww.vlsi-expert.com
PDK_ROOT=<absolute path to where skywater-pdk and open_pdks will reside>
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8  make pdk www.vlsi-expert.com
9  make test
15
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Tool Installation : CppSim

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Installation Part 1-cppsim

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STEP 1
Visit Here! www.vlsi-expert.com
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Click On EXE
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STEP 2
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Click Here!
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STEP 3
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On Next>
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STEP 4
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Click On Next>
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STEP 5
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On Next>
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STEP 6
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On Next>
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STEP 7
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STEP 8
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Select
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On Finish
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ON YOUR DESKTOP
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Four Items get

installed www.vlsi-expert.com
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Installation Part 2- DLL Files

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• Installation:
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• Windows - Double-click on the downloaded file setup_cppsim5.exe

(See note below on also installing Microsoft Visual C++ 2008
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Redistributable Package)
• Note:
• For the Windows version of CppSim, some computers require installation
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of the Microsoft Visual C++ 2008 Redistributable Package (x86) in order to
run NGspice. This is a small set of DLL files, and can be downloaded and
installed directly from Microsoft's website at:
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• http://www.microsoft.com/download/en/details.aspx?displaylang=en&id=
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29
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• DETAILED INSTRUCTIONS :
https://www.cppsim.com/Manuals/cppsim_vppsim_primer5.pdf
STEP 1

Visit Here!
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Scroll Down and

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Click On Download
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STEP 2
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Click Here
STEP 3
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OPENING Sue2
Open this
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Sue2 INTEFACE
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Tool Installation : Others
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Yosys
• Python3
• Pip3 www.vlsi-expert.com
• Fusesoc
• Git
• Make www.vlsi-expert.com
• Verilator
• Klayout
• Magicwww.vlsi-expert.com www.vlsi-expert.com
• openSTA www.vlsi-expert.com
• docker
Useful Git Repos

• Openlane
• SERV www.vlsi-expert.com
• RISCV Compliance
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Thank you
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Online Joint Faculty Development Programme on

RISC-V VLSI Implementation Flow: RTL2GDS

Course Plan and Overview

www.vlsi-expert.com www.vlsi-expert.com www.vlsi-expert.com

CTS and Input Output

• Layer and Power

• Clock Tree Synthesis

www.vlsi-expert.com www.vlsi-expert.com www.vlsi-expert.com

Tool Installation : CppSim

Installation Part 1-cppsim

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Visit Here! www.vlsi-expert.com

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Four Items get

Installation Part 2- DLL Files

• Windows - Double-click on the downloaded file setup_cppsim5.exe

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Scroll Down and

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www.vlsi-expert.com www.vlsi-expert.com www.vlsi-expert.com

www.vlsi-expert.com Click On Next>

www.vlsi-expert.com Click On Finish

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