9/17/2017

Comprehensive Verification Introduction - Instructor

– Beginner to Advance Level ▪ Experienced Verification Engineer – 17+ yrs experience
▪ Applied Micro, Intel, IBM and startups
▪ Online Teaching
▪ www.verificationexcellence.in
Part 3 – Class based Verification
using SystemVerilog ▪ Quora Blogger on VLSI /Career/Interview Topics
▪ https://www.quora.com/profile/Ramdas-Mozhikunnath
▪ Quora Top Writer 2017
▪ Author – “Cracking Digital VLSI Verification Interview:
Ramdas M Interview Success”
Experienced Verification Engineer, 17+ years ▪ http://verificationexcellence.in/books
experience, Author, Online Teacher, Blogger
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Instructor - Introduction Specialization – 6 part Course

1. Fundamentals of Verification
2. SystemVerilog Basics
3. Class based Verification using SystemVerilog
Cracking Digital VLSI Verification Interviews: [Discussion Group]
4. SystemVerilog Assertions
5. SystemVerilog Coverage
6. SystemVerilog based UVM Methodology

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Part 3 – Intended Audience

▪ Class based Verification using SystemVerilog ▪ Students

▪ SystemVerilog Classes and OOPs concepts ▪ VLSI and Digital Design
▪ Inheritance, Composition, Polymorphism ▪ Micro Electronics
▪ Data members and hiding – static vs automatic, public, private, ▪ Embedded Systems Design
protected
▪ Constant Class, Abstract Classes, Parameterized Classes
▪ Work professionals (Beginner Level)
▪ Virtual Interfaces ▪ VLSI Design Professionals
▪ Randomization constructs and coding constraints ▪ Verification Engineers
▪ Building a Class based Verification environment
▪ Stimulus Generators, Checkers, Drivers, Monitors

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Prerequisites Teaching Methods

▪ General Awareness of ▪ Short Video Lectures

▪ Digital or Logic design flows
▪ Some programming language
▪ Power point and white board screen captures

▪ Passion for Learning ▪ Plenty of examples

▪ Coding Exercises after few lectures
▪ Quizzes at end of sections

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What is OOP?

▪ OOP is object oriented programming

▪ Organize programs in same way as objects
are organized in real world
▪ Break programs in the same way
SV Classes ▪ Several Languages support OOP
Ramdas ▪ C++, Java, (SW) and System Verilog (HDL)

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Class type Class – Syntax and Example

▪ A class is a type that includes data (members) and

subroutines(methods) that operate on the data
▪ It is used to normally define a collection/group of things
that are related
▪ A class type is normally used to define the properties of
an object
▪ A class type to define properties of a packet
▪ A class type to define properties of a car
▪ Accordingly instance of a class type is called object

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Classes - More Accessing members/methods

▪ Objects can be created dynamically ▪ Referencing class members

▪ No explicit destruction in SV

▪ Memory allocation only when objects are created

▪ Class instances (objects) referenced using object ▪ Referencing class methods
handles/pointers
▪ Object handles can be passed around – tasks/functions

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Class Instantiation
Constructor

▪ Memory management and garbage collection support in SV ▪ Objects Allocated and

Initialized Via Call to the
▪ Constructor allocates memory and initializes class members new Constructor Method
▪ Special function (new) ▪ All objects have built-in
▪ No return type new method
▪ A built in new() called when not explicitly
defined ▪ No args
▪ With and without arguments OK ▪ Allocates storage for all data
properties

▪ User-defined new method

can initialize and/or do
other things
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“this” handle Static Properties

▪ The special variable this is a predefined object handle for the
current object instance
▪ Static properties/data members are “static” to all
instances of the class.
▪ All instances share the same value of this variable.
▪ If one instance changes the value, it changes the value
for all instances

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Static Methods Assigning, copying

▪ Static methods – Only one copy for all instances of class ▪ P1 and p2 are object handles
▪ Memory allocation along with Class definition ▪ Only new creates a separate object
▪ Hence can be accessed even without an instance
▪ First case – One object with 2 handles pointing
▪ Static methods may only modify static properties. to same object
▪ Can call other static methods
▪ Second case – 2 objects created. Contents of P1
▪ Static methods cannot be virtual will be copied to members of P2
▪ Cannot refer to “this” handle ? (Not associated with object) ▪ This is shallow copy
▪ If a class member is another object only handle copied

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Deep Copy Deep Copy – Implementation Example

▪ Deep Copy
▪ If member of a class is another class/object
▪ Explicit copy function needs to be implemented to
copy all members of the object

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Inheritance and Sub Classes Inheritance - Examples

▪ Inheritance: (is-a relationship)

▪ Allows users to extend existing classes and add
more attributes (members and methods)

▪ Sub class – Any class that is extended from a class

(also known as derived class)
▪ Super class – Any class that is higher up in the
inheritance tree is super class

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Class Inheritance - Example Composition

▪ Composition: (has-a relationship)

▪ Composition is used for the case where one
object HAS-A instance of another class.

▪ For example, an “Automobile” class might

have 4 instances of a “wheel” class

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Composition - Example Inheritance vs Composition

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“super” keyword Chaining Constructors

▪ The super keyword is used from within a derived class

to refer to members, class value parameters, or local
value parameters of the base class.

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Data Hiding and encapsulation Examples

▪ Unqualified class properties and methods are public

▪ Visible to anyone who has access to the object name/handle
▪ Restriction or Data hiding is needed
▪ Protects against accidental modifications
▪ Most of times implementation details need not be know to
users (derived class)
▪ local
▪ members only visible inside methods of class
▪ Not visible in sub classes (inherited class)
▪ protected
▪ Similar to local - visibility limited to class methods
▪ Visible also in sub classes

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Constant Class Properties

local – special case

▪ Within a “same” class - even local variables of ▪ The const keyword may be used to make class
another object of “same” class can be accessed properties unchangeable (or read only).
▪ One initialization while declaration or in constructor OK

▪ Following not allowed

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Constant Class properties Overriding methods/members

▪ Most of times global constants (initialized along with

declaration) are also declared “static”
▪ As you might want same value across instances
▪ How is this different from a constant defined using
`define ?
▪ Constants defined using “ `define <const> “ construct
cannot be changed at run time (It is expanded compile
time)
▪ Using Const members , we can change the value run ▪ If method is not virtual and accessed using base class pointer, we get the base
time (e.g per instance const members) class values/definitions
▪ Non-virtual methods have separate implementation in class hierarchy
▪ Same member “I” in derived class is a separate variable
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Overloading vs Overriding
Virtual methods

▪ A virtual method is one that will override all definitions in

▪ Overloading all of base classes
▪ A non-virtual method will override definition in the
▪ multiple methods in the same class with the current class and any further descendants
same name but different signatures ▪ There is only one implementation of a virtual method per
class hierarchy
▪ If not virtual, there will be separate implementation
▪ SV Class doesn’t support
▪ Usually used as prototype methods
▪ Argument types, qualifiers and directions should all
match when overriding.

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Examples Examples

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Virtual Methods - More Casting

▪ Virtual method can override a non-virtual method
▪ Virtual keyword may or may not be used in sub
classes
▪ Walk through an example in edaplayground
▪ https://www.edaplayground.com/x/3L2f
▪ A Base class pointer can be assigned values of any
sub-classes handles
▪ A sub-class (derived class) pointer cannot be assigned
values of a super class handle directly
▪ If a super class (base class) points to a derived class
object, then another derived class object pointer can
be assigned this value with casting

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Casting - Examples Abstract Classes

▪ The virtual keyword may be used on a class to

make the class “abstract”.
▪ An abstract class may not be instantiated. Users
must subclass(derive) the abstract class to create
instances of the class.

virtual class BasePacket;

…

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Pure Virtual methods Pure virtual method - example

▪ A virtual method in an abstract class can be declared

as a prototype without implementation
▪ If declared as “pure” virtual – the subclass has to
provide an implementation by overriding.
▪ Abstract class can be extended to abstract class when
pure methods can remain pure
▪ The first non-abstract class need to override pure virtual
method

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Polymorphism usage Class Scope operator

▪ Base class (Superclass) pointer can be used to reference ▪ Used to specify an identifier in a class scope – Use “::”
objects of derived class (subclass)
▪ Useful for referencing static members, nested classes,
referencing enums or constants from outside
▪ Instances of various derived class objects can be
reference using above array

▪ StringList::Node and StringTree::Node are different

class definitions

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Parameterized Class
Out of block declaration

▪ Method definitions can be placed outside class using ▪ Allows Generic Class to be Instantiated as Objects of
“extern” keyword Different Types

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Specialized Generic Class Declaring Parameterized Class

▪ To create specialized classes use “typedef” along ▪ Parameters of Class need to have a value during declaration
with parameters

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Typedef Class and Forward References Class vs Structs

▪ Sometimes it is necessary to use a class before it has been
defined. To do this, you can use a typedef forward
reference, then later define the class.
▪ Can be for Parameterized class as well
▪ Structs
▪ Similar data type as class
▪ Memory allocated along with declaration
▪ No dynamic memory or object creation
▪ No inheritance, Virtual methods etc

▪ Structs are useful as a static data type which

represents a collection

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Virtual Interfaces Virtual interface

▪ Classes cannot have modules or interfaces, need a
specialized mechanism
▪ Why?
▪ Virtual interfaces provide a way to connect dynamic
classes to static world of modules
▪ Virtual interfaces provide a mechanism for separating test
programs/BFM models from the actual signals.
▪ Virtual interface variable can point to a physical
interface instance
▪ Can be passed as argument to tasks/functions
▪ Can reference clocking blocks and modports using
dot operator

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Virtual Interface Example

// interface definition class BFM;

interface Bus virtual Bus bus;
(input logic clk); Xaction xaction;
bit req;
bit grant; function new (virtual Bus b);
logic [7:0] addr;
// need to initialize virtual interface
logic [7:0] data;
endinterface: Bus
// in constructor
bus = b;
xaction = new;
Constraints and
// interface instance
Bus infc_b (clk);
// dut instance
endfunction

task req_bus();
Randomization
dut dut1 (infc_b, clk);
@(posedge bus.clk);
// class instance
bus.req <= 1'b1;
BFM mybfm = new (infc_b);
$display("Req = %b @ %0t",
Ramdas
bus.req, $time);
endtask: req_bus
endclass: BFM

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Simplest randomness Better Randomness

▪ $urandom system tasks ▪ Constraints are built onto the Class system
▪ $urandom() is SV, thread stable, deterministic ▪ Random variables use special modifier:
▪ rand –random variable
▪ $urandom returns unsigned 32-bit integers ▪ randc –random cyclic variable
▪ Procedural call can be inserted wherever needed
▪ Object is randomized by calling randomize( )method
▪ Automatically available for classes with random variables.
▪ User-definable methods
▪ pre_randomize()
▪ post_randomize()
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What are Constraints ?

▪ Set of Boolean algebraic expressions
▪ Constraint blocks are class members like tasks/functions
randc variables
▪ Cyclic random – Random values picked without repeating
untill all possible values are picked
▪ E.g – For a 2 bit randc variable, each randomize call might
return a value in combinations like below

▪ Do not use randc on data types that can have lot of values .
E.g “randc int” can go about 2^32 values and consumes lot
of memory to track internally

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Examples Constraints are inherited

▪ A derived class inherits all constraints from Base class

▪ New constraints can be added or existing constraints
overridden

▪ External constraints also

allowed
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Constraints inheritance Inline constraints

▪ A constraint in a derived class with same name as in ▪ Additional constraints can be specified when
super/base class will override the functionality randomize() method is called
▪ Abstract class can have a pure constraint prototype

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Conflicting constraints
Enable/Disable rand/constraints
▪ What happens when you impose constraints that conflict
in some way? ▪ rand_mode() – method to toggle the “rand”
attribute off on a class variable
▪ If turned off, those behave like normal variables
▪ constraint_mode() – method to enable/disable a
constraint
▪ Useful for generating negative/error cases
▪ Selectively enabling constraints added in a set of classes in a
▪ No compile error – Solver errors are run time inheritance hierarchy
▪ Good practice – Put an assertion on randomize() to catch
solver errors
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Constraint_mode rand_mode()

▪ Turning off some constraints useful when creating

negative test cases/error scenarios

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pre_randomize()
post_randomize() Constraint operators

▪ Built in functions that can be overridden to perform any ▪ Any Verilog boolean expression
operations immediately before or after randomization
i.e. x < y+b-c*10>>20

▪ Other constraint operations

▪ set membership within
▪ implication -> or if…else…
▪ iterative constraint foreach
▪ variable ordering solve … before
▪ functions func_x()

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Set membership Distribution Constraints

▪ “inside “ construct – All values will have equal probability
▪ Specifies Weightage per Value in the set
▪ Two operators
▪ := operator assigns the specified weight to the item
or, if the item is a range, to every value in the
range.
▪ :/ operator assigns the specified weight to the item
or, if the item is a range, to the range as a whole
▪ A dist operation shall not be applied to randc variables.
▪ Why ?

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Distribution - Examples More examples

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Uniqueness Constraint Implication constraint

▪ Group of values can be constrained to have unique ▪ Uses one boolean to decide if another constraint must
values hold
▪ e.g – Generate an array with all elements as unique

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If..else constraint Loop/array constraints

▪ These are equivalent to implication constraint ▪ Iterative constraints - foreach

▪ Implication and if..else are bidirectional constraints

▪ E.g If length is less than 10 that will also imply
trans_size will be generated as SMALL

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Array reduction methods Ordering Constraint Solver

▪ Array reduction methods can be use in constraints ▪ All constraints are determined by
▪ E.g – Generate a byte array of size ==5 and the sum of all solver simultaneously
elements less than 1000
▪ In this example
▪ S can be 1 or 0 with a ½
probability
▪ D values have 2^32 values
▪ If one of D is picked first, then the
chance of S being picked as 1 is
very very less

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Ordering Solver Static Constraint block

▪ In above example, it makes sense to first solve S to have ▪ A constraint that is applicable to all instance of class
equal probability of both values generated.
▪ Has to be a separate constraint block

▪ Useful when turning off constraint in an object need

to turn off constraints in all instances
▪ Cannot create dependency (e.g Solve “s before d” and also
“solve d before s”)

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Functions in Constraints Soft constraints

▪ Functions can be used in constraints - but comes with
a lot of restrictions (Refer LRM before usage)
▪ By default constraints are “hard”
▪ Solver fails if it cannot satisfy all constraints
▪ Sometimes certain constrains need not be “hard”
▪ Some default constraints can be soft to be within a
guideline, but an actual implementation can
overwrite it

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Soft Constraints std::randomize()

▪ In case of multiple soft constraints, priority applies. ▪ Procedural invocation of constraint solver within a scope
▪ See LRM for detailed rules ▪ Randomize any variables not part of a class

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Using “with” constraints randcase

▪ Can also optionally have inline constraints ▪ Case statement with weightage based random
selection of a statement

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What components to build ?

•This is how the Testbench will look like

– Revisit our discussion in Section1 – Case Study
•This is what we need to build
Exercise 4 -Build TB Components – Class based Scoreboard/Checker

Test
Monitors Monitors

Packet
Generator Driver DUT

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What components to build ? Build following component

▪ A packet class that defines packet properties Step1: Implement a packet class with reference to below
framework and directions
▪ A random packet generator that can generate packets as
per our specification
▪ A driver that can take a packet at a time and drive as per
the protocol defined in the specification
▪ A monitor that can be instantiated on both input and
output ports which samples signals and creates a packet
class
▪ A scoreboard that can look at input packet and check if the
packet at output was received properly

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Build following in this Exercise Build following in this Exercise

Step2: Implement a packet monitor class with reference to Step3: Implement a packet checker class with reference to
below framework and directions below framework and directions

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What components to build ? Packet Generator

▪ In this exercise - build remaining components that Step1: Implement a Packet Generator class with a
was not done in previous exercise template as below and directions specified in comments
▪ Packet Generator on what to implement
▪ Packet Driver
▪ Add mailboxes to Packet Checker implemented
in previous exercise
▪ Add mailboxes to Packet monitor implemented
in previous exercise

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Packet Driver Extend Packet Monitor

Step2: Implement a Packet Driver class with a template Step3: Extend the Packet monitor class that was
as below and directions specified in comments on what implemented in previous exercise by adding a mailbox
to implement to put the monitored packets

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Extend Packet Checker

•Step4: Extend the Packet checker class that was

implemented in previous exercise by adding a mailbox Exercise 6 -Build Top level Test bench and
to receive packets from monitors Instantiate components
•Add the function calls to do the check on received
packets

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How to connect all together Implement a top level TB module

▪ In this exercise - build remaining components that •Step1: Implement a top level module as templated
was not done in previous exercise below. Follow directions to instantiate components
▪ Packet Generator
▪ Packet Driver
▪ Add mailboxes to Packet Checker implemented
in previous exercise
▪ Add mailboxes to Packet monitor implemented
in previous exercise

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Reference Top TB - Reference Top TB - continued

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Thank You
Ramdas M

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