Computer Organisation & Architecture

Course Code: CO206

Project Report
Topic: The ARM Architecture
Submitted By:

Gaurav Kr. Gautam

2K20/CO/166

Harsh Vardhan
2K20/CO/189
Nijdat Hasnain
2K17/CO/204

Submitted To:
Dr. Pawan Singh Mehra
Assistant Professor
(Department of COE)

Department of Computer Science & Engineering

Delhi Technological University

Rohini, Delhi-110042

(Govt. of NCT of Delhi)

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Certificate

I hereby certify that the project Dissertation titled “The ARM architecture” which is submitted
by Gaurav Kumar Gautam(2K20/CO/166), Harsh Vardhan(2K20/CO/189) and Nijdat
Hasnain(2K17/CO/204) student of B. Tech. (Computer Engineering, COE), Delhi
Technological University, Delhi in complete fulfilment of the requirement for the award of the
degree of the Bachelor of Technology, is a record of the project work carried out by the student
under my supervision. To the best of my knowledge this work has not been submitted in part
or full for any Degree or Diploma to this University or elsewhere.

Place: Delhi Dr. Pawan Singh Mehra

Date: 04/05/22
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Candidate’s Declaration

I, hereby, declare that the work embodied in this project entitled “The ARM Architecture”
submitted to the Department of Computer Science & Engineering, Delhi Technological
University, Delhi is an authentic record of my own bonafide work and is correct to the best of
my knowledge and belief. This work has been undertaken taking care of engineering ethics.

Gaurav Kumar Gautam(2K20/CO/166)

Harsh Vardhan(2K20/CO/189)

Nijdat Hasnain(2K17/CO/204)
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Acknowledgement

In performing our project, we had to take the help and guideline of some respected persons,
who deserve our greatest gratitude. The completion of this assignment gives us much pleasure.
We would like to show our gratitude to Dr. Pawan Singh Mehra, mentor for our project. Giving
us a good guideline for reporting throughout numerous consultations.

We would also like to extend our deepest gratitude to all those who have directly and indirectly
guided us in writing this assignment. Many people, especially our classmates and team
members, have made valuable comment suggestions on this proposal which gave us inspiration
to improve our assignment.

We thank all the people for their help directly and indirectly to complete our assignment. In
addition, we would like to thank the Department of Computer Engineering, Delhi
Technological University for giving us the opportunity to work on this topic.
 INDEX

S.No. Contents Page No.

1. Certificate i

2. Candidate’s Declaration ii

3. Acknowledgement iii

4. Abstract iv

5. Introduction 1

6. History of ARM series 2

7. Implementation/Methodology 3-8

8. Advantages of ARM architecture 9

9. Application 10

10. Conclusion 11

11. References 12
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Abstract

Acorn RISC Machine, later Advanced RISC Machine is widely used reduced instruction set computer
(RISC) family of computer processors, system on chip, system on module, smart phones, configured
for various environment.

The ARM architecture processor is an advanced reduced instruction set computing [RISC]
machine and it’s a 32bit reduced instruction set computer (RISC) microcontroller. It was
introduced by the Acron computer organization in 1987.

This ARM is a family of microcontroller developed by makers like ST Microelectronics, Motorola, and
so on. The ARM architecture comes with totally different versions like ARMv1, ARMv2, etc., and,
each one has its own advantage and disadvantages.
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Introduction

The ARM microcontroller stands for Advance RISC Machine and it is one of the extensive and
most licensed processor cores in the world. The first ARM processor was developed in the year
1978 by Cambridge University, and the first ARM RISC processor was produced by the Acorn
Group of Computers in the year 1985.

These processors are specifically used in portable devices like digital cameras, mobile phones,
home networking modules and wireless communication technologies and other embedded
systems due to the benefits, such as low power consumption, reasonable performance, etc.

The Arm architecture is a family of reduced instruction set computing (RISC)

architectures for computer processors. It is the most pervasive processor architecture in
the world, with more than 215 billion Arm-based chips shipped by our partners over the
past three decades in products ranging from sensors, wearables and smartphones to
supercomputers. Benefits of the Arm CPU architecture include:

• Integrated security
• High performance and energy efficiency
• Large ecosystem for global support
• Pervasive across markets and locations

It’s business model is based on licensing the ARM architecture to companies. Arm, by
comparison, offers a variety of products to partners like Apple, Samsung, and Qualcomm.
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History of ARM Series of Microcontrollers

❖ Architectural ideas developed in 1983 by Acorn computers

• To replace 8-bit6502 microprocessor in BBC computers
• The first commercial RISC implementation
❖ The company was founded in 1990
• Advanced RISC Machine (ARM)
• Initially owned by Acorn, Apple and VLSI
❖ It is one of the most widely used processor cores

❖ ARM design philosophy

• Small processor for lower power consumption (for embedded system)
• High code density for limited memory and limited physical size restrictions
• It can interface with slow and low-cost memory systems
• Reduced die size for processor to accommodate more peripherals
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Implementation/Methodology

ARM is based on RISC architecture and RISC supports simple but powerful instructions that
execute in a single cycle at high clock frequency.

❖ Major design features:

• Instructions: reduced set/single cycle/fixed length
• Pipeline: decode in one stage/no need for microcode
• Registers: a large set of general-purpose registers
• Load/store architecture: data processing instructions work on registers only

The ARM Architecture:

• Arithmetic Logic Unit

• Booth multiplier

• Barrel shifter

• Control unit

• Register file

Arithmetic Logic Unit (ALU)

The ALU has two 32-bits inputs. The primary comes from the register file, whereas the other
comes from the shifter. Status registers flags modified by the ALU outputs.

Booth Multiplier Factor

The multiplier factor has 3 32-bit inputs and the inputs return from the register file. The
multiplier output is barely 32-Least Significant Bits of the merchandise.

Barrel Shifter
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The barrel shifter features a 32-bit input to be shifted. This input is coming back from the
register file or it might be immediate data. The shifter has different control inputs coming back
from the instruction register. The Shift field within the instruction controls the operation of the
barrel shifter. This field indicates the kind of shift to be performed (logical left or right,
arithmetic right or rotate right).

Control Unit

For any microprocessor, control unit is the heart of the whole process and it is responsible for
the system operation, so the control unit design is the most important part within the whole
design.

• ARM7 architecture:
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Instruction pipelining in ARM:

Basic concepts of pipelining

A mechanism for overlapped execution of several input sets by partitioning some computation
into a set of k-sub stages. There is very nominal increase in the cost of implementation but
there is very significant speedup.

Suppose we want to attain k-times speedup for some computation:

• Alternative 1: Replicate hardware k-times then cost also goes up by k-times

• Alternative 2: Split the computation into k stages then there will be very nominal
increase in cost.
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Popular ARM Architecture:

• 3 pipeline stages (fetch/decode /execute)

• High code density/low power consumption
• One of the most used ARM-version (for low-end systems)

Compatible with ARM7

5 stages (fetch/decode /execute /memory /write)

Separate instruction and data cache

ARM10

6 stages (fetch/issue/decode /execute /memory /write)

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ARM Microcontroller Register Modes:

An ARM microcontroller is a load store reducing instruction set computer architecture means
the core cannot directly operate with the memory. The data operations must be done by the
registers and the information is stored in the memory by an address. The ARM cortex-M3
consists of 37 register sets wherein 31 are general purpose registers and 6 are status registers.
The ARM uses seven processing modes to run the user task.

• USER Mode

• FIQ Mode

• IRQ Mode

• SVC Mode

• UNDEFINED Mode

• ABORT Mode
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• Monitor Mode

Some of the registers are reserved in each mode for the specific use of the core. The reserved
registers are

• Stack Pointer (SP).

• Link Register (LR).

• Program Counter (PC).

• Current Program Status Register (CPSR).

• Saved Program Status Register (SPSR).

The reserved registers are used for specific functions. The SPSR and CPSR contain the status
control bits which are used to store the temporary data. The SPSR and CPSR register have
some properties that are defined operating modes, Interrupt enable or disable flags and ALU
status flag.
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Advantages of ARM Architecture

• Energy consumed is very low in the architecture and their design is such that with high

processing power, low energy to be consumed. Hence devices with high performance

prefer this architecture in the device.

• Cost of the architecture is very less when compared with others. This makes ARM

architecture popular among devices. Portable devices prefer this architecture for the

performance and low-cost model in the system.

• The pipeline used is simple and at a low power envelope, normal loads are managed.

• Nowadays, the architecture comes with 32-bit processor solutions and has control

systems in the system. Memory is protected and managed well and this helps to save

the physical space and the cost of the microprocessor. It is used in aviation,

automobile, industrial, mechanical, and many other industries with less complexity.
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Applications

It is one of the most widely used processor cores. It is one of the most licensed and thus widespread
processor cores in the world – Used in cell phones, multimedia players, handheld game console digital
TV and cameras handheld game console, digital TV and cameras

Some application examples:

ARM7: iPod

ARM9: BenQ, Sony Ericsson

ARM11: Apple iPhone, Nokia N93

It is mainly used in battery operated devices due to low power consumption and reasonably
good performance.
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Conclusion

Over the past decade Arm has won out as the choice for low power devices like smartphones.
The architecture is also making strides into laptops and other devices where enhanced power
efficiency is in demand.

ARM is widely used reduced instruction set computer (RISC) family of computer processors,
system on chip, system on module, smart phones, configured for various environment.

It’s Arm that is certain to remain the architecture of choice for the smartphone industry for the
foreseeable future. The architecture is showing major promise for laptop-class compute and
efficiency too.
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References

• https://www.educba.com/arm-architecture/
• https://www.csie.ntu.edu.tw/~cyy/courses/assembly/12fall/lectures/handouts/lec08_A
RMarch.pdf
• https://www.watelectronics.com/arm-processor-architecture-
working/#:~:text=The%20ARM%20architecture%20processor%20is,Acron%20comp
uter%20organization%20in%201987
• https://journal.buitms.edu.pk/j/index.php/bj/article/download/446/267