EEE8075 Electrical Engineering Project:

Flexible Inverter

Abdolvahid Tamimi
School of Electrical and Electronic Engineering

Abstract. The focus of this report is testing of a flexible inverter in three different modes; fixed duty
cycle, sinusoidal current generator and brushless DC motor drive. Also simulation was used to
investigate the flexible inverter acting as a single phase variable DC power supply and a variable
frequency AC power supply. The findings from this experiment provide analyses and results which
describe the construction of an electric drive.

Submitted 10th January 2013

 Introduction

1. Project aims
 To construct and test the inverter in order to analyse results which were captured during
the experiment.
 To simulate the inverter and observe the effect of varying the parameters of both load and
PWM.
 To evaluate the experiment’s results and simulation outcomes.
2. Brief procedure

Experiments in the laboratory are divided into the two main sections:

 PWM experiment which provides to observe a constant switching frequency.

 The experiment which provides to observe output of the inverter in presence of an ordinary
star connected 3-phase resistive-inductive load and BLDC Motor.
3. Circuit construction
Inverter is referred as a circuit that operates from a dc source and generates ac output. If the input dc
is a voltage source, the inverter is called a voltage source inverter (VSI) as the inverter in this project.
The BLDC motor consists of a stator, which Hi1 Hi2 Hi3
contains stator windings, and a rotor, on which J1 J3 BLDC
J5
permanent magnets are mounted. These magnets
supply field flux. The classic converter for the A

BLDC motor is nothing but a DC/AC 3-phase VDC C B

C
M
inverter, as shown in figur1. To switch the coils Lo1 Lo2 Lo3
Hall1
in the correct sequence and at the correct time, Hall2 Hall3
J2 J4 J6
the position of the rotor field magnet must be
known. For locating the rotor field magnets, an
absolute sensing system is required. An absolute Figure1-Three phase PWM1 PWM2 PWM3
inverter (VSI)
sensing system in this project consists of hall
sensors. The function of controller is to switch Controller

the right current in the right stator coils at the right time in the right sequence by taking the
information supplied by the hall sensors and processing it with programmed commands. However, the
switching frequency is variable. In order to have a constant switching frequency a pulse width
modulation technique can be used. The advantage is that the average of the applied voltage to the
motor terminals is directly controlled. Therefore, speed of the motor is directly controlled by changing
the duty cycle of the PWM switching scheme. The power electronic driver in this project is a
MOSFET-based inverter as shown below.

Laboratory test
Test1: PWM pulse test
Test description: Power inverters convert DC power to AC. There are several methods to do this.
The two main ways are square wave and pulse width modulation. The latter is the way which used in
this experiment. In this project unipolar PWM modulation were used. This type operates both switch
pairs at a high frequency [see Appendix]. An oscilloscope was used to capture pulses. Table 1
indicates the PWM pulse characteristics which were captured during first test.

Switch pair of Gate on Time on and PWM PWM Duty

phase A voltage time off frequency cycle

1
 J1 4.94 99.2 µs 10.08 KHz 12.1 %
J2 5 99.2 µs 10.08 KHz 87.1 %

Switch pair of Gate on Time on and PWM PWM Duty

phase B voltage time off frequency cycle
J3 4.94 99.2 µs 10.08 KHz 44.6 %
J4 5.06 99.2 µs 10.08 KHz 54.6 %

Switch pair of Gate on Time on and PWM PWM Duty

phase C voltage time off frequency cycle
J5 5 99.2 µs 10.08 KHz 74.6 %
J6 4.94 99.2 µs 10.08 KHz 24.6 %

Table 1- Characteristics of pulses for each phase A, B and C

Discussion of results and observations

It is observed that there is a slight time delay between the Hi pulse switching on and the Lo switching
off because of Dead-time effect. This effect is shown in figure1 for the phases A, B and C of inverter.
There should be delay time (Td) from the outgoing device to prevent a short-through fault. In this
experiment Dead-time equal to 400 ns were obtained.

Test2:Three phase sinewave generator

Test description: It is possible to supply a three-phase load by means of three single phase inverter
where each inverter produce an output displaced by 120° with respect to each other. In this test
voltage across of one resistance load were
captured by measuring the difference 10
Voltage generated
across the load

between V1 and 5
(V1 - V2)

0
V2. The voltage generated across the load is
1
8

50
15
22
29
36
43

57
64
71
78
85
92
99
shown in figure2. -5
-10 Figure 2
By using ohm law current flowing Time unite
through the load can be achieved. For three-
phase power dissipated we have:

𝑉м 5.8
𝑉м = 5.8 𝑣 , 𝑉ι = √3 𝑉м = 9.91 𝑣 , 𝐼ι = 𝐼м , = 𝐼м = = 0.12 𝐴
𝑅 47

𝑃 = √3𝑉ι 𝐼ι cos ∅ = 1.22 𝑊

Where м = 𝑉1 − 𝑉2 , 𝑉ι line voltage , 𝐼ι line current , P power dissipated and cos ∅ = 1 for R load.

𝐼𝑀
𝐼 = 𝐼м sin(𝜔𝑡) , 𝐼𝑟𝑚𝑠 = = 0.08 𝐴
√2

By altering frequency to its extreme it was investigated frequency of inverter can achieve to
maximum value of 19.65 KHz.

2
In Graph2 in appendix, PWM voltage and
frequency of generated voltage can be observed. Scope1
24

Constant1 Scope3

T
<= In1 Out1

Discussion of results and observations Repeati ng

Sequence1
Rel ati onal
Operator
F
Swi tch RL l oad Scope

0.5

The three load terminals are connected to three Constant Zero-Order

Hol d
0

Constant2

output points (A, B, C) of the inverter. With

reference to Figure1, it may be seen that for0 < Scope4 Scope2

𝜔𝑡 < 𝜋/3, switches J1, J2 and J4 conduct. For

balance resistive or inductive –resistive load it can J1
be calculated:
A
1 −2 1
𝑉𝐴𝑁 = 𝑉𝐷𝐶 , 𝑉𝐵𝑁 = 𝑉𝐷𝐶 , 𝑉𝐶𝑁 = 𝑉𝐷𝐶
3 3 3 J3

C
The load phase voltage waveforms for other switching combination DC
J4
may be found in a similar manner, however with lags by one third of
Figure3 – 3-phase
the output cycle period or 120° in the time (𝜔𝑡) frame. It should be B balanced load
obvious that the fundamental component of the phase voltage
waveform will constitute a balanced 3-phase voltage having a phase sequence A, B and C.

Test3: Brushless DC motor control

Each Hall effect sensor output is a high level for 180° of electrical rotation, and a low level for the
other 180°. The three sensors have a 60° relative offset from each other. This divides a rotation in to
six phases. The process of switching the current to flow through only two phases for every 60°
electrical degree rotation of the rotor is called electronic commutation [see graph3 in Appendix]. By
varying frequency (potentiometer) the motor speed rotational range was achieved (table2).As it can be
seen by increasing the frequency, the speed rotational will be increased.

Frequency(Hz) 28 51 93 134 169

Rotational speed(r.p.m) 420 765 1395 2010 2535
Table2-speed rotational range

For instance at 2000 r.p.m, motor is operating in 133.33 Hz, by taking into account that this is 8-pole
motor [see graph4 in Appendix].
𝑛𝑝
𝑓= = 133.33 𝐻𝑧
120
Where n is rotational speed and p is the number of poles per phase.

Another feature achieved during experiment was that duty cycle in all the frequency rang kept
constant (approximately 50%) as a result of constant DC input voltage (24v).

Simulation Test
Simulation1

This simulation was taken to investigate output of inverter (VSI) for constant DC references signal in
presence of RL load. The high frequency triangular carrier waveform is compared with the DC

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modulating signal and the comparator output is used to control the switches of the inverter. The
construction of block diagram can be observed in figure4, where assumed that Triangle wave carrier
amplitude is varying between 0 and 1 with a frequency 20 KHz, L=3.3 mH and R=47 ohm.

The output current of RL load can be achieved by

the following equation: Figure 4

𝑣(𝑡) 𝑅𝑡
𝑖(𝑡) = (1 − 𝑒 − 𝐿 )
𝑅

Where 𝑣(𝑡) is input which can be either 0 or 24. The output base
on these assumptions is shown in figure5. The stable value of i(t)

for those assumptions is 0.51 A.

Figure5- current waveform L=0.0033 mH,
Varying L : By increasing L the current can be seen in figure f=20 KHz, ref=0.5

(8). The difference between two graphs comes from the

difference between their time-constant
𝐿
(𝜏 = ). Time-constant for three different L can be seen in table
𝑅
(3).

L 0.0001 H 0.0011 H 0.0033 H

𝜏 0.002 ms 0.02 ms 0.07 ms
Table 3 – Time-constant value

As the frequency of input is equal to carrier’s frequency (20 KHz), the time period for RL load input
is equal to:

1 1
𝑇= = = 0.05 𝑚𝑠
𝑓 20𝐾𝐻𝑧

In figure 6-B, the RL load responds to its input and reaches to 0.51 A.
Graph B shows the response of a 2.12 µs time for a 50 % duty cycle. There's an enormous ripple, but
it responds to the change in 0.5ms. However, graph A is a 0.234 µs time. Still some ripple but it
responds to the change in 0.2ms. Further increasing 𝜏 will decrease ripple further and increase
reaction time. It all depends on how much ripple you can afford and how fast you want the filter to
react to duty cycle changes.

(A) (B)

Figure 6- current waveform (A) for L=0.0011, (B) for L=0.0001

Varying the duty cycle : By increasing the duty cycle of the reference input the input duty cycle will
be increased which results in a constant input for RL load as if load is supplying by constant 24 v
source(figure7).

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 Ref=0.6 Ref=0.9 Ref=1

Figure7 – Varying duty cycle of input signal

Varying the frequency of carrier: Higher carrier frequency makes the output smoother so in lower
frequency more current ripple can be observed (figure8).

Frequency=10 KHz Frequency=50 KHz Frequency=100 KHz

Figure8 – Varying frequency of carrier

Simulation2

This simulation was taken to investigate output of inverter (VSI) for variable frequency AC references
signal in presence of RL load. In Sine-PWM inverter, in this simulation, the widths of the voltage
pulses vary in sinusoidal manner. The scheme involves comparison of a high frequency triangular
carrier voltage with a sinusoidal modulating signal that represents the desired fundamental component
of the voltage waveform. The peak magnitude of
the modulating signal should remain limited to the 24
Scope1

peak magnitude of the carrier. The construction of Constant1 Scope3

block diagram can be observed in figure9, where Repeati ng

Sequence1
<=

Rel ati onal

Operator
F
Swi tch
In1

RL l oad
Out1

Scope

assumed that Triangle wave carrier amplitude is Si ne Wave

Figure9 Zero-Order 0
Hol d

varying between -1 and 1 with a frequency 10 Constant2

KHz, L=3.3mH , R=47 ohm and input reference

Scope4 Scope2

frequency 50 Hz which its amplitude is varying

between 1 and -1.

Varying L: As it was discussed for DC modulating the current wave forms in inductive loads have
less higher order harmonics distortion than the corresponding distortion in the square wave voltage
waveform. It can be seen that the load current waveform repeats at fundamental frequency and the
higher order harmonics distortion reduce as the load becomes more inductive (figure10).

A B C

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 Figure10- (A) L=0.0033mH, (B) L=0.033mH, (C) L=3.3mH

Varying the frequency of carrier: With a sufficiently high carrier frequency the high frequency
components do not propagate significantly in the load due the presence of the inductive elements, as a
result the output sinusoidal waveform becomes less distorted (figure11). However, a higher carrier
frequency does result in a larger number of switching per cycle and hence in an increased power loss.

F=1 KHz F=2 KHz F=4 KHz

Figure11 - Varying the frequency of carrier and PWM voltage

Varying reference frequency : The frequency of modulating signal should be several orders lower
than the frequency of the carrier signal in order to have a constant magnitude of modulating signal
over any particular carrier signal time period. The essential advantage of having a very high carrier
frequency, in comparison to the modulating wave frequency, is that The useful fundamental frequency
component of voltage and the unwanted harmonics (having frequencies close to the carrier and
multiples of carrier) are far apart on the frequency spectrum and one can virtually filter away the
harmonics voltage by putting a suitable low pass filter which could be a RL load, like this project.

( figure14)

F=50 F=70 Hz

Figure11 – varying reference frequency

Discussion of results and observations

The square wave load voltage consists of all the odd harmonics and their magnitudes are inversely
proportional to their harmonic order. Accordingly, the magnitudes of very high order harmonics
voltages become negligibly small. In most application, only the fundamental component in load
voltage is of practical use and the other higher order harmonics are undesirable. Many of the practical
loads are inductive with inherent low pass filter type characteristics. The current wave forms in such
loads have less higher order harmonics distortion than the corresponding distortion in the square wave

6
voltage waveform. It can be seen that the load current waveform repeats at fundamental frequency
and the higher order harmonics distortion reduce as the load becomes more inductive.

Project conclusion
This report explores the design and operation of a low flexible inverter. The inverter was first built,
followed by the control software being programmed. Each component was soldered and connected
onto a prototype board. A microchip programmer with its respective software was needed. Also, the
program had to be coded such that our complex switching scheme is achieved. After verifying the
control signals, the controller is connected to the overall circuit via the drivers. The following
conclusions can be achieved through the laboratory tests:

 The voltage waveform of PWM inverter changes polarity several times during each half cycle
so the instantaneous magnitude of voltage waveform remains fixed at half the input DC
voltage. In VSI, meant to feed to an inductive type load, the upper and lower switches of
inverter conduct in a complementary manner. Both upper and lower switches should not
remain on simultaneously as this will cause short circuit across the dc bus.
 For most practical loads only the fundamental component of the inverter output voltage is of
interest. However the inverter output also contains significant high order harmonic voltage.
Since most loads are inductive in nature with a low pass filter type characteristics the effect of
very high order harmonics may be neglected.
 In PWM inverter the magnitude of fundamental output voltage is fixed by suitable pulse
width modulation. However, the reduction in fundamental magnitude leads to increase in the
r.m.s magnitude of unwanted ripple voltage.
 In BLDC motors high speed can be achieved by increasing the frequency of inverter which
increases power dissipated in inverter as a result of high frequency switching.
 It was investigated that in all practical inverter with the constant time on and variable time off
duty cycle PWM, the switch is turned on when the carrier signal intersects with the reference,
at which point the carrier signal goes up. The switch is then kept on for a fixed time (Ton)
again before the next switching cycle starts. The off-time changes with the reference and the
switching frequency increases with the decrease in the reference level, resulting in a variable
frequency operation when the reference varies.
After confirming its operation through laboratory tests, the simulation results were obtained. The
following conclusions can be achieved through the results:

 The peak magnitude of the sinusoidal or constant signal is less than peak magnitude of
carrier.
 The frequency of modulating signal should be hold several times lower than carrier signal. A
typical figure will be 50Hz and 20KHz for modulating and carrier signal, respectively. Under
such a high ratios, the magnitude of modulating signal will be constant over carrier signal
time period.

Appendix

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 Phase A

Phase B

Phase C

Graph1- PWM pulses for each phase (left figure) Dead time appearance for each phase (right figure, Td=400 ns)

Graph2 - PWM voltage and frequency

hall1
6.00E+00
Hall sensor output1

4.00E+00
2.00E+00
0.00E+00
-2.00E+00 1 3 5 7 9 11131517192123252729313335373941434547
1 mechanical cycle

8
 hall2
6.00E+00

Hall sensor output2

4.00E+00

2.00E+00

0.00E+00
1 3 5 7 9 11131517192123252729313335373941434547
1 mechanical cycle

hall3
6.00E+00
5.00E+00
Hall sensor3

4.00E+00
3.00E+00
2.00E+00
1.00E+00
0.00E+00
1 4 7 10 13 16 19 22 25 28 31 34 37 40 43 46
1 mechanical cycle

Graph3 – Hall effects’ output

Graph4 - phase A voltage at 2000 r.p.m

References

Electrical Machines, Drives and Power Systems Author: Wildi, T.

Power Electronics and AC Drives Author: Bose, B.K.

DESIGN OF A HIGH-LOW UNIPOLAR PULSE WIDTH MODULATED INVERTER: By Danny Li and Christian Ramos

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