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StudentName: Naman Goyal

UID: 20BCS4357
Branch: CSE
Section/Group:20ECP-156B
Subject Name-Digital Electronics

AIM
To design and verify operation of half adder and full adder.

REQUIREMENTS
IC 7408 (AND gate ) , IC 7486 (XOR gate) , IC 7432( OR gate) , Power supply , LED, resistor
and breadboard .

THEORY
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Half-Adder: A combinational logic circuit that performs the addition of two data bits, A and
B, is called a half-adder. Addition will result in two output bits; one of which is the sum bit,
S, and the other is the carry bit, C. The Boolean functions describing the half-adder are:

SUM =A XOR B CARRY = A B

Full-Adder: The half-adder does not take the carry bit from its previous stage into account.
This carry bit from its previous stage is called carry-in bit. A combinational logic circuit that
adds two data bits, A and B, and a carry-in bit,
Cin, is called a full-adder. The Boolean functions describing the full-adder are:
SUM= A XOR B XOR C CARRY = AB+ (A XOR B)C
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Circuit diagram/ Block diagram

HALF- ADDER
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TRUTHTABLE-

FULL- ADDER
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TRUTHTABLE

PROCEDURE:
● Check the components for their working
● Insert the appropriate IC in to the IC base ● Make
connections as shown in the circuit diagram.
● Verify the Truth Table and observe the outputs.
SIMULATION RESULTS:
FOR HALF ADDER
1.A=1 and B=1 ; CARRY =1 (HIGH)
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2. A=1 and B=0 ;SUM=1 (HIGH)

FOR FULL ADDER

1.A=0 , B=0 and C=1 ; SUM =1 (HIGH)
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1.A=1 , B=0 and C=1 ; CARRY =1 (HIGH)

RESULT:
The truth table of minimized Boolean expression is verified.
LEARNING/ OBSERVATION
In this experiment, we observe that truth table is verified by use of switches.

TROUBLESHOOTING
No troubleshoot is occurred during the verification.
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EVALUATION COLUMN (To be filled by concerned faculty only)

Sr. No. Parameters Maximum Marks
Marks Obtained
1. Worksheet Completion including 10
writing learning objective/ Outcome
2. Post Lab Quiz Result 5

3. Student engagement in Simulation/ 5

Performance/ Pre Lab Questions
4. Total Marks 20