Professional Documents
Culture Documents
Strain gauge
1
SG1 Vibration
V
Flexure
Strain
gauge2
SG2
Ketika Flexure terdeflexi akibat gerak vibrasi benda kerja, maka nilai hambatan strain gauge 1
dan 2 akan berubah sebanding dengan defleksi yang terjadi karena perubahan percepatan
pada benda kerja. Perubahan hambatan ini kemudian disambungkan dengan bridge sirkuit
yang menghasilkan tegangan mengikuti persamaan sbb
V R3 V SG2
V
R1 R3 SG1 SG2
Sampling Definition
Sampling Theorem
Nquist theorem :
𝑓𝑠 ≥ 2𝑓𝑚
Dimana
fs = number of sampling
(sample/s)
fm = maximum frekuensi (cycle/s)
𝑓𝑚
Sampling rate = 𝑓𝑠
Jika diketahui
f = 90 cycle/second
fs = 1000 sample/second
Jika diketahui
f = 90 cycle/second
fs = 280 sample/second
Jika diketahui
f = 90 cycle/second
fs = 95 sample/second
Aplikasi fmax fs
Operation
Reset and Start Counter
DAC convert Digital output of Counter
to Analog signal
A clock generated pulse
Binary counter generates an n bit
digital output which is applied as an
input to the DAC
Compare Analog input and Output of
DAC
• VA> VDAC
– Continue counting
• VA < VDAC
– Stop counting
Digital Output = Output of Counter
Disadvantage
Conversion time is varied
• 2n Clock Period for Full Scale input
Comparator Principles
Contoh soal ADC
Advantages Disadvantages
Operation T1
Integrate 0 vi dt
t2
Reset and integrate
Thus T v
0
Vr dt
1 i ( AVG ) t2Vr
t2
vi ( AVG ) Vr
T1
Applications
DPM(Digital Panel Meter),
DMM(Digital Multimeter), …
VS=-VA/RC×t1
VS=Vref/RC×t2
Vref/RC×t2=-VA/RC×t1
VA=-Vref×t1/t2
Kelebihan dan kekurangan
Dual Slope Integrating ADC
Excellent Noise Rejection
High frequency noise
cancelled out by integration
Proper T1 eliminates line
noise
Easy to obtain good
resolution
Low Speed
If T1 = 60Hz, converter
throughput rate < 30
samples/s
Contoh Dual Slope
For example, consider the clock frequency is 1 MHz, the reference voltage
(Vref) is -1 V, the fixed time period t1 is 1 ms and the RC time constant is also
1 ms.
Assuming the unknown analog input voltage amplitude as VA = 5 V, during
the fixed time period t1 , the integrator output Vs is
VS = -VA/RC × t1= (-5)/1 ms × 1 ms=-5 V
During the time period t2, ramp generator will integrate all the way back to 0V.
t2 = VS/Vref × RC = (-5)/(-1) × 1 ms = 5ms = 5000μs
Hence the 4-bit counter value is 5000, and by activating the decimal point of
(most Significant Digit) MSD seven segment displays, the display can directly
read as 5 V.
VS=-VA/RC×t1
VS=Vref/RC×t2
Vref/RC×t2=-VA/RC×t1
VA=-Vref×t1/t2
Advantages and Disadvantages
Advantages Disadvantages
Flash_ADC.ewb
Advantages and Disadvantages
Advantages Disadvantages
Very fast Needs many parts
(255 comparators
for 8-bit ADC)
Lower resolution
Expensive
Large power
consumption
Advantages AND Disadvantages
Misal
Check
Convert basis 8 ke basis 10
Misal
OCTA NUMBER 22 = 4 21 = 2 20 = 1 68 = 1102
0 0 0 0 48 = 1002
1 0 0 1 78 = 1112
2 0 1 0 dst
3 0 1 1
4 1 0 0
5 1 0 1
6 1 1 0
7 1 1 1
ADC on EWB
MSB = D7 adc_basic.ewb
LSB = D0
Kenapa keluar 7F H lihat bab DSC (digital signal conditioning)
Explanation
0111 1111
= 1 × 23 + 1 × 22 + 1 × 21 + 1 × 20
= 8 + 4 + 2 + 1 = 15 FH
= 0 × 23 + 1 × 22 + 1 × 21 + 1 × 20
= 0 + 4 + 2 + 1 = 7 7H
How It is works?
1. The computer reads the EOC to check the ADC is busy or not.
2. If the ADC is not busy when the computer selects the input channel
and send out the “Start” signal. Otherwise, step (1) is repeated.
3. The computer monitors the EOC.
4. When the EOC is activated, the computer reads the digital output.
When there is more than one ADCs being linked to the computer, they
can be connected in parallel. Using the ‘output enable’ can do the
selection of ADC output.
How to select and use an
ADC
Range of commercially Guidelines for using
available ADCs ADCs
Use the full input range of
the ADC
Use a good source of
reference signal
Look out for fast input
signal changes
Keep analog and digital
grounds separate
Minimize interference and
loading problem
Selection of ADC
n 8
Tc 4 10 6
s 4 s
f 2 10 6
Solution:
1
Percentage resolution = n
100%
2
For n = 12,
Percentage resolution =
1
12
100% 0.0244% 244ppm (part per million)
2
An example of ADC (1/3)
9.84375
𝑔𝑎𝑖𝑛 = = 15.14
0.65
An example of ADC (3/3)