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One scripting language without which it will be very difficult to survive in VLSI Industry, Enter
that would definitely be TCL (Tool Command Language). TCL is widely used everywhere
Search This Blog
in the VLSI industry because many tools are based on the tcl. We can directly interact with
Search
the tool using tcl CLI (Command Line Interpreter).
Deliv
Labels It has been observed that many beginners initially hesitate to start the TCL scripting. Most
2-bit flops
of the cases user know the basic tcl commands but how to connect all them and create a
Antenna effect script is the only problem. I would say even you know some basic tcl commands you can Followers
AOCV start writing your own script for your day to day requirements. Most important this is Followers (174)
ASIC BEGIN the process of writing the script. Here I am presenting 20 common tcl syntax which
ASIC Design flow I use frequently in my tcl scripting and hope it will help you to break the ice. Improvement
ASIC Flow and prefection will come as you practice but start is the most important. These 20 syntax
Best 25 books for VLSI will definitely help you lot to start and improve your tcl scripting a lot.
Books for Physical
Design
Books/Articles
Follow
Boundary Cell
Boundary timing 1. foreach loop
CAD tools Use:
Subscribe on YouT
ccopt file Where we have to iterate on each element on a list of elements and have to perform some
Team V
Clock gating operation on each element.
Yo
Crosstalk Syntax:
Crosstalk Delay foreach var $Var_list {
Crosstalk Noise
//operations for each $var
Popular Posts
Crosstalk Prevention
}
CTS
Example:
CTS Constraints
D flip flop
Supposed we want to print all the macros instance name, reference name and total count
d latch of macro in a block.
Decap Cells set macros [dbGet [dbGet top.insts.cell.baseClass block -p2].name]
(Parametric On
DEF file in vlsi set i 0
DFT Interview question foreach macro $macros {
ECO set refName [dbGet top.insts.name $macro -p].cell.name
ECO Cycle puts "$macro - $refName "
ECO file
incr i
EDA companies how t...

}
EDA Tools
puts total macro count = $i
Electromigration Effect
End Cap Cell
Engineering Change
2. Nested foreach loop
Order Use:
Fence If we have to iterate on each element of a list and then further we need to iterate on each Design flow as
files in VLSI parameters associated with the element.
FinFET
Syntax:
Floor plan rules

foreach i $list1 {
Floor plan strategies

//list2 is derived based on $i
Floorplan
Global placement
foreach j $list2 {
VDD and p-sub

Guide //operations on $j
High Fanout Net }

End Cap Cells
Synthesis There are high
}
gate of standar
https://www.teamvlsi.com/search/label/tcl scripting 1/7

12/25/21, 2:07 PM Team VLSI
ICG Cell Example:
Input Delay Suppose we have to find the list of feedthrough pins and the total numbers of feedthrough
Input files
pins in each edge of a rectilinear block. A script can be written like this for that.
Input files for physical

design
Integrated Clock set edges [dbget top.terms.edge -u]
Gating set i 0
Interface Timing foreach edge $edges {
Interview Guidance
set j 0
Interview Guidence
foreach pin [dbget [dbget top.terms.edge $edge -p].name ft* ] {
supported by a
Interview Section
puts "$edge $pin"
Interview tips
IO Interface Analysis
incr j
IO timing }
IR Drop Analysis puts "$edge : total ft pin count = $j"
IR drop prevention incr i

requirement in
Issues in VLSI }
Latch-up issue puts "Toal edge of block = $i"

LEF file
LIB file
3. for loop
Linux
Use:
linux basic commands
Where we want to repeat a loop in between a certain start and endpoint with a certain care of on chip
Linux Commands
List of EDA tools
increment
Low power techniques Syntax:
macro placement for {initialization}{condition}{increment} {
MBFF statements
MediaTek PD } associated to i.
questions
Example:
mmmc file
Suppose we want to know the metal layer's width and pitch of all metal from M5 to M10 in
Multi-bit flops
Multibit flops
innovus tool.
OCV
on chip variation for {set i 5}{$i <= 10}{incr i}{
antenna effect o
Output Delay set width [dbGet [dbGet top.head.layers.name M{$i} -p].minWidth]
PD Interview set pitch [dbGet [dbGet top.head.layers.name M{$i} -p].pitchX]

PD interview questions puts "M{$i} $width $pitch"
Blog Archive
for experienced
} ▼
2021
(19)
▼
Physical design flow

▼
November
(
▼
Physical Design Inputs

Input Files R
Physical design Stages
interview question
Physical Design ►
September
►
4. Nested for loop

Interview Questions
►
August
(5)
►
Physical Verification
Same as above example only syntax change and one loop in running inside another loop.
questions Syntax:
►
July
(1)
►
pin placement for {initialization}{condition}{increment} {

►
June
(2)
►
placement
for {initialization}{condition}{increment} {
►
May
(1)
►
Placement in Physical
Design
statements
►
April
(3)
►
Placement Steps
}
►
February
(3
►
PnR flow } ►
2020
(37)
►
POCV
pre placement stage 5. while loop
Follow on Faceboo
pre-placement Use:
activities
When we need to repeat a loop until a particular condition is true.
Tea
PrimeTime
Recommended Books
Syntax:
983 li
Redhawak
while {condition} {
Region //statements
Sanity Checks }
Like Page
SBFF Example:
Scan chain reorder Suppose we need to read all the lines of a file one by one and store is a variable
schematics of flip flop dynamically.
and latch
Scripting
SDC file
set fp [open my_report.tcl r]
set_input_delay while {[gets $fp data] >= 0} {
set_output_delay if {[regexp "VIOLATED" $data]} {
Short Topics //desired statement for operation
Signal Integrity }
SignOff }
SignOff Tool
Signoff Tools 6. if-else conditions
Spare Cells
Use:
STA
When we want to do something if certain condition is true. We can either put else
standard cell
statement or skip it.
Standard cell layout

Standard Cell Library
Syntax:
if {bolean_condition} {

12/25/21, 2:07 PM Team VLSI
Synopsys tool //statements
tap cells } else {
tcl scripting //Statements
teamVLSI
}
temperature inversion
temperature inversion
in VLSI Example:
tie cell Suppose we need to convert SVT cell to ULVT cell.
tie high cell

tie low cell if {[regexp SVT $cell_ref]} {
Timing Window
Analysis
set eco_ref [regsub {SVT} $cell_ref "ULVT"]
Tool instalations
}
TSMC 7nm Technology
node 7. if-elseif... else condition
TSMC Process nodes Use:
comparision
When we want to check another if condition if one prior if condition is not true.
Tweaker
Syntax:
VLSI
VLSI Books
if {bolean_condition} {
VLSI Concepts //statements
VLSI Flow } elseif {bolean_condition} {
VLSI Interview //Statements
vlsi interview question } else {
VLSI Interview //statement

Questions
}
VLSI Tools
Well Tap Cell
working of flip flop and
Example:
latch Suppose we need to read a report file inside a script and generate an eco file in which if
Written Test VLSI there is Weak Driver then need to upsize the driver from D1--> D3, D2-->D4 and D3-->D5.
Questions
We can write script as follow.
Total Pageviews
set fp [open existing.rpt r ]
set fp1 [open new_ecofile w+]
while {[gets $fp data] >= 0 } {
398,067
if {[regexp "Weak Driver" $data]} {
set inst [lindex $data 7]
Contributors
set cell [lindex $data 8]
Team VLSI if {[regexp D1BWP $cell]} {
soumya ranjan regsub "D1BWP" $cell "D3BWP" newCell
panda
} elseif {[regexp D2BWP $cell]} {
regsub "D2BWP" $cell "D4BWP" newCell
} elseif {[regexp D3BWP $cell]} {
regsub "D3BWP" $cell "D5BWP" newCell

}
if { [ info exists newCell ]} {
puts $fp1 "ecoChangeCell -inst {$inst} -cell $newCell"
}
close $fp
close $fp1
8. Arithmetic operations
Use:
When we need to add/subract/multiply/devide some numbers
Syntax:
set s [expr $a + $b + $c]
set d [expr $a - $b ]
set m [expr $a * $b]
set d1 [expr $a / $b ]
Example:
If we need to know, how much space will take a 4X, a 8X and a 16X decap cell together.
set cell4X [dbget [dbget head.libCells.name $decap4 -p].size_x -u]
set distX [expr $cell16X + $cell16X + $cell4X]
puts $distX

12/25/21, 2:07 PM Team VLSI
Note: Be careful like in the following cases
like:
>expr 3/2
>1
>expr 3/2.0
>1.5
9. regexp
Use:
To match the regular expression. Regular expression has a wide list, we will see only few
which we use mostly.
Syntax :
regexp {pattern} $string
Example:
Suppose we want to change the D1, SVT cell to D2, LVT we can check the cell with
regexp and then we can perform regsub for substitution and generate an eco file.
if {[regexp {D1BWP240H11.*PDSVT} $clock_cell_ref]} {
regsub {D1BWP240H11} $clock_cell_ref {D2BWP240H8} new_clock_cell_ref
regsub {PDSVT} $new_clock_cell_ref {PDLVT} new_clock_cell_ref
puts $fp_w "ecoChangeCell -inst $clock_cell -cell $new_clock_cell_ref"
10. regsub
Use:
To substitute the regular expression
Syntax:
regsub {old_pattern} $string {new_pattern} new_string_name
Example:
As explained in the regexp section
11. Reading a file

Use:
Many times we have to read a report file inside the tcl scripting to make some fixes based
on the violation reported. We read the file line by line and store the data in a file pointer
variable dynamically.
Syntax:
set fp [open existing_file_name r]
Example:
we can read a file line by line in a variable like this.
set fp1 [open $old r]
while {[gets $fp1 data] >= 0 } {

// $data variable will get string line by line of old file
}
close $fp1
12. Writing a file

Example:
We can write a file and close that as follow.
set fp2 [open $new w+]

puts $fp2 "Whatever we want to write in file will go line by line"
close $fp2
13. proc
Use:
If we need to use a few lines of code, again and again, we can make a proc using those
codes and can call easily by the proc name. No need to write code every time.
Syntax:
proc proc_name {} {
// lines of code

12/25/21, 2:07 PM Team VLSI
}
proc_name
Example:
If we need to find the basic details of a block, we can write a proc something like this.
proc blockInfo {} {
puts "Block name: [dbget top.name]"
puts "All Layers: [dbget head.layers.name]"
puts "Block Area: [dbget top.fPlan.area]"
puts "Box size: [dbget top.fPlan.box_size]"
puts "Boxes: [dbget top.fPlan.boxes]"
puts "Toatl pins: [dbget top.numTerms], Inputs - [dbget top.numInputs], Outputs -

[llength [dbget top.terms.isOutput 1 -p]]"
puts "Macro Count: [llength [dbget top.insts.cell.baseClass block -p2]]"
// Many more parameters can be added
We just need to source above file and call the proc blockInfo proc, it will display all the
above info of block.
14. proc with arguments

Use:
Sometimes we need to pass some arguments in proc and we want the result of proc
based on user argument.
Syntax:
proc proc_name { arg1 arg2 arg3 ...} {
// lines of code
proc_name arg1 arg2 arg3
Example:
Suppose we want to write a general proc in which if we pass the net_name, it should
return the net_length of that particular net. We can write that as follow.
proc netLength {net_name} {

set net_length 0
set net_wires_length [dbget [dbget top.nets.name $net_name -p].wires.length]
foreach i $net_wires_length {
set net_length [expr $net_length + $i]
}
puts $net_length
Note:
We can also set a default value of the proc argument. So in case the user does not pass
the argument value, proc will take the default value.
Syntax:
proc proc_name {{arg1 10} {arg2 20}} {
set a $arg1
set b $arg2
// More statements
So if we call the proc like
proc_name
it will take the default value of arg1 and arg2 and will set a 10 and set b 20.
But if we call this proc like
proc_name 50
It will set a 50 and b 20
we can also call like
proc_name 50 45
In the above way proc will set a 50 and b 45
15. exec

12/25/21, 2:07 PM Team VLSI
Use:
To use bash command inside tcl script
Syntax:
exec date
Example:
set timestamp_prefix [exec date +%m%d_%H_%M]
16. dbGet/dbSet/dbQuery
Use:
These are the innovus tool-specific commands, and widely used in innovus tool related
scripting.
Syntax and Examples will be discussed in a separate article.
The link will made available here [Not now].
17. list operations

Use:
There are various list operations, all are important in various way and frequently used.
Syntax:
llenght, lappend, lindex, lreplace, lset, lsort etc.
Example:
Kindly do the man command for more details
18. alias
Use:
To shorten a long command or a command with its switches to a short command.
Syntax:
alias short_commad "original_commad"
Example:
alias si "selectInst"
alias sn "selectNet"
19. grep
Use:
To find the particular pattern
Syntax:
exec grep "pattern" $file_name

egrep and zgrep are also used in place of grep.
Example:
Will discuss in details in a separate article
Link [Not now]
20. sed
Use:
sed is called stream editor, it can do lots of tasks. we use generally sed to replace or
delete a particular pattern in a file or string.
Syntax:
exec sed
Example-1:
If we want to replace a line having particular unique pattern completely by another line .
We can do that like folow.
exec sed -i "s|Pattern .*|$new_line|" $file_name
Example 2:
If we want to write some lines of code which are stored in a file just after a line having
some uniqe pattern. we can do that as follow
set num [exec sed -n "/^Source Script.*/=" $file_name ]

incr num
exec sed -i "$num r $script_file" $file_name

12/25/21, 2:07 PM Team VLSI
Example 3:
If we want to delete all lines having a unique pattern
exec sed -i "/DEL*/d" $file_name
Note: grep, sed and awk is a very handy command for various operations, these
commands has explained in more details in the following article.
Link [Not available now]
Thank You.
Posted by
Team VLSI
at
12:39 AM
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12/25/21, 2:07 PM Team VLSI

Linux Scripting EDA Tools Interview Section Books/Articles Video Tutorials

Crosstalk Delay foreach var $Var_list {

Decap Cells set macros [dbGet [dbGet top.insts.cell.baseClass block -p2].name]

DFT Interview question foreach macro $macros {

ECO set refName [dbGet top.insts.name $macro -p].cell.name

ECO Cycle puts "$macro - $refName "

EDA companies how t...

Floor plan rules

Floor plan strategies

VDD and p-sub

High Fanout Net }

https://www.teamvlsi.com/search/label/tcl scripting 1/7

Input files for physical

Interface Timing foreach edge $edges {

IR Drop Analysis puts "$edge : total ft pin count = $j"

IR drop prevention incr i

Latch-up issue puts "Toal edge of block = $i"

PD Interview set pitch [dbGet [dbGet top.head.layers.name M{$i} -p].pitchX]

Physical design flow

Physical Design Inputs

4. Nested for loop

pin placement for {initialization}{condition}{increment} {

set_input_delay while {[gets $fp data] >= 0} {

set_output_delay if {[regexp "VIOLATED" $data]} {

Short Topics //desired statement for operation

Standard cell layout

https://www.teamvlsi.com/search/label/tcl scripting 2/7

tap cells } else {

tcl scripting //Statements

tie cell Suppose we need to convert SVT cell to ULVT cell.

tie high cell

VLSI Concepts //statements

VLSI Flow } elseif {bolean_condition} {

VLSI Interview //Statements

vlsi interview question } else {

VLSI Interview //statement

set fp1 [open new_ecofile w+]

while {[gets $fp data] >= 0 } {

set inst [lindex $data 7]

Team VLSI if {[regexp D1BWP $cell]} {

soumya ranjan regsub "D1BWP" $cell "D3BWP" newCell

regsub "D2BWP" $cell "D4BWP" newCell

} elseif {[regexp D3BWP $cell]} {

regsub "D3BWP" $cell "D5BWP" newCell

if { [ info exists newCell ]} {

puts $fp1 "ecoChangeCell -inst {$inst} -cell $newCell"

When we need to add/subract/multiply/devide some numbers

set s [expr $a + $b + $c]

set m [expr $a * $b]

set cell4X [dbget [dbget head.libCells.name $decap4 -p].size_x -u]

set cell8X [dbget [dbget head.libCells.name $decap8 -p].size_x -u]

set cell16X [dbget [dbget head.libCells.name $decap16 -p].size_x -u]

set distX [expr $cell16X + $cell16X + $cell4X]

https://www.teamvlsi.com/search/label/tcl scripting 3/7

Note: Be careful like in the following cases

regexp {pattern} $string

if {[regexp {D1BWP240H11.*PDSVT} $clock_cell_ref]} {

regsub {D1BWP240H11} $clock_cell_ref {D2BWP240H8} new_clock_cell_ref

regsub {PDSVT} $new_clock_cell_ref {PDLVT} new_clock_cell_ref

puts $fp_w "ecoChangeCell -inst $clock_cell -cell $new_clock_cell_ref"

To substitute the regular expression

regsub {old_pattern} $string {new_pattern} new_string_name