722 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 19, NO.

3, MAY 2004

Limits of the Neutral-Point Balance in

Back-to-Back-Connected Three-Level Converters
Josep Pou, Member, IEEE, Rafael Pindado, Member, IEEE, Dushan Boroyevich, Member, IEEE, and
Pedro Rodríguez, Member, IEEE

Abstract—This paper explores the limits of neutral-point cur-

rent control in back-to-back connected three-level converters. The
theoretical analysis used is based on a mathematical neutral-point
current model, which can be extended to apply to converters with
higher numbers of levels. The low-frequency ripple, which appears
in the neutral-point voltage for some operation conditions, can be
removed for an extended operating area when two converters are
connected back to back to the same dc bus. As a consequence, a
lower voltage is applied to the devices, and the value of the capaci-
tors can also be significantly reduced. Some practical graphics are
given to represent the design according to the specifications of the
application.
Index Terms—Active front end, back-to-back connection, multi-
level, neutral-point balance, space-vector modulation, three-level.

Fig. 1. Topology of the three-level NPC converter.

I. INTRODUCTION
Fig. 1 shows the topology of the three-level neu-
tral-point-clamped (NPC) converter, which in recent years has
attracted attention for its potential use in high-power applica-
tions. To take full advantage of this converter, the voltages of
the two series-connected dc-link capacitors must be confined
to one half the level of the dc-link voltage. Several publications
discuss ways to solve this balance problem [1]–[5]; however,
this objective cannot be achieved when operating with a
high modulation index and a low power-factor (PF) load is
connected to it [6]. Under these conditions, the average value
of the neutral-point (NP) current calculated over a modulation
period cannot be maintained at zero, and thus appears as a
low-frequency ripple in the NP potential. As a result of this
oscillation, the output line-to-line voltages will also contain
low-frequency harmonics, and the devices and capacitors
themselves must additionally support voltages that are higher
than those that occur when balance is achieved. Larger ca-
pacitors can attenuate the amplitude of this oscillation, but as
it increases the cost of the whole system this solution is best
Fig. 2. Space-vector diagram.
Manuscript received February 18, 2003; revised October 9, 2003. This work
was supported by the Departament d’Universitats, Recerca i Societat de la In-
formació of the Generalitat de Catalunya under Grant 2001BEAI200192, the avoided. Other approaches suggest allowing the NP voltage to
Ministerio de Ciencia y Tecnologia of Spain under Project DPI2001–2212, and oscillate and then compensating for the effects of the oscillation
the ERC Shared Facilities supported by the National Science Foundation under
Award EEC-9731677. Recommended by Associate Editor F. Blaabjerg.
in the output voltages with a proper feedforward modulation
J. Pou and R. Pindado are with the Power Quality and Renewable Energy [7]–[9]. Nevertheless, these proposals do not reduce the voltage
(QuPER) Research Group, Department of Electronic Engineering, Technical applied to the devices, and some instability may appear when
University of Catalonia, Terrassa, Catalonia, Spain (e-mail: pou@eel.upc.es).
D. Boroyevich is with the Center for Power Electronics Systems (CPES), The
the system operates as a rectifier [8], [9].
Bradley Department of Electrical and Computer Engineering, Virginia Poly- In many applications, two NPC converters are connected
technic Institute and State University, Blacksburg, VA 24061 USA. back-to-back. Some examples can be found in bi-directional
P. Rodríguez is with the Power Quality and Renewable Energy (QuPER) Re- motor drive applications [10]–[13], as well as in high voltage
search Group, Department of Electrical Engineering, Technical University of
Catalonia, Terrassa, Catalonia, Spain. dc (HVDC) link [14]. In those cases the task of balancing the
Digital Object Identifier 10.1109/TPEL.2004.826528 NP voltage can be distributed between the converters. Hence,
0885-8993/04$20.00 © 2004 IEEE
POU et al.: BACK-TO-BACK-CONNECTED THREE-LEVEL CONVERTERS
Fig. 3. Maximum amplitude of the normalized reference vector in steady-state
conditions.
Fig. 4. Projections of the normalized reference vector in the first sextant.
better balancing results can be achieved. Nevertheless, any
study has been carried out with the objective of quantifying NP
balancing improvement so far.
The present analysis describes the limits of NP current con-
trol for the back-to-back applications. The operating areas in
which the system can completely eliminate the low-frequency
NP voltage oscillations are revealed. A mathematical NP cur-
rent model, capable of being expanded to analyze converters
with higher numbers of levels, was designed for this analysis.
II. SPACE-VECTOR MODULATION
A. Nearest-Three-Vector Modulation
If we assume the dc-link capacitor voltages to be balanced,
the vector diagram in Fig. 2 is obtained by applying the fol-
lowing transformation to all possible combinations of the output
voltages
Each sextant in the vector diagram is divided into four regions
in order to show the vectors nearest to the reference vector
which must be generated for each modulation period.
The redundant vectors in the diagram are produced by
different states of the converter; however, they yield the same
output line-to-line voltages. The double vectors, also called
short vectors, generate NP current in opposite directions
723
Fig. 5. Projections for Regions 1–3.
TABLE I
SUMMARY OF INFORMATION FOR NTV MODULATION
depending on which vector is applied. Any modulation strategy
must base its method for NP voltage control on a careful
utilization of these short vectors.
The nearest-three-vector (NTV) modulation technique uses
only one short vector from each pair [9], [15]. As the choice
is based on whichever one best maintains balanced voltages in
the dc-link capacitors, the present voltage imbalance and the di-
rection of the instantaneous output currents must be known [9],
[16]. The NP current must be positive in order to discharge
the lower capacitor, and negative to charge it. For example, if
(1) is positive, vector 100 will discharge the lower capacitor
, and vector 211 will charge it .
The NTV technique uses only three of the closest vectors
, per modulation cycle. Thus, if the sequences of these vectors
are properly applied, this technique produces the minimum
switching frequency to the devices.
There are other techniques that use more than three vectors
per modulation cycle, basing their control of the NP voltage
on distributing the duty cycles calculated for each pair of short
724 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 19, NO. 3, MAY 2004

Fig. 6. Normalized maximum (solid line) and minimum (dashed line) local average NP currents. Examples given for zero-degree current phase angle (' = 0 ):
(a) m = 1, (b) m = 0:9541, (c) m = 0:9, (d) m = 0:7, (e) m = 0:5, and (f) m = 0:3.

vectors between both of them [2], [3]. However, only three short vectors that do not contribute for the balance are zero.
vectors are used per modulation cycle when the NP voltage Thus, if there are no restrictions on the selection of those
imbalance is at the edge of the control limits or beyond them. vectors, when one is trying to find the limits of NP current
This is because, under such conditions, the duty cycles of the control these techniques are the same as the NTV technique.
POU et al.: BACK-TO-BACK-CONNECTED THREE-LEVEL CONVERTERS 725

B. Generating the NTV Modulation III. CONTROL LIMITS OF THE NP CURRENT

Taking into account the symmetry of all the sextants, it is of
interest to reflect the reference vector into the first sextant in
order to reduce the number of relevant regions. Also, the ampli-
tude of the reference vector must be normalized to fit a diagram
in which the triangular regions have unity length.
The theoretical maximum amplitude of the normalized ref-
erence vector is the two-unity value. However, in steady-state
conditions, its length is limited to due to the fact that longer
amplitudes of this vector will extend outside the vector-dia-
gram hexagon (Fig. 3), which cannot be generated by linear
modulation.
Defining a modulation index that considers values in the
interval for linear modulation, the length of the nor-
malized reference vector would be
A. Mathematical Model for the NP Current
When the reference vector is located in the first sextant, the
local average NP current can be expressed as
(5)
To validate this expression for the entire vector diagram, the
equivalent ac currents for each sextant must be taken into ac-
count. A new transformation matrix, , is introduced to inter-
change the currents depending on which sextant the reference
vector occupies, as follows:
(6)

(2)

where defines the sextant in which the reference vector lies,

In Fig. 4, the normalized reference vector is decomposed into such that
the axes located at zero and sixty degrees, obtaining projections if lies in the sextant
and , respectively. otherwise.
(7)
The lengths of the new vectors are indicated in
As in steady-state conditions, the term in (6) will be
time-dependent; thus, a rotating-coordinate dq transformation
can be included to handle constant values for those variables, as
follows:
(3) (8)
In accordance with the general method shown in [9], the fol-
lowing values are the duty ratios of the vectors: where and .
Equation (8) is generally applicable to the three-level NPC
converter, since it allows the averaged NP current to be analyzed
for any sort of SVM technique.
(4) This model can be extended to diode-clamped converters with
Even though there are three redundant vectors in the origin, a higher number of levels. For an n-level converter, the internal
only vector “111” is taken into account because it achieves the dc-link node currents (NCs) can generically be expressed as
best modulation sequences in terms of switching frequencies.
(9)
The cases in which the normalized reference vector is located
in Regions 1, 2, and 3 are shown in Fig. 5. where and the equation shown at the
Table I summarizes the information needed to generate the bottom of the page.
NTV modulation in the first sextant.
In all cases, it is assumed that the sum of and is B. Limits of the NTV Modulation Technique
not larger than 2; if it were, the reference vector would ex- This section presents an analysis of the limits for the ability
tend outside the hexagon, and thus could not be reproduced by of the NTV modulation technique in controlling the NP balance.
modulation. These limits are found by selecting dual vectors that reach either

.. .. ..
. . .
726 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 19, NO. 3, MAY 2004

maximum or minimum NP current. To give an example, in the

case of the maximum, vector 100 will be selected if is posi-
tive, and vector 211 if is negative. The situation is similar for
vectors 110 and 221, which are instead dependent upon the di-
rection of . The minimum NP current is found by the opposite
reasoning.
Fig. 6 illustrates for a number of examples the waveforms that
limit the maximum and minimum local average NP currents.
These waveforms are normalized by the amplitude of the ac cur-
rents , which are in steady-state conditions. Different lengths
of the reference vector have been considered for a zero-degree
current phase angle.
In the first example shown in Fig. 6 , the upper
waveform that limits the maximum NP current takes negative
values. Therefore, it is not possible to achieve positive NP cur-
rent values for some positions of the reference vector even when
it is required for voltage balance control. Similarly, this limi-
tation is also the case with the lower waveform that limits the
minimum NP current because of symmetry between the wave-
forms. Under those conditions, the local average value of this
current over a modulation period cannot be confined to zero. As
a result, a low-frequency oscillation appears in the NP current,
which then manifests itself as NP voltage oscillations.
In contrast, when , the upper local average NP
current waveform always takes positive values (henceforth the
lowest NP current waveforms will not be considered because
of symmetry between the waveforms). In this case, the current
is always controlled and balance is achieved. In fact, for the
unity PF this length of the reference vector is the limiting case,
because the minimum value of the upper NP current waveform
is zero. For smaller amplitudes of the reference vector, the NP
current is always controlled.
The three-dimensional diagram in Fig. 7(a) shows the min-
imum values for the highest NP currents’ waveforms .
The area above the black (zero) plane is where the minimum
value is positive; therefore, full control for the NP current can
be always achieved. The area below this plane shows negative
values for the highest NP current waveforms, which means that Fig. 7. (a) Minimum local average values and (b) whole-line-period average
values of the upper NP currents’ waveforms.
a third-order harmonic will appear in the NP current.
On the other hand, Fig. 7(b) shows the average value from
those waveforms worked out over a whole line period .
Since these values are always positive, the entire surface
is above the zero plane. Hence, despite the low-frequency
oscillation, the control always retains the ability to maintain
those oscillations at around one half the dc-link voltage. In
other words, if a proper selection of vectors is made, the system
is stable in the steady-state condition.
The surfaces in Fig. 7 show symmetries with respect to the
current phase angles, 0 and 180 . For any modulation index

(10)

or

(11)

Fig. 8 shows some sections from Fig. 7(a) where the curves
are given for different PFs. One conclusion is that the unity PF is
the most favorable case, because it can contribute more current
to the NP balance. On the other hand, the closer the modulation Fig. 8. NP current availability for different power-factor values.
POU et al.: BACK-TO-BACK-CONNECTED THREE-LEVEL CONVERTERS
Fig. 9. Back-to-back application of NPC converters.
index is to 0.5, the better the NP current control. This is logical,
as the duty cycles of the short vector are higher under those
conditions and consequently have more NP current control.
IV. BACK-TO-BACK CONNECTION
When two three-level converters are connected back-to-back
to the same dc-link, as in bi-directional motor drive applications
(Fig. 9), the two can share the task of balancing the NP. Each
converter supplies some amount of current to the NP to balance
the voltage, and can thus contribute much more efficiently to the
balance.
The main assumptions for this analysis are that:
— each converter is independently controlled;
— the NTV modulation technique is applied; and
— only the fundamentals for the input and output currents
are considered.
The active power from the utility and the active power applied
to the load can be respectively expressed as
(12)
Taking into account the total efficiency of both converters
, and that the normalized modulation indices by linear mod-
ulation are the ratio between the amplitude of the line-to-line
voltages and the dc-link voltage (given by and
, respectively), the RMS input current can be ex-
pressed as
(13)
Two mathematical models of the NP current (8) are used to
determine the balance limits of the back-to-back connection.
Since the fundamental output frequency of the converter
may not be equal to the input frequency , the NP current
waveforms are not synchronized, and as such cannot be fitted
to one other to achieve a better balancing performance. As a
result, their minimum values must be considered in the
analysis.
In order to show the theoretical balancing limits of the
back-to-back connection, Fig. 10 was obtained assuming an
efficiency of 100% and a unity input PF . define what the best input modulation index is for each appli-
The output current for the inverter is defined to be constant,
and (13) is used to calculate the input current for the rectifier.
It was assumed that the rectifier supplies the minimum NP
current required for balance when the curves in this figure
were determined, thus compensating for the lack of NP current
coming from the inverter. In other words, when the minimum
NP current of the inverter is negative, and thus it would produce
NP voltage oscillations, voltage balance can be always achieved
727
Fig. 10. Theoretical limits of the NP current control in a back-to-back
connection.
if this minimum value is within the gray area shown in Fig. 11
that is defined by the minimum NP current from the rectifier.
The active rectifier can fully compensate for the imbalance
from the inverter in the example given in Fig. 11(a), while it is
not possible for the example in Fig. 11(b). Note that the results
of this analysis are independent of the fundamental frequencies
of the converters.
Therefore, as the curves given in Fig. 10 where obtained for
the limiting cases, this figure shows what extent the NP current
can be controlled. Notice that the information given in this figure
also includes regenerative conditions.
The gray area in Fig. 10 is where balance can be achieved
while still avoiding low-frequency oscillations in the NP
voltage. This operating area was extended far beyond that
which results from using a passive front end [6].
The best situation under which to achieve balance is when
the input modulation index is 0.5. However, the input current
increases as the modulation index decreases, according to (13).
Knowing what the output PF is in steady-state conditions will
cation. Input modulation indices that are lower than
not only increase the input currents, but also provide less NP
current control. For these practical reasons they have not been
considered.
Input currents can be larger than output currents under some
operation conditions. This factor should be considered if the
converters are built by the same devices, so as not to surpass
their maximum current ratings.
728
Fig. 11. Examples of compensation for the lack of NP current from the
inverter: (a) the low-frequency NP voltage oscillation can be removed thanks
to the rectifier contribution and (b) the NP voltage oscillation cannot be
completely cancelled.
The input PF in Fig. 10 was defined as being unity because
that situation yields the best conditions for NP balance. How-
ever, if consideration were given to the input impedance, which
encompasses the inductance required for the boost rectifier and
the utility impedance (Fig. 9), then the input current would in-
clude a small phase displacement. This is because the input cur-
rents must be in phase with the utility voltage sources and not
with the voltages at the input of the rectifier. Thus, according to
the definition given to the input PF for this analysis, it will not be
unity, although it will be close to it. Therefore, the limits given
in Fig. 10 are the maximum theoretical limits for NP balance.
An efficiency of 100% is assumed for the whole system. If
smaller efficiency values are taken into account, the rectifier is
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 19, NO. 3, MAY 2004
Fig. 12. Limits of the NP balance versus the dc-link voltage.
more easily able to contribute to the NP balance. This is because
the input currents are then higher, and the rectifier can provide
more current to the NP. Therefore, though the efficiency of the
system helps to extend the balancing operation area, it does in-
crease the input currents.
Fig. 12 shows the limits of the NP balance versus the dc-link
voltage. The lowest curve is determined considering the same
output and input voltage amplitudes; hence, the ac voltage spec-
ifications of the system are independent of the dc-link voltage.
For this curve, both modulation indices are lower than unity,
even though the output voltages can be larger taking advantage
of raising the dc-link voltage. The dashed curve is defined by
the maximum output modulation index , which yields
the maximum output voltages achievable by linear modulation.
In such conditions, the balancing issue is more difficult. Some
other intermediate curves are also given for different ratios of
output and input voltages.
To give an example of its application, if we assume a value
of 40% larger that the line-to-line input voltage amplitude
, 0.437 is the minimum for removing
the low-frequency NP voltage oscillation if the output voltage is
limited to the input voltage amplitude. However, as the output
voltage can be 40% larger , the minimum re-
quired for NP balance is then 0.837.
V. SIMULATION RESULTS
The back-to-back connection based on two three-level
converters was modeled by Matlab-Simulink to validate the
previous analysis. For that study the reference dc-link voltage,
, was equal to 1800 V; the capacitors, , were equal to
550 ; and the RMS output currents, , were equal to 400 A,
which was provided by ac current sources. The input frequency
was 60 Hz and the output frequency equal to 50 Hz. The
current phase angles were and . The output
modulation index was at the maximum , so that the
worst case scenario would be considered for NP balance.
POU et al.: BACK-TO-BACK-CONNECTED THREE-LEVEL CONVERTERS
Fig. 13. Local average variables: NP voltage (v ), and line-to-line output voltages for the case
end, and (c) m = 0:8 with passive front end.
Fig. 13 shows the voltage of the lower capacitor as
well as the ac output line-to-line voltages; all are local average
variables in order to avoid high-frequency distortion.
The NP oscillation no longer exists in example (a) in this
figure. This is because the operation point is located in the area
below the curve traced by in Fig. 10. On the other
hand, there is a low-frequency oscillation in example (b), which
is at an operating point outside this area. Correspondingly, case
(a) is located above the dashed line in Fig. 11 and case (b) below
that line.
The ripple is much bigger in the case of a passive front end
(c), in which the rectifier is not providing any current to the NP.
Significant low-frequency distortion exists at the output volt-
ages due to this NP voltage oscillation. Additionally, the devices
of the converter and capacitors themselves must support nearly
1200 V instead of a voltage value of around 900 V.
Therefore, when there is an active front end, not only can
the NP voltage ripple be eliminated to beyond the limits of a
729
' = 030 : (a) m = 0:7 and (b) m = 0:8 with active front
single NPC converter, but its amplitude can also be made much
smaller.
Fig. 14 shows some examples in which the fundamental
frequency of the inverter is changed. In those examples the
system operates under regenerative conditions with a current
phase angle of 120 . The output frequencies in the examples
(a) and (b) of this figure are 33,33 Hz and 100 Hz, respectively.
In both of them the modulation indices are and
. The low-frequency NP voltage ripple is removed
in both cases. This shows that when the system operates below
the curves given in Fig. 10, the low-frequency NP voltage
ripple can be removed with independence of the fundamental
frequencies of the converters.
Similar waveforms are shown in Fig. 14(c) and Fig. 14(d), but
in these cases the output modulation index is so that
the operating point is above the curves given in Fig. 10. As it is
expected, the amplitudes of the NP voltage oscillations depend
on the fundamental frequencies of the converters.
730
Fig. 14. Local average variables: NP voltage (v ) and line-to-line output voltages for m = 0:7 and ' = 120 : (a)
(b) m = 0:75 and f = 100 Hz; (c) m = 0:85 and f = 33:33 Hz, and (d) m = 0:85 and f = 100 Hz.
VI. CONCLUSION
This work explores the limitations of NP current control for
balancing the voltage in three-level NPC converters. A math-
ematical model, which can also be applied to converters with
higher numbers of levels, was developed for the NP current.
This model is a very useful tool for determining the limits of
any modulation technique. NTV modulation was the focus of
this analysis, as it shows a good performance from the stand-
point of switching losses, output voltage spectrum and EMI, all
of which are important requirements for the high-power appli-
cations to which multilevel converters are most often applied.
The mathematical model of the NP current is used to analyze
the conditions of the balance when one three-level converter
operates alone, as well as for the case when two converters are
connected to the same dc bus. The analysis of the back-to-back
connection shows new extended limits for NP balancing con-
ditions. This improvement is dependent upon the modulation
index of the rectifier, which is the ratio of the amplitude of the
line-to-line input voltage to the dc-link voltage. By carefully
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 19, NO. 3, MAY 2004
m :
= 0 75 and f :
= 33 33 Hz;
selecting this index, the low-frequency ripple in the NP can
be either eliminated or substantially attenuated. This results
in a direct decrease in the value of the capacitors for such
applications, in addition to maintaining the benefits of the
modulation technique applied to each converter.
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Josep Pou (S’97–M’03) received the B.S., M.S.,
and Ph.D. degrees in electrical engineering from
the Technical University of Catalonia (UPC),
Terrassa, Catalonia, Spain, in 1989, 1996, and 2002,
respectively.
During 1989, he was the Technical Director of
Polylux S.A. In 1990, he joined the faculty of UPC
as an Assistant Professor. He became an Associate
Professor in 1993. From February 2001 to January
2002, he was a Researcher in the Center for Power
Electronics Systems, Virginia Polytechnic Institute
and State University (Virginia Tech), Blacksburg. Since 2003, he is the
co-Director of the Power Quality and Renewable Energy (QuPER) Research
Group. He has authored more than 40 published technical papers and has been
involved in several industrial projects and educational programs in the fields
of power electronics and systems. His research interests include modeling and
control of power converters, multilevel converters, power quality, renewable
energy systems, and motor drives.
Dr. Pou is a Member of the IEEE Power Electronics, IEEE Industrial Elec-
tronics, and IEEE Industrial Applications Societies.
731
Rafael Pindado (M’94) received the B.Sc. degree in
mechanical engineering from the EUETI-Barcelona,
Spain, in 1961, the B.Sc. degree in electrical engi-
neering from the EUETI-Terrassa, Spain, in 1966,
and the M.Sc. and Ph.D. degrees (with honors) in
electrical engineering from the Technical University
of Catalonia (UPC), Spain, in 1967 and 1990,
respectively.
He is currently a Professor with the Department
of Electronic Engineering, UPC, where, since 1967,
he has taught courses on control theory, analog elec-
tronics, and power electronics. Since 2003, he has been the co-Director of the
Power Quality and Renewable Energy (QuPER) Research Group. Since 1998
he has been the Director of the EUETI- Terrassa (UPC). He has published four
technical books, over 80 technical papers, and has also been involved in sev-
eral government or private company projects in the areas of control systems and
power electronics. His research interests include power quality, reactive power
compensation and harmonic elimination techniques applied to power converters,
modeling, and control of power electronics systems.
Dr. Pindado is a Member of the IEEE Industrial Electronics and IEEE
Power Electronics Societies. He was the General Chairman of the SAAEI 2000
Congress.
Dushan Boroyevich (M’85) received the B.S.
degree from the University of Belgrade, Yugoslavia,
in 1976, the M.S. degree from the University of
Novi Sad, Yugoslavia, in 1982, and the Ph.D. degree
from the Virginia Polytechnic Institute and State
University (Virginia Tech), Blacksburg, in 1986.
Between 1986 and 1990, he was an Assistant
Professor and Director of the Power and Industrial
Electronics Research Program, Institute for Power
and Electronic Engineering, University of Novi
Sad, and later, acting head of the Institute. In 1990,
he joined The Bradley Department of Electrical and Computer Engineering,
Virginia Tech, as an Associate Professor. From 1996 to 1998, he was Associate
Director of the Virginia Power Electronics Center, and since 1998 he has
been the Deputy Director of the NSF Engineering Research Center for Power
Electronics Systems and Professor at the department. He has published over
120 technical papers, has three patents, and has been involved in numerous
government and industry-sponsored projects in the areas of power and indus-
trial electronics. His research interests include multiphase power conversion,
high-power PWM converters, modeling and control of power converters,
applied digital control, and electrical drives.
Dr. Boroyevich is a Member of Phi Kappa Phi, the IEEE Power Electronics
Society AdCom, the IEEE Industry Applications Society Industrial Power Con-
verter Committee.
Pedro Rodríguez (S’99–M’04) received the B.S. de-
gree in electrical engineering from the University of
Granada, Spain, in 1989 and the M.S. degree in elec-
trical engineering from the Technical University of
Catalonia (UPC), Terrassa, Catalonia, Spain, in 1994,
where he is currently pursuing the Ph.D. degree in
electrical engineering.
In 1990, he joined the faculty of UPC as an Assis-
tant Professor. He became an Associate Professor in
1993. Since 1995, he has been the head of the Factory
Automation Group of Terrassa, Catalonia, Spain. He
is a member of the Power Quality and Renewable Energy (QuPER) Research
Group. He has authored more than 30 published technical papers and has been
involved in several industrial projects and educational programs in the fields
of power electronics and systems. His research interests include modeling and
control of power converters, multilevel converters, power conditioning, and re-
newable energy systems.
Mr. Rodríguez is a Member of the IEEE Power Electronics, IEEE Industrial
Electronics, and IEEE Industrial Applications Societies.