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5 4 3 2 1

Agera-SVT
CYG50 NM-A901
Schematic Block Diagram
D D

DDR4 LPDDR3 Channel A&B EDP


PAGE 17-19 1600MHz LCD PAGE 24 3V/5V

SATA/PCIE PAGE 29
NGFF SSD PAGE 21
SPI
SPI BIOS PAGE 9
PCIE for WiFi & USB2.0 for BT 1.00V
WiFi/BT PAGE 20
PAGE 29
USB2.0
CAMERA
Right IO Board KBL-U MCP
PAGE 24

USB3.0 & USB2.0 0.6V/1.2V


USB3.0 Port PI2546 PAGE 2--15
I2C PAGE 29
TOUCHPANEL PAGE 24
C

HP/MIC COMBO JACK mHDA C

ALC298
1.5V
I2C
TOUCH PAD PAGE 26 PAGE 29
Left IO Board
USB2.0 & Charger
Typc-C DC-in Port LPC SWITCH POWER
@TPM PAGE 16
PAGE 31
USB3.0 & USB2.0 & DDI
Typc-C Std Port PS8740
SMLink
@NFC PAGE 33
WALKPORT

PAGE 29

I2C LPC BUS B

CPU_CORE
2nd G-SENSOR and P-Sensor I2C GTX_CORE
PAGE 23
PAGE 32

Sensor on FPC CHARGER

G-SENSOR I2C PAGE 30


EC
SMBUS
PAGE 22 80 Port PAGE 33

ALS I2C GT3e Power


Battery PAGE 33 PAGE 34

A A

KB
Title
Kaby Lake Block Diagram
PAGE 33
Size Document Number
C Rev V1.0
YOGA910
Date: Monday, July 27, 2015 Sheet 1 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

SKL_ULT ?
U95A
D D

33 DDI1_DN0 E55 C47


DDI1_TXN[0] EDP_TXN[0] EDP_TX0_DN 24
F55 C46
33 DDI1_DP0 DDI1_TXP[0] EDP_TXP[0] EDP_TX0_DP 24
E58 D46
33 DDI1_DN1 DDI1_TXN[1] EDP_TXN[1] EDP_TX1_DN 24
33 DDI1_DP1 F58 C45
F53 DDI1_TXP[1] EDP_TXP[1] A45 EDP_TX1_DP 24
33 DDI1_DN2 DDI1_TXN[2] EDP_TXN[2] EDP_TX2_DN 24
33 DDI1_DP2 G53 B45
DDI1_TXP[2] EDP_TXP[2] EDP_TX2_DP 24
F56 A47
33 DDI1_DN3 DDI1_TXN[3] EDP_TXN[3] EDP_TX3_DN 24
G56 B47
33 DDI1_DP3 DDI1_TXP[3] EDP_TXP[3] EDP_TX3_DP 24
C50 E45
DDI2_TXN[0] DDI EDP_AUXN EDP_AUX_DN 24
D50 EDP F45
DDI2_TXP[0] EDP_AUXP EDP_AUX_DP 24
C52
D52 DDI2_TXN[1] B52 DP_UTIL TESTPAD TP4 1
A50 DDI2_TXP[1] EDP_DISP_UTIL
B50 DDI2_TXN[2] G50
DDI2_TXP[2] DDI1_AUXN DDI1_AUX_DN 33
D51 F50
DDI2_TXN[3] DDI1_AUXP DDI1_AUX_DP 33
C51 E48
DDI2_TXP[3] DDI2_AUXN F48
DDI2_AUXP G46
DISPLAY SIDEBANDS DDI3_AUXN F46
DDPB_CLK L13 DDI3_AUXP
C

DDPB_DATA L12 GPP_E18/DDPB_CTRLCLK L9


C

GPP_E19/DDPB_CTRLDATA GPP_E13/DDPB_HPD0 L7 DDPB_HPD 27, 33


N7 GPP_E14/DDPC_HPD1 L6
N8 GPP_E20/DDPC_CTRLCLK GPP_E15/DDPD_HPD2 N9 KBSMI_N 27
GPP_E21/DDPC_CTRLDATA GPP_E16/DDPE_HPD3 SCI_N 27
L10
GPP_E17/EDP_HPD EDP_HPD 24
N11
N12 GPP_E22/DDPD_CTRLCLK R12
GPP_E23/DDPD_CTRLDATA LCD_BL_EN 24
24 TOUCH_RST_N EDP_BKLTEN R11 LCD_BL_PWM_PCH 22
EDP_COMP E52 EDP_BKLTCTL U13
EDP_RCOMP EDP_VDDEN EDP_VDD_EN 22,24
1 OF 20
SKL_ULT
REV = 1 ?

+3V

+VCCIO

B B

SCI_N 10K_0402_5% 2 1 R126 +3V

KBSMI_N 10K_0402_5% 2 1 R95


RP30
EDP_COMP R1 1 2 24.9_0402_1% DDPB_CLK 2 3
DDPB_DATA 1 4

2.2K_0404_4P2R_5%
DDPB_HPD R157 1 2 100K_0402_5%
COMPENSATION PU FOR DP

A A

LENOVO.CRDN
Title
BROADWELL MCP (DDI,EDP)
Size Document Number
C Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 2 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

?
SKL_ULT
U95C
? 17 M_A_DQ[31:16]
1
U95B SKL_ULT TP98 TESTPAD
17 M_A_DQ[15:0] M_A_DQ16 AF65 AN45
M_A_DQ17 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKN[0] M_B_CLK_DDR0_DN 18,19
AU53 AF64 AN46 1
D M_A_DQ0 DDR0_CKN[0] M_A_CLK_DDR0_DN 17,19 M_A_DQ18 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[1] TP92 TESTPAD D
AL71 AT53 AK65 AP45
M_A_DQ1 AL68 DDR0_DQ[0] DDR0_CKP[0] AU55 1 M_A_CLK_DDR0_DP 17,19 M_A_DQ19 AK64 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKP[0] AP46 M_B_CLK_DDR0_DP 18,19
TP71 TESTPAD 1
M_A_DQ2 DDR0_DQ[1] DDR0_CKN[1] M_A_DQ20 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] TP97 TESTPAD
AN68 AT55 1 AF66
M_A_DQ3 DDR0_DQ[2] DDR0_CKP[1] TP72 TESTPAD M_A_DQ21 DDR1_DQ[4]/DDR0_DQ[20]
AN69 AF67 AN56
M_A_DQ4 DDR0_DQ[3] M_A_DQ22 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CKE[0] M_B_CKE0 18,19
AL70 BA56 AK67 AP55 1
M_A_DQ5 DDR0_DQ[4] DDR0_CKE[0] 1 M_A_CKE0 17,19 M_A_DQ23 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CKE[1] TP98 TESTPAD
AL69 BB56 AK66 AN55 1
M_A_DQ6 DDR0_DQ[5] DDR0_CKE[1] TP75 TESTPAD M_A_DQ24 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CKE[2] TP99 TESTPAD
AN70 AW56 1 AF70 AP53 1
M_A_DQ7 DDR0_DQ[6] DDR0_CKE[2] TP76 TESTPAD M_A_DQ25 DDR1_DQ[8]/DDR0_DQ[24] DDR1_CKE[3] TP104 TESTPAD
AN71 AY56 1 AF68
M_A_DQ8 DDR0_DQ[7] DDR0_CKE[3] TP82 TESTPAD M_A_DQ26 DDR1_DQ[9]/DDR0_DQ[25]
AR70 AH71 BB42
M_A_DQ9 DDR0_DQ[8] M_A_DQ27 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CS#[0] 1 M_B_CS0_N 18,19
AR68 AU45 AH68 AY42 TP105 TESTPAD
M_A_DQ10 DDR0_DQ[9] DDR0_CS#[0] 1 M_A_CS0_N 17,19 M_A_DQ28 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CS#[1]
AU71 AU43 TP83 TESTPAD AF71 BA42
M_A_DQ11 AU68 DDR0_DQ[10] DDR0_CS#[1] AT45 M_A_DQ29 AF69 DDR1_DQ[12]/DDR0_DQ[28] DDR1_ODT[0] AW42 1 M_B_ODT0 18,19
DDR0_DQ[11] DDR0_ODT[0] M_A_ODT0 17,19 17 M_A_DQ[63:48] DDR1_DQ[13]/DDR0_DQ[29] DDR1_ODT[1] TP70 TESTPAD
M_A_DQ12 AR71 AT43 1 M_A_DQ30 AH70
M_A_DQ13 DDR0_DQ[12] DDR0_ODT[1] TP68 TESTPAD M_A_DQ31 DDR1_DQ[14]/DDR0_DQ[30]
AR69 AH69 AY48
17 M_A_DQ[47:32] M_A_DQ14 DDR0_DQ[13] M_A_DQ48 DDR1_DQ[15]/DDR0_DQ[31] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] M_B_MA5 18,19
AU70 BA51 AT66 AP50
M_A_DQ15 DDR0_DQ[14] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] M_A_MA5 17,19 M_A_DQ49 DDR1_DQ[16]/DDR0_DQ[48] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] M_B_MA9 18,19
AU69 BB54 AU66 BA48
M_A_DQ32 BB65 DDR0_DQ[15] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] BA52 M_A_MA9 17,19 M_A_DQ50 AP65 DDR1_DQ[17]/DDR0_DQ[49] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] BB48 M_B_MA6 18,19
M_A_DQ33 DDR0_DQ[16]/DDR0_DQ[32] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] M_A_MA6 17,19 M_A_DQ51 DDR1_DQ[18]/DDR0_DQ[50] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] M_B_MA8 18,19
AW65 AY52 AN65 AP48
M_A_DQ34 AW63 DDR0_DQ[17]/DDR0_DQ[33] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] AW52 M_A_MA8 17,19 M_A_DQ52 AN66 DDR1_DQ[19]/DDR0_DQ[51] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] AP52 M_B_MA7 18,19
M_A_DQ35 DDR0_DQ[18]/DDR0_DQ[34] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] M_A_MA7 17,19 M_A_DQ53 DDR1_DQ[20]/DDR0_DQ[52] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] M_B_BG0 18,19
AY63 AY55 AP66 AN50
M_A_DQ36 DDR0_DQ[19]/DDR0_DQ[35] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] M_A_BG0 17,19 M_A_DQ54 DDR1_DQ[21]/DDR0_DQ[53] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] M_B_MA12 18,19
BA65 AW54 AT65 AN48
M_A_DQ37 AY65 DDR0_DQ[20]/DDR0_DQ[36] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] BA54 M_A_MA12 17,19 M_A_DQ55 AU65 DDR1_DQ[22]/DDR0_DQ[54] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] AN53 M_B_MA11 18,19
M_A_DQ38 DDR0_DQ[21]/DDR0_DQ[37] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] M_A_MA11 17,19 M_A_DQ56 DDR1_DQ[23]/DDR0_DQ[55] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# M_B_ACT_N 18,19
BA63 BA55 AT61 AN52
M_A_DQ39 BB63 DDR0_DQ[22]/DDR0_DQ[38] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# AY54 M_A_ACT_N 17,19 M_A_DQ57 AU61 DDR1_DQ[24]/DDR0_DQ[56] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] M_B_BG1 18
M_A_DQ40 DDR0_DQ[23]/DDR0_DQ[39] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] M_A_BG1 17 M_A_DQ58 DDR1_DQ[25]/DDR0_DQ[57]
BA61 AP60 BA43
M_A_DQ41 DDR0_DQ[24]/DDR0_DQ[40] M_A_DQ59 DDR1_DQ[26]/DDR0_DQ[58] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] M_B_MA13 18,19
AW61 AU46 AN60 AY43
M_A_DQ42 BB59 DDR0_DQ[25]/DDR0_DQ[41] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] AU48 M_A_MA13 17,19 M_A_DQ60 AN61 DDR1_DQ[27]/DDR0_DQ[59] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] AY44 M_B_MA15 18,19
M_A_DQ43 DDR0_DQ[26]/DDR0_DQ[42] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] M_A_MA15 17,19 M_A_DQ61 DDR1_DQ[28]/DDR0_DQ[60] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] M_B_MA14 18,19
AW59 AT46 AP61 AW44
M_A_DQ44 BB61 DDR0_DQ[27]/DDR0_DQ[43] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] AU50 M_A_MA14 17,19 18 M_B_DQ[31:16] M_A_DQ62 AT60 DDR1_DQ[29]/DDR0_DQ[61] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] BB44 M_B_MA16 18,19
M_A_DQ45 DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] M_A_MA16 17,19 M_A_DQ63 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] M_B_BA0 18,19
AY61 AU52 AU60 AY47
18 M_B_DQ[15:0] M_A_DQ46 DDR0_DQ[29]/DDR0_DQ[45] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] M_A_BA0 17,19 M_B_DQ16 DDR1_DQ[31]/DDR0_DQ[63] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] M_B_MA2 18,19
BA59 AY51 AU40 BA44
M_A_DQ47 AY59 DDR0_DQ[30]/DDR0_DQ[46] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] AT48 M_A_MA2 17,19 M_B_DQ17 AT40 DDR1_DQ[32]/DDR1_DQ[16] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] AW46 M_B_BA1 18,19
M_B_DQ0 DDR0_DQ[31]/DDR0_DQ[47] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] M_A_BA1 17,19 M_B_DQ18 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] M_B_MA10 18,19
AY39 AT50 AT37 AY46
M_B_DQ1 AW39 DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] BB50 M_A_MA10 17,19 M_B_DQ19 AU37 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] BA46 M_B_MA1 18,19
M_B_DQ2 DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] M_A_MA1 17,19 M_B_DQ20 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] M_B_MA0 18,19
AY37 AY50 AR40 BB46
M_B_DQ3 DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] M_A_MA0 17,19 M_B_DQ21 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[3] M_B_MA3 18,19
AW37 BA50 AP40 BA47
M_B_DQ4 BB39 DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] BB52 M_A_MA3 17,19 M_B_DQ22 AP37 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[4] M_B_MA4 18,19
M_B_DQ5 BA39 DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] M_A_MA4 17,19 M_B_DQ23 AR37 DDR1_DQ[38]/DDR1_DQ[22] AH66
C C
M_B_DQ6 BA37 DDR0_DQ[37]/DDR1_DQ[5] AM70 M_B_DQ24 AT33 DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQSN[0]/DDR0_DQSN[2] AH65 M_A_DQS_DN2 17
M_B_DQ7 DDR0_DQ[38]/DDR1_DQ[6] DDR0_DQSN[0] M_A_DQS_DN0 17 M_B_DQ25 DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQSP[0]/DDR0_DQSP[2] M_A_DQS_DP2 17
BB37 AM69 AU33 AG69
M_B_DQ8 DDR0_DQ[39]/DDR1_DQ[7] DDR0_DQSP[0] M_A_DQS_DP0 17 M_B_DQ26 DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQSN[1]/DDR0_DQSN[3] M_A_DQS_DN3 17
AY35 AT69 AU30 AG70
M_B_DQ9 AW35 DDR0_DQ[40]/DDR1_DQ[8] DDR0_DQSN[1] AT70 M_A_DQS_DN1 17 M_B_DQ27 AT30 DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQSP[1]/DDR0_DQSP[3] AR66 M_A_DQS_DP3 17
M_B_DQ10 DDR0_DQ[41]/DDR1_DQ[9] DDR0_DQSP[1] M_A_DQS_DP1 17 M_B_DQ28 DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQSN[2]/DDR0_DQSN[6] M_A_DQS_DN6 17
AY33 BA64 AR33 AR65
M_B_DQ11 AW33 DDR0_DQ[42]/DDR1_DQ[10] DDR0_DQSN[2]/DDR0_DQSN[4] AY64 M_A_DQS_DN4 17 M_B_DQ29 AP33 DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQSP[2]/DDR0_DQSP[6] AR61 M_A_DQS_DP6 17
M_B_DQ12 DDR0_DQ[43]/DDR1_DQ[11] DDR0_DQSP[2]/DDR0_DQSP[4] M_A_DQS_DP4 17 18 M_B_DQ[63:48] M_B_DQ30 DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQSN[3]/DDR0_DQSN[7] M_A_DQS_DN7 17
BB35 AY60 AR30 AR60
M_B_DQ13 DDR0_DQ[44]/DDR1_DQ[12] DDR0_DQSN[3]/DDR0_DQSN[5] M_A_DQS_DN5 17 M_B_DQ31 DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQSP[3]/DDR0_DQSP[7] M_A_DQS_DP7 17
BA35 BA60 AP30 AT38
18 M_B_DQ[47:32] M_B_DQ14 BA33 DDR0_DQ[45]/DDR1_DQ[13] DDR0_DQSP[3]/DDR0_DQSP[5] BA38 M_A_DQS_DP5 17 M_B_DQ48 AU27 DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQSN[4]/DDR1_DQSN[2] AR38 M_B_DQS_DN2 18
M_B_DQ15 DDR0_DQ[46]/DDR1_DQ[14] DDR0_DQSN[4]/DDR1_DQSN[0] M_B_DQS_DN0 18 M_B_DQ49 DDR1_DQ[48] DDR1_DQSP[4]/DDR1_DQSP[2] M_B_DQS_DP2 18
BB33 AY38 AT27 AT32
M_B_DQ32 AY31 DDR0_DQ[47]/DDR1_DQ[15] DDR0_DQSP[4]/DDR1_DQSP[0] AY34 M_B_DQS_DP0 18 M_B_DQ50 AT25 DDR1_DQ[49] DDR1_DQSN[5]/DDR1_DQSN[3] AR32 M_B_DQS_DN3 18
M_B_DQ33 DDR0_DQ[48]/DDR1_DQ[32] DDR0_DQSN[5]/DDR1_DQSN[1] M_B_DQS_DN1 18 M_B_DQ51 DDR1_DQ[50] DDR1_DQSP[5]/DDR1_DQSP[3] M_B_DQS_DP3 18
AW31 BA34 AU25 AR25
M_B_DQ34 DDR0_DQ[49]/DDR1_DQ[33] DDR0_DQSP[5]/DDR1_DQSP[1] M_B_DQS_DP1 18 M_B_DQ52 DDR1_DQ[51] DDR1_DQSN[6] M_B_DQS_DN6 18
AY29 BA30 AP27 AR27
M_B_DQ35 AW29 DDR0_DQ[50]/DDR1_DQ[34] DDR0_DQSN[6]/DDR1_DQSN[4] AY30 M_B_DQS_DN4 18 M_B_DQ53 AN27 DDR1_DQ[52] DDR1_DQSP[6] AR22 M_B_DQS_DP6 18
M_B_DQ36 DDR0_DQ[51]/DDR1_DQ[35] DDR0_DQSP[6]/DDR1_DQSP[4] M_B_DQS_DP4 18 M_B_DQ54 DDR1_DQ[53] DDR1_DQSN[7] M_B_DQS_DN7 18
BB31 AY26 AN25 AR21
M_B_DQ37 BA31 DDR0_DQ[52]/DDR1_DQ[36] DDR0_DQSN[7]/DDR1_DQSN[5] BA26 M_B_DQS_DN5 18 M_B_DQ55 AP25 DDR1_DQ[54] DDR1_DQSP[7] M_B_DQS_DP7 18
M_B_DQ38 DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSP[7]/DDR1_DQSP[5] M_B_DQS_DP5 18 M_B_DQ56 DDR1_DQ[55]
BA29 AT22 AN43
M_B_DQ39 BB29 DDR0_DQ[54]/DDR1_DQ[38] AW50 M_B_DQ57 AU22 DDR1_DQ[56] DDR1_ALERT# AP43 M_B_ALERT_N 18,19
M_B_DQ40 AY27 DDR0_DQ[55]/DDR1_DQ[39] DDR0_ALERT# AT52 M_A_ALERT_N 17,19 M_B_DQ58 AU21 DDR1_DQ[57] DDR1_PAR AT13 DDR_RESET_R M_B_PAR 18,19
M_B_DQ41 DDR0_DQ[56]/DDR1_DQ[40] DDR0_PAR M_A_PAR 17,19 M_B_DQ59 DDR1_DQ[58] DRAM_RESET#
AW27 AT21 AR18 SM_RCOMP_0
M_B_DQ42 AY25 DDR0_DQ[57]/DDR1_DQ[41] AY67 M_B_DQ60 AN22 DDR1_DQ[59] DDR_RCOMP[0] AT18 SM_RCOMP_1
M_B_DQ43 DDR0_DQ[58]/DDR1_DQ[42] DDR_VREF_CA +V_DDR_CA_VREF 19 M_B_DQ61 DDR1_DQ[60] DDR_RCOMP[1]
AW25 AY68 1
TP91 TESTPAD AP22 AU18 SM_RCOMP_2
M_B_DQ44 BB27 DDR0_DQ[59]/DDR1_DQ[43] DDR CH - A
DDR0_VREF_DQ BA67 M_B_DQ62 AP21 DDR1_DQ[61] DDR_RCOMP[2]
M_B_DQ45 BA27 DDR0_DQ[60]/DDR1_DQ[44] DDR1_VREF_DQ +V_DDR1_DQ_VREF 19 M_B_DQ63 AN21 DDR1_DQ[62] DDR CH - B
M_B_DQ46 BA25 DDR0_DQ[61]/DDR1_DQ[45] AW67 DDR_PG_CTRL_R 8 DDR1_DQ[63]
M_B_DQ47 BB25 DDR0_DQ[62]/DDR1_DQ[46] DDR_VTT_CNTL
DDR0_DQ[63]/DDR1_DQ[47] 3 OF 20
2 OF 20 SKL_ULT
REV = 1 ?
SKL_ULT
REV = 1 ?

+1.2VSUS +3V
B B

2
2

C28
U17 R192 R183 2 1 200_0402_1% SM_RCOMP_0
1 6 0.1u_0201_10V6K 100K_0402_5%
NC1 Vcc 1 R291 1 2 80.6_0402_1% SM_RCOMP_1
DDR_PG_CTRL_R 2 5
A NC2 SM_RCOMP_2
1

R186 2 1 100_0402_1%
3 4
GND Y DDR_VTT_PG_CTRL 29

74AUP1G07FW4-7_DFN1010-6_1X1

+1.2VSUS

2
C30 @

0.1u_0201_10V6K
2

A 1 A
R209
470_0402_1% LENOVO.CRDN
Title
BROADWELL MCP ( PROCESSOR LPDDR3)
1

1 R332 2 Size Document Number


Rev V1.0
DDR_RESET_R C YOGA4
DDR_RESET_N 17, 18 Date: Monday, July 27, 2015 Sheet 3 of 37
1 0_0402_1% "PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

I2C3_SDA R23 2 1 0_0402_5%


I2C3_SDA_HUB 27
I2C3_SCL R24 2 1 0_0402_5%
I2C3_SCL_HUB 27
SKL_ULT ? I2C2_SDA
U95F R29 2 @ 1 0_0402_5%
I2C2_SDA_SENSORHUB 23
LPSS ISH I2C2_SCL R27 2 @ 1 0_0402_5%
I2C2_SCL_SENSORHUB 23
AN8
D 20 M.2_WLAN_WAKE_CTRL_N GPP_B15/GSPI0_CS# P2 D
AP7 GPP_D9
20 M.2_WLAN_WIFI_WAKE_R_N GPP_B16/GSPI0_CLK P3
AP8 GPP_D10
20 RF_KILL_N_WIFI_NGFF GPP_B17/GSPI0_MISO P4 H_DCI_CLK 33
AR7 GPP_D11
20 M.2_WIFI_RST_N GPP_B18/GSPI0_MOSI P1 H_DCI_DATA 33 +3V
GPP_D12
TP40 1 AM5
GPP_B19/GSPI1_CS# M4
1 AN7 GPP_D5/ISH_I2C0_SDA
TP41 GPP_B20/GSPI1_CLK N3
1 AP5 GPP_D6/ISH_I2C0_SCL 2 1 2.2K_0402_5% I2C1_SDA
TP39 GPP_B21/GSPI1_MISO R43
TP25 1 AN5 BOARD_ID4
GPP_B22/GSPI1_MOSI N1
GPP_D7/ISH_I2C1_SDA N2 R44 2 1 2.2K_0402_5% I2C1_SCL
BOARD_ID0 AB1 GPP_D8/ISH_I2C1_SCL
BOARD_ID1 AB2 GPP_C8/UART0_RXD
BOARD_ID2 GPP_C9/UART0_TXD AD11
W4 GPP_F10/I2C5_SDA/ISH_I2C2_SDA
BOARD_ID3 GPP_C10/UART0_RTS# AD12
AB3 GPP_F11/I2C5_SCL/ISH_I2C2_SCL +3VDX_TCH_PAD
GPP_C11/UART0_CTS#
UART2_RXD AD1
TESTPAD TP58 UART2_TXD GPP_C20/UART2_RXD U1
AD2 GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA NFC_DWL_REQ 25
TESTPAD TP79 UART2_RTS_N GPP_C21/UART2_TXD U2
AD3 GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL 2 1 2.2K_0402_5% I2C1_SDA_TCD
TESTPAD TP80 UART2_CTS_N GPP_C22/UART2_RTS# U3 R80
TESTPAD TP81 AD4 GPP_D15/ISH_UART0_RTS#
GPP_C23/UART2_CTS# U4
GPP_D16/ISH_UART0_CTS#/SML0BALERT# R66 2 1 2.2K_0402_5% I2C1_SCL_TCD
I2C0_SDA AC1
U7 GPP_C12/UART1_RXD/ISH_UART1_RXD
I2C0_SCL GPP_C16/I2C0_SDA AC2
U6 GPP_C13/UART1_TXD/ISH_UART1_TXD +3VDX_TOUCHPANEL
GPP_C17/I2C0_SCL AC3
GPP_C14/UART1_RTS#/ISH_UART1_RTS# FPBACK 24
I2C1_SDA AB4
U8 GPP_C15/UART1_CTS#/ISH_UART1_CTS# EC_SENSOR_INT 27
I2C1_SCL U9 GPP_C18/I2C1_SDA
AY8 R62 2 1 1K_0402_5% I2C0_SDA
GPP_C19/I2C1_SCL SENSOR_PWR_EN 31
GPP_A18/ISH_GP0 BA8
I2C2_SDA AH9 GPP_A19/ISH_GP1 AUDIO_PWR_EN 31 I2C0_SCL
GPP_F4/I2C2_SDA BB7 R63 2 1 1K_0402_5%
I2C2_SCL AH10 GPP_A20/ISH_GP2 FP_PWR_EN 26
GPP_F5/I2C2_SCL BA7
GPP_A21/ISH_GP3 AY7 TOUCHPANEL_PWR_EN 31
I2C3_SDA_R AH11 GPP_A22/ISH_GP4 CAMERA_PWR_EN 31
I2C3_SCL_R GPP_F6/I2C3_SDA AW7
AH12 GPP_A23/ISH_GP5 SATA_PWR_EN 29
GPP_F7/I2C3_SCL AP13 +1.8VDX_SENSORHUB_IT8353
GPP_A12/BM_BUSY#/ISH_GP6 SE_PWR_EN 25
AF11
AF12 GPP_F8/I2C4_SDA
GPP_F9/I2C4_SCL I2C2_SDA
R64 1 @ 2 2.2K_0402_5%
6 OF 20 I2C2_SCL
SKL_ULT R65 1 @ 2 2.2K_0402_5%
C REV = 1 ? C

R91 2 @ 1 2.2K_0402_5% SENSORHUB_INT_N

R122 2 @ 1 2.2K_0402_5%

I2C1_SDA R25 1 0_0402_5% I2C1_SDA_TCD


2
I2C1_SCL R26 2 1 0_0402_5% I2C1_SCL_TCD

+3V
1

R68 R69 R70 R71 R73


100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5% 100K_0402_5%
@ @ @ +3V +3VDX_TCH_PAD
2

BOARD_ID0 U16 @ +3VAUX


1 8
BOARD_ID1 VCCA VCCB
UART2_RXD R249 2 1 49.9K_0402_1%
I2C1_SDA 2 7 UART2_TXD
BOARD_ID2 A1 B1 I2C1_SDA_TCD 26 R250 2 1 49.9K_0402_1%
I2C1_SCL 3 6
BOARD_ID3 A2 B2 I2C1_SCL_TCD 26 +3V
4 5
BOARD_ID4 GND OE
UART2_RTS_N R251 2 1 49.9K_0402_1%
UART2_CTS_N R252 2 1 49.9K_0402_1%
PI4ULS5V202XVE_1P2X1P6
1

@ @
R75 R76 R77
100K_0402_5% 100K_0402_5% 100K_0402_5% R78 R79
100K_0402_5% 100K_0402_5%
B B
2

A A

LENOVO.CRDN
Title

Vinafix Size
C

Date:
BROADWELL MCP ( PCIE USB GPIO)
Document Number
YOGA4
Monday, July 27, 2015 Sheet 4
Rev V1.0

of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

+3V

R48 1 @ 2 10K_0402_5% PM_SLP_S0IX_R_N


SKL_ULT
?
U95H

SSIC / USB3
PCIE/USB3/SATA
H8
USB3_1_RXN USB3_RX1_N 33
G8 USB3_RX1_P 33
H13 USB3_1_RXP C13
PCIE1_RXN/USB3_5_RXN USB3_1_TXN USB3_TX1_N 33 USB3.0 PORT (LIO Type-C)
G13 D13
PCIE1_RXP/USB3_5_RXP USB3_1_TXP USB3_TX1_P 33
B17
A17 PCIE1_TXN/USB3_5_TXN J6
PCIE1_TXP/USB3_5_TXP USB3_2_RXN/SSIC_1_RXN H6
D
G11 USB3_2_RXP/SSIC_1_RXP B13 D
F11 PCIE2_RXN/USB3_6_RXN USB3_2_TXN/SSIC_1_TXN A13
D16 PCIE2_RXP/USB3_6_RXP USB3_2_TXP/SSIC_1_TXP
C16 PCIE2_TXN/USB3_6_TXN J10
PCIE2_TXP/USB3_6_TXP USB3_3_RXN/SSIC_2_RXN USB3_RX3_N 33
H10 USB3_RX3_P 33
H16 USB3_3_RXP/SSIC_2_RXP B15
PCIE3_RXN USB3_3_TXN/SSIC_2_TXN USB3_TX3_N 33
G16 A15 USB3.0 PORT (RIO1)
PCIE3_RXP USB3_3_TXP/SSIC_2_TXP USB3_TX3_P 33
D17
C17 PCIE3_TXN E10
PCIE3_TXP USB3_4_RXN F10
G15 USB3_4_RXP C15
F15 PCIE4_RXN USB3_4_TXN D15
B19 PCIE4_RXP USB3_4_TXP +3VAUX
A19 PCIE4_TXN AB9
PCIE4_TXP USB2N_1 USB_PN1 24 CAMERA
AB10
USB2P_1 USB_PP1 24
F16
20 PCIE5_WLAN_RX_DN E16 PCIE5_RXN AD6
20 PCIE5_WLAN_RX_DP PCIE5_RXP USB2N_2 USB_OC_N1
C19 AD7 R81 1 2 10K_0402_5%
Wlan 20 PCIE5_WLAN_TX_DN
20 PCIE5_WLAN_TX_DP
D19 PCIE5_TXN
PCIE5_TXP
USB2P_2 USB_OC_N0 R82 1 2 10K_0402_5%
AH3
USB2N_3 USB_PN3 33 USB3.0 PORT (LIO Type-C) USB_OC_N3
G18 AJ3 R87 1 2 10K_0402_5%
F18 PCIE6_RXN USB2P_3 USB_PP3 33 NFC_IRQ_MGP5 R86 1 2 10K_0402_5%
D20 PCIE6_RXP AD9 R20
C20 PCIE6_TXN USB2N_4 AD10 USB_PN4 33 1 2 USB2_ID
USB3.0 PORT (LIO Type-C) R450 2 @ 1 100K_0402_5%
PCIE6_TXP USB2P_4 USB_PP4 33
F20 AJ1 1K_0402_5%
E20 PCIE7_RXN/SATA0_RXN USB2N_5 AJ2 USB_PN5 26 Finger Print
PCIE7_RXP/SATA0_RXP USB2P_5 USB_PP5 26
B21 USB2
A21 PCIE7_TXN/SATA0_TXN AF6
PCIE7_TXP/SATA0_TXP USB2N_6 USB_PN6 33 DC_IN USB2.0 PORT
AF7
USB2P_6 USB_PP6 33
G21
F21 PCIE8_RXN/SATA1A_RXN AH1
PCIE8_RXP/SATA1A_RXP USB2N_7 USB_PN7 33 USB3.0 PORT (RIO1)
D21 AH2
C21 PCIE8_TXN/SATA1A_TXN USB2P_7 USB_PP7 33
PCIE8_TXP/SATA1A_TXP AF8
USB2N_8 USB_PN8 20 BT
E22 AF9
21 PCIE9_RN E23 PCIE9_RXN USB2P_8 USB_PP8 20
21 PCIE9_RP PCIE9_RXP
C B23 AG1 USB_PN9 33 C
21 PCIE9_TN A23 PCIE9_TXN USB2N_9 AG2 DC_IN USB2.0 PORT
21 PCIE9_TP PCIE9_TXP USB2P_9 USB_PP9 33
F25 AH7
21 PCIE10_RN E25 PCIE10_RXN USB2N_10 AH8
21 PCIE10_RP PCIE10_RXP USB2P_10
D23
21 PCIE10_TN C23 PCIE10_TXN AB6 USB2_COMP R299 2 1 113_0402_1%
21 PCIE10_TP PCIE10_TXP USB2_COMP AG3 1
USB2_ID TP11 TESTPAD
R298 2 1 100_0402_1% F5 AG4 1
PCIE_COMP E5 PCIE_RCOMPN USB2_VBUSSENSE TP12 TESTPAD

PCIE Port 9 SSD 1 D56


PCIE_RCOMPP
GPP_E9/USB2_OC0#
A9
C9
USB_OC_N0
TESTPAD TP11 PROC_PRDY# GPP_E10/USB2_OC1# USB_OC_N1 33
TESTPAD TP12 1 D61 D9
PM_SLP_S0IX_R_N PROC_PREQ# GPP_E11/USB2_OC2# NFC_IRQ_MGP5 25
R500 1 @ 2 BB11 B9
8,28,31 PM_SLP_S0_N GPP_A7/PIRQA# GPP_E12/USB2_OC3# USB_OC_N3 33
0_0402_5%
E28 J1
21 PCIE11_RN E27 PCIE11_RXN/SATA1B_RXN GPP_E4/DEVSLP0 J2
21 PCIE11_RP PCIE11_RXP/SATA1B_RXP GPP_E5/DEVSLP1
D24 J3
21 PCIE11_TN PCIE11_TXN/SATA1B_TXN GPP_E6/DEVSLP2 SATA2_DEVSLP 21
C24
21 PCIE11_TP E30 PCIE11_TXP/SATA1B_TXP H2
21 SATA2_RN PCIE12_RXN/SATA2_RXN GPP_E0/SATAXPCIE0/SATAGP0
F30 H3 +3V
21 SATA2_RP A25 PCIE12_RXP/SATA2_RXP GPP_E1/SATAXPCIE1/SATAGP1 G4
21 SATA2_TN PCIE12_TXN/SATA2_TXN GPP_E2/SATAXPCIE2/SATAGP2 SSD_SATA_PCIE_DET_N 21
B25
21 SATA2_TP PCIE12_TXP/SATA2_TXP H1 10K_0402_5% 2 1 R49
GPP_E8/SATALED#

8 OF 20
SKL_ULT
REV = 1 ?

B
U95I
SKL_ULT ? B

CSI-2

A36 C37
B36 CSI2_DN0 CSI2_CLKN0 D37
C38 CSI2_DP0 CSI2_CLKP0 C32
D38 CSI2_DN1 CSI2_CLKN1 D32
C36 CSI2_DP1 CSI2_CLKP1 C29
D36 CSI2_DN2 CSI2_CLKN2 D29
A38 CSI2_DP2 CSI2_CLKP2 B26
B38 CSI2_DN3 CSI2_CLKN3 A26
CSI2_DP3 CSI2_CLKP3
C31 E13 CSI2_COMP R300 2 1 100_0402_1%
D31 CSI2_DN4 CSI2_COMP B7
C33 CSI2_DP4 GPP_D4/FLASHTRIG
D33 CSI2_DN5
A31 CSI2_DP5 EMMC
B31 CSI2_DN6 AP2
A33 CSI2_DP6 GPP_F13/EMMC_DATA0 AP1
B33 CSI2_DN7 GPP_F14/EMMC_DATA1 AP3
CSI2_DP7 GPP_F15/EMMC_DATA2 AN3
A29 GPP_F16/EMMC_DATA3 AN1
B29 CSI2_DN8 GPP_F17/EMMC_DATA4 AN2
C28 CSI2_DP8 GPP_F18/EMMC_DATA5 AM4
D28 CSI2_DN9 GPP_F19/EMMC_DATA6 AM1
A27 CSI2_DP9 GPP_F20/EMMC_DATA7
B27 CSI2_DN10 AM2
C27 CSI2_DP10 GPP_F21/EMMC_RCLK AM3
D27 CSI2_DN11 GPP_F22/EMMC_CLK AP4
CSI2_DP11 GPP_F12/EMMC_CMD
AT1 EMMC_COMP R191 2 1 200_0402_1%
EMMC_RCOMP
9 OF 20
SKL_ULT
REV = 1 ?

A A

LENOVO.CRDN
Title
BROADWELL MCP ( PCIE USB GPIO)
Size Document Number
C Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 5 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

U95G SKL_ULT ?

AUDIO

HDA_SYNC_I2S0_SFRM_R BA22
HDA_BCLK_I2S0_SCLK_R HDA_SYNC/I2S0_SFRM
AY22
D D
HDA_BLK/I2S0_SCLK
BB22 SDIO/SDXC
27 HDA_SDO_I2S0_TXD_R HDA_SDO/I2S0_TXD
BA21
33 HDA_SDI_I2S_RXD HDA_SDI0/I2S0_RXD
1TP32 AY21 AB11
HDA_SDI1/I2S1_RXD GPP_G0/SD_CMD
1TP42 HDA_RST_N_R AW22 AB13
HDA_RST#/I2S1_SCLK GPP_G1/SD_DATA0
J5 AB12
GPP_D23/I2S_MCLK GPP_G2/SD_DATA1
AY20 W12
I2S1_SFRM GPP_G3/SD_DATA2
AW20 W11
I2S1_TXD GPP_G4/SD_DATA3
W10
GPP_G5/SD_CD#
AK7 W8
GPP_F1/I2S2_SFRM GPP_G6/SD_CLK
AK6 W7
GPP_F0/I2S2_SCLK GPP_G7/SD_WP
AK9
GPP_F2/I2S2_TXD
AK10 BA9
GPP_F3/I2S2_RXD GPP_A17/SD_PWR_EN#/ISH_GP7 GPP_A16/ TOUCHPAD_PWR_EN 31
BB9
SD_1P8_SEL

H5 AB7 SD_COMP R184 2 1 200_0402_1%


1TP32
GPP_D19/DMIC_CLK0 SD_RCOMP
1TP32 D7
GPP_D20/DMIC_DATA0

D8 AF13
GPP_D17/DMIC_CLK1 GPP_F23
C8
GPP_D18/DMIC_DATA1

AW5
33 PCH_BEEP GPP_B14/SPKR
C C

7 OF 20
SKL_ULT
REV = 1 ?

RP2
HDA_BCLK_I2S0_SCLK_R 1 8
HDA_SYNC_I2S0_SFRM_R HDA_BCLK_I2S_SCLK 33
2 7
HDA_SYNC_I2S_SFRM 33
3 6
HDA_SDO_I2S0_TXD_R 4 5
HDA_SDO_I2S_TXD 33

2
22_0804_8P4R_5%

C10
2P_0402_50V8J 1

B B

+VCCPAZIO

HDA_SDO_I2S0_TXD_R 2 @ 1 1K_0402_5%
R379

+3V

PCH_BEEP @ 2 100K_0402_5%
R177 1

A A

LENOVO.CRDN
Title
BROADWELL MCP ( RTC AZLIA SATA PCH JTAG)
Size Document Number
C Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 6 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

D D

U95J SKL_ULT ?

CLOCK SIGNALS

D42 +VCCCLK5
C42 CLKOUT_PCIE_N0
+3V CLKOUT_PCIE_P0
SRCCLKREQ0_N AR10
GPP_B5/SRCCLKREQ0#
RP3
1 8 SRCCLKREQ0_N B42 XCLK_BIASREF R121 2 1 2.7K_0402_0.5%
21 CLK_SRC1_M.2_SSD_DN CLKOUT_PCIE_N1 F43 TESTPAD
2 7 SRCCLKREQ2_N A42 CLKOUT_ITPXDP_N TP90
21 CLK_SRC1_M.2_SSD_DP CLKOUT_PCIE_P1 E43 TESTPAD
3 6 SRCCLKREQ4_N AT7 CLKOUT_ITPXDP_P TP89
21 CK_REQ_SSD_N GPP_B6/SRCCLKREQ1#
4 5 SRCCLKREQ5_N BA17
D41 GPD8/SUSCLK SUS_CLK 20,21
C41 CLKOUT_PCIE_N2
10K_8P4R_5% CLKOUT_PCIE_P2 E37 XTAL24_IN
SRCCLKREQ2_N AT8 XTAL24_IN
GPP_B7/SRCCLKREQ2# E35 XTAL24_OUT
XTAL24_OUT
R36 1 2 10K_0402_5% CK_REQ_WLAN_N D40 SUS_CLK @ R143 2 1 1K_0402_5%
20 CK_WLAN_DN CLKOUT_PCIE_N3 E42 XCLK_BIASREF
C40 XCLK_BIASREF
20 CK_WLAN_DP CLKOUT_PCIE_P3
AT10 RTC_X1
20 CK_REQ_WLAN_N GPP_B8/SRCCLKREQ3# AM18
RTCX1 AM20 RTC_X2
R37 1 2 10K_0402_5% CK_REQ_SSD_N B40 RTCX2
A40 CLKOUT_PCIE_N4
SRCCLKREQ4_N CLKOUT_PCIE_P4 AN18 SRTC_RST_N
AU8 SRTCRST# RTC_RST_N
GPP_B9/SRCCLKREQ4# AM16
RTCRST#
C E40 C
E38 CLKOUT_PCIE_N5
SRCCLKREQ5_N AU7 CLKOUT_PCIE_P5
GPP_B10/SRCCLKREQ5#

10 OF 20
SKL_ULT
REV = 1 ?

VCCRTC

3.9P_0402_50V8J
R114 2 1 1M_0402_5% 1 2 RTC_X1

C4
ME RESET

2
SRTC_RST_N

1
R111 1 2 20K_0402_1% R83
SAVE ME = PU (Default)

4
1 Y2 Y1 10M_0402_5%
C11 XTAL24_IN 1 3 XTAL24_OUT
1U_0201_10V6K CLEAR ME = PD

1
24MHZ_8PF_EXS00A-CS07257 32.768KHZ_9PF_CM8V-T1A
2

2
1 1 C6
1 2 RTC_X2
C13 C14
RTC_RST_N 27 8P_0402_50V8J 8P_0402_50V8J 3.9P_0402_50V8J
CMOS RESET 2 2
R112 1 2 20K_0402_1%
TP87 SAVE CMOS = PU (Default)
B 1 TESTPAD B
C12 CLEAR CMOS = PD
1U_0201_10V6K
2
TP88
TESTPAD

A A

LENOVO.CRDN
Title
BROADWELL MCP (CLK)
Size Document Number
C Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 7 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

SKL_ULT
?
U95K
SYSTEM POWER MANAGEMENT
+3VAUX AT11 SLP_S0_N
GPP_B12/SLP_S0# AP15
PLT_RST_N_R AN10 GPD4/SLP_S3# BA16 SLP_S3_N 27,28
SYS_RESET_N B5 GPP_B13/PLTRST# GPD5/SLP_S4# AY16 SLP_S5_N SLP_S4_N 27,29
TP15 1
R148 2 1 8.2K_0402_5% PM_BATLOW_N_R RSMRST_N SYS_RESET# GPD10/SLP_S5# +3VAUX
AY17
R149 1 2 10K_0402_5% AC_PRESENT_R RSMRST# AN15 SLP_SUS_N TP47 1
1 TP69 H_CPUPWRGD A68 SLP_SUS# AW15 SLP_LAN_N TP16 1
H_VCCST_PWRGD R193 1 2 60.4_0402_1% B65 PROCPWRGD SLP_LAN# BB17
R152 1 2 100K_0402_5% PCH_PWRBTN_N VCCST_PWRGD GPD9/SLP_WLAN# SLP_A_N SLP_WLAN_N 31 PCIE_WAKE_N R140 1 2 1K_0402_5%
AN16 TP14 1
SYS_PWROK_R B6 GPD6/SLP_A# 1
PCH_PWROK SYS_PWROK TP54 SMC_WAKE_SCI_N R12 1 2 10K_0402_5%
D R150 1 @ 2 100K_0402_5% PM_PCH_PWROK BA20 BA15 D
BB20 PCH_PWROK GPD3/PWRBTN# AY15 PCH_PWRBTN_N 27
R151 1 @ 2 10K_0402_5% SYS_PWROK DPWROK
DSW_PWROK GPD1/ACPRESENT PM_BATLOW_N_R AC_PRESENT_R 27 GP_VRALERTB R42 1 2 10K_0402_5%
AU13
SUS_PWR_ACK AR13 GPD0/BATLOW# R140 1
SUSACK_N AP11 GPP_A13/SUSWARN#/SUSPWRDNACK MPHY_EXT_PWR_GATEB R113 1 2 20K_0402_1%
GPP_A15/SUSACK# AU11 TP74 1
BB15 GPP_A11/PME# AP16 SM_INTRUDER_N SLP_WLAN_N R45 1 @ 2 10K_0402_5%
20,21,33 PCIE_WAKE_N SMC_WAKE_SCI_N WAKE# INTRUDER#
AM15
1 TP73 PM_LANPHY_ENABLE AW17 GPD2/LAN_WAKE# AM10 MPHY_EXT_PWR_GATEB
AT15 GPD11/LANPHYPC GPP_B11/EXT_PWR_GATE# AM11
+3V GPD7/RSVD GPP_B2/VRALERT# GP_VRALERTB 32

11 OF 20
SKL_ULT
R182 1 2 10K_0402_5% SYS_RESET_N REV = 1 ?

+3VAUX

R232 @ 0_0402_5%
DPWROK R142 1 2 0_0402_5%
R144 1 2 0_0402_5% RSMRST_N
27 PM_RSMRST_N
R145 1 2 10K_0402_5%
C47
0.1u_0201_10V6K

U36 @ DDR_VTT_PG_CTRL 3,29


C C

27 SYS_PWROK
R136 1 2 0_0402_5% SYS_PWROK_R R234 @ 0_0402_5%
PWR_LED 27,33
R137 1 2 0_0402_5% PCH_PWROK @ R224 @ 0_0402_5%
27 PM_PCH_PWROK 28,29 VCCIO_PWRGD
SLP_S0_N @ R228 @ 0_0402_5% H_VCCST_PWRGOOD
5,28,31 PM_SLP_S0_N
R147 1 @ 2 0_0402_5%
27,28,29 1.2VSUS_PWRGD
@ R229 @ 0_0402_5% VCCST_PWRGOOD_IN-
28,29 1.00VAUX_PWRGD
@ R230 @ 0_0402_5% VCCST_PWRGOOD_IN+
R131 1 @ 2 0_0402_5% SUSACK_N 8,27,28,32,34 ALL_SYS_PWRGD_PMIC
27 PCH_SUSACK_N @ R231 @ 0_0402_5% DDR_PG_CTRL_R 3
+3VAUX 27 H_PROCHOT
@
10,27,29,30,32 H_PROCHOT_N
SLG4V4891_2X1D6
2

@
R132 @ R133
10K_0402_5% 0_0402_5%
1

R135 1 2 0_0402_5% SUS_PWR_ACK


27 SUS_PWR_ACK_R

+3VAUX

VCCRTC

2 @
C44
R85 2 1 330K_0402_5% SM_INTRUDER_N 0.1u_0201_10V6K
1 +VCCST_CPU

1
74AUP1G07FW4-7_DFN1010-6_1X1 @
U18 R19
1 6 1K_0402_5%
NC1 Vcc
@
B 1.00V_PWRGD_R R211 2 1 2 5 B
A NC2

2
0_0402_5% @
R166 1 3 4 H_VCCST_PWRGD
PLT_RST_N_R R226 2 1
16,20,21,27 PLT_RST_N GND Y
0_0402_5%
@ R213 2 1
2 0_0402_5% 8,27,28,32,34 ALL_SYS_PWRGD_PMIC
0_0402_5%
R217 2 1
27 EC_VCCST_PWRGD
@ 1 0_0402_5%
C110
2

R141
22U_0402_4V6M

100K_0402_5%
2
1

+1.00VAUX
2

R198
10K_0402_1%
1

VCCST_PWRGD_IN-
2

@ 2 @

R201 C41
@ U10 100K_0402_1% 0.068U_0201_10V6K
1.00V_PWRGD_R 6 3 1
VOUT -IN
1

5 1
A VCC VEE A
2 4 VCCST_PWRGD_IN+ R205 2 @ 1 1K_0402_5%
VCC +IN +VCCSTG
+3VAUX
AZV3001FZ4-7 R206 2 @ 1 1K_0402_5%
+VCCST_CPU
LENOVO.CRDN
1 Title
C42
BROADWELL MCP (PM)
@
2.2U_0402_6.3V6M

2 Size Document Number


C Rev V1.0
YOGA4
1 @ Date: Monday, July 27, 2015 Sheet 8 of 37
C43
1U_0201_10V6K "PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
2 or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

+3VAUX +3VAUX_SPI

R527 1 2 0_0402_5%
?
SKL_ULT
+3VALW U95E
SPI - FLASH
SMBUS, SMLINK
PCH_SCK AV2
SPI0_CLK R7 SMB_CLK
2 PCH_SO AW3 GPP_C0/SMBCLK
R539 1 0_0402_5% SPI0_MISO R8 SMB_DATA
PCH_SI AV3 GPP_C1/SMBDATA
SPI0_MOSI R10 SMB_ALERT_N
PCH_WP_N AW2 GPP_C2/SMBALERT#
PCH_HOLD_N AU4 SPI0_IO2 @
SPI0_IO3 R9 SML0_CLK R697 1 2 0_0402_5%
AU3 GPP_C3/SML0CLK SML0_DATA R698 1 @ NFC_SML_CLK 25
+3VAUX_SPI 27 PCH_SCE0_N SPI0_CS0# W2 2 0_0402_5%
AU2 GPP_C4/SML0DATA SML0_ALERT_N NFC_SML_DAT 25
D SPI0_CS1# W1 D
AU1 GPP_C5/SML0ALERT#
16 PCH_SCE1_N SPI0_CS2#
W3
2 PCH_SCE0_N GPP_C6/SML1CLK V3 SML1_CLK 27
R403 1 150K_0402_5% SPI - TOUCH
GPP_C7/SML1DATA SML1_ALERT_N SML1_DATA 27
AM7
M2 GPP_B23/SML1ALERT#/PCHHOT#
M3 GPP_D1/SPI1_CLK
PCH_SCE0_R J4 GPP_D2/SPI1_MISO
R570 1 2 150K_0402_5% GPP_D3/SPI1_MOSI
V1 R517~R520 should be changed to 15ohm when use eSPI mode.
V2 GPP_D21/SPI1_IO2
M1 GPP_D22/SPI1_IO3
LPC
GPP_D0/SPI1_CS# AY13 R517 1 2 0_0402_5%
GPP_A1/LAD0/ESPI_IO0 BA13 1 2 LPC_AD0_ESPI_IO0 16,27
R518 0_0402_5%
GPP_A2/LAD1/ESPI_IO1 BB13 1 2 LPC_AD1_ESPI_IO1 16,27
C LINK R519 0_0402_5%
GPP_A3/LAD2/ESPI_IO2 AY12 1 2 LPC_AD2_ESPI_IO2 16,27
R520 0_0402_5%
1 TP19 G3 GPP_A4/LAD3/ESPI_IO3 LPC_AD3_ESPI_IO3 16,27
CL_CLK BA12
1 TP20 G2 GPP_A5/LFRAME#/ESPI_CS# LPC_FRAME_N_ESPI_CS_N 16,27
CL_DATA BA11
1 TP21 G1 GPP_A14/SUS_STAT#/ESPI_RESET# SUS_STAT_N_ESPI_RST_N 27
CL_RST#
U6 @ 3VAUX_SPI_R
PCH_SCE0_N 1 8 CK_LPC_0_R
CS VCC AW9 R118 1 2 22_0402_1%
AW13 GPP_A9/CLKOUT_LPC0/ESPI_CLK CK_LPC_1_R 2 22_0402_1% CLK_PCI_LPC_ESPI_CLK 27
PCH_SO_R 2 7 PCH_HOLD_R_N
27 H_RCIN_N GPP_A0/RCIN#
GPP_A10/CLKOUT_LPC1
AY9 @ R120 1 PCH_PCI_LPC_TPM_CLK 16
DO HOLD AW11
AY11 GPP_A8/CLKRUN# PM_CLKRUN_N 16,27
PCH_WP_R_N PCH_SCK_R 27 INT_SERIRQ GPP_A6/SERIRQ
3 6
WP CLK
PCH_SI_R 5 OF 20
4 5 SKL_ULT
GND DI REV = 1 +3V
?
W25Q64FVSSIG_SO8
PM_CLKRUN_N 8.2K_0402_5% 1 2 R134
H_RCIN_N 10K_0402_5% 2 1 R34
INT_SERIRQ 10K_0402_5% 2 1 R35
1
C79
1U_0201_10V6K
+3VAUX 2

C C

2
+3VAUX_SPI
R374 @
10K_0402_5%
U7 +3VAUX
PCH_SCE0_N 1 8 3VAUX_SPI_R R568 1 2 ESPI OR LPC

1
PCH_SO_R 2 CS# VCC 7 PCH_HOLD_R_N
PCH_WP_R_N 3 SO(IO1) HOLD#(IO3) 6 PCH_SCK_R 0_0402_5%
2
C16
SML0_ALERT_N HIGH: ESPI IS SELECTED FOR EC SMB_CLK
WP#(IO2) SCLK R158 2 1 1K_0402_5%
4 5 PCH_SI_R 0.1u_0201_10V6K LOW: LPC SELECTED SMB_DATA 2 1 1K_0402_5%
VSS SI(IO0) R159
SMB_ALERT_N R589 2 1 2.2K_0402_5%

2
1
R176 @ WEAK INTERNAL PD
W25Q64FVZPIQ_WSON8_6x5 20K_0402_1% SML0_CLK R155 2 1 499_0402_1%
SML0_DATA R156 2 1 499_0402_1%

1
SML1_CLK R161 2 1 1K_0402_5%
SML1_DATA R162 2 1 1K_0402_5%
R164 2 1 33_0402_5% PCH_SCK_R
16,27 PCH_SCK
SML1_ALERT_N R400 1 2 4.7K_0402_1%
+3VAUX_SPI

R167 2 1 33_0402_5% PCH_SO_R


16,27 PCH_SO R171 1 2 20K_0402_1%
2 1 PCH_WP_N R172 2 1 33_0402_5% PCH_WP_R_N

+3V
+3VAUX_SPI
R167 2 1 33_0402_5% PCH_SI_R
16,27 PCH_SI
SML1_ALERT_N R373 1 2 150K_0402_5%
2 1 R174 2 1 20K_0402_1%
PCH_HOLD_N R175 2 1 33_0402_5% PCH_HOLD_R_N
R592 @ R377 1 @ 2 10K_0402_5%
B 100K_0402_5% B

R591 @
100K_0402_5% +3VALW
+3VAUX_SPI
@
PU44
PR213 2 @
10K_0402_5%
1

2 3 1 0_0402_5%
IN OUT
R38 @

@ 1 PC316
0.1u_0201_10V6K
2

27 SPI_PWR_EN 2
1 ON 4
GND
2

SLG59M1558VTR
R105 @
200K_0402_5%
1

A A

LENOVO.CRDN
Title
BROADWELL MCP (LPC SPI SMB CLINK)
Size Document Number
C Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 9 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

D D

+VCCST_CPU

R9 2 1 1K_0402_1% PCH_THRMTRIP_N

H_CATERR_N
接到EC 1.00V GPIO
R239 2 @ 1 49.9_0402_1%

U95D SKL_ULT ?

+3VDX_TOUCHPANEL H_CATERR_N D63


CATERR#
A54
22 PECI_EC PECI
H_PROCHOT_R_N C65
JTAG
PCH_THRMTRIP_N PROCHOT#
C63
TOUCH_PANEL_INTR_N_LS THERMTRIP#
R7 2 1 100K_0402_5% R212 1 2 0_0402_5% A65
SKTOCC# B61 PCH_TCK_JTAGX_CPU
PROC_TCK PCH_JTAG_TDI_CPU
CPU MISC D60
+VCCSTG 1 TP31 C55 PROC_TDI
BPM#[0] A61 PCH_JTAG_TDO_CPU
1 TP27 D55 PROC_TDO
BPM#[1] C60 PCH_JTAG_TMS_CPU
1 TP23 B54 PROC_TMS
BPM#[2] B59 XDP_TRST_CPU_N 1
C TP33 TESTPAD C
1 TP24 C56 PROC_TRST#
PCH_JTAG_TDO_CPU BPM#[3]
51_0402_5% 2 1 R106
B56 PCH_JTAG_TCK 1
A6 PCH_JTAG_TCK TP35 TESTPAD
GPP_E3/CPU_GP0 D59 PCH_JTAG_TDI_CPU
51_0402_5% 2 1 R107 PCH_JTAG_TDI_CPU TOUCH_PANEL_INTR_N_R A7 PCH_JTAG_TDI
GPP_E7/CPU_GP1 A56 PCH_JTAG_TDO_CPU
TOUCHPAD_INTR_N_R BA5 PCH_JTAG_TDO
GPP_B3/CPU_GP2 C59 PCH_JTAG_TMS_CPU
51_0402_5% 2 1 R108 PCH_JTAG_TMS_CPU AY5 PCH_JTAG_TMS
20 RF_KILL_N_BT_NGFF GPP_B4/CPU_GP3 C61 XDP_TRST_CPU_N
PCH_TRST# PCH_TCK_JTAGX_CPU
A59
CPU_POPIRCOMP AT16 JTAGX
PCH_POPIRCOMP PROC_POPIRCOMP
AU16
OPCE_RCOMP PCH_OPIRCOMP
H66
OPC_RCOMP OPCE_RCOMP
+VCCSTG H65
OPC_RCOMP

R17 2 1 1K_0402_1%
H_PROCHOT_R_N 4 OF 20
R160 2 1 499_0402_1%
8,27,29,30,32 H_PROCHOT_N LT
SKL_U ?
REV = 1

R240 1 @ 2 0_0402_5% PCH_THRMTRIP_N


22 H_THRMTRIP_N

R214 1 @ 2 0_0402_5% TOUCH_PANEL_INTR_N_R


24 TOUCH_PANEL_INTR_N_LS

PCH_TCK_JTAGX_CPU R185 1 2 51_0402_5%


R215 1 @ 2 0_0402_5% TOUCHPAD_INTR_N_R
26 TOUCHPAD_INTR_N
B B

R241 2 1 49.9_0402_1% OPCE_RCOMP


R242 2 1 49.9_0402_1% OPC_RCOMP
R237 2 1 49.9_0402_1% CPU_POPIRCOMP
R238 2 1 49.9_0402_1% PCH_POPIRCOMP

A A

LENOVO.CRDN
Title
BROADWELL MCP (MISC THERM CPU JTAG)
Size Document Number
C Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 10 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

GFX_CORE GTX_CORE
SKL_ULT ?
U95M
+V_EDRAM_VR +V_EOPIO_VR
CPU POWER 2 OF 4
CPU_CORE ? CPU_CORE N70
U95L SKL_ULT
A48 VCCGT N71
VCCGT VCCGT

2
A53 R63
R245 R247
CPU POWER 1 OF 4
A58 VCCGT VCCGT R64
100_0402_1% 100_0402_1% A30 G32 A62 VCCGT VCCGT R65
A34 VCC_A30 VCC_G32 G33 A66 VCCGT VCCGT R66
A39 VCC_A34 VCC_G33 G35 AA63 VCCGT VCCGT R67
1 VCC_A39 VCC_G35 VCCGT VCCGT

1
VCCOPC_SENSE VCCEOPIO_SENSE A44 G37 AA64 R68
VSSOPC_SENSE VSSEOPIO_SENSE AK33 VCC_A44 VCC_G37 G38 AA66 VCCGT VCCGT R69
AK35 VCC_AK33 VCC_G38 G40 AA67 VCCGT VCCGT R70
AK37 VCC_AK35 VCC_G40 G42 AA69 VCCGT VCCGT R71
VCC_AK37 VCC_G42 VCCGT VCCGT
2

2
AK38 J30 AA70 T62
R246 R248 AK40 VCC_AK38 VCC_J30 J33 AA71 VCCGT VCCGT U65
D
100_0402_1% 100_0402_1% AL33 VCC_AK40 VCC_J33 J37 AC64 VCCGT VCCGT U68 D
AL37 VCC_AL33 VCC_J37 J40 CPU_CORE AC65 VCCGT VCCGT U71
AL40 VCC_AL37 VCC_J40 K33 AC66 VCCGT VCCGT W63
VCC_AL40 VCC_K33 VCCGT VCCGT
1

1
AM32 K35 AC67 W64
AM33 VCC_AM32 VCC_K35 K37 AC68 VCCGT VCCGT W65
VCC_AM33 VCC_K37 VCCGT VCCGT

2
AM35 K38 AC69 W66
+V_EDRAM_VR AM37 VCC_AM35 VCC_K38 K40 R233 AC70 VCCGT VCCGT W67
AM38 VCC_AM37 VCC_K40 K42 100_0402_1% AC71 VCCGT VCCGT W68
G30 VCC_AM38 VCC_K42 K43 J43 VCCGT VCCGT W69
VCC_G30 VCC_K43 J45 VCCGT VCCGT W70
@ @ @ @ VCCGT VCCGT

1
HSW IP - STUFF R226 EMPTY R210 1 1 1 1 1 TP84 K32 E32 J46 W71
RSVD_K32 VCC_SENSE E33 VCC_SENSE 32 J48 VCCGT VCCGT Y62 GTX_CORE
SKL A0 STUFF R210 EMPTY R226 C253 C36 C269 C273
VSS_SENSE VSS_SENSE 32 VCCGT VCCGT
1 TP85 AK32 J50

1U_0201_10V6K

10U_0402_6.3V6M

1U_0201_10V6K

1U_0201_10V6K
+VCCST_CPU RSVD_AK32 VCCGT
+1.00VSUS B63 H_CPU_SVIDALRT_N J52
2 2 2 2 VIDALERT# H_CPU_SVIDCLK VCCGT

2
AB62 A63 J53 AK42
P62 VCCOPC_AB62 VIDSCK D64 VR_SVID_DATA R236 J55 VCCGT VCCGTX_AK42 AK43
V62 VCCOPC_P62 VIDSOUT 100_0402_1% J56 VCCGT VCCGTX_AK43 AK45
R210 1 2 0_0402_5%
VCCOPC_V62 VCCGT VCCGTX_AK45
+1.8V G20 +VCCSTG J58 AK46
H63 VCCSTG_G20 J60 VCCGT VCCGTX_AK46 AK48
+1.00VDX VCC_OPC_1P8_H63 VCCGT VCCGTX_AK48

1
K48 AK50
G61 K50 VCCGT VCCGTX_AK50 AK52
VCC_OPC_1P8_G61 K52 VCCGT VCCGTX_AK52 AK53
VCCOPC_SENSE AC63 K53 VCCGT VCCGTX_AK53 AK55
+VCCSTG VCCOPC_SENSE VCCGT VCCGTX_AK55
+V_EOPIO_VR VSSOPC_SENSE AE63 K55 AK56
VSSOPC_SENSE K56 VCCGT VCCGTX_AK56 AK58
AE62 K58 VCCGT VCCGTX_AK58 AK60
R227 1 2 0_0402_5%
VCCEOPIO VCCGT VCCGTX_AK60
1 1 AG62 K60 AK70
C31 C35 VCCEOPIO L62 VCCGT VCCGTX_AK70 AL43
VCCEOPIO_SENSE AL63 L63 VCCGT VCCGTX_AL43 AL46
@ VSSEOPIO_SENSE VCCEOPIO_SENSE VCCGT VCCGTX_AL46
@ AJ62 L64 AL50
10U_0402_6.3V6M

10U_0402_6.3V6M
2 2 VSSEOPIO_SENSE L65 VCCGT VCCGTX_AL50 AL53
L66 VCCGT VCCGTX_AL53 AL56
@
12 OF 20 L67 VCCGT VCCGTX_AL56 AL60
SKL_ULT
REV =1 ? L68 VCCGT VCCGTX_AL60 AM48
L69 VCCGT VCCGTX_AM48 AM50
GFX_CORE L70 VCCGT VCCGTX_AM50 AM52 GTX_CORE
+VCCST_CPU L71 VCCGT VCCGTX_AM52 AM53
M62 VCCGT VCCGTX_AM53 AM56
C C
N63 VCCGT VCCGTX_AM56 AM58
VCCGT VCCGTX_AM58
1

2
N64 AU58
R302 R235 N66 VCCGT VCCGTX_AU58 AU63 R243
100_0402_1% N67 VCCGT VCCGTX_AU63 BB57 100_0402_1%
100_0402_1% VCCGT VCCGTX_BB57
N69 BB66
VCCGT VCCGTX_BB66
2

1
J70 AK62
VR_SVID_DATA 32 VCCGT_SENSE VCCGT_SENSE VCCGTX_SENSE
J69 AL61
VR_SVID_DATA 32 32 VSSGT_SENSE VSSGT_SENSE VSSGTX_SENSE

13 OF 20

2
SKL_ULT
R304 REV = 1 ? R244
100_0402_1% 100_0402_1%

1
+VCCST_CPU
2

R225
56_0402_5%
1

H_CPU_SVIDALRT_N R202 2 1 220_0402_5%


VR_SVID_ALERT_N 32

+VCCSA
?
+VCCST_CPU +1.2VSUS U95N SKL_ULT +VCCIO
CPU POWER 3 OF 4

2
Note:Layout need to follow
2

CRB to do an Inductor AU23 AK28 R309


PR170 AU28 VDDQ_AU23 VCCIO AK30 100_0402_1%
AU35 VDDQ_AU28 VCCIO AL30
45.3_0402_1% VDDQ_AU35 VCCIO
AU42 AL42
VDDQ_AU42 VCCIO

1
+1.2VSUS BB23 AM28
B VDDQ_BB23 VCCIO B
1

BB32 AM30
H_CPU_SVIDCLK R204 1 2 0_0402_5% BB41 VDDQ_BB32 VCCIO AM42 +VCCSA
VR_SVID_CLK 32 BB47 VDDQ_BB41 VCCIO
BB51 VDDQ_BB47 AK23
VDDQ_BB51 VCCSA 32 VCCSA_SENSE
AK25
VCCSA 32 VSSSA_SENSE
G23
AM40 VCCSA G25
VDDQC VCCSA G27
1 1 VCCSA
C274 C37 A18 G28
VCCST VCCSA

2
1U_0201_10V6K 10U_0402_6.3V6M J22
A22 VCCSA J23 R310
2 2 VCCSTG_A22 VCCSA J27 100_0402_1%
AL23 VCCSA K23
+VCCIO +1.00VSUS VCCPLL_OC VCCSA K25
VCCSA

1
+VCCST_CPU K20 K27
K21 VCCPLL_K20 VCCSA K28
VCCPLL_K21 VCCSA K30
VCCSA
2

1 1 2
R307 C275 C281 C190 AM23 VCCIO_SENSE
100_0402_1% 1U_0201_10V6K VCCIO_SENSE AM22 VSSIO_SENSE
1U_0201_10V6K

0.1u_0201_10V6K

VSSIO_SENSE
2 2 1 H21 VSSSA_SENSE
VSSSA_SENSE
1

VCCIO_SENSE H20 VCCSA_SENSE


VSSIO_SENSE VCCSA_SENSE
+VCCSTG
14 OF 20
SKL_ULT
REV =1 ?
2

R308 1
100_0402_1% C276
1U_0201_10V6K
2
1

+1.2V_VCCPLLOC

A A
2
C189 LENOVO.CRDN
0.1u_0201_10V6K
1 Title
BROADWELL MCP (PROCESSOR POWER)
Size Document Number
C Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 11 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

+3VAUX

R323 2 1 0_0402_5% +VCCPGPPA

+1.00VAUX +VCCMPHYGTAON_1P0_LS ?
SKL_ULT
U95O
PL15
1 2 3.5A CPU POWER 4 OF 4 R325 2 1 0_0402_5% +VCCPGPPB
BLM15PX330SN1D_2P +VCCPRIM_1P0 AB19 1
1 AB20 VCCPRIM_1P0 AK15 +VCCPGPPA C74
PC171 VCCPRIM_1P0 VCCPGPPA 1U_0201_10V6K
0.1u_0201_10V6K +VCCPRIM_CORE P18 AG15 +VCCPGPPB
VCCPRIM_1P0 VCCPGPPB Y16 +VCCPGPPC
VCCPGPPC 2
2 AF18 Y15 +VCCPGPPD
AF19 VCCPRIM_CORE VCCPGPPD T16 +VCCPGPPE
D VCCPRIM_CORE VCCPGPPE D
V20 AF16 +VCCPGPPF
+VCCDSW_1P0 V21 VCCPRIM_CORE VCCPGPPF AD15 +VCCPGPPG R326 2 1 0_0402_5% +VCCPGPPC
VCCPRIM_CORE VCCPGPPG 1
AL1 V19 +VCCPRIM_3P3 C75
DCPDSW_1P0 VCCPRIM_3P3_V19 1U_0201_10V6K
1
+1.00VAUX C7 +VCCMPHYAON_1P0 K17 T1 +VCCDTS_1P0
+VCCMPHYAON_1P0_C VCCMPHYAON_1P0 VCCPRIM_1P0_T1 2
1U_0201_10V6K L1
VCCMPHYAON_1P0 AA1 +VCCATS_1P8
L15 1 2
2 +VCCMPHYGT_1P0 N15 VCCATS_1P8 VCCRTC
BLM15PX330SN1D_2P VCCMPHYGT_1P0_N15
N16 AK17 +VCCPRTCPRIM_3P3 R327 2 1 0_0402_5% +VCCPGPPE
N17 VCCMPHYGT_1P0_N16 VCCRTCPRIM_3P3 1
+VCCSA +VCCPRIM_CORE VCCMPHYGT_1P0_N17
P15 AK19 C76
P16 VCCMPHYGT_1P0_P15 VCCRTC_AK19 BB14 1U_0201_10V6K
L17 1 2 @ 2.57A
VCCMPHYGT_1P0_P16 VCCRTC_BB14
BLM15PX330SN1D_2P 2
+VCCAMPHYPLL_1P0 K15 BB10 VCCRTCEXT
1 VCCAMPHYPLL_1P0 DCPRTC
C73 L15
VCCAMPHYPLL_1P0 A14 +VCC19P2_1P0
1U_0201_10V6K VCCCLK1 2
+1.00VAUX +VCCAPLL_1P0 V15 C430 R329 2 1 0_0402_5% +VCCPGPPD
2 VCCAPLL_1P0 K19 +VCCCLK2 0.1u_0201_10V6K
AB17 VCCCLK2
Y18 VCCPRIM_1P0_AB17 L21 +VCCCLK3 1
VCCPRIM_1P0_Y18 VCCCLK3
+VCCPDSW_3P3 AD17 N20 +VCCCLK4
AD18 VCCDSW_3P3_AD17 VCCCLK4
AJ17 VCCDSW_3P3_AD18 L19
VCCDSW_3P3_AJ17 VCCCLK5 +VCCCLK5 R330 2 1 0_0402_5% +VCCPGPPG
+VCCPAZIO AJ19 A10 +VCCCLK6
VCCHDA VCCCLK6 1
+1.00VAUX
+VCCPSPI AJ16 AN11 TP77 1 C65
VCCSPI GPP_B0/CORE_VID0 AN13 TP78 1 47U_0603_4V
+VCCPRIM_1P0 +VCCSRAM_1P0 AF20 GPP_B1/CORE_VID1
L16 1 2 VCCSRAM_1P0 2
BLM15PX121SN1D_2P AF21
T19 VCCSRAM_1P0
1 VCCSRAM_1P0
C54 T20
VCCSRAM_1P0
1U_0201_10V6K
+VCCPRIM_3P3 AJ21 +1.8VAUX
2 VCCPRIM_3P3_AJ21
C +VCCFHV AK20 C
VCCPRIM_1P0_AK20
R375 2 1 0_0402_5% +VCCMPHYAON_1P0 +VCCAPLLEBB_1P0 N18
VCCAPLLEBB R332 2 1 0_0402_5% +VCCPGPPF

15 OF 20
SKL_ULT
REV = 1 ? R333 2 1 0_0402_5% +VCCATS_1P8

1
C81
R381 2 1 0_0402_5% +VCCFHV 1U_0201_10V6K
+3VALW
2
R415 2 1 0_0402_5% +VCCDTS_1P0

1
R416 2 1 0_0402_5% +VCC19P2_1P0 +3VAUX
R253
3K_0402_5%
1
C66 +VCCPRTCPRIM_3P3
47U_0603_4V R334 2 1 0_0402_5%

2
R322 1 2 45.3K_0402_1% 1 2
2 C236 C310

0.1u_0201_10V6K
1U_0201_10V6K
+1.00VAUX 2 1
L39 +VCCAPLL_1P0
1 2 D1 2 CH520N4-45GP_DFN1006-2-2 VCCRTC
BLM15PX330SN1D_2P
2 2
C8 C94 +1.00VAUX
2P_0201_10V6K 0.1u_0201_10V6K D2 2 CH520N4-45GP_DFN1006-2-2
1 1 1 2
C5 C93
1U_0201_10V6K
+VCCMPHYAON_1P0_C @ R417 2 1 0_0402_5% +VCCCLK2
R590 1 2 45.3K_0402_1% 0.1u_0201_10V6K
2 1
1 R423 2 1 0_0402_5% +VCCCLK3
B C55 B
1U_0201_10V6K +VCCCLK5
1

2 R428 2 1 0_0402_5% +VCCCLK4


0_0402_5%
R84
R429 2 1 0_0402_5%
2

RTC_VCC R438 2 1 0_0402_5% +VCCCLK6


+VCCMPHYGTAON_1P0_LS
1
C82
L8 1 2 +VCCMPHYGT_1P0 1U_0201_10V6K
BLM15PX330SN1D_2P
2
1 1
C198 C70
47U_0603_4V
1U_0201_10V6K

+3VAUX
2 2
L38
1 2
2 BLM15PX121SN1D_2P +VCCPAZIO
C9
+3VAUX
R376 2 1 0_0402_5% +VCCAMPHYPLL_1P0 2P_0201_50V8J
1
2
1 C77 R318 2 1 0_0402_5% +VCCPRIM_3P3
C56
1U_0201_10V6K
0.1u_0201_10V6K
1
2 1
C58
1U_0201_10V6K
L9 1 2 +VCCSRAM_1P0 2
BLM15PX121SN1D_2P
1
A C71 A
1U_0201_10V6K
2 LENOVO.CRDN
Title
+3VAUX
R401 2 1 0_0402_5% +VCCAPLLEBB_1P0
+3VAUX BROADWELL MCP (PCH POWER)
1 +VCCPDSW_3P3 Size Document Number
L10 1 2 C Rev V1.0
C72
BLM15PX121SN1D_2P 1 R316 2 1 0_0402_5% +VCCPSPI YOGA4
1U_0201_10V6K
C85 Date: Monday, July 27, 2015 Sheet 12 of 37
2 1U_0201_10V6K "PROPERTY NOTE: this document contains information confidential and
2 property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
D

Rev V1.0

property to LENOVO PND and shall not be reproduced or transferred to other documents
37
LENOVO.CRDN

or disclosed to others or used for any purpose other than that for which it was
of
"PROPERTY NOTE: this document contains information confidential and
13
BROADWELL MCP (DISPLAY SIDEBAND)

obtained without the expressed written consent of LENOVO PND."


Sheet
1

1
Monday, July 27, 2015
Document Number
YOGA4
Date:
Size
Title

C
C221

22U_0402_4V6M
1

2
C356

22U_0402_4V6M
1

2
C401

1U_0201_10V6K
C220

22U_0402_4V6M
1

2
2

2
C399

1U_0201_10V6K
C219

22U_0402_4V6M
1

22U_0402_4V6M
C97

C398

1U_0201_10V6K
C119
1

22U_0402_4V6M
1

47U_0603_4V
C78

22U_0402_4V6M
C96

C218
C397
1

1U_0201_10V6K 22U_0402_4V6M
C394

1U_0201_10V6K
1

2
1

2
1

22U_0402_4V6M
C95

C353
1

22U_0402_4V6M 10U_0402_6.3V6M
C393

C91

1U_0201_10V6K
C396

1U_0201_10V6K
1

2
1

2
1

10U_0402_6.3V6M
C23

2
1

10U_0402_6.3V6M
C379

C295
C48

1U_0201_10V6K 220U_B12
1

2
C352

C395
1

22U_0402_4V6M 1U_0201_10V6K

2
10U_0402_6.3V6M
C22

+
1

2
1

10U_0402_6.3V6M
C378

C92

1U_0201_10V6K
1

C413
1

1U_0201_10V6K
10U_0402_6.3V6M
C21

+VCCIO

2
1

10U_0402_6.3V6M
C340

C32
0.1u_0201_10V6K
1

C412
1U_0201_10V6K
2

10U_0402_6.3V6M
C20

2
C355
3

3
1

22U_0402_4V6M
C339

0.1u_0201_10V6K

C411
1U_0201_10V6K
10U_0402_6.3V6M
C19

2
C354
1

22U_0402_4V6M

2
C337

10U_0402_6.3V6M 0.1u_0201_10V6K
C18

C410
1U_0201_10V6K

C104
22U_0402_4V6M
1

2
1

2
C102

C440
22U_0402_4V6M 1U_0201_10V6K
+1.2VSUS

2
C103
22U_0402_4V6M

C420
1U_0201_10V6K

2
C105
22U_0402_4V6M

C419
1U_0201_10V6K

2
C200

10U_0402_6.3V6M

2
10U_0402_6.3V6M
1

C80

C418
1U_0201_10V6K

2
C196

10U_0402_6.3V6M

2
C439
1U_0201_10V6K
10U_0402_6.3V6M
1

C46
4

4
1

2
C108

C428

22U_0402_4V6M 1U_0201_10V6K

C417
1U_0201_10V6K

C180
10U_0402_6.3V6M
1

C438
1U_0201_10V6K

2
10U_0402_6.3V6M

C83
1

2
C106

22U_0402_4V6M

2
C187
C427

1U_0201_10V6K 10U_0402_6.3V6M

C416
1U_0201_10V6K
1

C437
1U_0201_10V6K
10U_0402_6.3V6M

C25
1

2
1

2
C107

22U_0402_4V6M

2
C186
C426

1U_0201_10V6K 10U_0402_6.3V6M
1

C415
47U_0603_4V 1U_0201_10V6K

C84
1

C436
1U_0201_10V6K
C109

22U_0402_4V6M

2
1

2
C188
C425

1U_0201_10V6K 10U_0402_6.3V6M
1

2
1

C435
10U_0402_6.3V6M 1U_0201_10V6K
C88

GFX_CORE
C145
C424 1U_0201_10V6K 10U_0402_6.3V6M

2
1

2
1

2
10U_0402_6.3V6M
C87

C194

C434
47U_0603_4V 1U_0201_10V6K
1

C423
1U_0201_10V6K

2
1

2
10U_0402_6.3V6M
C89
1

C422
1U_0201_10V6K

+VCCSA
10U_0402_6.3V6M
C86
5

5
1

2
1

C421
47U_0603_4V 1U_0201_10V6K
C90
1

2
CPU_CORE

A
5 4 3 2 1

D D

SKL_ULT
U95P ?
U95Q
SKL_ULT ? SKL_ULT ?
U95R
GND 1 OF 3
GND 2 OF 3
GND 3 OF 3
A5 AL65
A67 VSS VSS AL66 AT63 BA49 F8 L18
VSS VSS VSS VSS G10 VSS VSS L2
A70 AM13 AT68 BA53
VSS VSS VSS VSS G22 VSS VSS L20
AA2 AM21 AT71 BA57
VSS VSS VSS VSS G43 VSS VSS L4
AA4 AM25 AU10 BA6
VSS VSS VSS VSS G45 VSS VSS L8
AA65 AM27 AU15 BA62
VSS VSS VSS VSS G48 VSS VSS N10
AA68 AM43 AU20 BA66
VSS VSS VSS VSS G5 VSS VSS N13
AB15 AM45 AU32 BA71
VSS VSS VSS VSS G52 VSS VSS N19
AB16 AM46 AU38 BB18
VSS VSS VSS VSS G55 VSS VSS N21
AB18 AM55 AV1 BB26
VSS VSS VSS VSS G58 VSS VSS N6
AB21 AM60 AV68 BB30
VSS VSS VSS VSS G6 VSS VSS N65
AB8 AM61 AV69 BB34
VSS VSS VSS VSS G60 VSS VSS N68
AD13 AM68 AV70 BB38
VSS VSS VSS VSS G63 VSS VSS P17
AD16 AM71 AV71 BB43
VSS VSS VSS VSS G66 VSS VSS P19
AD19 AM8 AW10 BB55
VSS VSS VSS VSS H15 VSS VSS P20
AD20 AN20 AW12 BB6
VSS VSS VSS VSS H18 VSS VSS P21
AD21 AN23 AW14 BB60
VSS VSS VSS VSS H71 VSS VSS R13
AD62 AN28 AW16 BB64
VSS VSS VSS VSS J11 VSS VSS R6
AD8 AN30 AW18 BB67
VSS VSS VSS VSS J13 VSS VSS T15
AE64 AN32 AW21 BB70
VSS VSS VSS VSS J25 VSS VSS T17
AE65 AN33 AW23 C1
VSS VSS VSS VSS J28 VSS VSS T18
AE66 AN35 AW26 C25
VSS VSS VSS VSS J32 VSS VSS T2
AE67 AN37 AW28 C5
VSS VSS VSS VSS J35 VSS VSS T21
AE68 AN38 AW30 D10
C VSS VSS VSS VSS J38 VSS VSS T4 C
AE69 AN40 AW32 D11
VSS VSS VSS VSS J42 VSS VSS U10
AF1 AN42 AW34 D14
VSS VSS VSS VSS J8 VSS VSS U63
AF10 AN58 AW36 D18
VSS VSS VSS VSS K16 VSS VSS U64
AF15 AN63 AW38 D22
VSS VSS VSS VSS K18 VSS VSS U66
AF17 AP10 AW41 D25
VSS VSS VSS VSS K22 VSS VSS U67
AF2 AP18 AW43 D26
VSS VSS VSS VSS K61 VSS VSS U69
AF4 AP20 AW45 D30
VSS VSS VSS VSS K63 VSS VSS U70
AF63 AP23 AW47 D34
VSS VSS VSS VSS K64 VSS VSS V16
AG16 AP28 AW49 D39
VSS VSS VSS VSS K65 VSS VSS V17
AG17 AP32 AW51 D44
VSS VSS VSS VSS K66 VSS VSS V18
AG18 AP35 AW53 D45
VSS VSS VSS VSS K67 VSS VSS W13
AG19 AP38 AW55 D47
VSS VSS VSS VSS K68 VSS VSS W6
AG20 AP42 AW57 D48
VSS VSS VSS VSS K70 VSS VSS W9
AG21 AP58 AW6 D53
VSS VSS VSS VSS K71 VSS VSS Y17
AG71 AP63 AW60 D58
VSS VSS VSS VSS L11 VSS VSS Y19
AH13 AP68 AW62 D6
VSS VSS VSS VSS L16 VSS VSS Y20
AH6 AP70 AW64 D62
VSS VSS VSS VSS L17 VSS VSS Y21
AH63 AR11 AW66 D66
VSS VSS VSS VSS VSS VSS
AH64 AR15 AW8 D69
VSS VSS AY66 VSS VSS E11
AH67 AR16
VSS VSS B10 VSS VSS E15
AJ15 AR20
VSS VSS B14 VSS VSS E18 18 OF 20
AJ18 AR23
VSS VSS B18 VSS VSS E21 SKL_ULT
AJ20 AR28
VSS VSS B22 VSS VSS E46 REV = 1 ?
AJ4 AR35
VSS VSS B30 VSS VSS E50
AK11 AR42
VSS VSS B34 VSS VSS E53
AK16 AR43
VSS VSS B39 VSS VSS E56
AK18 AR45
VSS VSS B44 VSS VSS E6
AK21 AR46
VSS VSS B48 VSS VSS E65
AK22 AR48
VSS VSS B53 VSS VSS E71
AK27 AR5
VSS VSS B58 VSS VSS F1
AK63 AR50
VSS VSS B62 VSS VSS F13
AK68 AR52
VSS VSS B66 VSS VSS F2
AK69 AR53
VSS VSS B71 VSS VSS F22
AK8 AR55
VSS VSS BA1 VSS VSS F23
AL2 AR58
VSS VSS BA10 VSS VSS F27
AL28 AR63
VSS VSS BA14 VSS VSS F28
AL32 AR8
VSS VSS BA18 VSS VSS F32
B AL35 AT2 B
VSS VSS BA2 VSS VSS F33
AL38 AT20
VSS VSS BA23 VSS VSS F35
AL4 AT23
VSS VSS BA28 VSS VSS F37
AL45 AT28
VSS VSS BA32 VSS VSS F38
AL48 AT35
VSS VSS BA36 VSS VSS F4
AL52 AT4
VSS VSS F68 VSS VSS F40
AL55 AT42
VSS VSS BA45 VSS VSS F42
AL58 AT56
VSS VSS VSS VSS BA41
AL64 AT58
VSS VSS VSS

17 OF 20
16 OF 20
SKL_ULT
REV = 1 ? SKL_ULT
REV = 1 ?

A A

LENOVO.CRDN
Title
BROADWELL MCP (GND)
Size Document Number
C Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 14 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

U95T SKL_ULT ?

SPARE +VCCST_CPU

AW69 F6
RSVD_AW69 RSVD_F6

2
+1.8VAUX AW68 E3
AU56 RSVD_AW68 RSVD_E3 C11
AW48 RSVD_AU56 RSVD_C11 B11 R254
D
C7 RSVD_AW48 RSVD_B11 A11 150_0402_5%
D

R498 2 10_0402_5% RSVD_1V8 RSVD_1V8 U12 RSVD_C7 RSVD_A11 D12


RSVD_U12 RSVD_D12

1
U11 C12
H11 RSVD_U11 RSVD_C12 F52 FIVR_EN
RSVD_H11 RSVD_F52

20 OF 20
SKL_ULT
REV = 1 ?

?
SKL_ULT
U95S

RESERVED SIGNALS-1

1K_0402_1% 2 @ 1 R265 CFG0 CFG0 E68 BB68


1 B67 CFG[0] RSVD_TP_BB68 BB69
TESTPAD TP36 CFG[1] RSVD_TP_BB69
1K_0402_1% 1 2 R268 CFG4 TESTPAD TP13
1 D65
1 D67 CFG[2] AK13
TESTPAD TP37 CFG[3] RSVD_TP_AK13
CFG4 E70 AK12
1 C68 CFG[4] RSVD_TP_AK12
TESTPAD TP43 CFG[5]
1 D68 BB2
TESTPAD TP22 CFG[6] RSVD_BB2
C67 BA3
F71 CFG[7] RSVD_BA3
1 G69 CFG[8]
C TESTPAD TP26 C
F70 CFG[9] AU5
G68 CFG[10] TP5 AT5
H70 CFG[11] TP6
G71 CFG[12]
H69 CFG[13] D5
G70 CFG[14] RSVD_D5 D4
CFG[15] RSVD_D4 B2
E63 RSVD_B2 C2
F63 CFG[16] RSVD_C2
CFG[17] B3
E66 RSVD_B3 A3
F66 CFG[18] RSVD_A3
CFG[19] AW1
49.9_0402_1% 1 2 R11 E60 RSVD_AW1
CFG_RCOMP E1
1 TP45 ITP_PMODE E8 RSVD_E1 E2
ITP_PMODE RSVD_E2
AY2 BA4
AY1 RSVD_AY2 RSVD_BA4 BB4
RSVD_AY1 RSVD_BB4
D1 A4
D3 RSVD_D1 RSVD_A4 C4
RSVD_D3 RSVD_C4
K46 BB5
K45 RSVD_K46 TP4
RSVD_K45 A69
AL25 RSVD_A69 B69
AL27 RSVD_AL25 RSVD_B69
RSVD_AL27 AY3
RSVD_AY3

2
C71
B70 RSVD_C71 D71 R488
RSVD_B70 RSVD_D71 C70
RSVD_C70 0_0402_5%
F60
RSVD_F60 C54
RSVD_C54

1
A52 D54
RSVD_A52 RSVD_D54
BA70 AY4
B
BA68 RSVD_TP_BA70 TP1 BB3 B
RSVD_TP_BA68 TP2
J71 AY71
RSVD_J71 VSS_AY71

2
J68 AR56
RSVD_J68 ZVM# ZVM_N 34 R490
F65 AW71 0_0402_5%
G65 VSS_F65 RSVD_TP_AW71 AW70
VSS_G65 RSVD_TP_AW70

1
F61 AP56 TP49 1
E61 RSVD_F61 MSM# C64
RSVD_E61 PROC_SELECT#

19 OF 20 +VCCST_CPU
SKL_ULT
REV = 1 ?
R411
1 2

100K_0402_5%

A A

LENOVO.CRDN
Title
BROADWELL MCP (MISC THERM CPU JTAG)
Size Document Number
C Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 15 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

+3V +3VDX_TPM_VDD

R40 2 1 0_0402_5%
@

+3VDX_TPM_VHIO
+3VDX_SUS +3V_TPM_VSB

D D

SERIRQ 10K_0402_5% 1 2 R425


R41 2 1 0_0402_5%

+3VAUX @
CLKRUN_N 10K_0402_5% 1 2 R439

SPI_IRQ 10K_0402_5% 1 2 R460


R46 2 1 0_0402_5%
SPI_CS_N 10K_0402_5% 1 2 R461
@

+3V +3VDX_TPM_VHIO SERIRQ 10K_0402_5% 1 2 R462

R59 2 1 0_0402_5%

+3VAUX @
+3VDX_TPM_VDD

R60 2 1 0_0402_5%
@
@
C C292 C

0.1u_0402_6.3V6M

+3VDX_TPM_VHIO +3V_TPM_VSB

10U_0402_6.3V6M
@ @

C232
C290 C291
0.1u_0402_6.3V6M 0.1u_0402_6.3V6M

@
R165 @ 33_0402_5%
9,27 PCH_SI
R168 @ 33_0402_5%
9,27 PCH_SO
R173 @ 33_0402_5%
9 PCH_SCE1 N
R72 @ 0_0402_5%
9,27 PCH_SCK

U11 @

B B

9, 27 LPC_AD3_ESPI_IO3 R47 2 @ 1 0_0402_5%


9, 27 LPC_AD3_ESPI_IO2 R50 2 @ 1 0_0402_5% SPI_IRQ
9, 27 LPC_AD3_ESPI_IO1 R51 2 @ 1 0_0402_5%
9, 22 LPC_AD3_ESPI_IO0 R52 2 @ 1 0_0402_5%
R54 2 @ 1 0_0402_5% SPI_CS_N
9, 27 LPC_FRAME_N_ESPI_CS_N
SERIRQ

9 CLK_PCI_LPC_TPM
2 R57 1CLKRUN_N
9,27 PM_CLKRUN_N 2 R56 1 0_0402_5%
8,20,21,27 PLT_RST_N
0_0402_5%

NPCT650LBAYX_QFN32_5X5

A A

LENOVO.CRDN
Title
xxxxxx
Size Document Number
C Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 16 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

U24 3 M_A_DQ[15:0] U25 3 M_A_DQ[31:16]

P3 G2 M_A_DQ6 P3 G2 M_A_DQ21
3,17,19 M_A_MA0 A0 DQL0 3,17,19 M_A_MA0 A0 DQL0
P7 F7 M_A_DQ7 P7 F7 M_A_DQ20
3,17,19 M_A_MA1 A1 DQL1 3,17,19 M_A_MA1 A1 DQL1
R3 H3 M_A_DQ2 R3 H3 M_A_DQ17
3,17,19 M_A_MA2 A2 DQL2 3,17,19 M_A_MA2 A2 DQL2
N7 H7 M_A_DQ5 N7 H7 M_A_DQ18
3,17,19 M_A_MA3 A3 DQL3 3,17,19 M_A_MA3 A3 DQL3
N3 H2 M_A_DQ3 N3 H2 M_A_DQ22
3,17,19 M_A_MA4 A4 DQL4 3,17,19 M_A_MA4 A4 DQL4
P8 H8 M_A_DQ4 P8 H8 M_A_DQ23
3,17,19 M_A_MA5 A5 DQL5 3,17,19 M_A_MA5 A5 DQL5
P2 J3 M_A_DQ0 P2 J3 M_A_DQ19
3,17,19 M_A_MA6 A6 DQL6 3,17,19 M_A_MA6 A6 DQL6
R8 J7 M_A_DQ1 R8 J7 M_A_DQ16
3,17,19 M_A_MA7 A7 DQL7 3,17,19 M_A_MA7 A7 DQL7
R2 A3 M_A_DQ15 R2 A3 M_A_DQ28
3,17,19 M_A_MA8 A8 DQU0 3,17,19 M_A_MA8 A8 DQU0
R7 B8 M_A_DQ13 R7 B8 M_A_DQ26
3,17,19 M_A_MA9 A9 DQU1 3,17,19 M_A_MA9 A9 DQU1
M3 C3 M_A_DQ14 M3 C3 M_A_DQ24
3,17,19 M_A_MA10 A10/AP DQU2 3,17,19 M_A_MA10 A10/AP DQU2
T2 C7 M_A_DQ10 T2 C7 M_A_DQ27
3,17,19 M_A_MA11 A11 DQU3 3,17,19 M_A_MA11 A11 DQU3
M7 C2 M_A_DQ11 M7 C2 M_A_DQ29
3,17,19 M_A_MA12 A12/BC# DQU4 3,17,19 M_A_MA12 A12/BC# DQU4
D T8 C8 M_A_DQ8 T8 DQU5 C8 M_A_DQ30 D
3,17,19 M_A_MA13 A13 DQU5 3,17,19 M_A_MA13 A13
L2 D3 M_A_DQ9 L2 DQU6 D3 M_A_DQ25
3,17,19 M_A_MA14 A14/WE# DQU6 +1.2VDDQ 3,17,19 M_A_MA14 A14/WE# +1.2VDDQ
M8 D7 M_A_DQ12 M8 D7 M_A_DQ31
3,17,19 M_A_MA15 A15/CAS# DQU7 3,17,19 M_A_MA15 A15/CAS# DQU7
L8 L8
3,17,19 M_A_MA16 A16/RAS# 3,17,19 M_A_MA16 A16/RAS#
N2 B3 N2 VDD1 B3
3,17,19 M_A_BA0 BA0 VDD1 3,17,19 M_A_BA0 BA0
N8 B9 N8 VDD2 B9
3,17,19 M_A_BA1 BA1 VDD2 3,17,19 M_A_BA1 BA1
D1 VDD3 D1
VDD3
E2 G7 +1.2VDDQ E2 VDD4 G7
+1.2VDDQ DMU# VDD4 DMU#
E7 J1 E7 VDD5 J1
DML# VDD5 DML#
J9 VDD6 J9
VDD6
VDD7 L1 VDD7 L1
K7 L9 K7 VDD8 L9
3,17,19 M_A_CLK_DDR0_DP CK VDD8 3,17,19 M_A_CLK_DDR0_DP CK
K8 R1 K8 VDD9 R1
3,17,19 M_A_CLK_DDR0_DN CK# VDD9 3,17,19 M_A_CLK_DDR0_DN CK#
K2 T9 K2 VDD10 T9
3,17,19 M_A_CKE0 CKE VDD10 3,17,19 M_A_CKE0 CKE

VDDQ1 A1 VDDQ1 A1
VDDQ2 A9 VDDQ2 A9
K3 VDDQ3 C1 K3 VDDQ3 C1
3,17,19 M_A_ODT0 ODT 3,17,19 M_A_ODT0 ODT
L7 VDDQ4 D9 L7 VDDQ4 D9
3,17,19 M_A_CS0_N CS# 3,17,19 M_A_CS0_N CS#
VDDQ5 F2 VDDQ5 F2
VDDQ6 F8 VDDQ6 F8
VDDQ7 G1 VDDQ7 G1
A7 VDDQ8 G9 A7 VDDQ8 G9
3 M_A_DQS_DN1 DQSU# 3 M_A_DQS_DN3 DQSU#
B7 VDDQ9 J2 3 M_A_DQS_DP3
B7 VDDQ9 J2
3 M_A_DQS_DP1 DQSU DQSU
F3 VDDQ10 J8 3 M_A_DQS_DN2 F3 VDDQ10 J8
3 M_A_DQS_DN0 DQSL# DQSL#
G3 3 M_A_DQS_DP2 G3
3 M_A_DQS_DP0 DQSL DQSL

3,17,18
3,17,1 DDR_RESET_N
P1
RESET# VREFCA M1 +V_VREF_CA_CHA 17,19 3,17,1
3,17,18 DDR_RESET_N
P1
RESET# VREFCA M1 +V_VREF_CA_CHA 17,19
1 1
C111 2 240_0402_1%
C112
R283 1 2 240_0402_1% F9 R284 1 F9
ZQ ZQ
A2 0.047U_0201_6.3V A2 0.047U_0201_6.3V
VSSQ1 2 VSSQ1 2
L3 VSSQ2 A8 L3 VSSQ2 A8
3,17,19 M_A_ACT_N ACT# 3,17,19 M_A_ACT_N ACT#
M2 VSSQ3 C9 M2 VSSQ3 C9
3,17,19 M_A_BG0 BG0 3,17,19 M_A_BG0 BG0
1 N9 VSSQ4 D2 1 N9 VSSQ4 D2
TESTPAD TP93 TEN TESTPAD TP94 TEN
P9 VSSQ5 D8 P9 VSSQ5 D8
3,17,19 M_A_ALERT_N ALERT# 3,17,19 M_A_ALERT_N ALERT#
T3 VSSQ6 E3 T3 VSSQ6 E3
3,17,19 M_A_PAR PAR 3,17,19 M_A_PAR PAR
VSSQ7 E8 VSSQ7 E8
VSSQ8 F1 VSSQ8 F1
M_A_BG1_R M9 BG1 H1 M_A_BG1_R M9 BG1 H1
VSSQ9 VSSQ9
VSSQ10 H9 VSSQ10 H9
R579 1 2 240_0402_1% E9 R579 1 2 240_0402_1% E9
UZQ UZQ
C C
VSS1 B2 VSS1 B2
+2.5VDDQ +2.5VDDQ
T7 NC VSS2 E1 T7 NC VSS2 E1
B1 VPP B1 VPP
R9 VPP1 VSS4 G8 R9 VPP1 VSS4 G8
VSS5 K1 VSS5 K1
VSS6 K9 VSS6 K9
+0.6V
VSS8 N1 VSS8 N1
VSS9 T1 VSS9 T1

1
K4A8G165WB-BCPB_FBGA96 R580 K4A8G165WB-BCPB_FBGA96
35_0402_1%
M_A_BG1_R 2 1 R146
0_0402_5% 2
M_A_BG1 3
@ 1 R153
0_0402_5% 2

U26 3 M_A_DQ[47:32] DDP: Stuff R146 and R580, Dummy R153; R575~R579 @ 240ohm U27 3 M_A_DQ[63:48]
SDP: Dummy R146 and R580, Stuff R153; R575~R579 @ 0ohm
P3 G2 M_A_DQ39 P3 G2 M_A_DQ49
3,17,19 M_A_MA0 A0 DQL0 3,17,19 M_A_MA0 A0 DQL0
P7 F7 M_A_DQ34 P7 F7 M_A_DQ51
3,17,19 M_A_MA1 A1 DQL1 3,17,19 M_A_MA1 A1 DQL1
R3 H3 M_A_DQ35 R3 H3 M_A_DQ52
3,17,19 M_A_MA2 A2 DQL2 3,17,19 M_A_MA2 A2 DQL2
N7 H7 M_A_DQ36 N7 H7 M_A_DQ54
3,17,19 M_A_MA3 A3 DQL3 3,17,19 M_A_MA3 A3 DQL3
N3 H2 M_A_DQ38 N3 H2 M_A_DQ48
3,17,19 M_A_MA4 A4 DQL4 3,17,19 M_A_MA4 A4 DQL4
P8 H8 M_A_DQ39 P8 H8 M_A_DQ50
3,17,19 M_A_MA5 A5 DQL5 3,17,19 M_A_MA5 A5 DQL5
P2 J3 M_A_DQ32 P2 J3 M_A_DQ53
3,17,19 M_A_MA6 A6 DQL6 3,17,19 M_A_MA6 A6 DQL6
R8 J7 M_A_DQ33 R8 J7 M_A_DQ55
3,17,19 M_A_MA7 A7 DQL7 3,17,19 M_A_MA7 A7 DQL7
R2 A3 M_A_DQ43 R2 A3 M_A_DQ57
3,17,19 M_A_MA8 A8 DQU0 3,17,19 M_A_MA8 A8 DQU0
R7 B8 M_A_DQ41 R7 B8 M_A_DQ63
3,17,19 M_A_MA9 A9 DQU1 3,17,19 M_A_MA9 A9 DQU1
B M3 C3 M_A_DQ46 M3 C3 M_A_DQ62 B
3,17,19 M_A_MA10 A10/AP DQU2 3,17,19 M_A_MA10 A10/AP DQU2
T2 C7 M_A_DQ45 T2 C7 M_A_DQ58
3,17,19 M_A_MA11 A11 DQU3 3,17,19 M_A_MA11 A11 DQU3
M7 C2 M_A_DQ47 M7 C2 M_A_DQ56
3,17,19 M_A_MA12 A12/BC# DQU4 3,17,19 M_A_MA12 A12/BC# DQU4
T8 C8 M_A_DQ44 T8 DQU5 C8 M_A_DQ61
3,17,19 M_A_MA13 A13 DQU5 3,17,19 M_A_MA13 A13
L2 D3 M_A_DQ42 L2 DQU6 D3 M_A_DQ60
3,17,19 M_A_MA14 A14/WE# DQU6 +1.2VDDQ 3,17,19 M_A_MA14 A14/WE# +1.2VDDQ
M8 D7 M_A_DQ40 M8 D7 M_A_DQ59
3,17,19 M_A_MA15 A15/CAS# DQU7 3,17,19 M_A_MA15 A15/CAS# DQU7
L8 L8
3,17,19 M_A_MA16 A16/RAS# 3,17,19 M_A_MA16 A16/RAS#
N2 B3 N2 VDD1 B3
3,17,19 M_A_BA0 BA0 VDD1 3,17,19 M_A_BA0 BA0
N8 B9 N8 VDD2 B9
3,17,19 M_A_BA1 BA1 VDD2 3,17,19 M_A_BA1 BA1
D1 VDD3 D1
VDD3
E2 G7 +1.2VDDQ E2 VDD4 G7
+1.2VDDQ DMU# VDD4 DMU#
E7 J1 E7 VDD5 J1
DML# VDD5 DML#
J9 VDD6 J9
VDD6
VDD7 L1 VDD7 L1
K7 L9 K7 VDD8 L9
3,17,19 M_A_CLK_DDR0_DP CK VDD8 3,17,19 M_A_CLK_DDR0_DP CK
K8 R1 K8 VDD9 R1
3,17,19 M_A_CLK_DDR0_DN CK# VDD9 3,17,19 M_A_CLK_DDR0_DN CK#
K2 T9 K2 VDD10 T9
3,17,19 M_A_CKE0 CKE VDD10 3,17,19 M_A_CKE0 CKE

VDDQ1 A1 VDDQ1 A1
VDDQ2 A9 VDDQ2 A9
K3 VDDQ3 C1 K3 VDDQ3 C1
3,17,19 M_A_ODT0 ODT 3,17,19 M_A_ODT0 ODT
L7 VDDQ4 D9 L7 VDDQ4 D9
3,17,19 M_A_CS0_N CS# 3,17,19 M_A_CS0_N CS#
VDDQ5 F2 VDDQ5 F2
VDDQ6 F8 VDDQ6 F8
VDDQ7 G1 VDDQ7 G1
A7 VDDQ8 G9 A7 VDDQ8 G9
3 M_A_DQS_DN5 DQSU# 3 M_A_DQS_DN7 DQSU#
B7 VDDQ9 J2 B7 VDDQ9 J2
3 M_A_DQS_DP5 DQSU 3 M_A_DQS_DP7 DQSU
F3 VDDQ10 J8 F3 VDDQ10 J8
3 M_A_DQS_DN4 DQSL# 3 M_A_DQS_DN6 DQSL#
G3 G3
3 M_A_DQS_DP4 DQSL 3 M_A_DQS_DP6 DQSL

3,17,1
3,17,18 DDR_RESET_N
P1
RESET# VREFCA M1 +V_VREF_CA_CHA 17,19 3,17,1
3,17,18 DDR_RESET_N
P1
RESET# VREFCA M1 +V_VREF_CA_CHA 17,19
1 1
C114 2 240_0402_1%
C113
R288 1 2 240_0402_1% F9 R285 1 F9
ZQ ZQ
A2 0.047U_0201_6.3V A2 0.047U_0201_6.3V
VSSQ1 2 VSSQ1 2
L3 VSSQ2 A8 L3 VSSQ2 A8
3,17,19 M_A_ACT_N ACT# 3,17,19 M_A_ACT_N ACT#
M2 VSSQ3 C9 M2 VSSQ3 C9
3,17,19 M_A_BG0 BG0 3,17,19 M_A_BG0 BG0
1 N9 VSSQ4 D2 1 N9 VSSQ4 D2
TESTPAD TP96 TEN TESTPAD TP95 TEN
P9 VSSQ5 D8 P9 VSSQ5 D8
3,17,19 M_A_ALERT_N ALERT# 3,17,19 M_A_ALERT_N ALERT#
T3 VSSQ6 E3 T3 VSSQ6 E3
3,17,19 M_A_PAR PAR 3,17,19 M_A_PAR PAR
VSSQ7 E8 VSSQ7 E8
VSSQ8 F1 VSSQ8 F1
A M_A_BG1_R M9 BG1 H1 M_A_BG1_R M9 BG1 H1 A
VSSQ9 VSSQ9
VSSQ10 H9 VSSQ10 H9
R576 1 2 240_0402_1% E9 R577 1 2 240_0402_1% E9
UZQ UZQ

VSS1 B2 VSS1 B2
+2.5VDDQ +2.5VDDQ
T7 NC VSS2 E1 T7 NC VSS2 E1
B1 VPP B1 VPP
R9 VPP1 VSS4 G8 R9 VPP1 VSS4 G8
VSS5 K1 VSS5 K1 LENOVO.CRDN
VSS6 K9 VSS6 K9
Title
VSS8 N1 VSS8 N1 LPDDR3-ONBD
VSS9 T1 VSS9 T1
Size Document Number
D Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 17 of 37
K4A8G165WB-BCPB_FBGA96 K4A8G165WB-BCPB_FBGA96
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

U29 3 M_B_DQ[15:0]

U31 3 M_B_DQ[31:16]
P3 G2 M_B_DQ6
3,18,19 M_B_MA0 A0 DQL0
P7 F7 M_B_DQ4
3,18,19 M_B_MA1 A1 DQL1
R3 H3 M_B_DQ5
3,18,19 M_B_MA2 A2 DQL2 P3
N7 H7 M_B_DQ1 DQL0 G2 M_B_DQ16
3,18,19 M_B_MA3 A3 DQL3 3,18,19 M_B_MA0 A0
N3 H2 M_B_DQ7 P7 F7 M_B_DQ22
3,18,19 M_B_MA4 A4 DQL4 3,18,19 M_B_MA1 A1 DQL1
P8 H8 M_B_DQ2 R3 H3 M_B_DQ17
3,18,19 M_B_MA5 A5 DQL5 3,18,19 M_B_MA2 A2 DQL2
P2 J3 M_B_DQ0 N7 H7 M_B_DQ18
3,18,19 M_B_MA6 A6 DQL6 3,18,19 M_B_MA3 A3 DQL3
R8 J7 M_B_DQ3 N3 H2 M_B_DQ20
3,18,19 M_B_MA7 A7 DQL7 3,18,19 M_B_MA4 A4 DQL4
R2 A3 M_B_DQ10 P8 H8 M_B_DQ19
3,18,19 M_B_MA8 A8 DQU0 3,18,19 M_B_MA5 A5 DQL5
R7 B8 M_B_DQ9 P2 J3 M_B_DQ21
3,18,19 M_B_MA9 A9 DQU1 3,18,19 M_B_MA6 A6 DQL6
M3 C3 M_B_DQ15 R8 J7 M_B_DQ23
3,18,19 M_B_MA10 A10/AP DQU2 3,18,19 M_B_MA7 A7 DQL7
T2 C7 M_B_DQ12 R2 A3 M_B_DQ24
3,18,19 M_B_MA11 A11 DQU3 3,18,19 M_B_MA8 A8 DQU0
M7 C2 M_B_DQ14 R7 B8 M_B_DQ27
3,18,19 M_B_MA12 A12/BC# DQU4 3,18,19 M_B_MA9 A9 DQU1
D T8 C8 M_B_DQ13 M3 C3 M_B_DQ25 D
3,18,19 M_B_MA13 A13 DQU5 3,18,19 M_B_MA10 A10/AP DQU2
L2 D3 M_B_DQ11 T2 C7 M_B_DQ30
3,18,19 M_B_MA14 A14/WE# DQU6 +1.2VDDQ 3,18,19 M_B_MA11 A11 DQU3
M8 D7 M_B_DQ8 M7 C2 M_B_DQ29
3,18,19 M_B_MA15 A15/CAS# DQU7 3,18,19 M_B_MA12 A12/BC# DQU4
L8 T8 DQU5 C8 M_B_DQ31
3,18,19 M_B_MA16 A16/RAS# 3,18,19 M_B_MA13 A13
L2 DQU6 D3 M_B_DQ28
3,18,19 M_B_MA14 A14/WE# +1.2VDDQ
N2 B3 M8 D7 M_B_DQ26
3,18,19 M_B_BA0 BA0 VDD1 3,18,19 M_B_MA15 A15/CAS# DQU7
N8 B9 L8
3,18,19 M_B_BA1 BA1 VDD2 3,18,19 M_B_MA16 A16/RAS#
VDD3 D1
E2 G7 N2 VDD1 B3
+1.2VDDQ DMU# VDD4 3,18,19 M_B_BA0 BA0
E7 J1 N8 VDD2 B9
DML# VDD5 3,18,19 M_B_BA1 BA1
J9 VDD3 D1
VDD6
L1 +1.2VDDQ E2 VDD4 G7
VDD7 DMU#
K7 L9 E7 VDD5 J1
3,18,19 M_B_CLK_DDR0_DP CK VDD8 DML#
K8 R1 VDD6 J9
3,18,19 M_B_CLK_DDR0_DN CK# VDD9
K2 T9 VDD7 L1
3,18,19 M_B_CKE0 CKE VDD10
K7 VDD8 L9
3,18,19 M_B_CLK_DDR0_DP CK
K8 VDD9 R1
3,18,19 M_B_CLK_DDR0_DN CK#
A1 K2 VDD10 T9
VDDQ1 3,18,19 M_B_CKE0 CKE
VDDQ2 A9
K3 VDDQ3 C1
3,18,19 M_B_ODT0 ODT A1
L7 VDDQ4 D9 VDDQ1
3,18,19 M_B_CS0_N CS#
F2 VDDQ2 A9
VDDQ5
F8 K3 VDDQ3 C1
VDDQ6 3,18,19 M_B_ODT0 ODT
G1 L7 VDDQ4 D9
VDDQ7 3,18,19 M_B_CS0_N CS#
A7 G9 VDDQ5 F2
3 M_B_DQS_DN1 DQSU# VDDQ8
B7 J2 VDDQ6 F8
3 M_B_DQS_DP1 DQSU VDDQ9
F3 J8 VDDQ7 G1
3 M_B_DQS_DN0 DQSL# VDDQ10
G3 3 M_B_DQS_DN3 A7 VDDQ8 G9
3 M_B_DQS_DP0 DQSL DQSU#
3 M_B_DQS_DP3 B7 VDDQ9 J2
DQSU
3 M_B_DQS_DN2 F3 VDDQ10 J8
DQSL#
G3
3,17,1
3,17,18 DDR_RESET_N
P1
RESET# VREFCA M1 +V_VREF_CA_CHB 18,19 3 M_B_DQS_DP2 DQSL
1
C118
R341 1 2 240_0402_1% F9 ZQ 3,17,1
3,17,18 DDR_RESET_N
P1
RESET# VREFCA M1 +V_VREF_CA_CHB 18,19
0.047U_0201_6.3V 1
A2 C115
VSSQ1 2 1 2 240_0402_1% F9
L3 VSSQ2 A8 R342 ZQ
3,18,19 M_B_ACT_N ACT#
M2 VSSQ3 C9
3,18,19 M_B_BG0 BG0 0.047U_0201_6.3V
1 N9 D2 A2
TESTPAD TP100 TEN VSSQ4 VSSQ1 2
P9 D8 L3 VSSQ2 A8
3,17,19 M_B_ALERT_N ALERT# VSSQ5 3,18,19 M_B_ACT_N ACT#
T3 E3 M2 VSSQ3 C9
3,17,19 M_B_PAR PAR VSSQ6 3,18,19 M_B_BG0 BG0
E8 TESTPAD TP101 1 N9 VSSQ4 D2
VSSQ7 TEN
F1 P9 VSSQ5 D8
VSSQ8 3,17,19 M_B_ALERT_N ALERT#
M_B_BG1_R M9 BG1 H1 T3 VSSQ6 E3
VSSQ9 3,17,19 M_B_PAR PAR
H9 VSSQ7 E8
VSSQ10
R574 1 2 240_0402_1% E9 VSSQ8 F1
UZQ M_B_BG1_R M9 BG1 VSSQ9 H1
H9
VSS1 B2 VSSQ10
+2.5VDDQ 2 240_0402_1% E9
T7 NC VSS2 E1 R575 1 UZQ
B1 VPP
R9 VPP1 VSS4 G8 VSS1 B2
+2.5VDDQ
VSS5 K1 T7 NC VSS2 E1
C VSS6 K9 B1 VPP C
R9 VPP1 VSS4 G8
VSS8 N1 VSS5 K1
VSS9 T1 VSS6 K9

VSS8 N1
+0.6V
VSS9 T1
K4A8G165WB-BCPB_FBGA96

2 K4A8G165WB-BCPB_FBGA96
R581
35_0402_1%
M_B_BG1_R 1 1 R154
0_0402_5% 2
M_B_BG1 3
@ 1 R153
0_0402_5% 2

U30 3 M_B_DQ[47:32] DDP: Stuff R154 and R581, Dummy R163; R571~R574 @ 240ohm
SDP: Dummy R154 and R581, Stuff R163; R571~R574 @ 0ohm 3 M_B_DQ[63:48]
P3
U28
DQL0 G2 M_B_DQ34
3,18,19 M_B_MA0 A0
P7 F7 M_B_DQ39
3,18,19 M_B_MA1 A1 DQL1
R3 H3 M_B_DQ38
3,18,19 M_B_MA2 A2 DQL2 P3
N7 H7 M_B_DQ36 DQL0 G2 M_B_DQ48
3,18,19 M_B_MA3 A3 DQL3 3,18,19 M_B_MA0 A0
N3 H2 M_B_DQ35 P7 F7 M_B_DQ54
3,18,19 M_B_MA4 A4 DQL4 3,18,19 M_B_MA1 A1 DQL1
P8 H8 M_B_DQ37 R3 H3 M_B_DQ49
3,18,19 M_B_MA5 A5 DQL5 3,18,19 M_B_MA2 A2 DQL2
P2 J3 M_B_DQ33 N7 H7 M_B_DQ50
3,18,19 M_B_MA6 A6 DQL6 3,18,19 M_B_MA3 A3 DQL3
R8 J7 M_B_DQ32 N3 H2 M_B_DQ52
3,18,19 M_B_MA7 A7 DQL7 3,18,19 M_B_MA4 A4 DQL4
R2 A3 M_B_DQ41 P8 H8 M_B_DQ55
3,18,19 M_B_MA8 A8 DQU0 3,18,19 M_B_MA5 A5 DQL5
R7 B8 M_B_DQ45 P2 J3 M_B_DQ53
3,18,19 M_B_MA9 A9 DQU1 3,18,19 M_B_MA6 A6 DQL6
M3 C3 M_B_DQ40 R8 J7 M_B_DQ51
3,18,19 M_B_MA10 A10/AP DQU2 3,18,19 M_B_MA7 A7 DQL7
T2 C7 M_B_DQ47 R2 A3 M_B_DQ59
3,18,19 M_B_MA11 A11 DQU3 3,18,19 M_B_MA8 A8 DQU0
M7 C2 M_B_DQ43 R7 B8 M_B_DQ61
3,18,19 M_B_MA12 A12/BC# DQU4 3,18,19 M_B_MA9 A9 DQU1
T8 C8 M_B_DQ44 M3 C3 M_B_DQ58
3,18,19 M_B_MA13 A13 DQU5 3,18,19 M_B_MA10 A10/AP DQU2
L2 D3 M_B_DQ42 T2 C7 M_B_DQ60
3,18,19 M_B_MA14 A14/WE# DQU6 +1.2VDDQ 3,18,19 M_B_MA11 A11 DQU3
M8 D7 M_B_DQ45 M7 C2 M_B_DQ57
3,18,19 M_B_MA15 A15/CAS# DQU7 3,18,19 M_B_MA12 A12/BC# DQU4
L8 T8 DQU5 C8 M_B_DQ62
3,18,19 M_B_MA16 A16/RAS# 3,18,19 M_B_MA13 A13
L2 DQU6 D3 M_B_DQ56
3,18,19 M_B_MA14 A14/WE# +1.2VDDQ
B N2 B3 M8 D7 M_B_DQ63 B
3,18,19 M_B_BA0 BA0 VDD1 3,18,19 M_B_MA15 A15/CAS# DQU7
N8 B9 L8
3,18,19 M_B_BA1 BA1 VDD2 3,18,19 M_B_MA16 A16/RAS#
VDD3 D1
E2 G7 N2 VDD1 B3
+1.2VDDQ DMU# VDD4 3,18,19 M_B_BA0 BA0
E7 J1 N8 VDD2 B9
DML# VDD5 3,18,19 M_B_BA1 BA1
J9 VDD3 D1
VDD6
L1 +1.2VDDQ E2 VDD4 G7
VDD7 DMU#
K7 L9 E7 VDD5 J1
3,18,19 M_B_CLK_DDR0_DP CK VDD8 DML#
K8 R1 VDD6 J9
3,18,19 M_B_CLK_DDR0_DN CK# VDD9
K2 T9 VDD7 L1
3,18,19 M_B_CKE0 CKE VDD10
K7 VDD8 L9
3,18,19 M_B_CLK_DDR0_DP CK
K8 VDD9 R1
3,18,19 M_B_CLK_DDR0_DN CK#
A1 K2 VDD10 T9
VDDQ1 3,18,19 M_B_CKE0 CKE
VDDQ2 A9
K3 VDDQ3 C1
3,18,19 M_B_ODT0 ODT A1
L7 VDDQ4 D9 VDDQ1
3,18,19 M_B_CS0_N CS#
F2 VDDQ2 A9
VDDQ5
F8 K3 VDDQ3 C1
VDDQ6 3,18,19 M_B_ODT0 ODT
G1 L7 VDDQ4 D9
VDDQ7 3,18,19 M_B_CS0_N CS#
A7 G9 VDDQ5 F2
3 M_B_DQS_DN5 DQSU# VDDQ8
B7 J2 VDDQ6 F8
3 M_B_DQS_DP5 DQSU VDDQ9
F3 J8 VDDQ7 G1
3 M_B_DQS_DN4 DQSL# VDDQ10
G3 A7 VDDQ8 G9
3 M_B_DQS_DP4 DQSL 3 M_B_DQS_DN7 DQSU#
B7 VDDQ9 J2
3 M_B_DQS_DP7 DQSU
3 M_B_DQS_DN6 F3 VDDQ10 J8
DQSL#
G3
3,17,1
3,17,18 DDR_RESET_N
P1
RESET# VREFCA M1 +V_VREF_CA_CHB 18,19 3 M_B_DQS_DP6 DQSL
1
C117
R345 1 2 240_0402_1% F9 ZQ 3,17,1
3,17,18 DDR_RESET_N
P1
RESET# VREFCA M1 +V_VREF_CA_CHB 18,19
0.047U_0201_6.3V 1
A2 C116
VSSQ1 2 R343 1 2 240_0402_1% F9
L3 VSSQ2 A8 ZQ
3,18,19 M_B_ACT_N ACT#
M2 VSSQ3 C9
3,18,19 M_B_BG0 BG0 0.047U_0201_6.3V
1 N9 D2 A2
TESTPAD TP103 TEN VSSQ4 VSSQ1 2
P9 D8 L3 VSSQ2 A8
3,17,19 M_B_ALERT_N ALERT# VSSQ5 3,18,19 M_B_ACT_N ACT#
T3 E3 M2 VSSQ3 C9
3,17,19 M_B_PAR PAR VSSQ6 3,18,19 M_B_BG0 BG0
E8 TESTPAD TP102 1 N9 VSSQ4 D2
VSSQ7 TEN
F1 P9 VSSQ5 D8
VSSQ8 3,17,19 M_B_ALERT_N ALERT#
M_B_BG1_R M9 BG1 H1 T3 VSSQ6 E3
VSSQ9 3,17,19 M_B_PAR PAR
H9 VSSQ7 E8
VSSQ10
R572 1 2 240_0402_1% E9 VSSQ8 F1
UZQ M_B_BG1_R M9 BG1 VSSQ9 H1
H9
VSS1 B2 VSSQ10
+2.5VDDQ 2 240_0402_1% E9
T7 NC VSS2 E1 R571 1 UZQ
B1 VPP
R9 VPP1 VSS4 G8 VSS1 B2
+2.5VDDQ
VSS5 K1 T7 NC VSS2 E1
VSS6 K9 B1 VPP
R9 VPP1 VSS4 G8
VSS8 N1 VSS5 K1
VSS9 T1 VSS6 K9

A VSS8 N1 A
VSS9 T1
K4A8G165WB-BCPB_FBGA96

K4A8G165WB-BCPB_FBGA96
LENOVO.CRDN
Title
AUDIO DSP
Size Document Number
C Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 18 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

+0.6V +0.6V 3 +V_DDR_CA_VREF

R346 1 2 35_0402_1%
3,17 M_A_MA0 R347 35_0402_1%
1 2 2 +1.2VDDQ
3,17 M_A_MA1 R331 1 35_0402_1%
R348 1 2 35_0402_1% 3,17 M_A_ODT0
3,17 M_A_MA2 1 2
R349 35_0402_1% R335 1 2 35_0402_1%
3,17 M_A_MA3 3,17 M_A_CS0_N
R312 1 2 35_0402_1%
3,17 M_A_CKE0

2
R350 1 2 35_0402_1% R301 1 2 35_0402_1%
3,17 M_A_MA4 3,17 M_A_CLK_DDR0_DN R319
R351 35_0402_1% R303 1 2 35_0402_1%
3,17 M_A_MA5 1 2 3,17 M_A_CLK_DDR0_DP 1.8K_0402_1%
R352 1 2 35_0402_1%
3,17 M_A_MA6
R353 1 2 35_0402_1%
3,17 M_A_MA7

1
R354 1 2 35_0402_1%
3,17 M_A_MA8 R320 1 2 2.7_0402_1%
R355 1 2 35_0402_1% +V_VREF_CA_CHA 17
3,17 M_A_MA9
D R356 1 2 35_0402_1% +1.2V D
3,17 M_A_MA10 2
R357 1 2 35_0402_1%
3,17 M_A_MA11
R340 C121
35_0402_1% 1 2 49.9_0402_1%
R358

2
1 2 3,17 M_A_ALERT_N 0.022U_0201_6.3V
3,17 M_A_MA12 R344 1 2 49.9_0402_1% 1
R359 1 2 35_0402_1% 3,17 M_B_ALERT_N R337
3,17 M_A_MA13
R360 1 2 35_0402_1% 1.8K_0402_1%
3,17 M_A_MA14

2
R361 1 2 35_0402_1%
3,17 M_A_MA15
R297

1
24.9_0402_1%
R368 1 2 35_0402_1%
3,17 M_A_BA0
R370 1 2 35_0402_1%
3,17 M_A_BA1

1
+0.6V
R362 1 2 35_0402_1%
3,17 M_A_ACT_N
R363 1 2 35_0402_1%
3,17 M_A_BG0
R366 1 2 35_0402_1%
3,17 M_A_PAR
R367 1 2 35_0402_1% R339 1 2 35_0402_1%
3,17 M_A_MA16 3,18 M_B_ODT0
R336 1 2 35_0402_1%
3,18 M_B_CS0_N
R311 1 2 35_0402_1%
3,18 M_B_CKE0 3 +V_DDR1_DQ_VREF
R306 1 2 35_0402_1%
3,18 M_B_CLK_DDR0_DN
R305 1 2 35_0402_1%
+0.6V 3,18 M_B_CLK_DDR0_DP
+1.2VDDQ
R371 1 2 35_0402_1%
3,18 M_B_MA0 R380 35_0402_1%
1 2
3,18 M_B_MA1
R372 1 2 35_0402_1%
3,18 M_B_MA2 1 2
R387 35_0402_1%

2
3,18 M_B_MA3
R313
R388 1 2 35_0402_1% 1.8K_0402_1%
3,18 M_B_MA4
R391 1 2 35_0402_1%
3,18 M_B_MA5
R389 1 2 35_0402_1%
3,18 M_B_MA6

1
R485 1 2 35_0402_1%
3,18 M_B_MA7
R317 2 1 2.7_0402_1%
+V_VREF_CA_CHB 18
R489 1 2 35_0402_1% 2
3,18 M_B_MA8
R509 1 2 35_0402_1%
3,18 M_B_MA9 C120
R507 1 2 35_0402_1%
3,18 M_B_MA10
R536 1 2 35_0402_1% 0.022U_0201_6.3V
3,18 M_B_MA11 1

2
C
R537 35_0402_1% R315 C
1 2

2
3,18 M_B_MA12 1.8K_0402_1%
R549 1 2 35_0402_1%
3,18 M_B_MA13 R321
R548 1 2 35_0402_1%
3,18 M_B_MA14 24.9_0402_1%
R550 1 2 35_0402_1%

1
3,18 M_B_MA15

1
R555 1 2 35_0402_1%
3,18 M_B_BA0 +1.2VSUS +1.2VDDQ
R556 1 2 35_0402_1%
3,18 M_B_BA1

R551 1 2 35_0402_1% PJ1


3,18 M_B_ACT_N
R553 1 2 35_0402_1% 1 2
3,18 M_B_BG0 1 2
R552 1 2 35_0402_1%
3,18 M_B_PAR
R554 1 2 35_0402_1%
3,18 M_B_MA16 JUMP_43X79

+2.5VDDQ +1.2VDDQ
+1.2VDDQ +1.2VDDQ
+2.5VSUS +2.5VDDQ

PJ2 OF 8 PLACE 4 ON EACH SIDE OF CONNECTOR


1 2
1 2
1 1 1 1
1 1 1 1 1 1 1 1 1 1 1 1 1@ 1@ C143 C144 C131 C127
JUMP_43X79 C123 C124 C125 C126 C135 C136 C137 C138 C139 C147 C148 C149 C202 C201

1U_0201_10V6K

1U_0201_10V6K

1U_0201_10V6K

1U_0201_10V6K
1 1 1 1 1 1
1U_0201_10V6K

1U_0201_10V6K

1U_0201_10V6K

1U_0201_10V6K
1U_0201_10V6K

1U_0201_10V6K

1U_0201_10V6K

1U_0201_10V6K

C165 C166 C167 C168 C150 C151 1 1 1 1 1 1 1


2.2U_0201_6.3V6M

2.2U_0201_6.3V6M

2.2U_0201_6.3V6M

2.2U_0201_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M
2 2 2 2 C172 C173 C153 C174 C154 C175 C155
2 2 2 2 2 2 2 2 2 2 2 2 2 2

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M
2 2 2 2 2 2 2 2 2 2 2 2 2

B B

1 1 1 1 1 1 1 1
@
C152 C159 C160 C161 C162 C163 C164 C181 1@ 1@ 1
1 1 1 C169 C170 C171
C158
1U_0201_10V6K

1U_0201_10V6K

1U_0201_10V6K

1U_0201_10V6K

1U_0201_10V6K

1U_0201_10V6K

1U_0201_10V6K

1U_0201_10V6K
C156 C157

10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M
2 2 2 2 2 2 2 2
2 2 2
10U_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M

2 2 2
+1.2VDDQ

2 2 2 2
C142 C130 C140 C141

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K
1 1 1 1

+0.6V +1.2VDDQ +0.6V

A
1 1 1 1 1 1 1 1 1 1 A

C176 C177 C178 C179 C191 C195 C182 C183 C184 C185

1U_0201_10V6K

1U_0201_10V6K

1U_0201_10V6K

1U_0201_10V6K
2 2 2 2
1U_0201_10V6K

1U_0201_10V6K

1U_0201_10V6K

1U_0201_10V6K

C146 C133 C132 C128


10U_0402_6.3V6M

10U_0402_6.3V6M

2 2 2 2 2 2 2 2 2 2
0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

1 1 1 1

LENOVO.CRDN
Title
LPDDR3-TERMINATION
Size Document Number
D Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 19 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

D D

+3VDX_NGFF_WLAN

+3VDX_NGFF_WLAN

2
JP6 R386 @
1 2 10K_0402_5%
3 GND1 3.3AUX1 4
5 USB_PP7 USB_D+ 3.3AUX2 1 2 1
5 6 C206 C288 C207
5 USB_PN7 USB_D- LED1#

1
7 8

10U_0402_6.3V6M

0.1u_0201_10V6K

10U_0402_6.3V6M
9 GND2 PCM_CLK 10
11 SDIO_CLK PCM_SYNC 12 2 1 2 NGFF_WLAN_PEWAKE_N
13 SDIO_CMD PCM_IN 14
15 SDIO_DAT0 PCM_OUT 16
17 SDIO_DAT1 LED2# 18
SDIO_DAT2 GND11 NGFF_GND
19 20 NGFF_GND
21 SDIO_DAT3 UART_WAKE 22
23 SDIO_WAKE UART_RX
SDIO_RESET

KEY E +3VAUX
25 PIN24~PIN31 NC PIN 24
27 26
29 28
31 30 RF_KILL_N_WIFI_NGFF_R R384 2 @ 1 100K_0402_5%

33 32 RF_KILL_N_BT_NGFF_R R393 2 @ 1 100K_0402_5%


C402 2 1 0.1u_0201_10V6K 35 GND3 UART_TX 34
5 PCIE5_WLAN_TX_DP PETP0 UART_CTS
C404 2 1 0.1u_0201_10V6K 37 36
5 PCIE5_WLAN_TX_DN PETN0 UART_RTS
39 38
41 GND4 RSRVD10 40
5 PCIE5_WLAN_RX_DP 43 PERP0 RSRVD11 42
C
5 PCIE5_WLAN_RX_DN 45 PERN0 RSRVD9 44 +3V C
47 GND5 COEX3 46
7 CK_WLAN_DP REFCLKP0 COEX2
49 48
7 CK_WLAN_DN 51 REFCLKN0 COEX1 50 2 1 R477 M.2_WLAN_WIFI_WAKE_R_N
0_0402_5% @ SUS_CLK 7,21 R394 2 1 100K_0402_5%
WLAN_CK_REQ_N 53 GND6 SUSCLK 52 NGFF_WLAN_RST_N
NGFF_WLAN_PEWAKE_N 55 CLKEQ0# PERSTO# 54 RF_KILL_N_BT_NGFF_R R481 1 @ 2 0_0402_5%
PEWAKE0# RSRVD/W_DISABLE2# RF_KILL_N_WIFI_NGFF_R RF_KILL_N_BT_NGFF 10
57 56 R482 1 @ 2 0_0402_5%
GND7 W_DISABLE1# RF_KILL_N_WIFI_NGFF 4

59 58
61 RSRVD/PETP1 I2C_DATA 60
63 RSRVD/PETN1 I2C_CLK 62
65 GND8 ALERT 64 +3VAUX
67 RSRVD/PERP1 RSRVD6 66
69 RERVD/PERN1 RSRVD7 68 +3VDX_NGFF_WLAN
71 GND9 RSRVD8 70
73 RSRVD1 RSRVD12 72
75 RSRVD2 3.3VAUX3 74
GND10 3.3VAUX4 1 2 1

6
C208 C289 C209 U97
77 76

10U_0402_6.3V6M

0.1u_0201_10V6K

10U_0402_6.3V6M

Vcc
78 GND15 GND14 79 R480 1 2 0_0402_5% 2
NC1 NC2 2 1 2 4 M.2_WIFI_RST_N 5 A 4 NGFF_WLAN_RST_N
R476 1 2 0_0402_5% 1 NC Y
8,21,22,33 PLT_RST_N B

Gnd
KYRO_246411067020883E
NGFF_GND

3
74AUP1G08FW4-7_DFN1010-6_1X1

PLT_RST_N R514 1 @ 2 0_0402_5% NGFF_WLAN_RST_N


NGFF_GND

R495 1 2 0_0402_5%
B B

NGFF_GND
Q8
DMN2400UFB-7_DFN1006-3

WLAN_CK_REQ_N 3 1
+3VDX_NGFF_WLAN CK_REQ_WLAN_N 7

+3VDX_NGFF_WLAN

2
R383
U20

2
10K_0402_5%
R484 1 2 0_0402_5% 1 6 R486 1 2 0_0402_5% R382
4 M.2_WLAN_WIFI_WAKE_R_N B2 S M.2_WLAN_WAKE_CTRL_N 4
100K_0402_5%

1
2 5
GND VCC +3VAUX WLAN_CK_REQ_N

1
R475 1 2 0_0402_5% 3 4 R494 1 2 0_0402_5% NGFF_WLAN_PEWAKE_N
8,21,33 PCIE_WAKE_N B1 A

SN74LVC1G3157DCKR NGFF_GND

A A

LENOVO.CRDN
Title
AUDIO CODEC
Size Document Number
C Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 20 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

D D

+3VDX_SSD

2 2 2 2 1 1
C192 C193 C283 C284 C199 C197

0.01U_0201_10V6K

0.01U_0201_10V6K

0.1u_0402_6.3V6M

0.1u_0402_6.3V6M

10U_0402_6.3V6M

10U_0402_6.3V6M
1 1 1 1 2 2

+3VDX_SSD

JP4
1 2
3 CONFIG_3 3V3 4
5 GND 3V3 6
5 PCIE9_RN PERn3 FULL_CARD_POWER_OFF
7 8
5 PCIE9_RP PERp3 W_DISABEL DAS_DSS
9 10 1
GND GPIO9/DAS/DSS TP46 TESTPAD
C387 2 1 0.22U_0201_6.3V 11 12
5 PCIE9_TN PETn3 3V3
C388 2 1 0.22U_0201_6.3V 13 14
5 PCIE9_TP 15 PETp3 3V3 16
17 GND 3V3 18
5 PCIE10_RN PERn2 3V3
19 20
5 PCIE10_RP 21 PERp2 GPIO_5 22
C389 2 1 0.22U_0201_6.3V 23 GND GPIO_6 24 +3VDX_SSD
C C
5 PCIE10_TN PETn2 GPIO_7
C390 2 1 0.22U_0201_6.3V 25 26
5 PCIE10_TP PETp2 GPIO_10
27 28
29 GND GPIO_8 30
5 PCIE11_RN 31 PERN1 UIM_RESET 32
5 PCIE11_RP PERP1 UIM_CLK
33 34
C391 2 1 0.22U_0201_6.3V 35 GND UIM_DAT 36
5 PCIE11_TN PETN1 UIM_PWR SSD_CK_REQ_N 10K_0402_5% 2 1 R364
C392 2 1 0.22U_0201_6.3V 37 38 R449 1 2 0_0402_5%
5 PCIE11_TP PETP1 DEVSLP 2 0_0402_5% SATA2_DEVSLP 5
39 40 R560 1 @
2 R501 SATA2_RP_PCIE12_RN GND GPIO_0 MBAT_PRES_N 27,30,33
0_0201_5% 1 41 42
5 SATA2_RP SATA2_RN_PCIE12_RP PERN0/SATA_B+ GPIO_1
0_0201_5% 1 2 R502 43 44
5 SATA2_RN PERP0/SATA_B- GPIO_2
45 46
C294 2 1 0.01U_0201_10V6K SATA2_TN_PCIE12_TN 47 GND GPIO_3 48
5 SATA2_TN PETN0/SATA_A- GPIO_4 Q7
C295 2 1 0.01U_0201_10V6K SATA2_TP_PCIE12_TP 49 50 M.2_SSD_RESET_N
5 SATA2_TP 51 PETP0/SATA_A+ PERST_N 52 SSD_CK_REQ_N DMN2400UFB-7_DFN1006-3
53 GND CLKREQ_N 54 M.2_SSD_PE_WAKE_N
7 CLK_SRC1_M.2_SSD_DN 55 REFCLKN PEWAKE_N 56 SSD_CK_REQ_N 3 1
R558 1 2 0_0402_5% CK_REQ_SSD_N 7
7 CLK_SRC1_M.2_SSD_DP REFCLKP NC_56 EC_SMB_CLK 24,27,29,30,33
57 58 R559 1 @ 2 0_0402_5%
GND NC_58 EC_SMB_DAT 24,27,29,30,33

+3VDX_SSD
2

KEY M

2
PIN59~PIN66 NC PIN
R385
100K_0402_5%

1
67
SSD_SATA_PCIE_DET_R 69 RESET_N 68 0_0402_5% 2 @ 1 R496
PEDET_PCIE/GND_SATA SSCLK SUS_CLK 7,20
71 70
73 GND 3V3 72
75 GND 3V3 74
USB3.0IND/GND_OTHER 3V3
77 76 +3VDX_SSD
78 GND GND 79
NC1 NC2
B B

2
ELCO_246411067020883M
R369
10K_0402_5%

1
SSD_SATA_PCIE_DET_R R499 1 @ 2 0_0402_5%
SSD_SATA_PCIE_DET_N 5

R458 1 2 0_0402_5% M.2_SSD_PE_WAKE_N


8,20 PCIE_WAKE_N

R457 1 2 0_0402_5% M.2_SSD_RESET_N


8,16,20,27 PLT_RST_N

A A

LENOVO.CRDN
Title
NGFF SSD
Size Document Number
C Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 21 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
+5VDX_WALKPORT VCC5V0_VCONN_STD

L18
1 2
BLM15PX330SN1D_2P

VCC5V0_VCONN_STD VCC5V0_VCONN_STD

0.1u_0201_10V6K

0.1u_0201_10V6K
1

1
C280

C286
PU46 PU47
2

2
AP2161FMG-7 AP2161FMG-7

10K_0402_5%

10K_0402_5%
1

1
R404

R503
2 5 2 5
IN OUT

10K_0402_5%
IN OUT

10K_0402_5%
1

1
OUT 1 1
OUT
R421

2
4

R615

2
FLG 4
FLG
1 1
R397 GND R526 GND
3
2

1 2 3

2
27 TYPEC_STD_CC1_CTL_EC EN GNDPAD 7 TYPEC_STD_CC2_CTL_EC 1 2 GNDPAD 7
27 EN
0_0201_5% 0_0201_5%

R471 R545
TYPEC_STD_CC1_EC 1 2 TYPEC_STD_CC1 33 1 2
27 27 TYPEC_STD_CC2_EC TYPEC_STD_CC2 33
0_0201_5% 1 0_0201_5% 1
C282 @ 600MA C285 @ 600MA
390p_0402_50V 390p_0402_50V
2 2

+5VDX_WALKPORT VCC5V0_VCONN_DCIN

L19
1 2
BLM15PX330SN1D_2P

VCC5V0_VCONN_DCIN VCC5V0_VCONN_DCIN
0.1u_0201_10V6K

0.1u_0201_10V6K
1

1
C297

C295
PU49 PU48
2

2
AP2161FMG-7 AP2161FMG-7
10K_0402_5%

10K_0402_5%
1

1
R522

R515
2 5 2 5
IN OUT
10K_0402_5%

IN OUT

10K_0402_5%
1

1
OUT 1 1
OUT
R617

R616

2
FLG 4
FLG
1 1
R452 GND R546 GND
3
2

1 2 3

2
27 TYPEC_DCIN_CC1_CTL_EC EN GNDPAD 7 TYPEC_DCIN_CC2_CTL_EC 1 2 GNDPAD 7
27 EN
0_0201_5% 0_0201_5%

R547 R614
TYPEC_DCIN_CC1_EC 1 2 TYPEC_DCIN_CC1 33 1 2
27 27 TYPEC_DCIN_CC2_EC TYPEC_DCIN_CC2 33
0_0201_5% 1 0_0201_5% 1
C287 @ 600MA C294 @ 600MA
390p_0402_50V 390p_0402_50V
2 2
5 4 3 2 1

+1.8V
+1.8VDX_SENSORHUB +1.8VDX_SENSORHUB +1.8VDX_PSENSOR
+1.8VDX_SENSORHUB

PR144 2 1 0_0402_5%
C627 2 1 0.1u_0201_10V6K

10K_0404_4P2R_5%
10K_0404_4P2R_5%
+1.8VDX_PSENSOR

3
3

4
RP29 RP25 P-sensor

U17 JP17

1
2
2

1
1 8 1
D VCCA VCCB SDA_PSENSOR_R 2 1 6 D
SCL_PSENSOR_R 3 2 GND
27 MCU_I2C_SCL_OUT_EC R444 2 @ 1 0_0201_5% MCU_I2C_SCL_OUT 2 7 MCU_I2C_RE_SCL 24
A1 B1 23,24 PSENSOR_INT_R_N 4 3 7
MCU_I2C_SDA_OUT 5 4 GND
27 MCU_I2C_SDA_OUT_EC R443 2 @ 1 0_0201_5% 3 6 MCU_I2C_RE_SDA 24
A2 B2 23,24 5
4 5 FC5AF051-2931H
GND OE

JP18
PI4ULS5V202XVE_1P2X1P6 1
SDA_PSENSOR_L 2 1 6
SCL_PSENSOR_L 3 2 GND
PSENSOR_INT_L_N 4 3 7
5 4 GND
5
FC5AF051-2931H

SLAVE I2C ADDRESS:0x19

+1.8VDX_SENSORHUB +1.8VDX_SENSORHUB

U35 R598 2 1 0_0201_5% SDA_PSENSOR_R


1 12 MCU_I2C_SCL_OUT
MCU_I2C_SDA_OUT SDO SCL MCU_I2C_RE_SDA_P R599 2 1 0_0201_5% SDA_PSENSOR_L
2 11
3 SDA PS 10
VDDIO CSB R600 2 1 0_0201_5% SCL_PSENSOR_R
4 9
5 NC GND 8
INT1 GNDIO MCU_I2C_RE_SCL_P R601 2 1 0_0201_5% SCL_PSENSOR_L
6 7
INT2 VDD
2 2 +1.8V +1.8VDX_SENSORHUB_IT8353
C635 BMA253_LGA12_2X2 C636 +1.8VDX_PSENSOR
2
0.1u_0201_10V6K

0.1u_0201_10V6K
1 1 PR145 2 @ 1 0_0402_5%

R67 2 1 2.2K_0402_5% SDA_PSENSOR_R


C C
R88 2 1 2.2K_0402_5% SDA_PSENSOR_L

R117
2 1 2.2K_0402_5% SCL_PSENSOR_R
R116
2 1 2.2K_0402_5% SCL_PSENSOR_L

+1.8VDX_SENSORHUB_IT8353 +1.8VDX_SENSORHUB_IT8353
+1.8VDX_PSENSOR

2 R89 1 2 4.7K_0402_1% PSENSOR_INT_R_N


C637
2 2 R90 1 2 4.7K_0402_1% PSENSOR_INT_L_N
C640 C639

0.1u_0201_10V6K
1
+1.8VDX_SENSORHUB_IT8353
0.1u_0201_10V6K

0.1u_0201_10V6K
1 1 PSENSOR_INT_R_N R619 1 2 0_0402_5%
PSENSOR_INT_RN_EC 27
PSENSOR_INT_L_N R620 1 2 0_0402_5%
PSENSOR_INT_LN_EC 27

C2

C1
B3
2

U3 @

VCCIO
VCCK

VCCA
R178
@

1K_0201_5%
1

A2
WRST#
1
C429
1U_0201_10V6K
SCL_PSENSOR_R
2
B4 SDA_PSENSOR_R
B TESTPAD TP108 I2CINT12/PWM3/I2SDAT/MICDAT/GPD3 B
A4 I2CCLK0/GPB3 C4
TESTPAD TP109 I2CINT11/PWM4/SSCE2#/I2SWS/GPD4 I2C2_SCL_SENSORHUB 4
A5 I2CDAT0/GPB4 C5
TESTPAD TP110 I2CINT10/PWM5/SSCE1#/TACH0/GPD5 I2C2_SDA_SENSORHUB 4

R603
B5

2
I2CINT13/PWM7/I2SBCLK/MICCLK/GPD7

2.2K_0201_5%
2.2K_0201_5%
I2CCLK1/ADC0/GPC1 B2
R110 1 @ 2 100K_0402_5% TP60 TESTPAD
A3

R602
I2CDAT1/ADC1/GPC2 TP111 TESTPAD @
R92 1 @ 2 100K_0402_5% @
B1 1 R606@2 0_0402_5%
I2CCLK2/SIN1/GPC6 SENSORHUB_INT_N 4

1
I2CDAT2/SOUT1/GPC7 A1

1
TP86 TESTPAD @
IT8353VG I2CLK3/PWM1/GPB2 E5 1
R604
2 0_0402_5% SCL_PSENSOR_L
I2CDAT3/PWM2/TACH1/GPB5 E4 1 2 0_0402_5% SDA_PSENSOR_L

PSENSOR_INT_R_N R607 1 @ 2 0_0402_5%


D4
D5 SSCE0#/I2CINT6/GPD2
VFBGA-25 R605 @

@ 2 0_0402_5% D2 SSCK/I2CINT7/GPA6
PSENSOR_INT_L_N R608 1
D3 SMISO/I2CINT4/GPC5
TESTPAD TP107 I2CCLK5/CTS1#/GPA4 E1
SMOSI/I2CINT5/GPC3 TP59 TESTPAD
I2CDAT5/RTS1#/GPA5 D1
TP106 TESTPAD

SIN0/JTMSC/ADC2/GPB0 E2
SOUT0/JTCKC/ADC3/GPB1 E3

A A
GND

LENOVO.CRDN
Tit l e
C3

IT8353VG-128/BX(R)_VFBGA-25 SENSOR
Siz e Document Number
C R e vV1.0
YOGA920

Vinafix.com
Date : Thursday, June 08, 2017 Sheet 23 of 45
"PROPERT Y NOT E: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

+3VALW R466 2 1 0_0402_5% EDP_HPD_OUT


2 EDP_HPD

1
R468

1
100K_0402_5%

R573

2
100K_0402_5%

2
D10
R464 1 2 1K_0402_5% 1 2 SDM10U45LP-7_DFN1006-2-2 PCH_LCD_BL_EN_R
27 MXLID_N
2 2
1
C216 C246
D D
0.1u_0201_10V6K 0.1u_0201_10V6K
1 1
2
4 FPBACK PCH_LCD_BL_EN_R R472 1 2 0_0402_5% LCD_BL_EN_R
Q6
33 LID_30_N
DMN2400UFB-7_DFN1006-3
3
2 EDP_VDD_EN R474 1 2 0_0402_5% EDP_VDD_EN_R 28,31
R479 1 2 10K_0402_5% PCH_LCD_BL_EN_R
2 LCD_BL_EN
2 LCD_BL_PWM_PCH R478 1 2 0_0402_5% LCD_BL_PWM
1

2
R469 C247
100K_0402_5% 0.1u_0201_10V6K
1
2

VIN V_BL_LED

PU9 L41
BLM15PX121SN1D_2P
1 10 1 2
VIN1 VOUT2

2 9
+5V VIN2 VOUT1 0_0402_5%

3 OZ7520 8 PR80 2 1 EDP_VDD_EN_R


VDD EN

1
4 7
21,27,29,30,33 EC_SMB_DAT DATA ADDRESS +3VAUX
R467
5 6 100K_0402_5%
LID_30_N LID_30_N_OUT 21,27,29,30,33 EC_SMB_CLK CLK INT#

GND
R58 1 @ 20_0402_5%

2
2
C PR90 C

11
100K_0402_5%

1
VBL_INTERAP 27

DMIC_DATA R508 1 @ 2 10K_0402_5%

DMIC_CLK R531 1 @ 2 10K_0402_5%

JP3

1 2
3 1 2 4 0.1u_0201_10V6K 2 1 C214
3 4 EDP_TX3_DN 2
5 6 0.1u_0201_10V6K 2 1 C213 EDP_TX3_DP 2
B
7 5 6 8 B
9 7 8 10 0.1u_0201_10V6K 2 1 C212
9 10 EDP_TX2_DN 2
11 12 0.1u_0201_10V6K 2 1 C211 EDP_TX2_DP 2
13 11 12 14
15 13 14 16 0.1u_0201_10V6K 2 1 C210
15 16 EDP_TX1_DN 2
17 18 0.1u_0201_10V6K 2 1 C205 EDP_TX1_DP 2
17 18 V_BL_LED
19 20
21 19 20 22 0.1u_0201_10V6K 2 1 C204
21 22 EDP_TX0_DN 2 2
EDP_HPD_OUT

1
23 24 0.1u_0201_10V6K 2 1 C203 EDP_TX0_DP 2 C320 C250
LCD_BL_EN_R 25 23 24 26

0.1u_0201_10V6K
LCD_BL_PWM 27 25 26 28 0.1u_0201_10V6K 2 1 C3

10U_0603_10V
27 28 EDP_AUX_DP 2 1

2
29 30 0.1u_0201_10V6K 2 1 C2 EDP_AUX_DN 2
31 29 30 32
R696 1 2 0_0603_5% EDP_PWR 33 31 32 34 EDP_PWR
+3VDX_EDP 33 34
35 36
37 35 36 38
39 37 38 40
1 2 V_BL_LED 39 40
C319 C249 41 42
43 41 42 44
10U_0402_6.3V6M 0.1u_0201_10V6K 45 43 44 46
2 1 47 45 46 48
49 47 48 50 DMIC_DATA 6,33
27 LID_30_N_OUT 49 50 DMIC_CLK 6,33
2 TOUCH_RST_N R53 1 @ 2 0_0402_5% 51 52 +3V_AUD
EDP_VDD_EN_R R565 1 2 0_0402_5% 53 51 52 54
55 53 54 56 RP23
10 TOUCH_PANEL_INTR_N_LS 57 55 56 58 1 4
+3VDX_TOUCHPANEL 59 57 58 60 2 3 I2C0_SDA 4
59 60 I2C0_SCL 4
61 62
+3VDX_CAMERA_FPS 61 62
63 64 0_0404_4P2R_5%
63 64 USB_PP6 5
65 66
23 MCU_I2C_RE_SDA 65 66 USB_PN6 5
67 68
23 MCU_I2C_RE_SCL 69 67 68 70
69 70 +1.8VDX_SENSORHUB
71 72
71 72
HRS_FH29BJ-70S-0.2SHW

A A

LENOVO.CRDN
Title
EDP/CAMERA
Size Document Number
C Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 24 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

D D

+1.8VDX_SE

1
C217 @
1U_0201_10V6K

2
@ R538 2
0_0402_5%

1
D5

C5
B5

B4

A4

A5

E5

E3

E4

E6

B7

A7

A6
F4
U42

SIMPUM_VCC

SIM_EXT_SW_CTRL

SIM_VCC

SMX_RST_IN

ESE_IO1

ESE_IO2

ESE_VDD

SVDD

ESE_IO3

ESE_IO4
SIM_SWIO

ESE_SWIO

SMX_CLK
ESE_SWP
A3
XTAL1
C3 E7
XTAL2 TVDD
G7 R540 2 @ 1 0_0402_5% 1
B2 ANT1 C231 @
PVDD_SE HIF1 F6 R541 2 @ 1 0_0402_5% 1U_0201_10V6K
D2 RXP
HIF2 G3 2
B1 TX1
9 NFC_SML_CLK HIF4 G5
C1 TX2
9 NFC_SML_DAT HIF3 F5 R543 2 @ 1 0_0402_5%
R535 1 @ 2 0_0402_5% SE_IRQ_R D1 @ RXN
C 5 NFC_IRQ_MGP5 IRQ C
NPC320 G6 R542 2 @ 1 0_0402_5%
R534 1 @ 2 0_0402_5% E1 ANT2
SE_IRQ_R 4 SE_PWR_EN VEN F7
VMID
2 0_0402_5% DWL_REQ_R AVDD_DVDD
2

@ R528 1 @ A1 D7
4 NFC_DWL_REQ DL_REQ VDHF
R446
100K_0402_5% A2 F1
CLK_REQ NC
B3 F2 +3VDX_SE
PWR_REQ TX_PWR_REQ
1

PVDD_SE
G2
+3VDX_SE D3 VUP
DWL_REQ_R PVDD G1
C7 VBAT2
VBAT
2

@
R445 AVDD_DVDD C6
VDD @ @
100K_0402_5%

1
1@ 1@ 1@ @ 1@ C29 C27

PVSS

TVSS
GND

GND

GND

GND

GND

VSS
1
C134 C215 C129 C24 C26

0.1u_0201_10V6K

0.1u_0201_10V6K
1

1U_0201_10V6K

1U_0201_10V6K

1U_0201_10V6K

0.01U_0201_10V6K
0.1u_0201_10V6K

2
2 2 2 2
2

B6

E2
C2

C4

D4

D6

F3

G4
B B
+5V

@
0.1u_0201_10V6K

+1.8VDX_SE +3VDX_SE
1

+3V
PC211
2

R5131 @ 2 0_0402_5%
R5301 @ 2 0_0402_5%
@ OZ7502_CSP8
+1.8V
A3

U38 +1.8V +1.8VDX_SE


+3VDX_SE
VDD

+3V B4 A4
IN2 OUT2
R5161 @ 2 0_0402_5%
B1 A1 R5121 @ 2 0_0402_5%
IN1 OUT1

SE_PWR_EN R529 1 @ 2 0_0402_5% B3 B2 +1.8VDX_SE PVDD_SE


EN SS
GND

0.1u_0201_10V6K
@
1

1
@ 1 @
R119 PC260 PC210 R524 1 @ 2 0_0402_5%
A2

200K_0402_5% 0.01U_0201_10V6K
2

+3VDX_SE
2
2

R525 1 @ 2 0_0402_5%

A A

LENOVO.CRDN
Title
TPM
Size Document Number
C Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 25 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

+3VDX_TCH_PAD

1
+3V
R74
100K_0402_5% +3VDX_FP
+3VDX_TCH_PAD JP9
@
PU43

2
1 8 R533 1 @ 2 0_0402_5%
6 G2 2 3
2 7 IN OUT
27 TP_DISABLE 5 G1
R470 2 1 0_0402_5% 3
@ 1 PC181
10 TOUCHPAD_INTR_N 4
4
4 I2C1_SDA_TCD 5 3 0.1u_0201_10V6K
4 I2C1_SCL_TCD 2
6
1 2
1 2 R532 1 @ 2 0_0402_5% 1 4
C384 C385 FC5AF061-2931H 4 FP_PWR_EN ON GND
D D
4.7U_0402_6.3V6M 0.1u_0201_10V6K

2
2 1 SLG59M1558VTR
R115 @
200K_0402_5%

1
+5VDX_LED

JP14
KB_BL_GND 1 5
2 1 G1
3 2
4 3 6
4 G2
FC5AF041-2931H

+3V +3VDX_FP

R702 1 @ 2 0_0603_5%

+5V +5VDX_LED

R523 1 2 0_0402_5%

C C

+3VDX_FP
JP15 FC5AF081-2931H
8 8 10
7 G1
5 USB_PN5 7
KB_BL_GND 6 6
5 USB_PP5 9
5 5 G2
4 4
3 3
2 2
1 1

6 3
PQ43A PQ43B

R521 2 1 0_0402_5% 2 5
27 KBLED_PWR_EN_EC

AO5804EL_SC89-6 AO5804EL_SC89-6
1 4

B B

+5VDX_FAN
Left Fan
JP16
1 5
2 1 G1
27 PWM0_FAN1 2
3
27 TACH0_FAN1 4 3 6
4 G2
FC5AF041-2931H

Right Fan
+5V +5VDX_FAN JP12
1
2 1 5
27 PWM1_FAN2 2 GND
R700 1 2 0_0603_5% 3
27 TACH1_FAN2 4 3 6
4 GND

FC5AF041-2931H

A A

LENOVO.CRDN
Title
TP SWITCH THERMAL
Size Document Number
C Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 26 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

+3VPMIC

+3VALW_EC +3VALW_EC_A 2
+3VALW +3VALW_EC +1.8VAUX C255
L43 1 2 0.1u_0201_10V6K
L42 1 2 BLM15BD221SN1D_2P 1 2 R448 2 @ 1 0_0402_5%
C244 C245 1
2 2 2 2 2 2 U37
BLM15BD221SN1D_2P +3V

1000P_0201_25V7K

0.1u_0201_10V6K
C238 C239 C240 C241 C242 C243 1 12
2 1 R396 2 1 0_0402_5% VCC_LPC_ESPI 2 VDD GPIO12 11
1 1 1 1 1 1 NBSWON_N GPI2 NC

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K
3 10
4 GPIO3 GPIO10 9 0_0402_5% 1 2 R557
2 GPIO4 GPIO9 8S_RESET 29
L44 1 2 C248 5 8
BLM15BD221SN1D_2P 0.1u_0201_10V6K 6 NC GPIO8 7
GPIO6 GND
1
EC_AGND SLG4T41099VTR
D D
+3VPMIC
Should have a 0.1uF capacitor close to every
GND-VCC pair + one larger cap on the * Recommended net "+3VAUX"
supply.
and "RTCVCC" minimum trace
width 12mils. NBSWON_N +3VALW_EC
R561 1 2 10K_0402_5%

TYPEC_DCIN_VBUS
TYPEC_STD_VBUS I2C3_SCL_HUB 4.7K_0402_1% 1 2 R418
+3V I2C3_SDA_HUB 4.7K_0402_1% 1 2 R441

200K_0402_1%
2

200K_0402_1%
2
RP9 +3VALW_EC

R459
U19

R465
EC_SMB_CLK 1 4
1 6
NC1 VCC EC_SMB_DAT 2 3
H_PROCHOT

1
2 4 R748 1 @ 20_0201_5%

1
A Y H_PROCHOT_N 8,10,29,30,32 TYPEC_STD_CC1_CTL_EC 22 DCIN_VBUS_A
TYPEC_STD_CC2_CTL_EC 22 STD_VBUS_A 2.2K_0404_4P2R_5%
100K_0201_5%
2

5 3 2
NC2 GND TYPEC_DCIN_CC1_CTL_EC 22 1 LID_PAD_N 100K_0201_5% 1 2 R395

30K_0402_1%
1

30K_0402_1%
R447 74AUP1G06FW4-7_DFN1010-6_1X1 C235 test1 10K_0201_5% 1 2 R390

R463

R470
47P_0201_25V8
1 +3VALW_EC
1

R451 2 1 0_0201_5% 2
2
NOVO_BTN_N R402 1 2 10K_0201_5%
+3VALW_EC
+3VALW_EC_A NBSWON_N 2100K_0201_5%
R405 1 @
VCC_LPC_ESPI AUXON_3V3 @ 2100K_0201_5%
R406 1
PM_CLKRUN_N 9,16 KB_125 R453 1 2100K_0201_5%

C15
E11

B13
B14

B10
F10
L11
K6
E5

K5

A8
B9
A9

E9
F5
L5
GPK6 R618 2 1 0_0201_5%
CLT3 33
C B11 C
EC_SMB_CLK 21,24,29,30,33

EGCLK/GPE3
EGCS#/GPE2
EGAD/GPE1

CLKRUN#/GPH0/ID0
VCC

AVCC
VBAT
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY

GPH6/ID6/DP

GPH4/ID4/YP
GPH5/ID5/DM

GPH3/ID3/YM
SMCLK0/SMINT8/GPF2 A11 GPF7 1 0_0201_5%
EC_SMB_DAT 21,24,29,30,33 R613 2 VDDQ_EN_EC 29
L2 SMDAT0/SMINT9/GPF3 A4
9,16 LPC_AD0_ESPI_IO0 EIO0/LAD0/GPM0 SMCLK1/GPC1 SML1_CLK 9 GPK5 @
K1 A3 SML1_DATA 9 R595 2 1 0_0201_5%
9,16 LPC_AD1_ESPI_IO1 EIO1/LAD1/GPM1 SMDAT1/GPC2 EC_PMIC_RST_N 29
K2 C2 R426 1 2 43_0201_5% PECI_EC 10
9,16 LPC_AD2_ESPI_IO2 EIO2/LAD2/GPM2 SMCLK2/PECI/GPF6 @ 2 0_0402_5% PCH_SUSACK_N
+3VALW_EC J1 D2 GPF7 R563 1 R609 2 1 0_0201_5% USB_CHARGE_DET_N 33
9,16 LPC_AD3_ESPI_IO3 EC_LPC_ESPI_RST R5 EIO3/LAD3/GPM3 SMDAT2/PECIRQT#/GPF7 F9 SPI_PWR_EN 9
ERST#/LPCRST#/GPD2 CRX1/SIN1/SMCLK3/PD2CC1/GPH1/ID1 TYPEC_STD_CC1_EC 22
L1 E8 TYPEC_STD_CC2_EC 22 AC_PRESENT R588 2 1 0_0201_5%
9 CLK_PCI_LPC_ESPI_CLK ESCK/LPCCLK/GPM4 CTX1/SOUT1/SMDAT3/PD2CC2/GPH2/ID2 AC_PRESENT_R 8
2

J2 P3 MCU_I2C_SCL_OUT_EC 23
R392 9,16 LPC_FRAME_N_ESPI_CS_N ECS#/LFRAME#/GPM5 L80HLAT/BAO/SMCLK4/GPE0 R4 EC_ME_LOCK 1 0_0201_5%
MCU_I2C_SDA_OUT_EC 23 R597 2 HDA_SDO_I2S0_TXD_R 6
G2 L80LLAT/SMDAT4/GPE7 L7
10K_0201_5% 29 WALKPORT_EN GA20/GPB5 LPC PWM4/SMCLK5/GPA4 I2C3_SCL_HUB 4
H1 K7 I2C3_SDA_HUB 4
9 INT_SERIRQ ALERT#/SERIRQ/GPM6 PWM5/SMDAT5/GPA5
M1
32 EC_VR_EN ECSMI#/GPD4
1

R584 2 1 0_0201_5% P5 RP4


EC_WRST_N 2 SCI_N M2 ECSCI#/GPD3 R6 1 0_0402_5% EC_SCK 1 8
WRST# MIN 10us R432 2 PWM0_FAN1 26 PCH_SCK 9,16
R585 2 1 0_0201_5% J5 WRST# PWM0/GPA0 P6 R434 2 1 0_0402_5% EC_SI 2 7
1U_0201_10V6K

1 9 H_RCIN_N KBRST#/GPB6 PWM1/GPA1 PWM1_FAN2 26 EC_SO PCH_SI 9,16


C227 R7 3 6
U22 PWM2/GPA2
PWM3/GPA3
P7
CLT1 33
KBLED_PWR_EN_EC 26
EC_SCE 4 5
PCH_SO
PCH_SCE0_N
9,16
9
R493 2 1 0_0402_5%
P1
2 33 CE_DP WUI8/GPK0
R504 2 1 0_0402_5%
R1 R8 0_0804_8P4R_5%
33 CE_USB WUI9/GPK1 PWM6/SSCK/GPA6 PWR_LED 8, 33
R505 2 1 0_0402_5%
R2 L8
33 TYPEC_DCIN_DISCHARGE
33 CE_FLIP
R491 2
EC_ME_LOCK
GPK5
1 R3
0_0402_5%
R15
R14
WUI10/GPK2
WUI11/GPK3
WUI12/GPK4
WUI13/GPK5
IT8186VG PWM7/RIG1#/GPA7

SMINT5/GPJ1
DAC2/TACH0B/SMINT6/GPJ2
E14
E15
R424 2 1 0_0402_5%
EC_VCCIO_EN
EC_SENSOR_INT 4
28

PSENSOR_INT_RN_EC 23 AUXON R440 1 @ 2 10K_0201_5%


29,30 PMIC_INTERAP/OTG R407 2 @ 1 0_0201_5% GPK6 N15 D14
WUI14/GPK6 DAC3/TACH1B/SMINT7/GPJ3 SYS_PWROK 8 +3VALW_EC +3VPMIC
24 LID_30_N_OUT R492 2 1 0_0402_5% P15 C14 MAINON R413 1 2 10K_0201_5%
WUI15/GPK7 DAC4/DCD0#/GPJ4 D15 AC_PRESENT ALL_SYS_PWRGD 32
DAC5/RIG0#/GPJ5 R420 1
SUSON R430 1 2 10K_0201_5%
R443 2 1 0_0402_5% R12 B2 2 0_0402_5%
26 TACH0_FAN1 F15 TACH0A/GPD6 VSTBY0 B3 1 ALL_SYS_PWRGD 1 0.1u_0201_10V6K
TP48 2 1 C233 2
33 KB_125 R445 2 1 0_0402_5% R13 TACH2/SMINT4/GPJ0 XLP_OUT/GPB4 A5 C229 C230
26 TACH1_FAN2 TACH1A/TMA1/GPD7 PWRSW/GPB3 B5 1 0_0402_5% NBSWON_N 33
+3VAUX_SPI R419 2
AC_IN#/GPB0 AC_IN 30

0.1u_0201_10V6K
R447 2 1 0_0402_5% P2 B4 SLP_S4_N R593 1 2100K_0201_5%

2.2U_0201_6.3V6M
8,28 SLP_S3_N RI1#/GPD0 LID_SW#/GPB1 MXLID_N 24 1 2
B6
28,31 SUSON BTN#/GPG1 SLP_S3_N 2100K_0201_5%
R621 1
R449 2 1 0_0201_5% E6
EC_SCK A6 VFSPI P4 1
2 R433 2 0_0402_5%
SLP_S4_N 8,29
EC_SCE B8 FSCK/GPG7 RI2#/GPD1 P8 R456 2 1 0_0402_5%
B
C251 EC_SO FSCE#/GPG3 GINT/CTS0#/GPD5 @ AUXON_3V3 31 B
B7 P9 R409 2 1 0_0402_5%
EC_SI FMISO/GPG5 RTS1#/GPE5 VBL_INTERAP 24
0.1u_0201_10V6K A7 R569 2 1 0_0402_5%
1 FMOSI/GPG4 EC_HPD 2, 33

N1 R587 2 1 0_0402_5% PCH_PWRBTN_N 8 +3V


SIN0/PWUREQ#/BBO/SMCLK2ALT/GPC7 N2
B12 SOUT0/LPCPD#/GPE6 EC_VCCST_PWRGD 8
22
TYPEC_DCIN_CC2_CTL_EC PS2CLK0/TMB0/CEC/GPF0
8,28,29 1.2VSUS_PWRGD R435 2 1 0_0402_5% A12 PS2DAT0/TMB1/GPF1
22 TYPEC_DCIN_CC1_EC E10
A10 PS2CLK2/SMINT10/PD1CC1/GPF4 H11
22 TYPEC_DCIN_CC2_EC PS2DAT2/SMINT11/PD1CC2/GPF5 ADC0/GPI0 CODEC_PD_N 33 TACH0_FAN1
8 SUS_PWR_ACK_R R412 2 1 0_0402_5% GPC3 L14 H14 R420 1 2 10K_0201_5%
KSO16/SMOSI/GPC3 ADC1/SMINT0/GPI1 MBAT_PRES_N 21,30,33
8,28,32,34 ALL_SYS_PWRGD_PMIC R497 2 1 0_0402_5% K11 KSO17/SMISO/GPC5 ADC2/SMINT1/GPI2
H15
PSENSOR_INT_LN_EC 23
G10 DCIN_VBUS_A TACH1_FAN2 R427 1 2 10K_0201_5%
test1 F8 ADC3/SMINT2/GPI3 G14 STD_VBUS_A
1 F7 SSCE0#/GPG2 ADC4/SMINT3/GPI4 G11 PWM0_FAN1 R436 1 @ 2100K_0201_5%
TP51 SSCE1#/GPG0 ADC5/DCD1#/GPI5 CAP_LED 33
30 Charger_OTGPG E7 G15
DSR0#/GPG6 ADC6/DSR1#/GPI6 LID_PAD_N 33 PWM1_FAN2
F14 R437 1 @ 2100K_0201_5%
ADC7/CTS1#/GPI7 TP_DISABLE 26
F2 R544 2 1 0_0402_5%
GPC6 TYPEC_STD_DISCHARGE 33
R9 F1
33 MY0 K8 KSO0/PD0 GPE4 D1 1 0_0402_5% H_PROCHOT 8
R586 2
33 MY1 P10 KSO1/PD1 GPC4 A13 2 1 0_0402_5% KBSMI_N 2
R442 TYPEC_STD_5VEN 33
33 MY2 R10 KSO2/PD2 ADC13/GPL0 A14 2 1 0_0402_5%
R431 NOVO_BTN_N 33
33 MY3 L9 KSO3/PD3 ADC14/GPL1 A15
33 MY4 KSO4/PD4 KBMX ADC15/GPL2 MBATLED_ORANGE 33
K9 B15
33 MY5 KSO5/PD5 ADC16/GPL3 EC_USB_CHARGE_EN 33
P11
33 MY6 R11 KSO6/PD6 A2 1 0_0402_5%
R454 2 MAINON 28,29,31
33 MY7 P12 KSO7/PD7 GPL4 A1 1 0_0402_5%
RR455 2 AUXON 28,29
33 MY8 L10 KSO8/ACK# GPL5 B1 R398 2 1 0_0201_5% EC_LPC_ESPI_RST
33 MY9 KSO9/BUSY GPL6 PM_RSMRST_N 8 8,16,20,21 PLT_RST_N
P13 C1 8
33 MY10 KSO10/PE GPL7 PCH_SUSACK_N
P14 SUS_STAT_N_ESPI_RST_N R399 2 @ 1 0_0201_5%
33 MY11 KSO11/ERR# 9
KSI3/SLIN#

N14
KSI1/AFD#
KSI0/STB#

KSI2/INIT#

33 MY12 KSO12/SLCT
VCORE2

M15 E2
VCORE

33 MY13 KSO13 CRX0/GPC0 MBATLED_WHITE 33


M14 E1
AVSS

33 MY14 KSO14 CTX0/TMA0/GPB2 PM_PCH_PWROK 8


KSI4
KSI5
KSI6
KSI7

VSS
VSS
VSS
VSS
VSS

VSS

L15 G1
33 MY15 KSO15 CK32K/GPJ6 H_THRMTRIP_N 10
K15
K14
K10
J15
J10
J11
J14
H10

F6
G5
G6
H5
H6

J6

F11

H2

L6

IT8186VG 7
RTC_RST_N
A A

33 MX0 2 2 1 Q11
C234 C226 DMG1012T-7_SOT523-3 LENOVO.CRDN
33 MX1
0.1u_0201_10V6K

0.1u_0201_10V6K

33 MX2 Tit l e
R582
33 MX3 1 1
33 MX4
GPC3 2 1 0_0201_5% 2 EC
33 MX5 C296 Siz e Document Number
33 MX6 R e vV1.0
2

EC_AGND 1 C YOGA920
33 MX7
0.1u_0201_10V6K

R583 3
10K_0201_5% Date : Thursday, June 08, 2017 Sheet 27 of 45
"PROPERT Y NOT E: this document contains information confidential and
2 property to LENOVO PND and shall not be reproduced or transferred to other documents
1

or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

+3VAUX

U98

6
@
D +5VAUX +2.5VAUX D

Vcc
PR14 1 @ 2 0_0402_5% 2
5,8,31 PM_SLP_S0_N A
5 4 PR206 1 @ 2 0_0402_5%
1 NC Y VCCIO_EN 29

1
B

Gnd
+3VAUX
PR114 PR70
100K_0402_5% 22_0402_5%

3
74AUP1G08FW4-7_DFN1010-6_1X1

2
U100
6 3

6
PQ45A PQ45B

Vcc
PR210 1 2 0_0402_5% 2
8,27 SLP_S3_N A
2 5 5 4 PR17 1 2 0_0402_5%
27,29 AUXON 1 NC Y
27,28,29,31 MAINON B

Gnd
74AUP1G08FW4-7_DFN1010-6_1X1
AO5804EL_SC89-6 AO5804EL_SC89-6
1 4

3
PR212 1 2 0_0402_5%
27 EC_VCCIO_EN

C C

+5VAUX +3VDX_EDP

1
+1.2VSUS +2.5VSUS PR4 PR3
+5VAUX 22_0402_5%
100K_0402_5%

2
2

1
PR7 PR8 PR9
100K_0402_5% 22_0402_5% 22_0402_5% 6 3
PQ18A PQ18B
1

2 5
1 SDV验证可否删掉 24,31 EDP_VDD_EN_R
6 3
PQ3A PQ3B
AO5804EL_SC89-6 AO5804EL_SC89-6
1 4
2
2 5
27,31 SUSON PQ4
DMN2400UFB-7_DFN1006-3
AO5804EL_SC89-6 AO5804EL_SC89-6 3
1 4

B B

+5VAUX +3VDX_SSD

+3V

1
PR10
1 2 PR76 PR50
8,27,29 1.2VSUS_PWRGD 22_0402_5%
100K_0402_5%
6

0_0402_5% PU1
Vcc

2
2
+3V 5 A 4
NC Y ALL_SYS_PWRGD_PMIC 8,27,32,34
1 6 3
B
Gnd

PQ17A PQ17B
1

PR12
3
6

PR11 PU2 74AUP1G08FW4-7_DFN1010-6_1X1 1M_0402_5% 2 5


27,28,29,31 MAINON
1 2
VCCIO_PWRGD 8,29
Vcc

2
A
2

0_0402_5% 5 4 AO5804EL_SC89-6 AO5804EL_SC89-6


1 NC Y 1 4
B
Gnd

PR13
1 2
8,29 1.00VAUX_PWRGD
+5VAUX +VCCIO
3

0_0402_5% 74AUP1G08FW4-7_DFN1010-6_1X1
2

1
PR127 @ PR119 @
100K_0402_5% 22_0402_5%

A A
1

6 3 LENOVO.CRDN
PQ44A PQ44B @
@ Title
VCCIO_EN 2 5 Discharge
Size Document Number
C Rev V1.0
AO5804EL_SC89-6 AO5804EL_SC89-6 YOGA4
1 4
Date: Monday, July 27, 2015 Sheet 28 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

VIN VIN +5VAUX

22U_0805_10V6K
@
1

22U_0805_10V6K

22U_0805_10V6K

0.1u_0201_10V6K
PC37
1
1 1

PC276
1
PC99 +

PC14
2 +VCCIO

PC9
D1 A4
VIN1_1 VIN6 PJ8
33U_B2 D2 A5 PL18 EP-10AM05B01

2
PR65 0_0402_5% 2 2 2 D3 VIN1_2 LX6_1 A6 1 2 1 2 2A
2 1 5V_SO D4 VIN1_3 LX6_2 A7 2 1 1 2
1 1

22U_0603_4V6M

22U_0603_4V6M
VIN1_4 GNDP6 OZ7502_CSP8

1
B1 B5 0.22U_0402_10V6K

47U_0603_4V

47U_0603_4V
PC284
LX1_1 BST6 JUMP_43X79

A3
PC290
+5VAUX B2 D6 PC36 PU41
PJ7

PC285
LX1_2 VFB6

PC283
PL11 B3 B6 VCCIO_EN_PMIC +3VDX_SSD
5VAUX_FB LX1_3 EN6 2 2

2
0.22U_0402_10V6K
5A 1 2 1 2 C1 B7 VCCIO_PWRGD

VDD
D 1 2 0.47uH_EM-47BM01V01_8A_20% C2 LX1_4 PG6 B4 A4 D
IN2 OUT2
22U_0805_6d3V6K

22U_0805_6d3V6K

22U_0805_6d3V6K
LX1_5

22U_0805_6d3V6K

22U_0805_6d3V6K

22U_0805_6d3V6K
VIN

2
0.1u_0201_10V6K
C3 PJ9
JUMP_43X79 LX1_6 +1.8VALW
1

1
1 C4

PC42
LX1_7 B1 A1 1 2

1000P_0201_25V7K
PC24

PC256
PC47

PR31 A1 +5VAUX
PC25

IN1 OUT1 1 2

PC48

PC49

PC55
PC54

PR72 GND1_1 PJ5


100K_0402_1% A2 J8 PL20 EP-10AM05B01

PC277
1
GND1_2 VIN5 2A
2

2
1 2 A3 J9 1 2 1 2 JUMP_43X79

0.1u_0201_10V6K
2 GND1_3 LX5_1 1 2 2 @ 1 B3 B2

1
B4 J10 2 1

0.01U_0402_25V7K
GND
27,28,31 MAINON EN SS
BST1 LX5_2

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M
1

1
E5 I10 PR136 0_0402_5%

2
200K_0402_1% CSP GNDP5 JUMP_43X79

PC274

PC273

PC275
1
5VAUX_CSN E4 I9 PC37 1
CSN BST5 2 @ 1

PC282
PR32 5V_SO C6 I6 0.22U_0402_10V6K 4 SATA_PWR_EN

A2
V5SO VFB5

2
510_0402_1% 5VAUX_EN_PMIC E3 OZ66628 I7 1P8V_EN_PMIC PR183 0_0402_5%
PR67 D5 EN1 EN5 I8 1.8VALWPG
PC237 PG1 PG5 2
100K_0402_5% C5 PU3 VIN
5VAUX_CSN VDDP

2
1 2 2 1

1
1
@ 820P_0201_25V7K C407

10U_0603_10V

1
1U_0402_10V6K E1 PC100 +

PC86
VIN4_1

2
E2
2 0_0402_5% G5 VIN4_2 F1
27,30 PMIC_INTERAP/OTG R483 1 @ 33U_B2
INT# LX4_1 2

2
H5 F2
21,24,27,30,33 EC_SMB_CLK CLK LX4_2 +1.2VSUS
H6 G1 PL13
21,24,27,30,33 EC_SMB_DAT SDA LX4_3 PJ10
R414 1 @ 2 0_0402_5% J7 G2 0.47uH_EM-47BM01V01_8A_20% +5VDX_WALKPORT
8,10,27,30,32 H_PROCHOT_N ALRT# LX4_4 +5VAUX
+3VPMIC
E6 G3 1 2 1 2 5A
F5 3V3 LX4_5 H1 1 2 PJ12
VDDA GNDP4_1

2
C408 C409 G6 H2 1
VREF GNDP4_2 JUMP_43X79 1 2

0.1u_0201_10V6K
VIN F6 H3 PC74 1 2

22U_0603_4V6M

22U_0603_4V6M
GNDA GNDP4_3

0.1u_0201_10V6K

PC116
1

1
330U_B2_2.5VM_ESR9M
F3 0.22U_0402_10V6K PR99 +

PC72
BST4
1U_0402_10V6K

1U_0402_10V6K
+5VAUX

1
1
H4 2 1 JUMP_43X79

PC70

PC71

PC73
VFB4 F4 VDDQ_EN_PMIC
200_0402_1%
EN4 1.2VSUS_PWRGD 2
2

2
1 G4
PG4

2
+1.2VSUS
PC104 + D8
D9 VIN2_1

0.1u_0201_10V6K
33U_B2 D10 VIN2_2

PC278
VIN2_3

1
22U_0603_4V6M
2

1
+3VALW B8
B9 LX2_1

PC56
PJ6 LX2_2
4A PL28 B10

2
3V_ALW_FB LX2_3

2
1 2 1 2 C8 PR9267 +0.6V
1 2 LX2_4
0.1u_0201_10V6K
22U_0805_6d3V6K

22U_0805_6d3V6K

22U_0805_6d3V6K

22U_0805_6d3V6K

22U_0805_6d3V6K

C9 J2 PR77
LX2_5 VDDQ OZ7502_CSP8

0.22U_0402_10V6K
1

0.47uH_EM-47BM01V01_8A_20% C10 J1 51_0402_5% 1 2


PC43

JUMP_43X79 LX2_6 VTT

A3
A8 I1
PC63

PC62

PC61

PC44

PC46

GNDP2_1 GNDP_VTT PU40


A9 I2 2 1 0_0603_5%

PC45
GNDP2_2 VTT_SEN +5VDX_WALKPORT

22U_0603_4V6M
2

1
A10 I3 VTT_EN_PMIC

VDD
GNDP2_3 EN_VTT B4 A4

2
C7

PC57
BST2 IN2 OUT2

1
E7 PJ11
VFB2

2
3VALW_EN_PMIC E8 PC53 VIN
3VALW_PWRGD D7 EN2 1000P_0201_25V7K +5VAUX B1 A1 1 2
PG2 IN1 OUT1 1 2

2
+3VALW @ L22 1 2

PC279
10U_0603_10V

1
BLM15PX121SN1D_2P JUMP_43X79

0.1u_0201_10V6K
PR139 2 @ 1 B3 B2
PC105
1

L21 1 2

GND
+3VAUX 27 WALKPORT_EN EN SS
C BLM15PX121SN1D_2P C
1

2
0_0402_5%

0.01U_0402_25V7K
1
2

+2.5VAUX PC124 +

A2
J4 E9 33U_B2
VIN7 VIN3_1 2 +1.00VAUX 2
L20 1 2 J3 E10
LDO1 VIN3_2
22U_0805_6d3V6K

2.5V_EN_PMIC

PC281
BLM15PX121SN1D_2P I4 F9 PL27
EN7 LX3_1 PJ3
1

F10 0.47uH_EM-47BM01V01_8A_20% 3.27A


+1.00VAUX LX3_2 G8 1 2 1 2
PC80

LX3_3 1 2
10U_0402_6.3V6M

G9
LX3_4
2

2
1 G10 1 1
@ LX3_5 H8 PC69 JUMP_43X79
GNDP3_1

22U_0603_4V6M

PC117

PC122
1

330U_B2_2.5VM_ESR9M

330U_B2_2.5VM_ESR9M
H9 0.22U_0402_10V6K + +
PC58

GNDP3_2

1
+VCCPRIM_CORE H10
PJ4 2 GNDP3_3

PC4
J5 F8 PR98
VIN8 BST3 2 2
10U_0402_6.3V6M

2
2A J6 H7 1 2 +3VDX_SUS
PRIMCORE_EN_PMIC LDO2 VFB3 +3VPMIC +3V +3VALW +3VALW
1 I5 F7 1P0AUX_EN_PMIC
@ @ EN8 EN3 G7 1.00VAUX_PWRGD 0_0402_5%
PG3
PC286

1
1
PR41 PR43 PR48 PR110
PR116 @

200K_0201_5%

200K_0201_5%

200K_0201_5%

200K_0201_5%
200K_0201_5%

2
2
1.8VALWPG
2.5V_EN_LDO
PR21 2 @ 1 0_0402_5%
2.5V_EN_PMIC
AUXON PR20 2 @ 1 0_0402_5%
1.2VSUS_PWRGD 8,27,28
PR16 2 1 0_0402_5% VTT_EN_PMIC
3 DDR_VTT_PG_CTRL
PR19 2 @ 1 0_0402_5% PRIMCORE_EN_PMIC
1.00VAUX_PWRGD 8,28
AUXON PR18 2 @ 1 0_0402_5% 1P8V_EN_PMIC

PR26 2 1 0_0402_5% 1P0AUX_EN_PMIC


27,28 AUXON VCCIO_PWRGD 8,28

1 0_0402_5% VCCIO_EN_PMIC
PR122 2
28 VCCIO_EN
3VALW_PWRGD
0.1u_0201_10V6K
PC280
1

B B

place close to J8 and J9


2

+3VPMIC
VIN

22U_0805_10V6K
2

0.1u_0201_10V6K
PR15 1

1
10K_0402_5% VTT_EN_PMIC

PC1

PC3
1 0_0402_5% 1P0AUX_EN_PMIC
1.8VALWPG PR33 2 @ 1P8V_EN_PMIC
2
1

2
+3VAUX 1 0_0402_5% 5VAUX_EN_PMIC
PR5 27 EC_PMIC_RST_N PR25 2 PRIMCORE_EN_PMIC
2 1 1 0_0402_5% 3VALW_EN_PMIC
@ PR24 2 VCCIO_EN_PMIC
PR28 2 1 0_0402_5%
100K_0402_5% 8S_RESET 27 VDDQ_EN_PMIC
@ 3VALW_EN_PMIC
2 1
5VAUX_EN_PMIC
PC89
0.022U_0201_6.3V
1P0AUX_EN_PMIC

+3VAUX

0.1u_0201_10V6K

0.1u_02201_101V6K

0.1u_0201_10V6K

0.1u_0201_10V6K
1

1
PC19

PC20

PC12

PC15

0.1u_0201_10V6K

0.1u_0201_10V6K

0.1u_0201_10V6K
0.1u_0201_10V6K

1
1

PC16

PC17

PC21
PC18
2

2
@ @ @ @

2
2
@ @ @ @
U101 @
6

DDR_VR_EN
Vcc

2
5 A 4 PR117 1 @ 2 0_0402_5% VDDQ_EN_PMIC
1 NC Y
8,27 SLP_S4_N B
Gnd

74AUP1G08FW4-7_DFN1010-6_1X1
+2.5VAUX
PU45 @
+3VALW
3

A TPS7A3725_SON6 A

L24 1 @ 2 6 1 L23 1 @ 2
BLM15PX121SN1D_2P IN OUT BLM15PX121SN1D_2P

5 2 LENOVO.CRDN
N/C NR/FB

10U_0603_10V
PC121
1
1 Titl e
2.5V_EN_LDO

@
4 PC138

PGND
3 PMIC
EN GND 0.01U_0201_10V6K

1
Si ze Document Number

200K_0201_5%

PC22
2 R e vV1.0

0.1u_0201_10V6K
D YOGA920

2 @

7
D at e : Thursday, June 08, 2017 Shee t 29 of 45
PR43 "PROPERTY NOTE: this document contains inf ormation conf idential and
PR123 2 1 0_0402_5% property to LENOVO PND and shall not be reproduced or transf erred to other documents
27 VDDQ_EN_EC

2
or disclosed to others or used f or any purpose other than that f or which it was
obtained without the expressed written consent of LENOVO PND."
PR118 2 @ 1 0_0402_5% VDDQ_EN_PMIC
31 DDR_VR_EN

5 4 3 2 1
5 4 3 2 1

ADIN_1 V_PATH_R
VIN
PQ11 PQ10
AON7405_DFN AON7405_DFN V_CHG

PR57 PC75
PC79 PC76 PC108
@
0.01_0805_LE_0.5%

10U_0805_25V6K
10U_0805_25V6K

0.1U_0402_25V6
C254 10U_B2_25VM_R100M @
1000P_0201_25V7K PC84
PC81
33U_B2 PC92
10U_0805_25V6K
10U_0805_25V6K
D D
PR54

430K_0402_1% PR9262 PR9263


PR78 PR86
1_0402_5% 1_0402_5%
ACDET 0_0402_5% 0_0402_5%

ADCSIN
ADCSIP
PR63
C252 PC185
100K_0402_1% U101 PQ19
0.1u_0201_10V6K
1U_0402_10V6K U101 AON7506_DFN8-5
PC98 PC83

PQ8
0.01U_0402_25V7K 0.01U_0402_25V7K

UG2 AON7405_DFN

PL12 PH2
PR53 PC93 PC91 BATIN
BAT
1.5UH +-20% EM-15AM07V02-L1 16A

10U_0805_25V6K
0.01_0805_LE_0.5%

0.1U_0402_25V6
@ PC118

PQ15 10U_0805_25V6K
PQ20
PC216 AON7506_DFN8-5
AON7506_DFN8-5
PR60
0.22U_0402_10V6K
C
BGATE_N 0_0402_5% C
ADIN_1
PR9266
CH520N4-45GP_DFN1006-2-2 LG2
PD52 1_0603_5%
VIN PR61 PC94
0_0402_5% 4700P_0201_25V7K
PC82 UG1
PD82

ADCSIN
ADCSIP
CH520N4-45GP_DFN1006-2-2 1U_0603_25V7K PR9264 PR9265
PH2
1_0402_5% 1_0402_5%
CHGVDDP
LG1
PR59
PC103
4.7_0402_5% PU4
4.7U_0402_6.3V6M

CHGVDDP
PC250

4.7U_0402_6.3V6M

LG2
PR68 VIN

0_0402_5% ACDET PH2 PC95 PC96


27,29 PMIC_INTERAP/OTG
PR66 0.1U_0402_25V6 0.1U_0402_25V6
UG2 PR58
B B
100K_0402_5% ISL9237 0_0402_5%
PR62 PC215
21,24,27,29,33 EC_SMB_DAT
0_0402_5% PC115
22U_0402_10V6K
PC97
21,24,27,29,33 EC_SMB_CLK 0.1U_0402_25V6
0.1u_0201_10V6K

8,10,27,29,32 H_PROCHOT_N

+3VALW

PR64

100K_0402_5%

BGATE_N
27 AC_IN PR55
BAT
PR6 PR56 100_0402_1%
PR49
21,27,33 MBAT_PRES_N
0_0402_5%
100K_0402_5% PC182 143K_0402_1%
PR69 PSYS_CPU 32 @
10P_0402_50V8J 0_0402_5% PC90
@
CHGVDDP PR52
1U_0603_25V7K
PR51 PC102 6.04K_0402_1%
PR71
A
@ A

Charger_OTGPG
1K_0402_1% 1000P_0201_25V7K
0_0402_5%
R622
C122 @
+3VALW
100K_0402_5% PC101 LENOVO.CRDN
0.047U_0201_6.3V 1000P_0201_25V7K
Title
NVDC charger
Size Document Number
D Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 30 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

+5VAUX
+2.5VAUX
+1.2V PR205 +1.2V_VCCPLLOC
+1.8V +1.8V_AUD 0_0402_5% +5VAUX
1 @ 2

PR137 2 @ 1 0_0402_5% +1.2V_VCCPLL +3V

0.1u_0201_10V6K
+2.5VSUS

0.1u_0201_10V6K

1
+1.8VDX_SENSORHUB PR207 2 10_0402_5%

PC150

C45 @
1
1
PR142 2 10_0402_5%

0.1u_0201_10V6K
PC147
@

2
+1.00VDX +3VAUX

2
1
2
3A

PC162
R127 U21 @

0.1u_0201_10V6K

1
+5V_AUD +3VAUX OZ7502_CSP8
+5V 10K_0402_5% R128 @

A3
L36 PU19

0.1u_0201_10V6K

2
1 6 10K_0402_5%
1 2 PU12 A3 NC1 Vcc

1
PC164
PL14 +5V

2
VDD
BLM15PX121SN1D_2P VDD B4 A4 1 2 2
+1.00VDX +3VAUX IN2 OUT2 5

2
B4 A4 BLM15PX330SN1D_2P A NC2
@ +1.00VAUX IN2

2
OUT2

0.22U_0402_10V6K
U96 PL21

1
1

1
3

22U_0603_6.3V6

22U_0603_6.3V6

6
@ A1 B1 A1 1 2 6

C228 @
B1 +5VAUX IN1 OUT1 GND Y DDR_VR_EN 29

PC106

PC107
+1.2VSUS

1
IN1 OUT1 BLM15PX330SN1D_2P

PC161
0.1u_0201_10V6K
PR95

Vcc

0.1u_0201_10V6K
2

2
2

1
27,28,29 MAINON A

PC222
D 5 4 PR96 1 @ 2 0_0402_5% B3 B2 MAINON 1 2 B3 B2 D

GND
NC Y EN SS EN SS 74AUP1G07FW4-7_DFN1010-6_1X1

2
1
5,8,28 PM_SLP_S0_N B

Gnd
MAINON PR97 1 2 0_0402_5% 1

2
0_0402_5% PC245
A2

A2
0.01U_0201_10V6K

1
3
74AUP1G08FW4-7_DFN1010-6_1X1 R100 OZ7502_CSP8
@ 200K_0201_5% 2

2
+3V
+3V_AUD

+5V
PR147 2 10_0402_5%
+5VAUX
+3VDX_TCH_PAD +5VAUX

0.1u_0201_10V6K
@
PR140 2 10_0402_5%

1
PR111

PC166
0_0402_5% +1.2V
+3VDX_TOUCHPANEL

0.1u_0201_10V6K

0.1u_0201_10V6K
1 2

1
@

PC149

PC151
PR141 2 1 0_0402_5%

1
PC297
+1.2VSUS @
+3VDX_CAMERA_FPS

2
OZ7502_CSP8 0.1u_0201_10V6K OZ7502_CSP8 +2.5VSUS

2
A3

A3
PR143 2 1 0_0402_5% +3V PU27 @ PU18 OZ7502_CSP8 +1.00VSUS

A3
+3VDX_SUS

VDD

VDD
B4 A4 B4 A4 PU16
+2.5VAUX
IN2 OUT2 IN2 OUT2 PL17

PC146

VDD
0.1u_0201_10V6K
B4 A4 1 2
PR200 2 @ 1 0_0402_5% 3VAUD_PWRGD +1.00VAUX IN2 OUT2
B1 A1 B1 A1 BLM15PX121SN1D_2P
IN1 OUT1 IN1 OUT1

2
PR134
B1 A1
IN1 OUT1

0.1u_0201_10V6K
MAINON PR202 1 2 B3 B2 1 2 B3 B2

GND

GND
EN SS 27,28 SUSON EN SS PR160

1
0_0402_5%

PC148
SUSON

0.047U_0402_25V7K
1
1 2 1 B3 B2
@

GND
0_0402_5% EN SS

1
R99 @ PC25 1

PC246
A2

A2

2
200K_0201_5% PC252
0.01U_0201_10V6K 0_0402_5% 0.01U_0201_10V6K
2

A2
2

2
+3V @
+3VDX_TCH_PAD
PU37 +5V
@ PR198
2 3 2 @ 1
C IN OUT C
1

PC315

0.1u_0201_10V6K
0_0402_5%
0.1u_0201_10V6K

PR197 2 @ 0_0402_5% 1 4 @ @ +5V


6 TOUCHPAD_PWR_EN ON GND

PC174
2
1

@
R93

2
200K_0402_5% SLG59M1558VTR +5VAUX

0.1u_0201_10V6K
L37 @ +5V_AUD

1
1 2

PC152
2

OZ7502_CSP8
BLM15PX121SN1D_2P

1
PC311

A3

2
+5V PU34 @ OZ7502_CSP8 +3VDX_EDP
@

0.1u_0201_10V6K
0.1u_0201_10V6K

A3
PU14

VDD

1
+5V B4 A4

PC175
IN2 OUT2

VDD
+3V B4 A4
IN2 OUT2

2
B1 A1
IN1 OUT1 +3VAUX
B1 A1 OZ7502_CSP8 +3VDX_NGFF_WLAN
IN1 OUT1
0.1u_0201_10V6K

PR174 1 2 B3 B2

A3
4 AUDIO_PWR_EN PR134

GND
EN SS PU35
1

@ 0_0402_5%
PC213

1 2 B3 B2

1
1 L35

GND
@ 27,28 EDP_VDD_EN_R EN SS 1.5A

VDD
R98 @ PC265 B4 A4 1 2
IN2 OUT2

0.047U_0402_25V7K
1
A2
2

200K_0201_5%
0_0402_5%

1
+1.8V 0.01U_0201_10V6K R101 BLM15PX121SN1D_2P

PC298
A2
OZ7502_CSP8 2 200K_0201_5% B1 A1
2 IN1 OUT1
@
A3

PU36 PR175 1 1

2
@
WLAN_PWR_EN

2
+1.8VDX_SENSORHUB @ 2 1 B3 B2 C400 C403

GND
8 SLP_WLAN_N EN SS
VDD

B4 A4 0.01U_0402_25V7K 0.01U_0402_25V7K
IN2 OUT2 2 2

1
PR196 0_0402_5% 1
R103 PC266

A2
B1 A1 2 @ 1 200K_0201_5% 0.01U_0201_10V6K
IN1 OUT1 NGFF_GND
PR195 2
1

PC314

0_0402_5%
0.1u_0201_10V6K

2
@ B3 B2 @
GND

4 SENSOR_PWR_EN EN SS
2 0_0402_5% 1
2

1
1

@ @ PC267
A2

R94
0.01U_0201_10V6K

200K_0402_5% +5VAUX
2
2

0.1u_0201_10V6K
1

PC153
2
OZ7502_CSP8 +1.8V +5V
B B

A3
PU20
PL23

VDD
B4 A4 1 2

0.1u_0201_10V6K
IN2 OUT2

PC163
+3VDX_SUS BLM15PX121SN1D_2P

0.1u_0201_10V6K
+1.8VAUX B1 A1
PU39 PR199 IN1 OUT1

2
@

PC219
0_0402_5% @ PR161
2 3 1 2 MAINON 1 2 B3 B2
+3VAUX IN OUT

GND
EN SS

2
PR163

0.047U_0402_25V7K
0.1u_0201_10V6K

SUSON 2 @ 1 1 4 0_0402_5%

1
OZ7502_CSP8

PC251
ON GND
1

A2
PC217

A3
@ PU38
0_0402_5%

2
+1.8V_AUD
2

VDD
SLG59M1558VTR B4 A4
+1.8V IN2 OUT2
PR95
B1 A1 1 2
IN1 OUT1

PC304
0.1u_0201_10V6K
PR208 1 2 B3 B2 0_0402_5%
3VAUD_PWRGD

GND
+3VDX_TOUCHPANEL EN SS

2
0.01U_0201_10V6K
PU42 10K_0402_5% 1
@ PR146
0_0402_5% @ PR209

A2
PC304 @
MAINON 1 2

1U_0201_10V6K
2 3 1 2
+3VAUX IN OUT

1
200K_0201_5%
R102 1
PR171 10K_0402_5% 2

PC270
0.1u_0201_10V6K

2 @ 1 1 4

2
4 TOUCHPANEL_PWR_EN ON GND
1

PC308
200K_0402_5%

1 @

2
0_0402_5%
2

SLG59M1558VTR +5VAUX
PR3232 PU22 +3VAUX
R96

PJ13
0_0402_5% 1 4 1 2
VDD S 1 2
2 27 AUXON_3V3
2 1 2
ON PC294

PC296
JUMP_43X79

0.1u_0201_10V6K
5 2 1
+3VDX_CAMERA_FPS 3 CAP
+3VALW D

2
6 1000P_0201_25V7K
PU33 PR158 GND
@
0_0402_5% @
2 3 1 2
+3VAUX IN OUT
PR173 SLG59M301VTR_FC-TDFN8-6_1P5X2
0.1u_0201_10V6K

2 @ 1 1 4
4 CAMERA_PWR_EN ON GND
1

PC310

A A
200K_0402_5%

0_0402_5% 1 @
2

SLG59M1558VTR
R97

2
LENOVO.CRDN
Titl e
SWITCH POWER
Si ze Document Number
D R e vV1.0
YOGA920
D at e : Thursday, June 08, 2017 Shee t 31 of 45
"PROPERTY NOTE: this document contains inf ormation conf idential and
property to LENOVO PND and shall not be reproduced or transf erred to other documents
or disclosed to others or used f or any purpose other than that f or which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
4 3 2 1

VIN
+5VAUX

1 @
+5V VIN

10U_0603_10V
1U_0201_10V6K

0.1u_0201_10V6K

10U_0603_10V
PC141
PR9257 1

1
1

PC142
PR168

PC78
PC40
+VCCST_CPU 1 2 1 2

2
0_0402_5%
2

2
2
D
1_0402_5% 1

2
PC67

23

22

21
8
R314 @ PC191

1U_0201_10V6K
100_0402_1% 0.22U_0402_10V6K PC192

VIN4
VIN3
VCC

PVCC
2

1
3 1 2 +VCCSA
BOOT

2
10_0402_1% 2 1 R208 PWM_CPUVR 1 0.22U_0402_10V6K 0.22uH_EM-22BM01V01_10A_20%
11 VR_SVID_DATA FCCM_CPUVR 2 PWM
FCCM 16 PL16
VSWH5 5 1 2
VSWH1

1
4
11 VR_SVID_ALERT_N 19 GH PU24 PR156 PR9256
GL 1_0402_5%

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M
1

1
3.65K_0402_1%

PC242

PC241

PC243

PC244

PC257

PC248
PGND1

PGND7

ISUMN_SA 2
11 VR_SVID_CLK

2
ISUMP_SA
@ PR151 1 2 0_0402_5%
8 GP_VRALERTB
PR133 1 2 0_0402_5% PC68
8,10,27,29,30 H_PROCHOT_N +3V

12

20
1

1
PR124 10K_0402_5% AOZ5029QI_QFN_5x3P5
2 1 PR126 PR120 0.1u_0201_10V6K
100K_0402_1% 1 2
PR132 1 2 0_0402_5% IMVP_VR_CPU_OK 63.4K_0402_1%
27 ALL_SYS_PWRGD @ PC180
@
H_VR_ENABLE

2
PR131 1 @ 2 0_0402_5% PR88
8,27,28,34 ALL_SYS_PWRGD_PMIC VIN
8200P_0402_50V7K 287_0402_1%
PR152 1 2 0_0402_5% 2 1 1 2 ISUMN_SA +5VAUX
27 EC_VR_EN

40

39

38

37

36

35

34

33

32

31
PR129 12.7K_0402_1%
PR35
2 1 PR81
PR9211 PR106

PROG1

PROG2
VR_HOT#

ALERT#
VR_EN

VR_READY

SDA

VCC

VIN
SCLK
2 1 330_0402_5% 1

1 @
1 2 2 1 ISUMP_SA

10U_0603_10V
1U_0201_10V6K

0.1u_0201_10V6K
PR138 1 @ 2 PSYS_CPU_R 1 30 PWM_SA + PC130
1

PC159
220K_0402_1%_TSM0A224F4051RZ 30 PSYS_CPU PSYS PWM_C

1
1

10U_0603_10V

10U_0603_10V
0_0402_5% 2.61K_0402_1% ERTJZEG103FA0201

PC88
PC109
PR9216

PC170

PC173
330P_0402_50V7K

FCCM_SA 2

2
2

2 29 2_0402_5% 2 PR105 1
33U_B2
7.15K_0402_1%

IMON_B FCCM_C 2

2
2
2

1 2
PC51

PR36

PC127 @
PR37 11K_0402_1% 2 1 1

23

22

21
2

8
86.6K_0402_1% PC156 3 28 @ 1 2
NTC_B ISUMN_C
1

33P_0402_50V7K PC66 PC177


PR42 GT2@ 0.022U_0201_6.3V PC193

VIN4
VIN3
VCC

PVCC
1

470P_0201_25V7K 0.01U_0201_10V6K
1 2 2 1 4 27 2 3 1 2
COMP_B ISUMP_C BOOT
PC123 PR44 PWM_CPUVR 1
PC160
8200P_0402_50V7K 1.82K_0402_1% 2 1 2 1 5 26 FCCM_CPUVR 2 PWM 0.22U_0402_10V6K
FB_B RTN_C VSSSA_SENSE 11 FCCM 16
PC254
PC144 PR121 PR165 VSWH5 CPU_CORE
470P_0201_25V7K 562_0402_1% 1200P_0201_25V7K 5
2 1 2 1 6 PU17 25 1 2 2 1 4 VSWH1 PL25
RTN_B FB_C VCCSA_SENSE 11 19 GH
ISL95857HRZ PU24 CYNTE_PCMB062D-R20MS_2P
PR113 GL
C 2 PR45 1 4.7K_0402_1% 1 2 C
11 VCCGT_SENSE 2K_0402_1% 7 24 1 2
680P_0402_50V7K
ISUMP_B COMP_C

1
2.61K_0402_1% 1 1 1

PGND1

PGND7

1
PR9258
11 VSSGT_SENSE

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M
1.07K_0402_1%

330U_B2_2VM_R9M
1_0402_5%

1
8 23 + + +

PC259
1

PC225

PC114
ISUMN_B IMON_C

2.49K_0402_1%

220U_B12
2
PR157

220U_B12
PC261

PC264

PC262
PC224

PC223

PC221
330P_0402_50V7K

1
PC158 PR9217 3.65K_0402_1%
PWM_CPUVR 2 2 2

2
12

20
0.01U_0201_10V6K 9 22 2_0402_5% AOZ5029QI_QFN_5x3P5

PR91
65K_0402_1%
2 ISEN1_B PWM_A

2
2

2
2 @

PC87

PC167
FCCM_CPUVR

2 1
10 21

ISUMN_CPU
ISUMP_CPU
PR89
ISEN2_B FCCM_A

8200P_0402_50V7K
1 PC128

1
41 2 470P_0201_25V7K
ISUMP_GT EP

1
ISENGT_1

ISENGT_2

ISUMN_A
@

ISUMP_A
COMP_A
PWM1_B

PWM2_B
FCCM_B
CPU_CORE

IMON_A

PC176
NTC_A

RTN_A
2

FB_A
1
1

PR9213
0.068U_0201_10V6K

PC85
2.61K_0402_1% PR9214
PR22
2

0_0402_1%
11K_0402_1%

VIN

11

12

13

14

15

16

17

18

19

20
1

2 1 1 2
PR164

PC50
1

+5VAUX
PC65

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M
2

22U_0603_4V6M

22U_0603_4V6M

22U_0603_4V6M
1K_0402_5%

1
2200P_0402_50V7K 0.1u_0201_10V6K

PC228

PC229

PC227
1

PR128 1 2

PC233

PC236

PC230
2

2
ERTJZEG103FA0201 PC125
2

1 1

1 @
1@

PWM_GT1

PWM_GT2

2
FCCM_GT

470P_0201_25V7K PC172
PR92

10U_0603_10V

10U_0603_10V
1U_0201_10V6K

0.1u_0201_10V6K

1
2
PC129 PC120

PC178

PC179
PR85 1

7.15K_0402_1%

PC110
ISUMN_GT

1
2 1

PC111
PR46
2 1 1 2 ISUMN_CPU
2 2

2
1.2k_0402_1%
33U_B2 33U_B2
0.1u_0201_10V6K

2
287_0402_1%

1
1

8200P_0402_50V7K
PC13

PC52

23

22

21
PR9210 PR103

330P_0402_50V7K

8
72K_0402_1%

ISUMP_CPU
2

2 PR87 1 2 1
PC194

VIN4
VIN3
VCC

PVCC
2

PR130
220KNTC

1
2 1 976_0402_1% 2.61K_0402_1% ERTJZEG103FA0201 3 1 2
PR47

PR9215 BOOT
PWM_GT1
1

PC202 2_0402_5% 2 PR102 1 1


0.022U_0201_6.3V FCCM_GT PWM
1

2 0.22U_0402_10V6K
PC126 @ FCCM GFX_CORE
2 1 11K_0402_1% 1 2 16
VSWH5

2
@ 1 2 5
PC207 PC64 4 VSWH1 PL26
0.022U_0201_6.3V 0.047U_0201_6.3V 19 GH PU25
470P_0201_25V7K CYNTE_PCMB062D-R20MS_2P
GL 1 2

1
1 1

PGND1

PGND7
AOZ5029QI_QFN_5x3P5

1
PR9259

22U_0603_4V6M

22U_0603_4V6M

330U_B2_2VM_R15M

330U_B2_2VM_R15M
1

1
1_0402_5% + +

PC113

PC112
47U_0603_4V

47U_0603_4V

47U_0603_4V

47U_0603_4V
PR169

PC226

PC238

PC234

PC240

PC239

PC231
B 3.65K_0402_1% B
1 2 2

2
12

20
PR574

ISUMP_GT 2
PC165

ISUMN_GT
ISENGT_1 1 2
0.01U_0201_10V6K
2

10K_0402_1%
VSS_SENSE 11
PC255
PR82
1000P_0201_25V7K
1 2 2 1 VCC_SENSE 11

499_0 2_1% VIN


PR83
2.67K_0402_1%

40
1 2 +5VAUX
2K_0402_1%
1

1.5K_0402_1%
PR84

PR166
68P_0402_50V7K

1 @
2

10U_0603_10V

10U_0603_10V
10U_0603_10V

10U_0603_10V
1U_0201_10V6K

0.1u_0201_10V6K

1
2

PC189

PC196
PC188

PC195
1

PC140
560P_0402_50V7K

680P_0402_50V7K

1
PC190
PC168

2 1

2
2

2
1
2

2
PC169

PC145

23

22

21
1 2

8
PC201

VIN4
VIN3
VCC

PVCC
3 1 2
BOOT
PWM_GT2 1
FCCM_GT 2 PWM 0.22U_0402_10V6K GFX_CORE
FCCM 16
VSWH5 5
4 VSWH1 PL29
19 GH PU29 CYNTE_PCMB062D-R20MS_2P
GL 1 2 1

1
+

PC263
220U_B12
PGND1

PGND7
AOZ5029QI_QFN_5x3P5

1
PR9261

22U_0603_4V6M

22U_0603_4V6M
22U_0603_4V6M
22U_0603_4V6M
22U_0603_4V6M
1

1
1_0402_5%

PC287
PR179 2

PC272

PC268

PC289

PC288
3.65K_0402_1%

2
12

20
PR575

ISUMP_GT 2

ISUMN_GT
ISENGT_1 1 2

10K_0402_1%

A A

LENOVO.CRDN
Title
VR12.6
Size Document Number
D Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 32 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

+3VALW

2
JP5

1 2 R365
3 1 2 4 100K_0402_1%
3 4 JP26
5 6
5 6

1
7 8 8
9 7 8 10 7 8
9 10 RTC_VCC 7
+5V_AUD 11 12 +5V_AUD 21,27,30 MBAT_PRES_N R408 1 2 100_0402_5%
13 11 12 14 R410 1 2 100_0402_5% 6 14
13 14 21,24,27,29,30,33 EC_SMB_DAT 6 GND 13
+3V_AUD 15 16 +3VALW_AUD 21,24,27,29,30,33 EC_SMB_CLK R422 1 2 100_0402_5% 5 GND
SPK_LP 17 15 16 18 SPK_LP +1.2V_RIO +1.2V 4 5 12
17 18 4 GND 11
SPK_LN 19 20 SPK_LN BAT BAT_R 3
19 20 3 GND 10
+1.2V 21 22 F2 GND
D
23 21 22 24 +1.8V_AUD R562 1 2 1 2 2 9 D
23 24 2 GND
25 26 0_0402_5% C279 2 1
5 USB_PN7 25 26 1

1
27 28 15A_24V_F1206HB15V024TM
5 USB_PP7 29 27 28 30 +1.2VSUS C278

0.1U_0402_25V6
29 30 CODEC_PD_N 27 2
5 USB3_RX3_N 31 32 47P_0201_25V8
31 32 1

2
33 34 NBSWON_N 27 C277
5 USB3_RX3_P 33 34
35 36 NOVO_BTN_N 27 R594 1 2 1000P_0201_25V7K WS33081-S0101-1H
37 35 36 38 1
5 USB3_TX3_N 0_0402_5%
39 37 38 40
5 USB3_TX3_P 39 40
41 42 HDA_SDI_I2S_RXD 6
43 41 42 44
22 LID_PAD_N 43 44
45 46
24 LID_30_N 45 46 HDA_SDO_I2S_TXD 6
24 DMIC_CLK 47 48 HDA_BCLK_I2S_SCLK 6
49 47 48 50
24 DMIC_DATA 49 50 HDA_SYNC_I2S_SFRM 6
51 52
5 USB_OC_N3 51 52 EC_USB_CHARGE_EN 27
53 54
55 53 54 56
8,27 PWR_LED 55 56 +5VDX_WALKPORT
+5VDX_WALKPORT 57 58
59 57 58 60
59 60 JP13
61 62
63 61 62 64 22 CAP_LED R378 1 2 150_0402_5% 1
63 64 2 1
65 66 2
27 USB_CHARGE_DET_N 65 66 3
67 68 PCH_BEEP 6 27 MY15 3
27 CLT1 69 67 68 70 27 MY10 4
27 CLT3 69 70 5 4
27 MY11 5
27 MY14 6
7 6
71 72 27 MY13 7
71 72 27 MY12 8
9 8
27 MY3 9
27 MY6 10
HRS_FH29BJ-70S-0.2SHW 11 10
27 MY8 11
27 MY7 12
13 12
27 MY4 13
27 MY2 14
15 14
27 MX0 15
27 MY1 16
17 16
27 MY5 17
C 27 MX3 18 C
19 18
27 MX2 19
27 MY0 20
21 20
27 MX5 21
27 MX4 22
23 22
27 MY9 23
27 MX6 24 31
25 24 G1 32
27 MX7 25 G2
27 MX1 26
HRS_FH29BJ-120S-0.2SHW 27 26
27 KB_125 27
28
29 28
ADIN_1 132 ADIN_1 29
131 30
132 131
30
130 129
128 130 129 127
126 128 127 FC5AF301-2101H
125
124 126 125 123
+5VDX_WALKPORT 122 124 123 121 +5VDX_WALKPORT
120 122 121 JP7
119
118 120 119 117
118 117 +5V 1
116 115 EC_SMB_CLK 2 1 6
114 116 115 113 2 GND
113 EC_SMB_DAT 3
112 114 111 3
111 MBAT_PRES_N 4 7
110 112 109 4 GND
110 109 5
108 107 5
106 108 107
105
104 106 105 103 FC5AF051-2931H
103 +1.2V_LIO +1.2V
102 104 101
100 102 101
99
98 100 99 97
97 R596 1 2
96 98 95
+3V_LIO 96 95 +3V_LIO 0_0402_5%
94 93
92 94 93 91
+1.2V_LIO 91 +1.2V_LIO +1.2VSUS
90 92 89
27 MBATLED_ORANGE 90 89 MBATLED_WHITE 27
88 87
86 88 87 85
86 85 R610 1 @ 2
84 83
B
82 84 83 81 0_0402_5% B

80 82 81 79
78 80 79 77
76 78 77
75
74 76 75 73
72 74 73 71
70 72 71
69 DDI1_AUX_DP 2
68 70 69 67
66 68 67 DDI1_AUX_DN 2
65
TYPEC_STD_VBUS 64 66 65 63 DDI1_DN1 2
62 64 63 61 +3V_LIO +3V
TYPEC_DCIN_VBUS 62 61 DDI1_DP1 2
60 59
58 60 59 57
2 DDI1_DN2 57 USB_PN4 5 R611 1 2
56 58 55
2 DDI1_DP2 56 55 USB_PP4 5 0_0402_5%
54 53
52 54 53 51
5 USB3_RX2_P 52 51 USB_PP6 5 +3VDX_SUS
50 49
5 USB3_RX2_N 48 50 49 47 USB_PN6 5
46 48 47
2 DDI1_DN3 45 R612 1 @
44 46 45 43 USB3_RX1_N 5 2
2 DDI1_DP3 44 43 USB3_RX1_P 5 0_0402_5%
42 41
40 42 41
5 USB_PP3 39
38 40 39 37 USB3_TX1_N 5
5 USB_PN3 38 37 USB3_TX1_P 5
36 35
34 36 35 33 R510 1 2 0_0402_5%
5 USB_PN9 34 33 2 0_0402_5% H_DCI_DATA 4
5 USB_PP9 32 31 R511 1
30 32 31 H_DCI_CLK 4
29
28 30 29 TYPEC_DCIN_DISCHARGE 27
27 TYPEC_STD_5VEN 27
26 28 27
25
2,27 EC_HPD 24 26 25 TYPEC_STD_DISCHARGE 27
23
27 CE_DP 22 24 23 21
27 CE_USB 22 21 TYPEC_DCIN_CC1 22
20 19
27 CE_FLIP 20 19 TYPEC_DCIN_CC2 22
18 17
16 18 17
22 TYPEC_STD_CC1 15
16 15 USB_OC_N1 5
14 13
22 TYPEC_STD_CC2 14 13 EC_SMB_CLK 21,24,27,29,30,33
12 11
10 12 11 EC_SMB_DAT 21,24,27,29,30,33
9
8 10 9 7
A A
SPK_LP 6 8 7 SPK_LP
5
4 6 5 3
SPK_LN SPK_LN
4 3
2
2 1
1 LENOVO.CRDN
Title
CONNECTOR
JP8
Size Document Number
C Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 33 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

+3VAUX

+1.00VAUX

74AUP1G08FW4-7_DFN1010-6_1X1

D U99 @ D

6
+3VAUX
U23 @

1
PR125 @

Vcc
PR211 1 2 0_0402_5% 2 10K_0402_5%
8,27,28,32 ALL_SYS_PWRGD_PMIC A GT3_1.0V_EN 1
NC1 Vcc
6
5 4 PR204 1 2 0_0402_5%
ZVM_N_R 2 0_0402_5% 1 NC Y PR108 1 2 0_0402_5% 2
PR107 1 5

2
15 ZVM_N A
B NC2

Gnd
3 6 ZVM_N_R
GND Y

3
R104 1 @ 2 200K_0402_5% 74AUP1G07FW4-7_DFN1010-6_1X1

PQ21
C AON2406_DFN2_2B C
+V_EDRAM_VR
7 PL19 @
+1.00VAUX
1 4 1 2
2 BLM15PX330SN1D_2P
5 8
6

3
EDRAM_EPPIO_EN

PQ14
AON2406_DFN2_2B +V_EOPIO_VR
7 PL22 @
+1.00VAUX
1 4 1 2
2 BLM15PX330SN1D_2P
5 8
6

+5VAUX R287 @ @

3
1 2 EDRAM_EPPIO_EN
+5VAUX R324
@ 1
1 2 200K_0402_5% 200K_0402_5%
6 PC292
PQ51B @ 470P_0402_50V7K
@ 2
3
B PQ16B 2 B

AO5804EL_SC89-6
GT3_1.0V_EN PR176 1 2 0_0402_5% 5 1@
1
PC293
@
AO5804EL_SC89-6 470P_0402_50V7K
4 2

A A

LENOVO.CRDN
Title
BLANK
Size Document Number
C Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 34 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

LENOVO.CRDN
Title
BLANK
Size Document Number
C Rev V1.0
YOGA4
Date: Monday, July 27, 2015 Sheet 35 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

D T7 T8 D
T1 T2 T3 T5 T6
T4 SML_08A2M
SML_08A2M SML_08A2M SML_08A2M SML_08A2M SML_08A2M SML_08A2M
SML_08A2M

SML_08A2M SML_08A2M SML_08A2M SML_08A2M SML_08A2M SML_08A2M SML_08A2M


SML_08A2M

1
1

1
1
1
1

1
1
H1 H2 T9 T10 T11 T12
HOLEA HOLEA SML_08A2M SML_08A2M SML_08A2M SML_08A2M

HOLE244X220_OB166X128 HOLET174B196_99 SML_08A2M SML_08A2M SML_08A2M SML_08A2M

1
1
1

1
1
C C

H3 H4 H5 T15 T16 T13 T14


HOLEA HOLEA HOLEA SML_08A2M SML_08A2M SML_08A2M SML_08A2M

HOLE236_128 HOLET215B158_138 HOLET215B158_138 SML_08A2M SML_08A2M SML_08A2M SML_08A2M

1
1
1

1
1
N1 H6 H7
54-3220-22 HOLEA HOLEA FD1 FD2 FD3 FD4 FD5 FD6
B B
hole255_134 HOLET215B158_138 HOLET215B158_138
1

1
LENOVO.CRDN
Title
MOUNTING HOLE/EMI
Size Document Number
A Rev V1.0
YOGA4
A A
Date: Monday, July 27, 2015 Sheet 36 of 37
"PROPERTY NOTE: this document contains information confidential and
property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1
5 4 3 2 1

IT8586
EC

AC adapter VIN 3VALW/3A


BQ24770
SLG59M301V 3VAUX/3A
D NVDC Charger Switch D

V3.3Dx_SSD/2A
SSD

5VAUX/2A
ISL955905

PWM

2S2P
5V_WALKPORT/3A
BATTERY USB

C C

+1.8VSUS/2A

+1.2VSUS/4A

+1.05VAUX/3A

+0.6V/1A

B
VCCIO/3A B
OZ8026

PWM

CPU_CORE/22A max 34A


ISL95857

PWM
CPU_CORE/23A max 57A

VCCSA/4A max 7A

A A

LENOVO.CRDN
Title
GFx_CORE/4A max 7A Power Block Diagram
Size Document Number
C Rev V1.0
ISL95853 YOGA4
Date: Monday, July 27, 2015 Sheet 37 of 37
"PROPERTY NOTE: this document contains information confidential and
PWM property to LENOVO PND and shall not be reproduced or transferred to other documents
or disclosed to others or used for any purpose other than that for which it was
obtained without the expressed written consent of LENOVO PND."

5 4 3 2 1

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