4574 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 54, NO.
5, SEPTEMBER/OCTOBER 2018
A Novel Nonisolated Z-Source DC–DC Converter
for Photovoltaic Applications
Arash Torkan , Student Member, IEEE, and Mehrdad Ehsani, Life Fellow, IEEE
Abstract—Pollution problems caused by fossil fuels have led
to more investigations on renewable energy systems. Photovoltaic
cells and fuel cells output low-level voltage than required; therefore,
high gain dc–dc converters are used to boost this low voltage. The
Z-source converter can be employed as dc–dc converter to boost
the photovoltaic panel voltages. It also offers other advantages,
such as clamped switched voltage, high voltage gain, isolation of
energy source from the load, and positive polarity for output volt-
age; therefore, this is a good choice for high step-up applications.
This paper presents analysis of a novel high step-up Z-source based
dc–dc converter that has higher voltage gain than the Z-source con-
verter. Furthermore, high efficiency, low device voltage stress, and
wide voltage gain range make it a good candidate for photovoltaic
and high voltage step-up applications. The proposed dc–dc con-
verter is evaluated experimentally for converting 24-V dc input to
300-V dc output at 100 W and to validate the simulation results.
Index Terms—DC–DC power converters, renewable energy sys-
tems, solar energy, solar power generation, Z-source converter.
I. INTRODUCTION
LIMATE change is becoming an increasing motivation
C for the research community. Pollution issues, caused by
fossil fuels, are observable on the planet. One action to lower
carbon emission rates is the Kyoto Protocol that commits states
to reduce greenhouse gas emissions. The main cause of the
excessive carbon emissions is the combustion of fossil fuels.
Furthermore, rapid and unpredictable oil prices have also led to
interest in shifting from fossil fuels to renewable resources [1],
[2]. Some of the issues caused by the combustion of fossil fuels
are as follows.
1) They are nonrenewable energy sources.
2) Carbon dioxide is emitted to the atmosphere by their com-
bustion, which causes global warming.
3) Oil spills have led to water pollution and wildlife damage.
On the other hand, renewable energy sources can be relied
on for a long term. They can be cost-effective and efficient.
Manuscript received June 13, 2017; revised October 10, 2017 and January
31, 2018; accepted April 2, 2018. Date of publication May 6, 2018; date of
current version September 17, 2018. Paper 2017-IPCC-0403.R2, presented at
the 2017 Applied Power Electronics Specialists Conference, Tampa, FL, USA,
Mar. 26–30, and approved for publication in the IEEE TRANSACTIONS ON IN-
DUSTRY APPLICATIONS by the Industrial Power Converter Committee of the
IEEE Industry Applications Society. (Corresponding author: Arash Torkan.)
The authors are with the Power Electronics and Motor Drives Labora-
tory, Department of Electrical and Computer Engineering, Texas A&M Uni-
versity, College Station, TX 77843 USA (e-mail:, arashtorkan@gmail.com;
ehsani@ece.tamu.edu).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TIA.2018.2833821
0093-9994 © 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications standards/publications/rights/index.html for more information.
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Therefore, renewable energy sources, such as solar energy, are
being increasingly employed to produce electrical energy [3].
Photovoltaic cells and fuel cells are important types of renew-
able energy sources. However, their problem is their low output
voltage than is needed for grid-connected inverters. Therefore,
high gain dc–dc converters must be used to boost this low volt-
age [4]–[8].
One solution is to use several photovoltaic cells in a series
to reach the required voltage. However, some of the cells may
be shaded in this solution and these shaded cells become re-
verse biased, acting as loads instead of sources. Furthermore,
mismatch in photovoltaic modules may cause highly localized
power dissipation, and as a result, output power is decreased
[9]–[11]. Using high gain dc–dc converters can be one of the ef-
ficient solutions to boost the low photovoltaic cells voltage [12].
Several switches are employed in [13] and [14] to achieve high
voltage gain and to lower the switch stress voltage. However,
the converter cost is increased and the control method is more
complicated in comparison to the single-switch dc–dc convert-
ers. High-turn-ratio transformers are employed in conventional
isolated dc–dc converters to achieve large voltage gain. How-
ever, efficiency suffers in this method because of transformer’s
large leakage inductance [15]–[17]. Therefore, to achieve higher
efficiency, nonisolated high step-up converters are desired.
The boost converter is the most common converter used
to step up the dc voltage. Large dc gain can be theoretically
achieved by using this converter; however, efficiency decreases
in practical implementations. Moreover, it suffers from large
diode reverse recovery problem [18]. Shift converters, such as
super-lift converters, can be employed to reach large dc gain.
However, the main switch duty cycle must be very large to
achieve the large gain. Other nonisolated converters, such as the
boost converter, using coupled inductor or cascaded boost con-
verter, may be used to reach large dc voltages. However, they
are unstable and inefficient at large dc voltage gains [19]–[21].
Conventional Z-source network has been proposed by Peng
in 2002. It can be used to achieve many power conversion ap-
plications. One of the main advantages of a Z-source dc–dc
converter is its larger dc voltage gain, in comparison to the com-
mon dc–dc converters, such as the boost converter. Therefore,
it may be a good choice for high step-up applications, such as
photovoltaics [22]–[24]. In this paper, an innovative nonisolated
dc–dc converter is proposed, based on the conventional Z-source
topology. One of its main advantages is a large dc voltage gain,
in comparison to the common converters. Moreover, the reverse
recovery problem of the output diodes is eliminated because of
TORKAN AND EHSANI: NOVEL NONISOLATED Z-SOURCE DC–DC CONVERTER 4575

Fig. 1. Z-source converter schematic [23].

their soft switching [25]. The major advantages of the proposed

converter are as follows.
1) The semiconductor devices, such as the main switch, face
low-voltage stress, since its voltage is clamped.
2) The output diodes are turned ON and OFF softly; therefore,
they do not have any reverse recovery problem.
3) The proposed converter has larger dc voltage gain, in com-
parison to the conventional Z-source converter, without
Fig. 2. Proposed converter schematic.
using a high-turn-ratio transformer.
4) High voltage gain can be achieved with using a low switch
duty ratio, i.e., (D < 0.45).
In the following sections, we introduce the proposed converter
circuit and its nonideal element analysis, design principles, and
simulation and experimental results, respectively.

II. STEADY-STATE OPERATION PRINCIPLE OF THE

PROPOSED CONVERTER
Z-source dc–dc converter circuitry is shown in Fig. 1. It in-
cludes two identical inductors and capacitors in the Z-source
network. DC voltage gain can be calculated by the following
equation:
VO 1−D
Mdc = = for D < 0.5. (1)
VI 1 − 2D
The main switch duty ratio is indicated by D, determined by
Ton
, where Ton is the pulsewidth and T is the switching period
T
of the pulsewidth modulation (PWM) signal.
The proposed converter topology is shown in Fig. 2. As it Fig. 3. Equivalent circuit of the proposed converter when switch S is ON.
is seen in this figure, voltage multiplier blocks are used at the
output to increase the overall output voltage. increased linearly and with a constant slope. Then, n times of
The proposed converter has two main operation modes in one the voltage across inductors L1 is applied across inductors L2 .
switching period. It is assumed that the converter operates in Therefore
continuous conduction mode and all the semiconductor devices
n2 VL 1 = VC , VL 2 = n · VC . (3)
are ideal. Coupled inductors turn ratio is defined as n := .
n1
Mode 1 [0, DT ] (see Fig. 3): This operation mode is started This causes the diodes D2 and D5 to get turned ON; therefore,
when active switch S is turned ON, and then, the input diode capacitors Co2 and Co5 are charged in this time interval. When
D1 is turned OFF. Therefore, the input diode stress voltage is diodes D2 and D5 are turned ON, a negative voltage is applied
calculated by across the diodes D3 and D4 , and make these diodes to turn OFF.
Since the filter inductor Lf voltage is negative in this operation
VD 1 = 2VC − VI . (2) mode, the inductor current is decreased linearly and its energy
Therefore, the proposed converter’s main active switch S and is lost. Therefore
the input diode operate in a complementary manner. Then, the VL f = −Vo1 (4)
capacitors (C) voltage is applied across the inductors L1 . Since
this voltage is positive and constant, inductors L1 current are Vo2 = Vo5 = VL 2 = n · VC . (5)

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4576 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 54, NO. 5, SEPTEMBER/OCTOBER 2018

principle:
 DT  T
VL (t)dt = − VL (t)dt. (13)
0 DT

The volt–second balance concept is applied for both inductors

L1 and Lf . Therefore
for L =⇒ D · T · VC = −(1 − D) · T · (VI − VC ) (14)
1−D
=⇒ VC = VI · (15)
1 − 2D
for Lf =⇒ −D · T · Vo1 = −(1 − D) · T · (2VC −VI − Vo1 )
(16)
=⇒ 2VC · (1 − D) = VI · (1 − D) + Vo1 . (17)
where D is the main switch turn ratio and T is the switching
period. Therefore, based on (15) and (17)
1−D
Vo1 = VI · . (18)
1 − 2D
Fig. 4. Equivalent circuit of the proposed converter when switch S is OFF.
Based on (15) and (18), it is proved that

Output diodes D3 and D4 stress voltages are determined by Vo1 = VC . (19)

According to output capacitor voltage (5), (9), and (18), voltage
VD 3 = Vo2 + Vo3 , VD 4 = Vo4 + Vo5 . (6) gain of the proposed converter can be calculated as follows:
The first operation mode of the proposed converter is shown Vo = Vo1 + Vo2 + Vo3 + Vo4 + Vo5 (20)
in Fig. 3.
⇒ Vo = Vo1 + 2Vo2 + 2.Vo3 (21)
Mode 2 [DT , T ] (see Fig. 4): This operating mode is started
when the switch S is turned OFF. Then, the voltage across it 1−D 1−D
⇒ Vo = VI · + 2n · VI ·
keeps increasing till the input diode D1 is turned ON. So, the 1 − 2D 1 − 2D
following voltage is applied across inductor L1 :  
1−D
+ 2n · · VI −VI (22)
VL 1 = VI − VC . (7) 1 − 2D
Vo (2n + 1) − D
Turn ratio of coupled inductor is defined by n; therefore, the ⇒ Mdc = = . (23)
VI 1 − 2D
voltage that is induced across inductor L2 is calculated by
Therefore, gain of (3) is achieved with n = 1 and D = 0.4 for
VL 2 = n · (VI − VC ). (8) the Z-source converter based on (1). However, gain of (13) is
achieved for the proposed converter with the same parameters
Then, diodes D3 and D4 are turned ON and diodes D2 and D5 are based on (23). Therefore, the voltage gain is greatly increased.
turned OFF; therefore, capacitors Co3 and Co4 are charged. The So, the desired gain can be achieved with having control over
equations for inductor voltages, diodes, and the switch stress the turn ratio of the coupled inductors.
voltage can be written for this operation mode. Current gain of the proposed converter can be calculated for
The second operation mode of the proposed converter is the lossless converter as
shown in Fig. 4 Io 1 − 2D
PI = PO =⇒ VI · II = Vo · Io ⇒ MI = = .
II (2n + 1) − D
Vo3 = Vo4 = −VL 2 = n · (VC − VI ) (9)
(24)
VS = 2VC − VI (10)
Semiconductor devices stress voltage can be calculated when
VD 2 = Vo2 + Vo3 , VD 5 = Vo4 + Vo5 (11) they are OFF. Based on (10) and (2)
VL f = 2VC − VI − Vo1 . (12) 1−D
VS = VD 1 = 2VC − VI = 2VI · − VI (25)
1 − 2D
III. CIRCUIT ANALYSIS AND DC TRANSFER FUNCTION 1−D
VS = V D 1 = 2Vo1 − VI = 2VI · − VI (26)
1 − 2D
Volt–second balances for inductors L and Lf are employed
to calculate the proposed converter voltage gain. The follow- 1
=⇒ VS = VD 1 = VI · . (27)
ing equation can be considered based on volt–second balance 1 − 2D

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TORKAN AND EHSANI: NOVEL NONISOLATED Z-SOURCE DC–DC CONVERTER 4577

A. Power Losses and Efficiency

To calculate the efficiency, the power losses including the
conduction losses and parasitic resistances of the semiconductor
devices are analyzed and studied. The conduction loss of the
main switch S depends on the on-resistance of the switch and
root-mean-square (rms) value of the switch current. The switch
current can be approximated by

2IL − Io = 2II − Io , for 0 < t ≤ D · T
iS = (31)
0, for D · T < t ≤ T.

Based on (24) and (31), the (rms) value of switch current is

 
  D ·T
1 T
Io · (4n + 1) 1
Is(rms) = i2S dt = dt
T 0 1 − 2.D T 0

Io · (4n + 1) √
= D. (32)
1 − 2D

Therefore, the conduction loss in the MOSFET can be calculated

by
Fig. 5. Equivalent circuit of the proposed converter with nonideal elements.
Io2 · (4n + 1)2 · D · rds
2
Pr ds = Is(rms) · rds =
(1 − 2.D)2
Based on (23) and (27), the ratio of input diode and the main Po · (4n + 1)2 · D · rds
switch voltage stress over the output voltage can be calculated as = (33)
RL · (1 − 2D)2
Vstress 1
MS = = . (28) where rds is defined as the switch on-resistance, RL is the load
Vo (2n + 1) − D
resistance, and Po is the output power. Assuming the switch
Therefore, for n = 1, it can be expressed as output capacitance Co is linear and using (19), (23), and (24),
the MOSFET switching loss is expressed as
Vstress 1
MS = = . (29) Co · fs · Vo1
2
Co · fs · Vo2 · (1 − D)2
Vo 3−D Ps = =
2 2Mdc 2 · (1 − 2D)2
This ratio is equal to (0.38) for D = 0.4. This means, the
input diode and main switch voltage stress is much lower than Po · RL · fs · Co · (1 − D)2
= . (34)
the output voltage. Therefore, efficiency can be highly increased. 2((2n + 1) − D)2
Other diodes voltage stress can be calculated based on (6),
(11), and (15) as Therefore, using (34) and (35), the total power loss in the
main switch can be calculated as follows:
1
VD 2 = VD 3 = VD 4 = VD 5 = n ·VI · = n · VS = n · VD 1 .
1−2D Pfet=Pr ds+Ps = Po
(30)  
D · rds · (4n + 1)2 fs · Co · RL · (1 − D)2
· + .
RL · (1 − 2D)2 2((2n + 1) − D)2
IV. NONIDEAL ELEMENTS ANALYSIS OF THE (35)
PROPOSED CONVERTER
In this section, the effect of nonideal elements on the proposed Furthermore, conduction losses of the diodes depend on
converter is analyzed, and efficiency and nonideal voltage gain the average current passing through them and their forward
expressions are calculated. voltage-drop. Therefore, the input diode D1 current can be
The equivalent circuit of the proposed converter with nonideal approximated by
elements is shown in Fig. 5. In Fig. 5, forward voltage-drop of

the diodes, the equivalent series resistor of the capacitors, the 0, for 0 < t ≤ D · T
winding resistance of the coupled inductor, and on-resistance of iD 1 = (36)
the main switch S are considered. II , for D · T < t ≤ T.

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4578 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 54, NO. 5, SEPTEMBER/OCTOBER 2018

Therefore, using (24), the average value of input diode D1 can inductors L1 can be approximated by
be calculated as
 
1 T
ID 1 = iD 1 dt = (1 − D) · II n · Io , for 0 < t ≤ D · T
T 0 iL 1 = (45)
II , for D · T < t ≤ T.
(1 − D) · ((2n + 1) − D) · Io
=
1 − 2.D
= Mdc · Io · (1 − D). (37) Therefore, using (24) and (23), the (rms) value of inductors L1
current can be calculated by
Therefore, the power loss associated with input diode drop of
voltage VF is
  
D ·T  T
PD 1 = VF · ID 1 = VF · Io · Mdc · (1 − D) 1
IL 1 (rms) = Io2 · n2 dt + II2 dt
T
VF · Po · Mdc · (1 − D) 0 DT
= . (38)

Vo = Io n2 · D + Mdc
2 · (1 − D). (46)
The current through diode D2 may be approximated by

Io , for 0 < t ≤ D · T So, using (47), the conduction loss in resistors rL 1 is given by
iD 2 = (39)
0, for D · T < t ≤ T.

Therefore, the average value of diode D2 current is Pr L 1 = 2 · rL 1 · IL2 1 (rms) = 2(n2 · D + Mdc
2
· (1 − D)) · rL 1 · Io2

1 D ·T Po · rL 1
ID 2 = iD 2 dt = D · Io . (40) = 2(n2 · D + Mdc
2
· (1 − D)) . (47)
T 0 RL
Therefore, the power loss associated with diode D2 drop of
voltage VF can be calculated; and it will be the same for diode It should be noted that the inductor conduction losses must be
D5 since ID 2 = ID 5 multiplied by two, since there are two resistances rL 1 . Similarly,
D · Po · V F capacitors resistance conduction losses can be calculated. Since
PD 2 = PD 5 = ID 2 · VF = D · Io · VF = . (41) the output capacitors (rms) currents are small enough, their
Vo
power losses can be ignored. Therefore, the current flowing
The current through diode D3 may be approximated by through capacitors C can be approximated by
⎧
⎨ 0, for 0 < t ≤ D · T
iD 3 = −IL −II (42) 
⎩ = , for D · T < t ≤ T. n · Io , for 0 < t ≤ D · T
n n iC = . (48)
II − n · Io , for D · T < t ≤ T
Therefore, using (24), the average value of diode D3 current can
be calculated as
 Therefore, using (24) and (23), the (rms) value of capacitors C
1 T −Mdc · Io · (1 − D)
ID 3 = iD 3 dt = . (43) current can be calculated by
T D ·T n
Therefore, the power loss associated with diode D3 drop of
  
voltage VF can be calculated, and it will be the same for diode T  D ·T
1
D4 since ID 3 = ID 4 IC (rms) = (Mdc − n)2 · Io2 dt + n2 · Io2 dt
T D ·T 0
PD 3 = PD 4=ID 3 · VF 
= Io (Mdc − n)2 · (1 − D) + n2 · D. (49)
VF · Io · Mdc · (1−D) VF · Po · Mdc · (1−D)
= = . (44)
n n · Vo
Therefore, using (47), the conduction losses in resistors rc are
Power losses in inductors can be divided into wind-
given by
ing(conduction) losses and core losses. Conduction losses are
based on (rms) value of inductors current and their parasitic
resistances, and core losses are negligible for PWM convert-
Pr c = 2IC2 (rms) · rc = 2(n2 · D + (Mdc − n)2 · (1 − D)) · rc · Io2
ers and can be ignored. Since the coupled inductors secondary
and filter current are small, their power loss can be ignored to Po · rc
simplify the equations; therefore, the current flowing through = 2(n2 · D + (Mdc − n)2 · (1 − D)) · . (50)
RL

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TORKAN AND EHSANI: NOVEL NONISOLATED Z-SOURCE DC–DC CONVERTER 4579

Therefore, the total power losses of the proposed converter

are given by

Ptotal = Pr D S + Ps + PD 1 + 2PD 2 + 2PD 3 + Pr C + Pr L 1

Co · (1 − D)2 · Vo2 · fs (4n + 1)2 · Io2 · D · rds
= +
2(1 − 2D)2 · Mdc 2 (1 − 2D)2
+Mdc.VF · (1−D) · Io +2VF · D · Io
2VF · Mdc · (1−D) · Io
+
n
+ 2rc · (n2 · D + (Mdc − n)2 · (1 − D)) · Io2
+ 2rL 1 · (n2 · D + Mdc2
· (1 − D)) · Io2
  Fig. 6. Presented converter efficiency versus output power (W) and input
fs · Co · (1 − D)2 · RL (4n + 1)2 · D · rds voltage (V).
= +
2((2n + 1) − D)2 (1 − 2D)2 · RL
2n · VF · D + (n + 2) · VF · Mdc · (1 − D) Therefore, the proposed converter efficiency can be written
+ based on output power and input voltage as
n · Vo
2rc fs · Co · (1 − D)2 · VI2 (4n + 1)2 · D · rds · Po
+ · (n2 · D + (Mdc − n)2 · (1 − D)) · Po =⇒ γ = +
RL 2 · (1 − 2D)2 · Po (1 − 2D)2 · Mdc2 ·V2
I
2rL 1 2n · VF · D + (n + 2) · VF · Mdc · (1 − D)
+ · (n2 D + Mdc
2
· (1 − D)) · Po . (51) +
RL n · Mdc · VI
2rL 1 · Po 2
+ 2 ·V2
(n · D + Mdc
2
· (1 − D))
Mdc I
Therefore, the proposed converter efficiency is calculated as
2rc · Po
+ 2 ·V2
· (n2 · D + (Mdc − n)2 · (1 − D)).
Mdc I
(55)
Po 1
η= = (52) Efficiency plot versus output power and input voltage is shown
Ptotal + Po P total
+1 in Fig. 6.
Po
Ptotal 1
γ := ⇒η= B. Nonideal DC Transfer Function of the Proposed Converter
Po γ+1
Based on (23), the voltage conversion ratio of the ideal pro-
fs · Co · (1 − D)2 · RL (4n + 1)2 · D · rds posed converter is equal to
=⇒ γ = +
2((2n + 1) − D)2 (1 − 2D)2 · RL
Vo (2n + 1) − D
(n + 2) · VF · Mdc · (1 − D) + 2n · VF · D Mdc = = . (56)
+ VI 1 − 2D
n · Vo
However, because of the semiconductor devices voltage drop
2rc
+ · (n2 · D + (Mdc − n)2 · (1 − D)) and parasitic resistances, voltage ratio of the proposed con-
RL verter using nonideal elements is less than this value. Based on
2rL 1 2 (24), current dc transfer function of the proposed converter is
+ (n · D + Mdc
2
· (1 − D)). (53)
RL calculated by
Io 1 − 2D
MI = = . (57)
II (2n + 1) − D
The relationship between the output power and load resis-
tance and also between the input and output voltage can be This equation is true for both lossy and lossless converter. There-
determined by fore, the converter efficiency can be specified as
Po Io · Vo
η= = = MI · Mdc(nonideal)
PI II · VI
Vo2 V 2 · Mdc
2 1 − 2D
RL = = I . (54) = · Mdc(nonideal) . (58)
Po Po (2n + 1) − D

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4580 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 54, NO. 5, SEPTEMBER/OCTOBER 2018

Therefore, the nonideal voltage transfer function of the proposed capacitors C. Therefore
converter can be calculated as
iL m = iL 1 + iL 2 (68)
(2n + 1) − D dvC
Mdc(nonideal) =η· iC = C · = IL m (69)
1 − 2D dt
1 (2n + 1) − D IL
= · =⇒ vC (t) = vC (0) + m · t (70)
1+γ 1 − 2D C
fs · Co · (1 − D)2 · RL (4n + 1)2 · D · rds IL m
γ= + =⇒ vC (D · T ) = vC (0) + (D · T ) (71)
2((2n + 1) − D)2 (1 − 2D)2 · RL C
2n · VF · D + (n + 2) · VF · Mdc · (1 − D) IL m · D
+ =⇒ ΔvC = vC (D · T ) − vC (0) = (72)
n · Vo fs · C
2rc D · IL m
+ · (n2 · D + (Mdc − n)2 ) · (1 − D) =⇒ C = . (73)
RL ΔvC · fsw
2rL 1 Output capacitors can be designed using the same equations
+ · (n2 · D + Mdc
2
· (1 − D)). (59) mentioned above. For instance, capacitor Co1 is determined
RL
using its voltage ripple and by the following equation:
V. DESIGN PRINCIPLE IL f · D
Co1 = . (74)
In this section, the design principles for choosing the proper fsw · ΔvC o 1
converter components are analyzed. Inductor (L) can be deter- The proper diode and switches can be selected based on their
mined by using the following equation: voltage and current stresses. The main switch S, input diode
 D1 , and output diodes stress voltages are given in (2), (6), (10),
1 t and (11).
iL (t) = vL dt + iL (0). (60)
L 0

Therefore, inductor (L) can be designed based on its current VI. COMPARISON ANALYSIS OF THE PROPOSED CONVERTER
ripple in the first time interval of a switching period In this section, the proposed converter is compared with other
dc–dc converters.
diL
vL = L · = VC (61) Comparison analysis between different single switch power
dt converters is given in Table I.
VC This comparison is made between state-of-the-art and con-
=⇒ iL (t) = iL (0) + ·t (62)
L ventional single switch dc–dc converters. As it is given in Table I,
VC the proposed converter has a large gain in comparison to other
=⇒ iL (D · T ) = iL (0) + (D · T ) (63) converter with keeping main switch stress voltage at a same
L
level.
D · VC
=⇒ ΔiL = iL (D · T ) − iL (0) = . (64) Ideal dc voltage gain comparison versus main switch duty
L · fs ratio for different dc–dc power converters is shown in Fig. 7.
Therefore, according to the desirable current ripple of the As it is shown, the proposed converter has higher dc voltage
magnetizing inductances, Lm is calculated by gain than conventional converters. Furthermore, different dc–dc
converters efficiency for the fixed gain of 12.5 are compared
D · VC in Fig. 8. Proposed converter has higher efficiency than others,
=⇒ Lm = . (65)
ΔiL · fsw based on this plot.
The proposed converter has higher part count in comparison to
Furthermore, Lf can be calculated by using desirable current other compared converters except the Z-source based converter
ripple of the filter inductances, and is calculated as in [8]. So, it costs more than other compared converters except
D · VC o 1 the converter in [8].
=⇒ Lf = . (66)
ΔiL f · fsw
VII. RESULTS AND DISCUSSION
Capacitors C supply the primary current winding during switch
The proposed converter has been simulated in Simulink soft-
ON time. Therefore, capacitors C can be designed according to
ware for main switch duty cycle of (D=0.4) and switching
their desirable voltage ripple by the following equation:
frequency of 100 kHz (fS = 100 kHz) and to convert 24-V dc
 input voltage to 300-V dc output voltage [26].
1 t
vC (t) = vC (0) + vC dt. (67) Furthermore, coupled inductors turn ratio is considered to be
C 0
one (n = 1) and their coupling coefficient is considered to be
Therefore, capacitors C are designed using following equa- 0.99 to consider their leakage inductances in simulation. So,
tions in the first time interval of a switching period to design the voltage ratio (boosting factor) of the proposed converter is

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TORKAN AND EHSANI: NOVEL NONISOLATED Z-SOURCE DC–DC CONVERTER 4581

TABLE I
COMPARISON ANALYSIS BETWEEN DC–DC CONVERTERS WITH SINGLE POWER SWITCH

Fig. 7. Voltage gain comparison of the proposed converter and other single
switch converters for transformer turn ratio of 1. Fig. 9. Simulated converter in Simulink.

Fig. 10. Main switch S voltage waveform (V S ).

the semiconductor devices current is high, so the voltage drops

Fig. 8. Comparison of the different single switch converters efficiency versus
various output power (W) for fixed gain.
around 12.09 in the simulation and it is less than the theoretical
value. This discrepancy is because of the semiconductor devices
(diode and switch) voltage drop when they are ON. Especially
in the proposed converter, because the boosting factor is huge,
are considerable. Furthermore, the turn ratio (n) is considered to
be (1) in theoretical calculation. Simulated converter circuitry
is shown in Fig. 9.
Key waveforms of simulated converter are shown in
Figs. 10–12. The proposed dc–dc converter operates in cur-
rent continuous mode. As it is shown in Figs. 10 and 12,
semiconductor devices voltage stress is much less than output
voltage. However, this voltage stress is equal to output voltage

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4582 IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 54, NO. 5, SEPTEMBER/OCTOBER 2018

TABLE II
IMPORTANT CHARACTERISTICS OF THE TESTED PROTOTYPE

Fig. 11. Main switch S current waveform (iS ).

Fig. 12. Input diode voltage waveform (v D 1 ).

Fig. 14. Main waveforms of the tested converter “a” V o (Ch. 1, 100 V/div)
and Io (Ch. 2, 200 mA/div), V S (Ch. 3, 50 V/div) and IS (Ch. 4, 10 A/div), and
time scale: 2.5 μs/div.

Fig. 13. Implemented prototype of the proposed converter.

in the boost converter. This is one of the main advantages of the

proposed converter over conventional converters.
The drawback of the proposed converter is high switch current
stress that is caused by using a single switch in the converter and
EMI/EMC problems and by using different grounds for input
and output. The EMI problems can be solved by shortening the
traces and using EMI shielding and Faraday cages.
The implemented prototype is presented in Fig. 13. It is de-
signed to convert 24-V dc input voltage to 300-V dc output
voltage and 100-W output power. It has an efficiency of 89%
under full-load condition. The important parameters of the im-
plemented prototype are given in Table II, and experimental
main waveforms are shown in Figs. 14 and 15 (voltage, current,
and time divisions are mentioned in the figures’ captions).
Parameter (D) can be measured by looking at the switch-ON
time. It can be seen that for having the same voltage ratio in
Fig. 15. Main waveforms of the tested converter “b” V D 1 (Ch. 1, 100 V/div),
V L 2 (Ch. 3, 50 V/div), V L 1 (Ch. 4, 100 V/div), and time scale: 2.5 μs/div.
the experiment, the duty cycle of the gate–source voltage of the
main switch must be greater than 0.4 and it should be about
0.406 in the experiment. As it is shown, the experimental results
validate the simulation results.
VIII. CONCLUSION
This paper presented a novel high step-up dc–dc converter
using Z-source network, flyback, and voltage multiplier con-
cepts. The derived equations indicate that the voltage gain of
the conventional Z-source converter is largely increased. The
presented converter has higher part count in comparison to other
mentioned converters; however, it eliminates the problem of

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TORKAN AND EHSANI: NOVEL NONISOLATED Z-SOURCE DC–DC CONVERTER
complexity and large duty cycle in conventional high step-up
converters. Furthermore, our converter has high efficiency, low
semiconductor device voltage stress, and a wide range of volt-
age gains. This is achieved by choosing proper coupled inductor
turns ratio that makes it a good candidate for high step-up appli-
cations. This includes photovoltaic applications, by increasing
the low voltage of the solar panels, or maximum power point
tracking and droop control in microgrid applications. Finally,
a prototype was built to experimentally validate the simulation
results.
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Arash Torkan (S’09) received the B.S. degree from
Isfahan University of Technology, Isfahan, Iran, in
2013, and the M.S. degree from Texas A&M Uni-
versity, College Station, TX, USA, in 2016, all in
electrical engineering.
From 2014 to 2016, he was a Lab Instructor with
the Department of Engineering Technology and In-
dustrial Distribution, Texas A&M University. He is
currently working with the Megger Group Limited
company as an Analog Design R&D Engineer. His
research interestes include switching and high step-
up converters, renewable energy systems and power electronics.
Mr. Torkan was the recipient of Electrical and Computer Engineering De-
partment Graduate Merit Scholarship at Texas A&M University, from 2014 to
2016.
Mehrdad Ehsani (M’70–LF’15) received the BSEE
degree from UT Austin, in 1973; MSEE degree from
UT Austin, in 1974, and Ph.D. degree from UW
Madison, in 1981. He is currently the Robert M.
Kennedy Professor with the Department of Electrical
Engineering, Texas A&M University, College Sta-
tion, TX, USA. He is the coauthor of more than 400
technical papers, 17 books, an IEEE standards book,
and 30 U.S. and EU patents.
Dr. Ehsani is the recipient of more than 130 prize
papers and other awards in the IEEE and others, in-
cluding IEEE-VTS Avant Garde Award for his contributions to the hybrid elec-
tric vehicle technology, and the 2003 IEEE Field Award in Undergraduate
Teaching. He has lead several international conferences and has served on the
governing bodies of the IEEE Power Electronics Society, Industry Applications
Society, and Vehicular Technology Society. He is a Fellow of SAE, a Distin-
guished Speaker of several IEEE societies, and a Consultant to more than 60
U.S. and international companies and government agencies, and a registered
Professional Engineer in the State of Texas.