5ECA0 Circuits class 2 : Nodal and loop analysis (ch 3&5)

1
Agenda
1. Recap for class 1
Chapter 5
• Linearity and superposition

Chapter 3
2. Nodal analysis
3. Mesh analysis
4. Systems of equations
2
Class 1 refresher : terminology

• Paths
• Branches
• Nodes
• Passive elements
• Sources
• Terminals

Nodes which we make

external connections 3to.
 Sign convention at nodes

V source I source I load V load

+ +
Source supplies Load absorbs
negative power – I source + I load = 0 and dissipates
positive power
I source –ve into
the + terminal I load is +ve into
– – the +ve terminal

For an absorbing element:

Positive currents flow from positive to negative potential 4
Passive sign convention for power

Positive current (arrow) Negative current

from –ve to +ve potential from +ve to –ve potential
(direction given by arrow) (direction given by arrow)
P = (+4A) (–2V) = – 8W P = (–2A) (+2V) = – 4W
=> Supply => Supply
5
Electrical potential and current

• Voltage : Electrical potential

• Referenced to a common node
• Current : Rate of flow of charge
• Positive charge flows out of
positive terminal to lower potential
• Ohm’s law describes path resistance
for charge flows
•V=IR
analogy: mechanical potential energy
and water flow relative to sea level
6
Kirchoff’s Voltage Law (KVL) : Conserving energy
• Kirchoff’s voltage law : Voltages in a closed loop sum to zero
Σ Welec = 0
ΣV=0

Vab+Vbc+Vcd+Vde+Vef+Vfa = 0 analogy: hill-walking in a loop and

returning to the same location and height
Use indices to ensure correct signs! 7
 Combining serial elements

vN(t)
v(t) = v1(t) + v2(t) + ... vN(t)
v3(t)
v(t)
v2(t)

v1(t)

Voltages and resistances may be added on a branch for analysis

8
Voltage divider
KVL:

Worth learning the voltage and current divider equations 9

Kirchoff’s current law (KCL) : Conserving charge
• Kirchoff’s current law
• Charges which enter also leave
• ΣI = 0

–5+2+3=0

analogy: vehicles entering and exiting

• Positive current leaves the node a road junction
10
Combining parallel elements
i(t)
2

R1 R2 RN

i1(t) i2(t) i3(t) iN(t)

1

Parallel current sources Parallel resistances

v v v v v
From Kirchoff’s current law at 2
i(t) = i1(t) – i2(t) – i3(t) +iN(t)
11
Current divider
i flows into
the
combined
parallel
resistance

12
Combining series and parallel resistors
Add serial voltage sources (KVL) Add parallel current sources (KCL)
Add serial resistances as V = I R Adding parallel resistors as I = V / R

RAB = 5kΩ
13
Agenda
1. Recap for class 1
Chapter 5
• Linearity and superposition

Chapter 3
2. Nodal analysis
3. Mesh analysis
4. Systems of equations
14
Linearity requires additivity and scaling
Additivity: Multiple added
signals pass through the system
without interacting:
f (v1 + v2) = f (v1) + f (v2)

Scaling: If we change the value

of the input, we expect a
linear change at the output:
f ( k . v1 ) = k . f (v1)

Applied to linear circuits and the

algebra we are using Linearity with a DJ mixing deck 15
Consequences of linearity

Variables may change, but the linear equations stay the same, allowing:
Combining components to simplify circuits (last week)
Simpler circuit analysis (using linearity directly, and superposition, part 1)
Adding currents in loop analysis (part 3) and row reduction (part 4) 16
Linearity as an analysis technique
Linearity principle allows
simple solutions 1k 1k
for some circuits 8V 1k 1k
Let’s define
Vout = V2 = 1V
Vout = k V0
V0 is now unknown
Important: If we define the output, arbitrarily as 1V, it is unlikely that
V0 = 8V so this is now a variable 17
Linearity as an analysis technique
Using Ohm’s Law, KCL, KVL
If V2 = 1V
1k 1k
• I2 = 8V 1k 1k
• V1 =
• I1 =
• I0 =
• V0 = A) Vout = 1.0V
B) Vout = 1.3V
• Vout / V0 = C) Vout = 1.6V
• Vout when V0 = 8 V D) Don’t know 18
Linearity as an analysis technique
Using Ohm’s Law, KCL, KVL
If V2 = 1V
1k 1k
• I2 = 1 mA 8V 1k 1k
• V1 = 2 V
• I1 = 2 mA
• I0 = 3 mA
• V0 = 2 + 3x1 = 5V A) Vout = 1.0V
B) Vout = 1.3V
• Vout / V0 = 1/5 C) Vout = 1.6V
• Vout when V0 = 8 V: 8/5 V D) Don’t know 19
Superposition
The overall output caused by two or more inputs is the sum of the
responses that would have been caused by each source individually
f (v1 + v2) = f (v1) + f (v2)

 Reduce one complicated problem (many independent sources)

to many easy problems (one or a few independent sources)
 The voltage at any node in the network is algebraic sum of the
individual contributions of each source acting alone
Superposition : Removing sources
Implement the method by removing sources

V0 0 : short circuit

I0 is not defined by the voltage source

I0 0 : open circuit

V0 is not defined by the current source

Note that controlled sources may not be removed 21
Superposition : Recipe
Step 1: In a network containing multiple independent sources, one source
can be analysed independently and remaining sources turned off.
Step 2: Turn off sources:
To turn off a voltage source, V  0, replace it with a short circuit
To turn off a current source, I  0, replace it with an open circuit.
Step 3: When the individual sources are applied to the circuit, all the circuit
laws and techniques we have learned, or will soon learn, can be applied.
Step 4: The results obtained by applying each source independently are
then added together to obtain a solution.
Superposition : Example

A) Completed
B) Don’t know what to do

1) Redraw the circuit with output V ’0 for the condition where the
voltage source is set to zero
2) Redraw the circuit again for output V ’’0 when the current s
value is zero
Superposition : Example

V ’0 : No voltage source
 replace with short circuit
V ’’0 : No current source
 replace with open circuit
By superposition : V 0 = V ’0 + V ’’0
Superposition : Example

Solve both circuits separately and

then determine V0 for the complete
circuit

V 0 = V ’0 + V ’’0

Hint: Consider using voltage and

current divider equations
 Superposition : Example
Current divider for upper circuit

Voltage divider for lower circuit

V 0 = V ’0 + V ’’0 = 4 + 2 = 6V
5ECA0 Circuits (ch3): class 2.2 Nodal analysis

27
Agenda
1. Review of class 1
Chapter 3
2. Nodal analysis
• Node voltages as variables
• Sizing the analysis: Number of KCL equations
• Independent and controlled sources
• Supernodes
3. Mesh or loop analysis
4. Systems of equations
28
 Many node circuits

• Real-world circuit analysis involves many nodes and many components

• Need analysis methods that can be generalised to any problem and at scale

29
Referencing

Defining the correct reference node is more than correct maths

Voltages between different components can be completely different
Incorrect assumptions about grounds lead to damage and worse 30
Referencing and ground

• Variables provide referencing

i uses arrow for direction
vm uses + and – for potential difference
Ground symbol denotes the common
reference node
• Values require referencing for correct, consistent directions and
polarities across the full circuit
• Not the values can be positive or negative
31
 Multiple node analysis
Creating systems of equations when we have many unknown node voltages
• Select a reference node:
Node 3 selected as
most interconnected
• N – 1 unknown voltages
• N – 1 linear, independent
equations give unique
solution
Method: Write down N – 1 KCL equations
Solve simultaneous equations 32
 When voltage defines the
Multiple node analysis referencing, the referenced node is
negative and nodal voltage is positive
One node at a time: KCL @ v2
Total current in = total current out
• Current leaving a node is positive
• Current entering a node is negative
i B – i 2 + i3 = 0
• Apply Ohm’s law to get voltages
iB + (v2 – v1)/R2 + (v2)/R3 = 0

Note: i2 = + (v1 – v2)/R2 so – i2 = + (v2 – v1)/R2 so consistent with KCL33

Multiple node analysis
Second node : KCL @ v1
We can ignore part of circuit
• Write down KCL
Σi=0
Current entering
node has a
negative sign
• Apply Ohm’s law
V=IR
34
From KCL to nodal equations
KCL @ v1 : – iA + v1/R1 + (v1 – v2)/R2 = 0
KCL @ v2 : iB + (v2 – v1)/R2 + (v2)/R3 = 0

Next step: rearrange to get two simultaneous equations for v1 and v2

35
From KCL to nodal equations
1
KCL @ v1 : – iA + v1/R1 + (v1 – v2)/R2 = 0 1
r1

KCL @ v2 : iB + (v2 – v1)/R2 + (v2)/R3 = 0 2

r

Tip: Number your equations so that you can check your steps later,
and keep the same numbering for identical equations
1
v1 (1/R1+1/R2) – v2 (1/R2) = iA 1
r1
2
v1 (1/R2) + v2 (1/R3 –1/R2) = – iB r

Then solve simultaneous equations for v1 and v2

36
Using conductance

Often convenient to remove fractions using conductances G

R = 1/G ⇒ v=iR ⇒ i=Gv

1
v1 (G1+G2) – v2 (G2) = iA 1
r1
2
v1 (G2) + v2 (G3 – G2) = – iB r

37
 Independent current sources
(G1+G2) v1 – G2v2 = iA
G2
– (G2) v1 + (G2+G3) v2 = – iB
G1 G3
• N – 1 unknown voltages v1 & v2
• N – 1 linear, independent
• 1 unique solution 1

KCL equation at node 3 2

is the sum of the equations at nodes 1 and 2
3
so contains no new information
38
Independent voltage sources

Independent voltage sources with

known values: use voltage directly!
In this case, we already know two node
1 3
equations without even doing KCL!
2

V1 = 12V 1
0
V3 = – 6V 3
ground

Four nodes and already have two nodal equations. 39

Independent voltage sources
V1 = 12V 1

V3 = – 6V 3

One more equation for KCL@V2

1 3

V2 –V1 V2 – 0 V2 – V3 2
+ + =0
12k 6k 12k
Substituting and rearranging
0

ground

2 ⇒ V2 = 1.5 V 40
Controlled sources
Controlled source requires an additional constraint equation to describe
dependency in the equations
We would like to know the current i0

KCL@v1

KCL@v2

Inspect to find the constraint equation: v2 = R3 i0

41
 Controlled sources

Determine i0

KCL equations
i0 =v2 /R3
Constraint equation

42
 Controlled sources

Nodal analysis
i0 =v2 /R3
Constraint

(1/R1+1/R2) v1 – (1/R2 + β/R3) v2 = 0 v1 + 2 v2 = 0

( – 1/R2 ) v1 + (1/R2 + 1/R3 ) v2 = iA – v1 + 3 v2 = 12
Nodal equations System of equations to solve
43
Controlled sources
System of equations to solve.

v1 + 2 v2 = 0 1

– v1 + 3 v2 = 12 2

Summing the two equations 1 + 2  3 1 2

=3k
0 v1 + 5 v2 = 12 3

⇒ v2 = 12/5 V
v1 = – 2 v2 1

= – 24/5 V
i0 = v2 / R3 = 12/5/3k = 4/5 mA
Supernodes

A branch with only a voltage

source between two nodes
Current not known from voltage
source so cannot use KCL here
The voltage is not known either
for a controlled voltage source
But current into a branch equals
current out of the same branch
45
Supernodes

Remember 2Vx is the voltage value

Branch current not defined by the
ideal voltage source
iV Current into voltage source equals
current out of the voltage source
First we will analyse as two nodes
and define the current iV

46
Supernodes

KCL@V1
V1–V3 + V1 – iV = 0
6k 12k
KCL@ V2
iV iV
+ V2 + V2 – V3 + iV =0
6k 12k
Adding the equations

47
Supernodes
Now consider the surface with
both nodes KCL@ V1 & V2
All currents in are negative
All currents out are positive
This is the sum of the two KCL
equations, and cancel out the
unknown current in the source

48
Supernodes
Rearranging KCL@ V1 & V2
3V1 + 3V2 – 3V3 = 0 1

Voltage source @ V3
2
1 1 V3 = 6 2

Constraint V1 – V2 = 2Vx & V2 = Vx

V1 – 3V2 =0 3

Row reduction: 1 + 2 x3 + 3  4
4V1 = 18

⇒ I0 = V1/12k = 3/8 mA
Nodal analysis : A recipe
• Scope
• N-1 equations for N nodes for a unique solution
• Define reference node and assign voltage variables to the rest
• Constraints
• Identify constraint equation for sources : these are node equations
• Identify constraints for dependent sources
• KCL
• Supernodes should be solve for the surface rather than one node
• Apply KCL for remaining nodes – choose nodes to include all elements
• Solve
• Rearrange to create N – 1 nodal equations
• Substitute (up to 3 nodes) or use linear algebra (more than 3 nodes)
50
5ECA0 Circuits

51
5ECA0 Circuits (ch 3) : class 2.3 Loop analysis

52
Agenda
1. Review of class 1
Chapter 3
2. Nodal analysis
3. Loop analysis
• Kirchoff’s voltage law for loops with voltage sources
• Current sources in loop analysis
• Branch currents and dependant sources
• Identifying loops
• Worked example
4. Systems of equations

53
Loop analysis : KVL refresher ΣV = 0
V12
2
• KVL : Voltage differences around
1
the loop sum to zero
• Electrical voltage potential
+ iC + V23 dropped across resistors
– –
V41 • Using clockwise direction for loop
4 currents
3

V34

V12 + V23 + V34 + V41 = 0 54

Loop (or mesh) analysis with KVL ΣV = 0
iB
• Now extend to intersecting loops
• Define a loop currents
+ iC + • Create a system of equations using
iA
– – • KVL for loops with resistors and
voltage sources
• Direct definition of loop currents
for loops with current sources
iD
• For consistency: all the loop currents
in the same clockwise direction
55
 Loop versus nodal analysis
Loop or mesh analysis Nodal analysis
Number of L = B – N+1 equations N – 1 equations
equations L loop current unknowns B N – 1 nodal voltage unknowns
independent loops
Complexity Simplest for independent current Simplest for independent voltage
sources sources
Optimum usage Many current sources in the Often most efficient for many
network and single loop networks branches per node
Method KVL KCL

Free choice of methods in exams: More methods in week 3!

56
Creating the linearly independent equations

• First step is identifying the number

of linearly independent equations
we need for analysis
• For B branches and N nodes, we
need B – N + 1 loop equations
• All branch currents must be
included in the system of equations
• Number of equations must equal
number of unknowns
57
KVL for loops with independent voltage sources
We would like to know current I0
and will start with the following
procedure I1 I2

1) Define two clockwise loops

currents IA and IB so that each
element is included in one loop

2) Write down equations for branch

currents I0, I1, I2 in terms of loop currents IA and IB

58
KVL for loops with independent voltage sources
1) Loop currents defined as IA and IB
Using letters to distinguish from
branch currents I1 I2
A B

2) Branch currents I0, I1, I2 defined I2 I0

from loop currents IA and IB
I1 = IA
I2 = IB
Next we use KVL to create a system of equations
I0 = I A – IB
for the unknown loop currents 59
Analysis with independent voltage sources
1) Loop currents defined as IA and IB

I1 I2
A B

2) Branch currents I2 I0

3) KVL
I1 = IA KVL @ IA : 6 IA + 6 (IA– IB) – 12 =0 1

I2 = IB KVL @ IB : 3 IB + 3 – 6 (IA – IB) = 0 2

I0 = I A – IB
4) Next solve system of equations 1 & 60
2
 Analysis with independent voltage sources
4) Solving for loop currents IA and IB
a) Rearranging
2 IA – IB = 2 1 I1 I2
– 6 I A + 9 IB = – 3 2
A B
I2 I0

3) KCL
KCL @ IA : 6 IA + 6 (IA– IB) – 12 =0 1

KCL @ IB : 3 IB + 3 – 6 (IA – IB) = 0 2

61
 Analysis with independent voltage sources
4) Solving for loop currents IA and IB
a) Rearranging
2 IA – I B = 2 1 I1 I2
– 6 I A + 9 IB = – 3 2
A B

b) Solve for first loop current: I2 I0

Scale 1 x3  1 – same equation!
6 IA – 3IB = 6 1 x3

c) Add ( 1 x3) + 2  3
6 IB =3 3

IB = 6/3 = 0.5 mA 62
 Analysis with independent voltage sources
4) Solving for loop currents IA and IB
a) Rearranging
2 IA – IB = 2 1 I1 I2
– 6 I A + 9 IB = – 3 2
A B

b) Solve for first loop current: I2 I0

Scale 1 x3  1
6 IA – 3IB = 6 1 x3 d) Back-substituting into 1
c) Add ( 1 x3) + 2  3 IA = ( 2 + 0.5 ) /2 = 1.25 mA
6 IB =3 3
e) Use branch current definition
IB = 3/6 = 0.5 mA I0 = IA – IB = ¾ mA 63
Loop analysis: A generalised recipe
Circuit analysis
1) Defining the loops:
a) No of loops = B – N + 1
b) Current sources define
their own loops (next)
c) Label remaining loops:
include all branch currents
2) KVL for each loop without a
current source: include loop
currents as variables
3) Algebra
a) Rearrange loop equations in terms
of the loop currents
b) Use branch current for constraint
equations (next)
c) Substitute to solve first loop current
(row reduction often better)
d) Back substitute to get the remaining
loop currents
e) Use branch currents to calculate
node voltages 64
Loop analysis with current sources
KVL not suited to current sources as
voltage undefined in the branch. Calculating V0 with loop analysis
Current sources define loop currents
1. Branch current IA is directly
defined by source:
A B
Write the equation for IA

2. Second loop cannot include

the current source:
Use KVL to get IB
65
Loop analysis with current sources
KVL not suited to current sources as
voltage undefined in the branch.
Current sources define loop currents
1. Branch current IA is directly
defined by source
A B

1
IA = 2

2. Second loop cannot include

KVL : loop IB
the current source. Use KVL for IB
– 2 + 6 IB + 2 (IB – IA) = 0 2

3. Finally show that V0 = 4.5 V 66

Loop analysis with dependent sources
Dependent sources require
an additional
Constraint Equation
IA
to describe the dependency
IB
This is an equation for a
branch current to be found by
inspection

Need to identify the branch that controls the source 2Vx voltage source
and write down the constraint equation
67
Loop analysis with dependent sources
Warning: If neglecting the
k = 103 from our equations,
remember that the currents
are in units mA (m = 10–3) IA
IB
Loop analysis uses currents
as variables, so need the
equation for controlled
voltage sources Use a constraint equation do define
unknown voltages in terms of currents
Simply maths by having only
one loop current for constraint Vx = 4 IA 68
Loop analysis with dependent sources
For node defined as unique
meeting of elements and
branch defined by elements
B = 5; N = 4; 4–3+1 = 2 loops IA
IB
No current sources so solve
both loops with KVL
KVL for loop IA
– 2Vx + 2 (IA+IB) + 4IA = 0 1

KVL for loop IB

Vx = 4 IA
– 2Vx + 2 (IA+IB) – 3 + 6 IB = 0 2 69
 Loop analysis with dependent sources
Loop equations

1
– 2Vx + 2 (IA+IB) + 4IA = 0
– 2Vx + 2 (IA+IB) – 3 + 6 IB = 0 2
IA
IB
Constraint equations (from branch)
Vx = 4 IA 3

Next step is to create two equations Share your progress in socrative:

with only IA and IB as variables a) Completed
Two minutes to make an attempt. b) Don’t understand what to do
70
 Loop analysis with dependent sources
Loop equations

1
– 2Vx + 2 (IA+IB) + 4IA = 0
– 2Vx + 2 (IA+IB) – 3 + 6 IB = 0 2
IA
IB
Substitute Vx = 4 IA 3 and reorder
– 2 IA + 2 IB = 0 4
– 6 IA + 8 IB = 3 5

71
 Loop analysis with dependent sources
Loop equations

1
– 2Vx + 2 (IA+IB) + 4IA = 0
– 2Vx + 2 (IA+IB) – 3 + 6 IB = 0 2
IA
IB
Substitute Vx = 4 IA 3 and reorder
– 2 IA + 2 IB = 0 4
– 6 IA + 8 IB = 3 5 ⇒ IB = 1.5 mA
Back-substituting 6 into 4
Reduce: 4 x3 – 5  6

– 2 IB = – 3 6 ⇒ IA = IB = 1.5 mA 72
Loop selection
Need sufficient loops to
capture all currents in all
branches
Number of loops
required is the number
mA of branches B minus the
number of nodes +1
mA
L = B – N + 1 = 4.
Current sources define
We want to determine voltage V0. a loop current
73
 Loop selection: First include current sources
Current sources (mA)

B IA = 2 1

A D
mA
Note that it makes no
C mA sense to include the
current sources for
other equations now
Also note that currents are in units mA and resistances in units kOhms 74
 Loop selection: First include current sources
Current sources (mA)

B IA = 2 1

A D
IC = ? 2
mA
Note that it makes no
C mA sense to include the
current sources for
other equations now
Also note that currents are in units mA and resistances in units kOhms 75
 Creating loop equation with KVL
Solving for loop D.

B Note we need to
include all the other
A D
loop currents that
flow through a branch

C
Then simplify

KVL for Loop D – Vx – 2Vx + 1ID + 4 = 0

⇒ 1 (ID+IC – IA) – 2Vx + 1ID + 4 = 0 376
 Solve with KVL
for loop B:

B
A: 2IB – IC +2Vx = 0
B: 2IB – IC – 2Vx = 0
C: IB + IC =0
A D
D: 2IB – 2Vx = 0
E: Don’t know
C

Hint : Should be able to do this multiple choice question by inspection.

KVL for the loop with IB 77
Creating loop equation with KVL

KVL for loop B

B –2Vx+ 1IB + 1(IB – IC) = 0

A D
Rearrange

C
2IB – IC = 2Vx 4

Four loop current variables : IA , IB , IC , ID

But also two voltages variables that need equations : Vx and V0 78
Using the branch currents
Using the branch
currents for the
B node voltages
V0= 1 IB
A D
And for the constraint
equations for
C controlled sources

Vx= 1 (IA – IC – ID)

We need to determine IB to find out V0 79
System of equations

IA = 2 1
+ IC =–2 2
2IB – IC – 2Vx = 0 3
– IA + IC +2ID – 2Vx =–4 4
IA – IC – ID – Vx = 0 5

Circuit analysis reveals a system of equations with five unknowns

The equations have unique solution for V0 but there is quite some
algebra. We will look at a system for solving these systems of equations
If you want to try it yourself with row reduction, the answer is V0 = 1V
80
5ECA0 Circuits class 2 : Nodal and loop analysis (ch 3)

Next (final) session we look at more structured

ways to solve large systems of equations 81
5ECA0 Circuits (ch3) class 2.4 Solving (lots of) equations

82
Agenda
1. Class 1 review
2. Nodal analysis
3. Loop analysis
4. Solving systems of equations
• Representing systems of equations in a scalable way
• Row reduction for two equations
• Row reduction for many equations
• Matlab scripts for checking your algebra

83
Describing linear systems

aV1 + bV2 = c 1
dV1 + eV2 = f 2

Two unknowns, two

independent equations
yield a unique solution

Solving by simultaneous equations by substitution works but

1) It doesn’t scale well beyond two equations
2) Can be harder to re-check afterwards
84
Describing linear systems

aV1 + bV2 = c
dV1 + eV2 = f

Simultaneous equations
A system of linear equations
for two variables with one
unique solution

85
Describing systems of linear equations

aV1 + bV2 = c a b V1 c
dV1 + eV2 = f d e V2 = f

Simultaneous equations Matrix format

Separates
constants and
variables

86
Visualising systems of linear equations

aV1 + bV2 = c a b V1 c a b c 1
dV1 + eV2 = f d e V2 = f d e f 2

Simultaneous equations Matrix format Augmented matrix format

Display only constants
Variables implicit in columns

We will use the augmented matrix form in this class to allow us to perform
algebra with many equations in a more readable way 87
Solving systems of equations

aV1 + bV2 = c a b V1 c a b c 1
dV1 + eV2 = f d e V2 = f d e f 2

Solutions expressed as equations for V1 and V2 with one term per line

a' V1 + 0 = c' a' 0 V1 c' a' 0 c' 3

0 + e' V2 = f ' 0 e' V2 = f' 0 e' f' 4

Removing the off-diagonal terms b and d and normalising the equations to

yield modified values for the scaling factors to give unique solutions 88
 Row reduction for two equations
Method: Scale one row, then add two rows to remove the element d

a b c 1
1) Write down equations
d e f 2

Goal is to create a new

row (equation) of the form

89
 Solving two equations with row reduction
Method: Scale one row so that the same coefficient appears in one column

a b c 1
1) Starting equations
d e f 2

2) Scale row 2 by – a/d –da/d –ea/d –fa/d

–a –ea/d –fa/d

Scale by writing down a new row which will

' have a as the first element

90
 Solving two equations with row reduction
Method: Add two rows to replace the unwanted element d with 0

a b c 1
1) Starting equations
d e f
2) Scale row 2 by – a/d –da/d –ea/d –fa/d
–a –ea/d –fa/d 2 x a/d
3) Add rows x a/d + 1
2 '
to create a new row 3 0 b–ea/d c –fa/d 3 +
without element d
91
 Solving two equations with row reduction
Method: Scale one row then add two rows to remove an element from row

a b c 1
Updated equations
0 b–ea/d c–fa/d 3

Note that we can only use two out of these three equations now because
they are no longer all unique. Discard equation 2
Column two is V2 so V2 = c–fa/d
b–ea/d
V1 deduced by back-substitution – more later 92
Solved for two nodes ...

Solving for two nodes needs on row reduction step

93
Now to handle more nodes ...

For many nodes, we need to think carefully about which rows to reduce
94
Circuit analysis with many nodes

We are going to
calculate V0
How many nodes?
How many
equations?
We will focus now
on the steps rather
than the detail of
the maths
95
Circuit analysis
v1
For nodal analysis
we calculate the
nodal voltages
Any supernodes?
What are the v0 v2 v3
constraint
equations

96
 v1

Example with nodal analysis v0 v3

v2 V –2
0

[v1 ]: –2Ix + ½ (v1 – v0 ) + (v1 – v2 ) –2 = 0 4

[v0 & v2 ]: v0 + ½ ( v0 – v1 ) + (v2 – v1) + (v2 – v3) + ½ v2 = 0 Ix = ½ v2

[v3 ]: +4 + (v3 –v2) +2 = 0 2Vx = v0 – v2

Vx = v2 – v3

1) Write down all the equations required to uniquely describe the circuit 97
 Example with nodal analysis

[v1 ]: –2Ix + ½ (v1 – v0 ) + (v1 – v2 ) –2 = 0 Ix = ½ v2

 –0.5 v0 +1.5 v1 -2.0 v2 = 2

[v0 & v2 ]: v0 + ½ ( v0 – v1 ) + (v2 – v1) + (v2 – v3) + ½ v2 = 0

 +1.5 v0 –1.5 v1 +2.5 v2 – v3 = 0

[v3 ]: +4 + (v3 –v2) +2 = 0

 -1.0 v2 + v3 = –6
2Vx = v0 – v2
[constraint] v0 – v2 = 2 (v2 – v3)
 +1.0 v0 -3.0 v2 +2.0 v3 = 0 Vx = v2 – v3
98
Nodal equations

–0.5 v0 +1.5 v1 -2.0 v2 = 2

+1.5 v0 –1.5 v1 +2.5 v2 – v3 = 0

-1.0 v2 + v3 = –6

+1.0 v0 -3.0 v2 +2.0 v3 = 0

99
Augmented matrix form
v0 v1 v2 v3 constants equation
number

–0.5 +1.5 -2.0 0 2 1

+1.5 –1.5 +2.5 –1.0 0 2

0 0 -1.0 +1.0 –6 3

+1.0 0 -3.0 +2.0 0 4

100
Solving a system of equations with row reduction
–0.5 +1.5 -2.0 0 2 1

+1.5 –1.5 +2.5 –1 0 2

0 0 -1 +1 –6 3

+1 0 -3 +2 0 4

Strategy: We need an expression for v0 which is the first column.

Use row reduction to transform set of equations to upper triangular form
Then use back-substitution to calculate the node voltages

What is the first row reduction operation 101

Example with nodal analysis
–0.5 +1.5 -2.0 0 2 1

+1.5 –1.5 +2.5 –1 0 2

0 0 -1 +1 –6 3

+1 0 -3 +2 0 4

0 3 -3.5 -1 6 3 x 1 + 2  5

We have three rows with elements in column 1, but this needs to be one!
First step – remove column one value using rows 1 & 2
Discard row 2 afterwards as we can only use two of these equations now
and row 2 has the most elements 102
Example with nodal analysis
–0.5 1.5 -2.0 0 2 1

+1.5 –1.5 +2.5 –1 0 2

0 0 -1 1 –6 3

1 0 -3 2 0 4

0 3 -3.5 -1 6 5

0 3 -7 2 4 2 x 1 + 4  6

Next step – remove another column one value using rows 1 & 4
Discard row 4 afterwards – why column 4?
103
Example with nodal analysis
–0.5 1.5 -2.0 0 2 1

+1.5 –1.5 +2.5 –1 0 2

0 0 -1 1 –6 3

1 0 -3 2 0 4

0 3 -3.5 -1 6 5

0 3 -7 2 4 6

We now have only one equation with an element in column 1.

Next step ?
104
Example with nodal analysis
–0.5 1.5 -2.0 0 2 1

+1.5 –1.5 +2.5 –1 0 2

0 0 -1 1 –6 3

1 0 -3 2 0 4

0 3 -3.5 -1 6 5

0 3 -7 2 4 6

0 0 -3.5 3 -2 6 - 5  7

Row reduction for column 2: Use rows 5 and 6 to remove element 3

Which row would you discard? 105
Example with nodal analysis
–0.5 1.5 -2.0 0 2 1

+1.5 –1.5 +2.5 –1 0 2

0 0 -1 1 –6 3

1 0 -3 2 0 4

0 3 -3.5 -1 6 5

0 3 -7 2 4 6

0 0 -3.5 3 -2 7

One non-zero value in column 1, two non-zero values in column 2, four

non-zero values in the next column. What next? 106
Example with nodal analysis
–0.5 1.5 -2.0 0 2 1

+1.5 –1.5 +2.5 –1 0 2

0 0 -1 1 –6 3

1 0 -3 2 0 4

0 3 -3.5 -1 6 5

0 3 -7 2 4 6

0 0 -3.5 3 -2 7

0 0 0 +0.5 -19 3.5x 3 - 7r  8

Remove an element from column 3 by reducing rows 3 and 7 107

Example with nodal analysis
–0.5 1.5 -2.0 0 2 1

+1.5 –1.5 +2.5 –1 0 2

0 0 -1 1 –6 3

1 0 -3 2 0 4

0 3 -3.5 -1 6 5

0 3 -7 2 4 6

0 0 -3.5 3 -2 7

0 0 0 +0.5 -19 8

Do we have a triangular matrix yet? What next? 108

Example with nodal analysis
v0 v1 v2 v3 constants equation
numbers

–0.5 1.5 -2.0 0 2 1

0 3 -7 2 4 6

0 0 -1 1 –6 3

0 0 0 0.5 -19 8

Re-write the four retained equations to see the triangular form

Zero values below the leading diagonal
Can solve now with back-substitution 109
 –0.5 1.5 -2.0 0 v0 2
0 3 -7 2 v1 4
=
0 0 -1 1 v2 –6
0 0 0 0.5 v3 -19

Using the back substitution method, v0 = – 20 V

determine the voltage v0. v0 = – 48 V
A calculator will help. v0 = – 32V
Hint: Calculate v3 first v0 = – 38 V
No idea 110
Back-substitution
–0.5 1.5 -2.0 0 v0 2
0 3 -7 2 v1 4
=
0 0 -1 1 v2 –6
0 0 0 0.5 v3 -19

v3 = – ( 19 / 0.5 ) = – 38 V
v2 = – (– 6 – 1 (– 38) ) = – 32 V
v1 = 1/3 ( 4 + 7 (– 32) – 2 (– 38) ) = – 48 V
v0 = – 2 ( 2 – 1.5(– 48) +2 (– 32) ) = – 20 V
111
Row reduction: A recipe

1. Write down system of equations in the form of an augmented matrix

2. Repeated row reduction to give upper triangular matrix:
a) Identify element to be removed from lower triangle
b) Method: Scale one row and add to second to remove element
c) Discard one of the old rows used and retain the new row
3. The final column is directly solved
4. Back-substitute to get the other values
112
MATLAB method for checking you algebra
-0.5 1.5 -2 0 2
1.5 -1.5 2.5 -1 0
0 0 -1 1 -6
1 0 -3 2 0

Reduced row echelon form rref() can be calculated with Matlab

Voltages v0, v1,v2 and v3

Convenient for check analysis separately from algebra 113

5ECA0 Circuits class 2 : Nodal and loop analysis (ch 3)