Laboratory Report Cover Sheet

SRM INSTITUTE OF SCIENCE AND TECHNOLOGY

Faculty of Engineering and Technology Department of
Electronics and Communication Engineering
18ECC411J – FPGA based Embedded Systems VII
Semester, 2022-2023(ODD Semester)

Name : PULLEPU PRASAD

Register No. : RA1911043010063
Title of Experiment : Implementation of a 4-bit LFSR in VHDL using Modelsim
simulator
Date of Conduction : 12.10.22
Date of Submission : 17.10.22

Particulars Max. Marks Marks Obtained

Pre-Lab and Post Lab 10
Design and In-Lab Performance 15
Output verification & viva 10
Lab Report 05
Total 40

REPORT VERIFICATION

Staff Name : Dr.S.Yuvaraj

Signature :
 LAB EXPERIMENT # 10
Implementation of a 4-bit LFSR in VHDL using Modelsim
simulator

10.1 Objective: To implement a 4-bit LFSR (Linear Feedback Shift Register) in Verilog then
simulate and synthesize using EDA tools.

10.2 Software tools Requirement

Equipments:
Computer with Xilinx and Modelsim Software Specifications:
HP Computer P4 Processor – 2.8 GHz, 2GB RAM, 160 GB Hard
Disk Softwares: Synthesis tool: Xilinx ISE.
Simulation tool: Modalism Simulator

10.3 Prelab Questions

1. What is meant by linear feedback?
In many practical systems, linear feedback is purposely introduced to enhance or control
some aspect of the system performance. Feedback is often used in amplifier design, for
example, to compensate for a variety of un- certainties in element characteristics such as
frequency response.

2. What are all the advantages of LFSR over the other Shift registers?
Using an LFSR in place of a counter leads to significantly lower hardware cost and also
provides a faster method of generating a non-repeating sequence. Additionally, for
certain applications, the requirement is to generate a pseudorandom sequence of non-
negative integers.

10.4 Verilog Code

module lfsr (out, clk, rst);

output reg [3:0] out;
input clk, rst;
wire feedback;
assign feedback = ~(out[3] ^ out[2]);
always @(posedge clk, posedge rst)
begin
if (rst)
out = 4'b0;
else
out = {out[2:0],feedback};
end
endmodule

10.5 Screenshots

Verilog Code

s
Synthesis Report

Final Report
10.6 Waveform

10.7 Post Lab Questions

1. Does Linear feedback shift register occupy more area. If so, why?
Linear feedback shift register occupies more area. Explanation: Linear feedback shift
register method is more area efficient than counters and other methods and requires less
combinational logic.
2. What is the longest possible sequence in n-bit LFSR?
For n-bit LFSR, the longest possible sequence of patterns is given by 2n-1.

Result: Thus the implementation of 4-bit LFSR is simulated in Verilog and

synthesized using EDA tools.