You are on page 1of 14

Lecture 8

Comparator and Parity Generator/


Checker
Comparators
• A magnitude comparator is a combinational
circuit that compares two numbers A and B
and determines their relative magnitudes.
• The outcome of the comparison is specified by
three binary variables that indicate whether
A>B, A=B, or A<B.
• An Ex-Nor Operation helps in determining if
the 2 input bits are equal or not.
Truth table for a 2-bit comparator
A1 A0 B1 B0 A>B A=B A<B
0 0 0 0 0 1 0
0 0 0 1 0 0 1
0 0 1 0 0 0 1
0 0 1 1 0 0 1 Draw the K-Maps for
0 1 0 0 1 0 0
0 1 0 1 0 1 0 A>B, A=B and A<B
0 1 1 0 0 0 1
0 1 1 1 0 0 1
1 0 0 0 1 0 0
1 0 0 1 1 0 0
1 0 1 0 0 1 0
1 0 1 1 0 0 1
1 1 0 0 1 0 0
1 1 0 1 1 0 0
1 1 1 0 1 0 0
1 1 1 1 0 1 0
IC 7485 4-Bit Comparator
• IC 7485 is a 4-bit comparator used to compare
two 4-bit numbers.
• These ICs can be cascaded to compare binary
numbers of any length.
B3 1 16 Vcc
I (A< B) 2 15 A3

I (A= B) 3 14 B2

I (A> B) 4 13 A2

A>B 5
IC 7485 12 A1

A=B 6 11 B1

A<B 7 10 A0

GND 8 9 B0
• Design a 8-Bit comparator using two 4-Bit
Comparator IC 7485
Parity Generator and Checker
• Parity is a method of checking for errors during transmission
• An extra bit along with the information bits is included to
account for Parity.
• There are two kinds of Parity , Odd Parity and Even Parity.
• If the addition of this extra bit makes the total number of ones
in the information an even number, then it is called an even
Parity.
• If the addition of this extra bit makes the total number of ones
in the information an odd number, then it is called an odd
Parity.
• The circuit that generates this parity bit at the transmitter is
called a “Parity Generator”
• The circuit that detects this Parity Bit at the receiver is called a
Parity checker.
Parity Generator
A B C Odd Even
Parity Parity
0 0 0 1 0 Simplify Odd and Even Parity
0 0 1 0 1 Generator circuits using K-
Maps
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 0 1
Parity Checker
• Now, the 3-bits of information along with the
parity bit is transmitted.
• The receiver checks for supposed odd parity,
so every set of 4 bits received should have an
odd number of 1s
• The output of the Parity checker is 1 if there is
an error detected in the information bits.
A B C D PEC
0 0 0 0 1
0 0 0 1 0
Simplify the parity detector
0 0 1 0 0
circuits using K-Maps
0 0 1 1 1
0 1 0 0 0
0 1 0 1 1
0 1 1 0 1
0 1 1 1 0
1 0 0 0 0
1 0 0 1 1
1 0 1 0 1
1 0 1 1 0
1 1 0 0 1
1 1 0 1 0
1 1 1 0 0
1 1 1 1 1
IC 74180
• IC 74180 is a 9-bit parity generator or checker
commonly used to detect errors in high speed
data transmission or data retrieval systems
I6 Vcc

I7 I5

PE I4

P0 IC 74180 I3

∑E I2

∑O I1

GND I0
Parity checker
Parity of I/p PE PO ∑E ∑O
0-7
Even 1 0 1 0
Odd 1 0 0 1
Even 0 1 0 1
Odd 0 1 1 0
X 1 1 0 0
X 0 0 1 1
Parity Generator
Parity of I/p Cascading Inputs Parity of 0-7 Parity of 0-7
0-7 Even- PE Odd - PO and ∑ Even and ∑ odd
Odd 1 0 Odd Even
Even 1 0 Odd Even
Odd 0 1 Even Odd
Even 0 1 Even Odd
• Make a 9-bit odd parity checker using 74180
and not gate
• Make a 10 bit even parity generator using
single 74180 and not gate

You might also like