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ECEG-3101 Logic Circuits & Computer Design

Addis Ababa Institute of Technology (AAIT) School of Electrical and


Computer Engineering
Learning Outcomes

 At the end of the lecture, students should get


familiarized with;
 Adders / Subtractors.
 Comparators.
 Decoders.
 Encoders.

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Adders
 Addition is an important process in digital
systems, especially computers.
 There are two types of basic adders:
 Half Adder.
Simple Binary Addition
 Full Adder.
0+0= 0
0+1= 1
1+0= 1
1 + 1 = 10

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Half Adders
 Half adder: Is a circuit that add two binary digits
and produce a sum bit and a carry bit.

A A B

+ B
Half Adder
Co S Circuit

Carry Sum CO S

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Half Adders
Truth table: Equation:
A B CO S
S  A B
0 0 0 0
0 1 0 1 CO  A  B
1 0 0 1
1 1 1 0
A
S
B

Logic Circuit:
CO

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Full Adders
 Since half adder cannot handle crisis when there
is an input carry from previous bit, we need to use
a full adder.
 Full adder: circuit that adds two binary numbers
with the existence of a carry in bit. It produces a
sum and a carry out. A B
Cin
A Full Adder
Cin
+ B Circuit
Co S
Carry Sum CO S
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Full Adders
Truth table: Equation:
A B Cin CO S
S  ABCin  ABCin  ABCin  ABCin
0 0 0 0 0
 A B  C
0 0 1 0 1
Co  ABCin  ABCin  ABCin  ABCin
0 1 0 0 1
 AB  C in ( A  B )
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
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Full Adders
 Full adder circuit can also be implemented using 2
half adders.

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Full Adders

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Parallel Binary Adder
 Two bit adder

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Parallel Binary Adder
 A group of 4 bits is called a Nibble.
 Four bit parallel adder.

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Parallel Binary Adder

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Parallel Binary Adder
 Parallel adders can be placed in to two categories
based on the way in which the internal carries
from stage to stage are handled.
 Ripple carry adder.
 Look-ahead carry adder.
 Externally, both types of adders are the same in
terms of inputs and outputs.
 The difference is the speed at which they can add
numbers. The look-ahead carry adder is much
faster than ripple carry adder.

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Ripple Carry Adder
 In ripple carry adder, the second full adder (FA2) needs to
wait for the input carry (Cin), coming from the output carry
(Cout) from first adder (FA1).
 Assume one adder has a delay of 8 ns. 4 adders will
contribute to 32 ns delay in adding up the 4 bits number .

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Look-Ahead Carry Adder
 The objective of this adder is to reduce the adder’s delay
in performing the addition. This is because, the input carry
and output carry is dependent on the input’s value of the
adder itself.
 No propagation delay from one adder to the other.

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4 Bit 2’s Complementer Circuit

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4 Bit Adder Subtractor

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Comparator
 Comparator is a device that compares two digital
quantities to determine the relationship of those
quantities.
 Comparison is made in terms of:
 Equal to ‘=’
 Less than ‘<’
 Greater than ‘>’
 The function of a comparator is to compare either
the input bit is the same as the reference bit or
not.
 It can be a 1-bit, 2-bit or 4-bit comparator.
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Comparator
 1 bit comparator

The output is 1 when the inputs are equal.

A B X
0 0 1
0 1 0 Equals to X-NOR

1 0 0
1 1 1
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Comparator
 2 bit comparator
The output is 1 when A0 = B0 AND A1 = B1.

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Comparator
 4 bit comparator.

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Decoder
 Circuit that:
 Accepts a set of inputs (binary number /code) and;
 Activates the only output that corresponds to that
particular input.
 Types of decoders:
 Binary decoder.
 3-bit decoder.
 4-bit decoder.
 BCD-to-decimal decoder.
 BCD-to-7-segment decoder.

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Binary Decoder
 Is used to determine if a specific binary number
occurs or not in a digital circuitry.
The output is 1 only when:
A0 = 1
A1 = 0
A2 = 0
A3 = 1

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3-Bit/Binary to Octal Decoder
 The decoder converts standard 3-bit binary into one octal
high output at a time.
Enable Data input Active high data outputs
EN2 EN1 C B A X0 X1 X2 X3 X4 X5 X6 X7
1 1 0 0 0 1 0 0 0 0 0 0 0
1 1 0 0 1 0 1 0 0 0 0 0 0
1 1 0 1 0 0 0 1 0 0 0 0 0
1 1 0 1 1 0 0 0 1 0 0 0 0
1 1 1 0 0 0 0 0 0 1 0 0 0
1 1 1 0 1 0 0 0 0 0 1 0 0
1 1 1 1 0 0 0 0 0 0 0 1 0
1 1 1 1 1 0 0 0 0 0 0 0 1
0 X X X X 0 0 0 0 0 0 0 0
X 0 X X X 0 0 0 0 0 0 0 0

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3-Bit/Binary to Octal Decoder

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3-Bit Active-Low Decoder
Enable Data input Active high data outputs
EN2 EN1 C B A X0 X1 X2 X3 X4 X5 X6 X7
0 0 0 0 0 0 1 1 1 1 1 1 1
0 0 0 0 1 1 0 1 1 1 1 1 1
0 0 0 1 0 1 1 0 1 1 1 1 1
0 0 0 1 1 1 1 1 0 1 1 1 1
0 0 1 0 0 1 1 1 1 0 1 1 1
0 0 1 0 1 1 1 1 1 1 0 1 1
0 0 1 1 0 1 1 1 1 1 1 0 1
0 0 1 1 1 1 1 1 1 1 1 1 0
1 X X X X 1 1 1 1 1 1 1 1
X 1 X X X 1 1 1 1 1 1 1 1

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3-Bit Active-Low Decoder

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4-Bit Decoder
Input Output
D C B A X
0 0 0 0 X0
0 0 0 1 X1

Also called 0 0 1 0 X2

binary to 0 0 1 1 X3
0 1 0 0 X4
hexadecimal 0 1 0 1 X5
decoder. 0 1 1 0 X6
0 1 1 1 X7
1 0 0 0 X8
1 0 0 1 X9
1 0 1 0 X10
1 0 1 1 X11
1 1 0 0 X12
1 1 0 1 X13
1 1 1 0 X14
1 1 1 1 X15

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BCD to Decimal Decoder
 Act the same as a 4-bit decoder but limited to 10 decimal
digits only

Input Output
D C B A X0 X1 X2 X3 X4 X5 X6 X7 X8 X9

0 0 0 0 1 0 0 0 0 0 0 0 0 0
0 0 0 1 0 1 0 0 0 0 0 0 0 0
0 0 1 0 0 0 1 0 0 0 0 0 0 0
0 0 1 1 0 0 0 1 0 0 0 0 0 0
0 1 0 0 0 0 0 0 1 0 0 0 0 0
0 1 0 1 0 0 0 0 0 1 0 0 0 0
0 1 1 0 0 0 0 0 0 0 1 0 0 0
0 1 1 1 0 0 0 0 0 0 0 1 0 0
1 0 0 0 0 0 0 0 0 0 0 0 1 0
1 0 0 1 0 0 0 0 0 0 0 0 0 1

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BCD-to-7 Segment Decoder
 Output of the decoder is active Low, therefore, common
anode 7-segment display is used.

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BCD-to-7 Segment Decoder
 If Active High;

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Encoder
 It works opposite ways from decoders.
 Circuit that allows only one input to be activated,
and produces an N-bit output code, depending on
which input is activated.
 Common encoders:
 8-line-to-3-line encoder.
 Decimal-to-BCD encoder.

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8-Line-to-3-Line Encoder
 Octal to binary converter: Octal input is applied by pressing
one of the push buttons at a time. Circuit converts the applied
input to a binary at the output, X.

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Decimal-to-BCD Encoder
 Also called 10-Line-to-4-Line converter.

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Quiz 1, 10 points, 10 minutes
 Design an AND/OR circuit which has 4 inputs (A
= A3, A2, A1, A0) and 2 outputs (P & Q) which
has the following specifications:
1. P becomes HIGH when the decimal value of A is 2n
where n = 0, 1, 2, 3).
2. P becomes 0 when at least 3 inputs are HIGH.
3. P is don’t care for the cases besides 1 and 2.
4. Q becomes HIGH when condition 1 and 2 is met.
5. Q becomes LOW at condition 3.

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What to do this week?

 Read about Multiplexers, Demultiplexers and


Code Converters.
 Digital Fundamentals, Thomas L. Floyd, Chapter 6,
Pages 329 – 342.

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