Chapter1 8085 Note1 2021

STES’
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Sinhgad College of Arts,
on
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Science and Commerce
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(Jr.College)&C
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AS
Ambegaon (Bk)
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16 June 2021 Sinhgad_CS_Dept 1

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Computer Science
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m
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Mrs. Taraka Ghamande
&C
AS
(Teacher & Moderator In Computer Science)

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r.)
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Intel 8085
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Microprocessor
 Computer's Central Processing Unit (CPU) built on
a single Integrated Circuit (IC) is called a
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un
microprocessor.
,P
on
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 A digital computer with one microprocessor which
be
m
acts as a CPU is called microcomputer.
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r.)
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&C
 It is a programmable, multipurpose, clock -driven,
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register-based electronic device that reads binary

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instructions from a storage device called memory,

accepts binary data as input and processes data
according to those instructions and provides results as
output.
Microprocessor
•A microprocessor consists of an ALU, control unit
and register array.
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un
•Where ALU performs arithmetic and logical
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on
operations on the data received from an input device
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or memory.
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•Control unit controls the instructions and flow of data
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&C
within the computer.
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• And, register array consists of registers identified

by letters like B, C, D, E, H, L, and accumulator.

Evolution of Microprocessor
First Generation (4 - bit Microprocessors)
e
 The first generation microprocessors were introduced
un
,P
in the year 1971-1972 by Intel Corporation. It was
on
named Intel 4004 since it was a 4-bit processor.
ga
be
 It was a processor on a single chip. It could perform
m
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simple arithmetic and logical operations such as
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addition, subtraction, Boolean OR and Boolean AND.
(J
&C
 It had a control unit capable of performing control
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functions like fetching an instruction from storage

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memory, decoding it, and then generating control

pulses to execute it.

Second Generation (8 - bit Microprocessor)
 The second generation microprocessors were
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introduced in 1973 again by Intel. It was a first 8 - bit
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microprocessor which could perform arithmetic and
on
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logic operations on 8-bit words. It was Intel 8008, and
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another improved version was Intel 8088.
m
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r.)
Third Generation (16 - bit Microprocessor)
(J
&C
 The third generation microprocessors, introduced in
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1978 were represented by Intel's 8086, Zilog Z800

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and 80286, which were 16 - bit processors with a

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performance like minicomputers.

 Tremendous improvement in speed
 Higher level language
16 June 2021 Sinhgad_CS_Dept
addressing 8
Fourth Generation (32 - bit Microprocessors)
 Several different companies introduced the 32-bit
microprocessors, but the most popular one is the Intel
e
un
80386.
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on
 Intel also introduced 80486 ,with built in math
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coprocessor.(twice as fast as 80386)
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Fifth Generation (64 - bit Microprocessors)
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 From 1995 to now we are in the fifth generation. After
&C
80856, Intel came out with a new processor namely
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Pentium processor followed by Pentium Pro CPU,

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which allows multiple CPUs in a single system to

achieve multiprocessing.
 Other improved 64-bit processors are Celeron, Dual,
Quad,
16 June 2021 Octa Core processors.
Sinhgad_CS_Dept 9
 Other improved 64-bit processors are Celeron, Dual,
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Quad, Octa Core processors.
un
,P
 Advanced Microprocessors after 20th Century
on
ga
 2003—Pentium 4EE
be
m
 2004– Pentium 4E
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r.)
 2006 – Intel Core 2(64 bit)
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&C
 2007 – Pentium Dual Core
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 Advanced Features
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1) Low voltage operating capability

2) High level Parallel Processing
3)Greater speed
Microprocessor Year of Word Memory addressing Pins Clock Remarks
Invention Length Capacity
4004 1971 4-bit 1 KB 16 750 First

KHz Microprocessor
8085 1976 8-bit 64 KB 40 3-6 Popular 8-bit
e
MHz Microprocessor
un
,P
8086 1978 16-bit 1MB 40 5-8 Widely used in
on
MHz PC/XT
ga
80286 1982 16-bit 16MB real, 4 68 6-12.5 Widely used in
be
GB virtual MHz PC/AT
m
,A
r.)
80386 1985 32-bit 4GB real, 132 20-33 Contains MMU on
(J
&C 64TB virtual 14X14 MHz chip
PGA
AS
80486 1989 32-bit 4GB real, 168 25-100 Contains MMU,

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64TB virtual 17X17 MHz cache

SC
PGA and FPU, 1.2 million

transistors

Microprocessor Year of Word Memory Pins Clock Remarks
Invention Length addressing
Capacity
Pentium 1993 32- 4GB 237 60- Contains 2 ALUs,2 Caches, FPU,
bit real,32-bit PGA 200 3.3 Million transistors, 3.3 V,
address,64- 7.5 million transistors
bit data bus
Pentium 1995 32- 64GB real, 387 150- It is a data flow processor. It
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un
Pro bit 36-bit PGA 200 contains second level cache
address MHz also,3.3 V
,P
bus
on
Pentium II 1997 32- - - 233- All features Pentium pro plus
ga
bit 400 MMX technology,3.3 V, 7.5
MHz million transistors
be
Pentium 1999 32- 64GB 370 600- Improved version of Pentium
m
III bit PGA 1.3 II; 70 new SIMD instructions
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MHz
r.)
Pentium 4 2000 32- 64GB 423 600- Improved version of Pentium
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bit &C PGA 1.3 III
GHz
AS
Itanium 2001 64- 64 address 423 733 64-bit EPIC Processor

bit lines PGA MHz-
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1.3
SC
GHz

Pentium Series
Pentium 1999 32- 64GB 370 600- Improved
III bit PGA 1.3 version of
MHz Pentium II;
70 new
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un
SIMD
,P
instructions
on
Pentium 2000 32- 64GB 423 600- Improved
ga
4 bit PGA 1.3 version of
be
GHz Pentium III
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Itanium 2001 64- 64 423 733 64-bit EPIC
r.)
bit address PGA MHz- Processor
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lines
&C 1.3
GHz
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•PGA -Pin Grid Array

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•MMX - MultiMedia eXtensions

•EPIC - Explicitly Parallel Instruction Computing
•SIMD - Single Instruction Multiple Data
•ALU - Arithmetic and Logic Unit
•MMU - Memory Management Unit
•FPU - Floating Point Unit
Microcomputer Organization
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&C
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Home Work
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un
1) Draw the diagram of the Microcomputer
,P
organization & explain the functionality of each
on
ga
block in that.
be
m
,A
r.)
2) Write a short note on the evolution of
(J
&C
microprocessor
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SC

Generic Microprocessor
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on
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(J
&C
AS
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Features of 8085 microprocessor
1) 8 bit microprocessor (each character is represented by
8 bits or a byte).
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un
,P
on
2) Manufactured with N-MOS (n-type Metal Oxide
ga
Semiconductor) technology implemented with 6200
be
m
transistors.
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r.)
(J
&C
3)It has 16-bit address lines - A0-A15 (to point the
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memory locations) and hence can point up to 2^16 =

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65535 bytes (64KB) memory locations.

The first 8 lines of address bus and 8 lines of data
bus are multiplexed AD0-AD7. Data bus is a group of
8Junelines
16 2021 D0-D7.Sinhgad_CS_Dept 17
Features of 8085 microprocessor
 Provides 5 level interrupts and supports external
e
interrupt request.
un
,P
 Requires a signal +5V power supply and operates at 3.2
on
ga
MHZ single phase clock with maximum clock
be
frequency 6 MHz and minimum clock frequency 500
m
,A
kHz.
r.)
(J
&C
AS
 Serial input/output port.

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 Enclosed with 40 pins DIP (Dual in line package).

Address and Data Bus
e
un
 The address bus has 8 signal lines A8 – A15 which are
,P
on
unidirectional.
ga
 The other 8 address bits are multiplexed (time shared) with the 8
be
m
data bits.
,A
r.)
 So, the bits AD0 – AD7 are bi-directional and serve as A0 – A7
(J
and D0 – D7 at the same time.
&C
AS
 During the execution of the instruction, these lines carry the

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address bits during the early part, then during the later part of
SC
the execution, they carry the 8 data bits.

 In order to separate the address from the data, we can use a
latch to save the value before the function of the bits changes.
8085 Bus Structure
The 8-bit 8085 CPU (or MPU – Micro Processing Unit) communicates
e
un
with the other units using a 16-bit address bus, an 8-bit data bus and a
,P
control bus.
on
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be
m
,A
r.)
(J
&C
AS
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The 8085 and Its Features
e
un
 The pins on the chip can be grouped into 6 groups:
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on
 Address Bus.
ga
Data Bus.
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
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 Control and Status Signals.
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 Power supply and frequency.
&C
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 Externally Initiated Signals.

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 Serial I/O ports.

Intel 8085 Pin Configuration
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&C
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Signals and I/O Pins

23
Control and Status Signals
e
un
 There are 4 main control and status signals. These are:
,P
ALE: Address Latch Enable. This signal is a pulse that become 1 when the
on

AD0 – AD7 lines have an address on them. It becomes 0 after that. This
ga
signal can be used to enable a latch to save the address bits from the AD
be
m
lines.
,A
 RD: Read. Active low.
r.)
(J
 WR: Write. Active low. &C
 IO/M: This signal specifies whether the operation is a memory operation
AS
(IO/M=0) or an I/O operation (IO/M=1).

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 S1 and S0 : Status signals to specify the kind of operation being performed.

SC
Usually not used in small systems.

Home Work
1)State the features of the 8085 microprocessor.
e
un
,P
on
ga
2)Draw the diagram of generic microprocessor.
be
m
,A
r.)
3) Why the bus in 8085 is known as multiplexed
(J
&C
bus? Explain it.
AS
O
SC

8085 Bus Structure
The 8-bit 8085 CPU (or MPU – Micro Processing Unit) communicates
e
un
with the other units using a 16-bit address bus, an 8-bit data bus and a
,P
control bus.
on
ga
be
m
,A
r.)
(J
&C
AS
O
SC

Intel 8085 Pin Configuration
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un
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on
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be
m
,A
r.)
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&C
AS
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SC

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,P
on
ga
be
m
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r.)
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&C
AS
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SC

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on
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be
m
,A
r.)
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&C
AS
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Signals and I/O Pins

29
Control and Status Signals
e
un
 There are 4 main control and status signals. These are:
,P
ALE: Address Latch Enable. This signal is a pulse that become 1 when the
on

AD0 – AD7 lines have an address on them. It becomes 0 after that. This
ga
signal can be used to enable a latch to save the address bits from the AD
be
m
lines.
,A
 RD: Read. Active low.
r.)
(J
 WR: Write. Active low. &C
 IO/M: This signal specifies whether the operation is a memory operation
AS
(IO/M=0) or an I/O operation (IO/M=1).

O
 S1 and S0 : Status signals to specify the kind of operation being performed.

SC
Usually not used in small systems.

Control and Status Signals.
e
un
,P
on
ga
be
m
,A
r.)
(J
&C
AS
O
SC

Frequency Control Signals
e
un
 There are 3 important pins in the frequency control group.
,P
on
 X0 and X1 are the inputs from the crystal or clock
ga
generating circuit.
be
 The frequency is internally divided by 2.
m
,A
 So, to run the microprocessor at 3 MHz, a clock running
r.)
(J
at 6 MHz should be connected to the X0 and X1 pins.
&C
AS
 CLK (OUT): An output clock pin to drive the clock of the

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SC
rest of the system.

Interrupt &Externally Initiated Signals
e
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on
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be
m
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&C
AS
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SC
Sinhgad_CS_Dept 33
Interrupt signals
e
 An interrupt is a hardware-initiated subroutine CALL.
un
,P
 When interrupt pin is activated, an ISR will be called,
on
ga
interrupting the program that is currently executing.
be
m
,A
Pin Subroutine Location
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TRAP &C 0024
RST 5.5 002C
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RST 6.5 0034

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RST 7.5 003C

INTR *
Note: * the address of the ISR is determined by the external hardware.
Sinhgad_CS_Dept 34
RESET signal
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un
,P
 Following are the two kind of RESET signals:
on
ga
 RESET IN: an active low input signal, Program Counter
be
(PC) will be set to 0 and thus MPU will reset.
m
,A
r.)
(J
 RESET OUT: an output reset signal to indicate that the
&C
μp was reset (i.e. RESET IN=0). It also used to reset
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external devices.
SC

Direct Memory Access (DMA)
 DMA is an IO technique where external IO device requests
e
un
the use of the MPU buses.
,P
on
ga
be
 Allows external IO devices to gain high speed access to the
m
memory.
,A
r.)
 Example of IO devices that use DMA: disk memory system.
(J
&C
AS
 HOLD and HLDA are used for DMA.

O
SC
 If HOLD=1, 8085 will place it address, data and control pins

at their high-impedance.
 A DMA acknowledgement is signaled by HLDA=1.
Sinhgad_CS_Dept 36
A closer look at the 8085
Architecture
e
un
,P
on
ga
be
 Now, let’s look at some of its features with more
m
details.
,A
r.)
(J
&C
AS
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SC

Intel 8085 CPU Block Diagram
e
un
,P
on
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be
m
,A
r.)
(J
&C
AS
O
SC

38
Homework
e
un
1)Draw the pin diagram of 8085 microprocessor.
,P
on
ga
be
2) State the interrupts available in 8085.
m
,A
r.)
(J
3) Explain the use of HOLD & HLDA pin.
&C
AS
O
SC

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STES’

16 June 2021 Sinhgad_CS_Dept 1

(Teacher & Moderator In Computer Science)

16 June 2021 Sinhgad_CS_Dept 2

register-based electronic device that reads binary

instructions from a storage device called memory,

• And, register array consists of registers identified

16 June 2021 Sinhgad_CS_Dept 6

functions like fetching an instruction from storage

memory, decoding it, and then generating control

16 June 2021 Sinhgad_CS_Dept 7

1978 were represented by Intel's 8086, Zilog Z800

and 80286, which were 16 - bit processors with a

performance like minicomputers.

Pentium processor followed by Pentium Pro CPU,

which allows multiple CPUs in a single system to

1) Low voltage operating capability

4004 1971 4-bit 1 KB 16 750 First

8085 1976 8-bit 64 KB 40 3-6 Popular 8-bit

80486 1989 32-bit 4GB real, 168 25-100 Contains MMU,

64TB virtual 17X17 MHz cache

PGA and FPU, 1.2 million

16 June 2021 Sinhgad_CS_Dept 11

Itanium 2001 64- 64 address 423 733 64-bit EPIC Processor

16 June 2021 Sinhgad_CS_Dept 12

•PGA -Pin Grid Array

•MMX - MultiMedia eXtensions

16 June 2021 Sinhgad_CS_Dept 14

16 June 2021 Sinhgad_CS_Dept 15

16 June 2021 Sinhgad_CS_Dept 16

memory locations) and hence can point up to 2^16 =

65535 bytes (64KB) memory locations.

 Serial input/output port.

 Enclosed with 40 pins DIP (Dual in line package).

16 June 2021 Sinhgad_CS_Dept 18

 During the execution of the instruction, these lines carry the

the execution, they carry the 8 data bits.

16 June 2021 Sinhgad_CS_Dept 20

 Externally Initiated Signals.

 Serial I/O ports.

16 June 2021 Sinhgad_CS_Dept 21

16 June 2021 Sinhgad_CS_Dept 22

Signals and I/O Pins

(IO/M=0) or an I/O operation (IO/M=1).

 S1 and S0 : Status signals to specify the kind of operation being performed.

Usually not used in small systems.

16 June 2021 Sinhgad_CS_Dept 24

16 June 2021 Sinhgad_CS_Dept 25

16 June 2021 Sinhgad_CS_Dept 26

16 June 2021 Sinhgad_CS_Dept 27

16 June 2021 Sinhgad_CS_Dept 28

Signals and I/O Pins

(IO/M=0) or an I/O operation (IO/M=1).

 S1 and S0 : Status signals to specify the kind of operation being performed.

Usually not used in small systems.

16 June 2021 Sinhgad_CS_Dept 30

16 June 2021 Sinhgad_CS_Dept 31

 CLK (OUT): An output clock pin to drive the clock of the

rest of the system.

16 June 2021 Sinhgad_CS_Dept 32

RST 6.5 0034

RST 7.5 003C