Class: T. E.

E & C Electronic Circuit Design

University questions

Q. No. 1 Design of Class-A transformer coupled amplifier to deliver 45mW of a. c. power to load
resistance of 4 Ω, take VCC=9V and efficiency of transformer as 70%.
पळस-025/CEI1330

Q. No. 2 Design a transformer coupled Class-A power amplifier to meet the following specification
PO=2W across 4 Ω load resistance, use V CC=12V, hfe=40/120, efficiency=70%. Draw circuit
diagram. Design must include calculation of bias component, selection of transformer and
transistor rating calculation. समर्थ-25

Q. No. 3 Design a transformer coupled Class-A power amplifier for

i) O/P voltage=8V (rms), RL=3 Ω
ii) Stability factor S=10
iii) Supply voltage VCC=15V
iv) ƞtransformer=80%
Take hfe=120 for transistor. Draw the designed circuit diagram. Design must include calculation
of bias component selection of transformer and transistor rating calculations.

Q. No. 4 Design a transformer coupled Class-A power amplifier using BJT for V O=8V (rms), RL=3 Ω,
stability factor =10. Supply voltage VCC=15V, ƞtransformer=80% and hfe=100 for transistor. Draw the
designed circuit diagram. Design must include calculation of bias component selection of
transformer and transistor rating calculations. मवाळ-023

Q. No. 5 Design a transformer coupled Class-A power amplifier for

i) O/P voltage=5V (rms),
ii) Stability factor S=8
iii) Supply voltage VCC=18V
iv) Load resistance RL=4 Ω
v) Efficiency of O/P transformer ƞtransformer=90%
vi) Take hfe=100
Design must include calculation of bias component selection of transformer and transistor rating
calculations. /

Q. No. 6 Design a transformer coupled Class-A power amplifier for

i) VO=4 V (rms) ii) Stability factor for bias Network S=8
iii) VCC=15V, RL=4Ω iv) ƞtransformer=0.9 BJT used have hfe=100

Q. No. 7 Design a transformer coupled Class-A power amplifier for

i) O/P voltage=8V (rms),
ii) Stability factor S=10
iii) Supply voltage VCC=20V
iv) Load resistance RL=4 Ω
v) Efficiency of O/P transformer ƞtransformer=90%
Use transistor with hfemin=100. Design must include calculation of bias component selection of
transformer and transistor rating calculations. Draw the design circuit diagram.
Unit-III- Power and Tuned Amplifiers Page i
Solution of University Question
 Class: T. E. E & C Electronic Circuit Design
Q. No. 7 Design a transformer coupled Class-A power amplifier for
i) O/P voltage=5V (rms),
ii) Stability factor S=10
iii) Supply voltage VCC=18V
iv) Load resistance RL=4 Ω
v) Efficiency of O/P transformer ƞtransformer=0.9
Take hfe of transistor as 100. Draw the design circuit diagram. The design must include
calculation of bias component selection of transformer and transistor rating calculations.
केकावली-30
Q. No. 8 Design a Class-A transformer coupled amplifier for following requirements. Pac=50 mW, RL=5 Ω,
with VCC=10V and ƞtransformer=70%. महिमा -030

Q. No. 9 Design a Class-B transformer coupled power amplifier for Pac=10W, RL=5 Ω, ƞtransformer=80%, S=8,
VCC=20V. /CEI1330

Q. No. 10 Design a Class-B transformer coupled power amplifier for following requirments.
i) Pac=10W, RL=3 Ω
ii) ƞtransformer=80%, S=9, VCC=15V. महिमा -030

Q. No. 11 Design a class B transformer coupled audio power amplifier to give O/P of 8W to a pure resistive
load of 2 Ω. Take the efficiency of O/P transformer as 78.5% and stability factor for bias network
S=7. Take VCC=15V. Design must include calculation of maximum ratings of transistors,
calculation of bias component and selection of transformer? Assume suitable value of h fe for
transistor.

Q. No. 12 A class B transformer coupled amplifier to supply 4W to a 16 Ω load, VCC=30V. Specify O/P
transformer. Assume transformer efficiency of 80%, S=8. Design must include calculation of bias
component power dissipation of both transistor and selection of transformer. समर्थ-25

Q. No. 13 Design a class B transformer coupled audio power amplifier to give O/P of 10W to a pure
resistive load of 4 Ω. Efficiency of O/P transformer as 80% and stability factor for bias network
S=8. Take VCC=18V. Design must include calculation of maximum ratings of transistors,
calculation of bias component and selection of transformer? Assume suitable value of h fe for
transistor.

Q. No. 14 Design a class B transformer coupled audio power amplifier to give O/P of 10W to a resistive
load of 3 Ω. Take efficiency of O/P transformer as 80% and stability factor for bias network as 8,
VCC=18V. Design must include calculation of power dissipation of each transistor, calculation of
bias component and selection of transformer? Assume suitable value of hfe for transistor.
पळस-025/मवाळ-023/केकावली-
30

Unit-III- Power and Tuned Amplifiers Page ii

Solution of University Question
 Class: T. E. E & C Electronic Circuit Design
Q. No. 15 Design a class B transformer coupled audio power amplifier for following requirments
i) O/P power to the load is 12 W
ii) Resistive load of 5 Ω
iii) Efficiency of O/P transformer ƞtransformer=80%
iv) Stability factor for bias network is 8
v) Supply voltage VCC=20V
Design must include calculation of bias component, power dissipation of both transistor and
selection of transformer.

Q. No. 16 Design a class B push pull transformer coupled power amplifier for
i) O/P power PO(ac)=10W, RL=4 Ω
ii) Stability factor S=9 VCC=18V
iii) O/P transformer efficiency ƞtransformer=80%
iv) Source resistance RS=600 Ω
Design must include calculation of bias component selection of transistor and selection of driver
and O/P transformer. Draw designed circuit diagram.

Q. No. 17 Design an audio complementary-symmetry class-B push-pull amplifier for producing a. c. power
of 15 watts to fed resistive load of 6 Ω and for operating frequency of 20 Hz. मवाळ-023

Q. No. 18 Design a complementary symmetry power amplifier for Pac=0.5W, RL=8 Ω, frequency response
30Hz to 10kHz. Used transistor have hfe=120. CEI1330

Q. No. 19 Design a complementary symmetry power amplifier for Pac=0.5W, RL=8 Ω, frequency response
30Hz to 10kHz. Design must include driver circuit, transistors used in complementary stages have
hfe=120. पळस-025

Q. No. 20 Design an audio complementary-symmetry class-B push-pull amplifier for following requirments.
i) Pac=15W, RL=4 Ω
ii) fL=20 Hz महिमा -030

Q. No. 21 Design complementary symmetry power amplifier to deliver power of 700 mW to a load of 4Ω.
The lower 3 dB cut-off frequency is 25 Hz, use data hfe=40. Design should include calculation of
required power supply voltage (VCC) and voltage rating of transformer. Calculation of O/P
coupling capacitors. समर्थ-25

Q. No. 22 For a complementary class B push pull amplifier in gigure design the circuit for:
i) To provide maximum a. c. O/P power of 10 W
ii) Resistive load of RL=5 Ω
iii) Operating frequency is 30 Hz
Design must include calculation of required power supply voltage (VCC) power and voltage rating
of transistors and calculation of O/P coupling capacitor C2.

Unit-III- Power and Tuned Amplifiers Page iii

Solution of University Question
 Class: T. E. E & C Electronic Circuit Design

Q. No. 23 For a complementary class B push pull amplifier in figure design the circuit for:
i) To provide maximum a. c. O/P power of 15 W
ii) Resistive load of RL=5 Ω
iii) Operating frequency is 30 Hz
Calculate VCC required, power and voltage rating of transistors and calculation of O/P coupling
capacitor.

Q. No. 24 For a complementary class B push pull amplifier in figure design the circuit for:
i) To provide maximum a. c. O/P power of 15 W
ii) Resistive load of RL=4 Ω
iii) Operating frequency is 20 Hz
Design must include calculation of required power supply voltage (VCC) power and voltage rating
of transistors and calculation of external coupling capacitor.

Q. No. 25 For a complementary class B push pull amplifier in figure design the circuit for:
i) To provide maximum a. c. O/P power of 15 W
ii) Resistive load of RL=6 Ω
iii) For operating frequency is 20 Hz
Design must include calculation of supply voltage, transistor maximum power and voltage rating
and calculation of O/P coupling capacitor C2. केकावली-30

Unit-III- Power and Tuned Amplifiers Page iv

Solution of University Question
 Class: T. E. E & C Electronic Circuit Design
Q. No. 26 Design a complementary symmetry circuit to deliver a power O/P of 15 W for load of RL=6 Ω
and operating frequency of 20 Hz. Design the component rating, transistor ratings. Modify the
circuit to remove the cross over distortion and draw circuit for the same.

Q. No. 27 Design a class AB Complementary symmetry push pull power amplifier using Darlington pair at
the O/P for. PO=8W, RL=8 Ω a 3 dB frequency of 20 Hz to 20 kHz. Draw the designed circuit
diagram. The design includes calculation of bias component value, calculation of coupling
capacitors. [Assume suitable value of hfe]

Q. No. 28 Design a Tuned amplifier using FET for

i) Resonance frequency fO=5MHz
ii) Bandwidth=125KHz
iii) Overall voltage gain=116
iv) I/P resistance=500 kΩ
1
v) Q-points: I Dq = I DSS ,V DSq ≥ 5 V
6
vi) Take V DS=V R 3(R3 is the source resistance of device)
vii) RLW=100 kΩ, RS=50 kΩ
Use potential divider network. FET used have I DSS=20 mA , V P=−2 V ,rd=50 kΩ, CO=2.5 pf.
CEI1330

Q. No. 29 Design single tuned amplifier using FET (N-channel) for following requirements.
i) A voltage gain at resonance AV =100
ii) Effective quality factor of tuned amplifier Qeffective =15
iii) Resonant frequency fO=2 MHz
iv) I/P resistance of amplifier Ri=1 MΩ
1
v) Biasing requirements I Dq = I DSS , V DSq=8 V with supply voltage VDD=20V
2
Use FET has parameters: I DSS=7 mA ,V P=−6 V , rd=50 kΩ, gmo =5 mS . Draw the designed circuit.
Design must include bias component calculations, Tuned circuit component [L, C, and R]. No
need of coupling and bypass capacitor calculation.

Unit-III- Power and Tuned Amplifiers Page v

Solution of University Question
 Class: T. E. E & C Electronic Circuit Design

Q. No. 30 Design single tuned amplifier using FET (N-channel) for following requirements.
i) A voltage gain at resonance AV =100
ii) Effective quality factor Qeffective =15
iii) Tuned frequency fO=1 MHz
iv) I/P resistance of amplifier Ri=1 MΩ
1
Use of self-bias circuit with VDD=20V and Q points I Dq = I DSS , V DSq=8 V Use FET has
2
parameters: I DSS=7 mA ,V P=−6 V , rd=100 kΩ, gmo =5 mS, C O=10 pf . Draw the designed circuit.
Design must include bias component calculations, Tuned circuit component [L, C, and R]. No
need of coupling and bypass capacitor calculation.

Q. No. 31 Design a single tuned amplifier using N-channel FET for following requirements.
i) AV =100, fO=1 MHz
ii) Qeffective =15
iii) Ri≥1 MΩ
1
iv) self-bias N/W for VDD=20V and Q points I Dq = I DSS , V DSq =8 V
2
Use FET has parameters: I DSS=7 mA ,V P=−6 V , rd=100 kΩ, gmo =5 mS, C O=10 pf .
महिमा -030
Q. No. 32 Design a single tuned amplifier in figure using BJT for
i) A voltage gain at resonance AV ≥ 50
ii) Effective quality factor of tuned amplifier Qeffective =20
iii) Resonant frequency fO=4 MHz
iv) Working load resistance RLW=100 kΩ
Use BJT with hfe=100, hie=10 kΩ, rO=5o kΩ, CO=10 pf.

Q. No. 33 Design a single tuned amplifier in figure using BJT in C. E. configuration for following
specification.
i) A voltage gain at resonance AV ≥ 50
ii) Effective quality factor of amplifier Qeffective =20
iii) Resonant frequency fO=4 MHz
iv) Working load resistance RLW=100 kΩ

Unit-III- Power and Tuned Amplifiers Page vi

Solution of University Question
 Class: T. E. E & C Electronic Circuit Design
Use transistor having parameters hfe=100, hie=10 kΩ, rO=5o kΩ, CO=10 pf. Design must include
calculation of tank circuit parameters L, R, and C केकावली-30

Q. No. 34 Design single tuned amplifier having center frequency of 500 kHz and half power BW of 10 kHz.
The device parameters are gm=45 mS total shunt capacitance=400pF. Design values of L, R,
voltage gain and quality factor Only. Draw design diagram. समर्थ-25

Q. No. 35 Design a single tuned amplifier in figure using BJT for

i) A voltage gain at resonance AV =80
ii) Effective quality factor of tuned amplifier Qeffective =25
iii) Resonant frequency fO=3 MHz
iv) RLW=100 kΩ
Use BJT with hfe=100, hie=10 kΩ, rO=5o kΩ, CO=10 pf. Design must include calculation of tank
circuit parameters

Q. No. 36 Design a Tuned amplifier using FET with potential bias network for AVS=80, Fr=2MHz, BW=200
kHz, Ri=800kΩ, RS=500Ω, with IDq=IDSS/2 and VDSq≥3V. Take VR3=VRD where R3 is device source
resistance. FET used have IDSS=2 mA, VP=-5V, gmo=8mS, rd=50kΩ, CO=2 pF.मवाळ-023

Q. No. 37 Design a tuned amplifier using BJT as an active element for

i) Resonance frequency fO=3MHz
ii) Bandwidth=200 kHz
iii) Overall voltage gain AVS=80
iv) I/P resistance Ri=10 kΩ
v) Stability factor for bias network S=8
vi) ICq=1mA, VCEq≥5V
vii) RS=50Ω, RLW=100 kΩ
Unit-III- Power and Tuned Amplifiers Page vii
Solution of University Question
 Class: T. E. E & C Electronic Circuit Design
Use potential divider bias network BJT used have hie=12 kΩ, ro=150kΩ, hfe=100, CO=2 pF.
पळस-025

Unit-III- Power and Tuned Amplifiers Page viii

Solution of University Question