AN14: Application Note

Using the PE3501 Prescaler

Introduction with the PE3236 PLL to
Synthesize Frequencies up to
There are many applications that require the synthesis of
3.5 GHz
frequencies above 3 GHz. However, this range is
generally beyond the maximum frequency that PLL
Features
devices can directly accept. By using an external
prescaler, the range of a PLL can be extended. This • Extends FMAX of available PLL
Application Note explains how the PE3501 Divide-by-2 devices
Prescaler can be used in combination with a PE3236 PLL • Negligible additive phase noise
to synthesize frequencies as high as 3.5 GHz. • Low power prescaler operation
(12 mA @ 3V typical)
Setup

Figure 1 shows the block diagram of the PE3501 and

PE3236 used together in a high-frequency synthesizer.
The PE3236 phase detector outputs are fed through a
loop filter into a differential operational amplifier (see
Figure 2). The voltage output of the op-amp is used to
control the tuning pin of the voltage-controlled oscillator
(VCO). The VCO used is capable of generating 3.0 to 3.5
GHz. A small portion of this VCO signal is fed back to the
PE3501 prescaler input, where its frequency is divided in
half. The resulting 1.50 to 1.75 GHz signal is then applied
to the PE3236 frequency input. This is well below the
upper frequency limit of 2.2 GHz for the PE3236.

Figure 1. Block Diagram of PE3236 / PE3501 Loop

10 MHz TCxO
1500 MHz PE3501 3000 MHz To Spectrum
(Divide-by-2) Analyzer
Fin

PE3236 VCO
Loop Filter
REF (PLL) (3.0-3.5 GHz)

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Page 1 of 5
 AN14
Application Note

Figure 2. Loop Filter Used for This Design

C6 R6

-VCC
C7

4 1 8
R1 R3
PD_U\ 2 -
6 To
3 + VCO
PD_D\ AD797
R2 R4
C3 7 5

C1 C2

+VCC

C5 R5

Loop Filter Setup: LPF Constants:

In order to calculate the loop filter VCO = Micronetics M3500C-2032S
component values, several constants are Kvco = 100 MHz / V at 3.0 GHz
needed. The following list represents REF = Vectron TCXO OSC-3A0-10 MHz
those constants. Table 1 shows the Fc = 1 MHz
calculated values for the loop filter Phase Detector Gain = 430 mV / RAD
components. R1 = R2 = 120 ohms
R3 = R4 = 390 ohms
C5 = C7 = 22 pF

Table 1. Loop Filter Parameters

LPF Characteristics LPF Components

BW (kHz) Phase Margin (Degrees) C1, C2 C3, C6 R5, R6
68.00 66.00 5.6 nF 4.7 nF 2.7 kohms

Copyright  Peregrine Semiconductor Corp. 2003 File No. 72/0020~01A | UTSi  CMOS RFIC SOLUTIONS

Page 2 of 5
AN14
Application Note

Results
Figure 3 shows the phase noise as measured at both the output of the VCO and the output of the PE3501
prescaler. In addition to these two plots, a third plot is shown which is exactly 6 dB below the VCO’s phase
noise plot. This third plot represents the theoretical phase noise improvement that results from dividing the
VCO output frequency by 2. (6 dB = 20 log(N), where N is the prescaler division ratio of 2).
We see from Figure 3 that this theoretical phase noise plot is almost identical to the actual phase noise
measured at the output of the PE3501. This indicates the PE3501 has a negligible affect on the phase noise of
the system.

Figure 3. Phase Noise Plot

PE3236 Phase Noise

(PE3501 Included in the PE3236 Loop)

-60
-70
Phase Noise (dBc/Hz)

-80
VCO Output, 3GHz
-90
PE3501 Output, 1.5GHz
-100
Ideal Divide-by-2
-110
-120
-130
100 1000 10000 100000 1000000
Frequency Offset (Hz)

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Page 4 of 5
+5V

Y3

4
C18 C19 10MHz C20 +15V
3 TP4

B+
.01uF 100pF RF +3V
.01uF + C24

1
C21 C22 10uF

VT
GND
.01uF 100pF C23 +
C6 4.7nF R6 2.7K 10uF

1
2

Copyright  Peregrine Semiconductor Corp. 2003

6
5
4
3
2
1
44
43
42
41
40
-VCC
+3V C7 22pF

7 39 Y2

4
1
8
1

FC
8 38
+3V
Figure 4. PE3236 / PE3501 Schematic

9 37 PD_U R1 120 R3 390 2 -

10 36 PD_D 6 R7 220 13 5
VCC

11 U1 35 R2 120 R4 390 3 + VT RF
12 34 CEXT 1 C40
S_WR TP5
13 PE3236 33 U2 1nF

7
5
14 32 DOUT C35 C3 AD797 VCO1 (3GHz-3.5GHz)
DATA 15 31 22pF 4.7nF
16 30 C8 C9 C1 C2 10nF C12
CLK FP
17 29 TBD TBD 5.6nF 5.6nF
+VCC
FSELS C5 R5 10pF C11
22pF 2.7K

R8 51

18
19
20
21
22
23
24
25
26
27
28
U3
C17 22pF PE3501
5 4
6 GND GND 3
+3V C16 100pF 47pF C13 7 GND INB 2 15pF C10
8 RFout RFin 1
GND VDD

10pF C14
+3V

1000pF C15

+3V PLL Power Supply Op-Amp Power Supply

+16V -16V
C25 C35 C38 C39
C30 C31 C32 C33 C34 C26 C27 C28 C29 + C36 10uF +
.01uF 22pF 22pF 22pF 22pF 100pF 100pF 100pF 100pF 100pF .01uF 10uF C37
.01uF 100pF

Distributed close to pins on layout

File No. 72/0020~01A |

AN14
Application Note

UTSi  CMOS RFIC SOLUTIONS

AN14
Application Note

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No patent rights or licenses to any circuits Peregrine products are protected under one or
described in this application note are implied or more of the following U.S. patents: 6,090,648;
granted to any third party. 6,057,555; 5,973,382; 5,973,363; 5,930,638;
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5,600,169; 5,596,205; 5,572,040; 5,492,857;
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applied for.
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are registered trademarks of Peregrine Semiconductor Corporation.
Copyright © 2003 Peregrine Semiconductor Corp. All rights reserved.

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