DLD Lab Mid Fall 2022 Paper X2

Serial No.
Reg. No. Total Marks - 70
Name. Time – 1.5 hours
Section. _______
Marks Obtained.
Date. ___ /___ / 2022

Instruction:

 Read the tasks carefully and use the examination sheet for the theoretical task.

 Write your Name, Serial No, and Registration No in the provided space

Question # 1: Consider the following function F1: (40 Marks) – 40 Minutes.

F1(A,B,C) = ∑ (0,2,3,5,6,7,8,9) + dm(10,11,12,13,14,15)

a) You are required to create the truth table for the function F1. (10 marks)
b) Write the Standard SOP and POS Boolean expressions for the above functions F1. (10 marks)
c) By using the truth table, write the canonical function, design K-Map and write the minimized SOP for
the function F1. (10 marks)
d) Draw the logic diagram for Standard SOP and minimized SOP on the circuit maker and verify your
results by using binary testing and truth table. (10 marks)

Question # 2: (5*6 = 30 Marks) – 40 Minutes.

1) Design a truth table for the half adder circuit. Clearly mention inputs and outputs.
2) Write the SOP expressions for sigma and carryout.
3) Write the canonical functions for sigma and carryout (only SOP).
4) Write the Minimized SOP for sigma using the K-Map grouping technique.
5) Implement a half adder on Circuit Maker and verify the results.
6) Draw the block diagram of the above half adder.

NOTE:
 Submit *.CKT file and PDF or MS-WORD file along with at least one snapshot of each circuit.
 Use your registration number for the submission of.CKT, PDF or MS-WORD file. e.g.
L1S22BSCSXXXX.CKT, L1S22BSCSXXXX.PDF, L1S22BSCSXXXX.DOCX
 And finally submit L1S22BSCSXXXX.ZIP folder on CMS portal.