Course Outline

Faculty School of Science, Engineering & Technology

Department Computer Science & Engineering (CSE)

Programme B.Sc. in CSE

Course Code CSE-2330

Course Title Digital Logic Design Lab

Course Type
Basic Science and Engineering

Year/Level/Semester 2nd year/ Undergraduate level/ 3rd Semester

Academic Session 2023

Name of the
Instructor Tanvir Ahmed

Pre-requisites (if any)

Credit Value 1
Contact Hours 2

✓ Understanding the concepts and theories of Digital logic Design course by

Course Objectives
performing laboratory experiments.

This course covers the laboratory experiments based on the concepts and theories of
Course Synopsis
Digital Logic Design course.
 Program Outcomes (POs) of B. Sc. in CSE Program

At the end of the program, students will be able to

PO1 Engineering Knowledge (Cognitive): Apply the knowledge of mathematics, science,
engineering fundamentals and an engineering specialization to the solution of complex
engineering problems.
PO2 Problem Analysis (Cognitive): Identify, formulate, research the literature and analyze
complex engineering problems and reach substantiated conclusions using first principles of
mathematics, the natural sciences and the engineering sciences.
PO3 Design/Development of Solutions (Cognitive, Affective): Design solutions for complex
engineering problems and design system components or processes that meet the specified needs
with appropriate consideration for public health and safety as well as cultural, societal and
environmental concerns.
PO4 Investigation (Cognitive, Psychomotor): Conduct investigations of complex problems,
considering design of experiments, analysis and interpretation of data and synthesis of
information to provide valid conclusions.
PO5 Modern Tool Usage (Psychomotor, Cognitive): Create, select and apply appropriate
techniques, resources and modern engineering and IT tools including prediction and modeling
to complex engineering activities with an understanding of the limitations.
PO6 The Engineer and Society (Affective): Apply reasoning informed by contextual
knowledge to assess societal, health, safety, legal and cultural issues and the consequent
responsibilities relevant to professional engineering practice.
PO7 Environment and Sustainability (Affective, Cognitive): Understand the impact of
professional engineering solutions in societal and environmental contexts and demonstrate the
knowledge of, and need for sustainable development.
PO8 Ethics (Affective): Apply ethical principles and commit to professional ethics,
responsibilities and the norms of the engineering practice.
PO9 Individual Work and Teamwork (Psychomotor, Affective): Function effectively as an
individual and as a member or leader of diverse teams as well as in multidisciplinary settings.
PO10 Communication (Psychomotor, Affective): Communicate effectively about complex
engineering activities with the engineering community and with society at large. Be able to
comprehend and write effective reports, design documentation, make effective presentations and
give and receive clear instructions.
PO11 Project Management and Finance (Cognitive, Psychomotor): Demonstrate knowledge and
understanding of the engineering and management principles and apply these to one’s own work
as a member or a leader of a team to manage projects in multidisciplinary environments.
PO12 Life-Long Learning (Affective, Psychomotor): Recognize the need for and have the
preparation and ability to engage in independent, life-long learning in the broadest context of
technological change.
 Course Learning Outcome:

By the end of this course students will be able to

CLO1 Implement the knowledge of Boolean algebra and logic gates in circuit design.
CLO2 Design digital electronic circuits from elementary to tertiary level.

Mapping Alignment of CLOs and PLOs

Program Learning Outcomes (PLOs)

Course PLO1 PLO2 PLO3 PLO4 PLO5 PLO6 PLO7 PLO8 PLO9 PLO10 PLO11 PLO12
Learning
Outcome
(CLOs)
CLO 1 3 3 3 2 1 1 1 1 1 2

CLO 2 2 2 3 2 3 1 1 2 2 2 2

3-Strong Correlation, 2- Medium Correlation, 1- Low Correlation

 Course Plan & Mapping

Week/ Topic Teaching Assessment Mapping

Experiment Learning Strategy with CLO
Strategy
Viva, Attendance,
Week-1 To construct and study the following Lecture, Lab performance, CLO 1
[3 Hours] logic gates Experiment Report
AND , OR, NOT
Lecture, Viva, Attendance,
Week-2 To construct and study the following Experiment Lab performance, CLO 1
[3 Hours] logic gates Report
NAND, NOR, EXOR
Verify the Demorgans Law : Law(I) Lecture, Viva, Attendance,
Week-3 Experiment Lab performance, CLO 1
and Law(II)
[3 Hours] Report
Lecture, Viva, Attendance, CLO 2
Week-4 To Verify different kind of applications Experiment Lab performance,
[3 Hours] of Boolean algebra. Report
Lecture, Viva, Attendance, CLO 2
Week-5 To Verify different kind of applications Experiment Lab performance,
[3 Hours] of Boolean algebra. Report
Week-6 Practice lab of week 1 to week 5 experiments

Viva, Attendance,
Week-7 To construct an AND gate by diode Lecture,
Lab performance,
[3 Hours] resistors and observe its characteristics. Experiment CLO 2
Report
To verify the characteristics of Lecture, Viva, Attendance,
Week-8 CLO 1
Exclusive OR and Exclusive NOR Experiment Lab performance,
[3 Hours] Report
using basic logic gate.
Lecture, Viva, Attendance, CLO 1
Week-9 To be familiar with demultiplexer using Experiment Lab performance,
[3 Hours] the 74138 IC. Report
Lecture, Viva, Attendance,
Week-10 Design and implement various Experiment Lab performance, CLO 2
[3 Hours] sequential logic circuits. Report
Lecture, Viva, Attendance,
Week-11 Experiment on synchronous up counter CLO 1
Experiment Lab performance,
[3 Hours] and down counter. Report
Viva, Attendance, CLO 2
Week-12 To perform other experiments relative Lecture,
Lab performance,
[3 Hours] to this course. Experiment
Report
Week-13 Practice lab of week 7 to week 13 experiments
[3 Hours]
Week-14 Final Lab Exam
 Course Assessment & Evaluation:

IE- Continuous Internal SMEE- Semester End

Evaluation Examination
Total Marks (70 Marks) (30 Marks)
(100) Lab Lab Lab
FINAL
Attendance Performance/Assessment Report Project/viva
EXAMINATION
10 30 10 20 30
Bloom’s
Category
Remember 5 10
Understand 10 10 2 10
Apply 10 5 5 3 5
Analyze 10 5 5 2 5
Evaluate 5 5 3 5
Create 0 10 5

In case any student misses one or two lab experiment, he/she can do it in
Make up Procedures practice lab. However, there will be no make-up lab final exam.

Recommended Readings:
1. Mano, M. Morris. Digital logic and computer design. Pearson Education India, 2017.
2. Floyd, Thomas L. Digital fundamentals, 10/e. Pearson Education India, 2011.
Suggested/supplementary Readings:

Other Sources:

Prepared by: Checked by: Approved by:

Tanvir Ahmed

Course Instructor Signature of The Signature of The Dean

Chairman/Head